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Pamintuan, Jandez Mark APRIL 18, 2023

CPARCH1L – COE201
Engr. JC Z. Apduhan

Experiment #2 Ripple Adder Carry


A. Using purely full adder.
Derive the truth table of ripple carry adder using purely full adder implementation:
A0 B0 Cin0 Cin1-2-3 S0 S1-2-3 Cout

0 0 0 0 0 0 0

0 0 1 0 1 0 0

0 1 0 0 1 1 0

0 1 1 1 0 0 1

1 0 0 0 1 1 0

1 0 1 1 0 0 1

1 1 0 1 0 1 1

1 1 1 1 1 1 1

Sum= ABC + ABC + ABC + ABC

= (AB + AB) C + (AB + AB) C

= (A B) C + (A B) C

=A B C

Carry= ABC + ABC + ABC + ABC

= AB + (AB + AB) C

= AB + (A B) C
2. Design, construct and test a combination of full adder circuit implementation of ripple
carry adder. Draw your logic diagram inside the box.
B. Using a combination of half adder and full adders.
1. Derive the truth table of ripple carry adder using full adder and half adder implementation:
A B SUM CARRY

Cin A3 A2 A1 A0 B3 B2 B1 0 S3 S2 S1 S0 Cout

0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 1 0 0 0 1 0 0 1 0 0

0 0 0 1 0 0 0 1 0 0 1 0 0 0

0 0 0 1 1 0 0 1 1 0 1 1 0 0

0 0 1 0 0 0 1 0 0 1 0 0 0 0

0 0 1 0 1 0 1 0 1 1 0 1 0 0

0 0 1 1 0 0 1 1 0 1 1 0 0 0

0 0 1 1 1 0 1 1 1 1 1 1 0 0

0 1 0 0 0 1 0 0 0 0 0 0 0 1

0 1 0 0 1 1 0 0 1 0 0 1 0 1

0 1 0 1 0 1 0 1 0 0 1 0 0 1

0 1 0 1 1 1 0 1 1 0 1 1 0 1

0 1 1 0 0 1 1 0 0 1 0 0 0 1

0 1 1 0 1 1 1 0 1 1 0 1 0 1

0 1 1 1 0 1 1 1 0 1 1 0 0 1

0 1 1 1 1 1 1 1 1 1 1 1 0 1
2. Design, construct and test a combination of full and half adder circuit implementation of ripple
carry adder. Draw your logic diagram inside the box.
A1 A2 A3 A4 B4 B3 B2 B1 S4 S3 S2 S1 CARRY

0 0 0 0 0 0 0 0 0 0 0 0 0

0 1 0 0 0 1 0 0 1 0 0 0 0

1 0 0 0 1 0 0 0 0 0 0 0 1

1 0 1 0 1 0 1 0 0 1 0 0 1

1 1 0 0 1 1 0 0 1 0 0 0 1

1 1 1 0 1 1 1 0 1 1 0 0 1

1 1 1 1 1 1 1 1 1 1 1 0 1

OBSERVATION:

Experiment #2 appears to have included building a Ripple Adder Carry using only full adders. A complete
adder is a digital circuit that takes three inputs (two operands and a carry-in) and adds them to create a sum
and a carry-out.

One thing to keep in mind when employing solely full adders in a Ripple Adder Carry is that it might cause
considerable delays in carry propagation. Because the carry-out from each complete adder is dependent on the
carry-in from the previous stage, the carry signal must pass through each stage sequentially.

CONCLUSION:

Adding binary integers with solely complete adders in a Ripple Adder Carry can be an acceptable strategy. It
is a simplistic implementation that is simple to understand and create.

The propagation delay of the carry signal through each step is one possible downside of this system. This
delay can reduce the adder's speed and render it unsuitable for high-performance applications.

Furthermore, as compared to other types of adders, employing solely complete adders might result in a bigger
circuit, which can increase complexity and expense.
NATIONAL UNIVERSITY
RUBRIC FOR LABORATORY PERFORMANCE

Course: Computer System Architecture

Experiment Title: Experiment #2 Ripple Adder Carry Group No.:_____________________


Section: COE201 Instructor: Engr. JC Z. Apduhan Group
Pamintuan, Jandez Mark

BEGINNER ACCEPTABLE PROFICIENT


CRITERIA SCORE
1 3 5
I. Laboratory Skills
Members do not Members occasionally Members always demonstrate
Manipulative Skills demonstrate needed skills. demonstrate needed skills. needed skills.
Members are unable to set Members are able to set up Members are able to set up the
Experimental Set-up up the materials. the materials with materials with minimum
supervision. supervision.
Members do not Members occasionally Members always demonstrate
Process Skills demonstrate targeted demonstrate targeted targeted process skills.
process skills. process skills.
Members do not follow Members follow safety Members follow safety
Safety Precautions
safety precautions. precautions most of the time. precautions at all times.
II. Work Habits
Time Management / Members do not finish on Members finish on time with Members finish ahead of time
Conduct of time with incomplete data. incomplete data. with complete data and time to
Experiment revised data.
Members do not know their Members have defined Members are on tasks and
tasks and have no defined responsibilities most of the have defined responsibilities at
Cooperative and responsibilities. Group time. Group conflicts are all times. Group conflicts are
Teamwork conflicts have to be settled cooperatively managed most cooperatively managed at all
by the instructor. of the time. times.
Messy workplace during and Clean and orderly workplace Clean and orderly workplace
Neatness and
after the experiment. with occasional mess during at all times during and after the
Orderliness
and after the experiment. experiment.
Ability to do Members require Members require occasional Members do not need to be
independent work supervision by the instructor. supervision by the instructor. supervised by the instructor.
Other comments / Observations: TOTAL SCORE

RATING = ((Total Score /


40) x 100))

Evaluated by:

________________________________________
Printed Name and Signature of Faculty Member
Date:_____________________________

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