PAKISTAN NAVY ENGINEERING COLLEGE, NATIONAL UNIVERSITY OF

SCIENCES AND TECHNOLOGY, KARACHI

PNEC NUST

Student Lab Manual

DIGITAL LOGIC DESIGN

EE-221

Name: ____________________________________________________________________

CMS-ID: _______________________ Class: ____________ Section: _____________

Batch: ________________________ Semester: ________________________________

Department: ________________________________________________________________

EE UG Revised Curricula 2018

DEPARTMENT OF ELECTRONICS & POWER ENGINEERING
 Lab Manual Contents

1. Lab Rubrics with Marks Distribution

2. List of Experiments
3. Lab Assessment Record
4. Detailed Experiment Sheets
 National University of Sciences & Technology- Pakistan Navy Engineering College
(Group-1): Engineering Lab Rubric

Skill Level
Rubrics BT
Rubrics Indicator Needs Work Developing Competent Exemplary
Code Domain
2.0 3.0 4.0 5.0
Experimental R1 P Ability to gather materials, follow All required materials are Most required materials All required materials are Materials are gathered
Methods experimental procedure, control not gathered, procedure is are gathered, procedure gathered, selected materials with clarity and precision,
variables, present data/ evidence inadequately followed, could be better are suitable, procedures are procedure is efficiently
using charts/ tables/graphs to enable inattentive to safety followed, mostly well followed, and followed, limitations are
comprehension/interpret findings, measures. attentive to safety. limitations are considered, analyzed, demonstrates
compare these values in literature, attentive to safety. exemplary safety.
error analysis, identify limitations
and attentive to comply safety
procedures.
☐ ☐ ☐ ☐
☐

Tool R2 P Ability to identify, understands, and Demonstrates minimal or Demonstrates some Demonstrates skillful Demonstrates excellent
Handling uses relevant tools to carry out no ability to identify or use ability to identify and ability to identify and use abilityto identify and use
experiment task/activity. tools for an engineering use tools for an relevant tools for an the most relevant tools for
activity. engineering activity. engineering activity. a range of engineering
activities.
☐ ☐ ☐ ☐ ☐

Individual R3 A Ability to carry out individual Rarely performs given task Sometimes performs a Exhibits an ability to Shows an excellent ability
and Team responsibilities, and participate as an individually and no active given task individually perform a given task to perform a given task
Work active team member to accomplish contribution as a team and provides some individually. Provides an individually. Provides
milestones within a specified time. member. Shows poor ability contribution as a team active contribution as a dynamic contribution as a
to manage time. member. Shows little team member to team member /leader to
ability to manage time. accomplish a task in accomplish a given task
☐ specified time. within specified time.
☐ ☐ ☐ ☐
Lab Report R4 A Ability to record and analyze the The required data is not The required data is The required data is The required data is
acquired data, and conclude the recorded and analyzed in recorded but not properly recorded, recorded, analyzed and
results in a form of a report. the lab report. properly analyzed in the analyzed and concluded in concluded in the lab report
lab report. the lab report. with exemplary clarity and
correctness.
☐ ☐ ☐ ☐ ☐
 LIST OF EXPERIMENTS

BT
Sr. No Topics Book PLO CLOs Domain

1 Verification of the functions of Logic Gates

Digital circuit designing and simulation using

2
Software Application

3 Verification of De-Morgan‟s Theorems

4 Use of Multiplexer

5 Use of De-multiplexer

6 Construction of the Clocked RS Latch

Lab
Manual 5&9 4&5 A2 & P3
7 Verification of the function of Flip Flop

8 Construction of Binary Counter circuit

9 Construction of Shift Register circuit

10 Construction of Ring Counter circuit

11 Construction of Adder/ Subtractor circuit

12 Use of Decoder with Seven Segment Display

13 Open ended problem

 Assessment Record

Session: __________________ Lab Venue: _______________________

Course Title CMS ID Student Name Department

EE/ME/IME

S Experiment Title/Experiment Marks Obtained Total Teacher

Date
No Number R1 R2 R3 R4 Marks (10) Initial
1

10

11

12

13

14

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DIGITAL LOGIC DESIGN
 LAB # 01
Verification of the functions of Logic Gates

OBJECTIVE: To experimentally determine the functions of Logic Gates.

EQUIPMENT:
Bread board
Power supply
LEDs
ICs: 7400, 7404, 7408 & 7432
DESCRIPTION:

Gates are the building blocks of all the digital circuits. Gates can be constructed by using switches,
relays, transistors, diodes etc. but now they are commonly available in the form of I.Cs (Integrated
Circuits). Generally more than one gate is present in a Gate I.C. Each I.C contains sets of input and
output pins

PROCEDURE:

1. Use TTL book or other resource to find out that which I.C contains which logic circuit, note down its
pin diagram and fill Table #1.
2. Insert the I.C on the bread board.
3. Connect +5V and Ground pins of the I.C with the respective leads of the power supply.
4. Connect the input pins with a DIP switch and output pin with an L.E.D.
5. Apply different combinations of Logic 1 and 0 to the input pins and observe outputs on L.E.D and fill
Table # 2.

OBSERVATIONS:
Table # 1:
I.C # Type of Gate No of Gates No of Inputs of a Gate
7400
7404
7408
7432

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DIGITAL LOGIC DESIGN
Table # 2: Fill the following table for each Gate I.C

Inputs Output Output Output Output

7400 7408 7432 7404
A B Y Y Y Y
0 0
0 1
1 0
1 1

TASKS:
Experimentally prove that;
i) NAND is a Universal Gate, by constructing different Gates using NAND Gates.
ii) Fundamental Gates can be used for the construction of other Logic Gates.
iii) Logic Gates can be used to control the flow of signals

ANALYSIS:
On the basis of your observations analyze the function of NOT, OR, AND and NAND gates in
your words.

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DIGITAL LOGIC DESIGN
 LAB # 02
Digital circuit designing and simulation using Software Application

OBJECTIVE: Introduction to Software designing plus verification of basic Logic Gates

(7404, 7408, 7432) truth tables with the help of simulation.

EQUIPMENT: PC, Multisim

DESCRIPTION:
Multisim is an industry-standard simulation and circuit design software which gives the advanced
analysis and design capabilities to optimize performance, reduce design errors, and shorten time to
prototype. The steps how to get started with Multisim are as follows:

PROCEDURE:
1. Open Multisim from the Start menu and click on ‘Evaluate’.

2. Click the option Place source to add 5V VCC and Ground, then click on TTL to
insert 7404 NOT gate. After clicking on the component press OK to have the parts placed on
the workspace.

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DIGITAL LOGIC DESIGN
3. Similarly click the option Place basic and then option Switches to insert a SPDT switch
that will act as an input for the logic gate. After placing all the components on the workspace,
connect them using cursor. The final schematic should be as followed:

4. Now click the Play button to run the simulation and press the Space Bar to change the
state of the input logic gate.

5. Observe the response of L.E.D at the output and verify the truth table.

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DIGITAL LOGIC DESIGN
 Note: Use Digital Ground instead of normal ground.

OBSERVATIONS:
Use above mentioned example to design a Counter/Shift Register/Adder circuit.
Include the Screen shot of the circuit you made and simulated.

ANALYSIS:

Analyze how simulation is useful for the design & development of logic circuits.

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DIGITAL LOGIC DESIGN
 LAB # 03
Verification of De-Morgan’s Theorems

OBJECTIVE: To practically verify the De Morgan‟s Theorems.

EQUIPMENT:Bread Board
Power Supply,
I.Cs 7400,7404,7408,7432
LEDs

DESCRIPTION: De Morgan‟s Theorems can be expressed/stated below:

1- A . B = A + B i.e. Compliment of a product is equal to the sum of the

compliments

2- A + B = A . B i.e. Complement of a sum equals the product of complements

CIRCUIT DIAGRAMS:
Using separate sheet draw the following:
(i) Logic diagrams for the R.H.S of the two De-Morgan‟s Theorems‟ expressions
(ii) Symbols of the Gates whose functions are expressed by the L.H.S of the theorems
(iii) Symbols of equivalent “Bubbled Gates”

PROCEDURE:

1. Construct the two circuits, by using Gate I.Cs: 7404 and 7432 (for first theorem) and
7404 and 7408 (for second theorem).

2. Connect LEDs to observe the outputs of the circuits.

OBSERVATIONS:

Write down the Truth Tables of the two circuits as observed by you.
TRUTH TABLE CIRCUIT # 1

A B Y

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DIGITAL LOGIC DESIGN
TRUTH TABLE CIRCUIT #2

A B Y

ANALYSIS:
Q.1 Circuit # 1 is equivalent to which single Logic Gate?
Q.2 Circuit # 2 is equivalent to which single Logic Gate?

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DIGITAL LOGIC DESIGN
 LAB # 04
Use of Multiplexer

OBJECTIVE: To understand the use of a MULTIPLEXER.

EQUIPMENT:
Bread Board
Power Supply
I.C 74150
DESCRIPTION:

Multiplexer is a circuit with many data inputs but only one data output, it also contains
control inputs.
By using control inputs any one data input can be selected and the logic value present on it can
be directed to the output. Multiplexer is also called as “Data Selector”. It is an easy way to solve
logic problems.

DIAGRAM :

(16 x 1 MUX)

Pin Diagram of 74150 MUX

For the given Boolean expression write down the truth table, connect the MUX I.C‟s data input
pins with the logic levels, in accordance to the logic levels in output-column(i.e for D0 apply
logic level of Y0, for D1 logic level of Y1 and so on), and apply one input combination ,at a
time, on the control inputs. Observe the outputs.
____ _ _ __ _ _ _ _ __
Y= DCBA + DCBA + DCBA + DCBA + DCBA + DCBA + DCBA

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DIGITAL LOGIC DESIGN
OBSERVATIONS:
Observe and verify the outputs of the Truth Table from the circuit:

S.No. Control Inputs Outputs

D C B A Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

ANALYSIS: Analyze the use of Multiplexer for solving logic problems?

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DIGITAL LOGIC DESIGN
 LAB # 05
Use of De-multiplexer

OBJECTIVE: To learn the use of a Decoder.

EQUIPMENT:
Bread Board
Power Supply
IC 74138
LED
DESCRIPTION:
Decoder is similar to a De-multiplexer, with one exception, that, there is no data input. The Inputs are
only the control inputs which produce one active output. The active/selected output contains logic 0
while remaining outputs contain logic 1.

DIAGRAM:
Pin Diagram of 3x8 Line Decoder I.C 74138

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DIGITAL LOGIC DESIGN
OBSERVATION:
Construct the circuit to observe the function of the decoder by connecting LEDs on the Y
outputs. Activate the outputs one by one by applying appropriate control input
combinations. Note down the selected „Y‟ output against each input combination.

Control Inputs Selected

A B C Y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

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DIGITAL LOGIC DESIGN
 LAB # 06
Construction of the Clocked RS Latch

OBJECTIVE: To construct “Clocked R-S Latch” and verify its truth table.

EQUIPMENT:
Bread Board,
Power Supply,
7404 (Hex Inverter I.C.)
7400 (Quad 2 i/p NAND gate I.C)
DESCRIPTION:

Latch is a type of temporary storage device that has two stable states, called as „Set‟ and
„Reset‟ states; it can retain either of these states. It is used to store a bit.
SYMBOL:
Draw the symbols of Active low and Active High Clocked RS Latches (use extra sheet).

CIRCUIT DIAGRAM:
Draw the circuit diagrams of Active low and Active High Clocked RS Latches by using
NAND Gates (use extra sheet).

OBSERVATIONS:
Construct the circuit of Active High Clocked S-R Latch (made by NAND Gates) and
write down its truth table as observed by you.
_
CLK S R Q Q Remarks
0 X X
1 0 0
1 0 1
1 1 0
1 1 1

QUESTION: Describe the function of Clocked S R Latch in your words.

(use extra sheet if required).

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DIGITAL LOGIC DESIGN
 LAB # 07
Verification of the function of Flip Flop

OBJECTIVE: To observe the function of D-Flip flop.

EQUIPMENT: Bread Board

Power Supply
Function Generator
7474 I.C
LEDs

DESCRIPTION:

A D-Flip flop has only one data input and a clock input, when the required „edge‟ (+ve or–ve) of
the clock pulse arrives on the clock input, the data at „D‟ input is transferred to the „Q‟ output.
Two asynchronous inputs are also provided in the I.C, they are independent of the clock input.
These inputs are „CLEAR or RESET‟ and „SET or PRESET‟ inputs, the first one brings the flip
flop in the Reset state, while the second one brings it in the Set state

SYMBOLS:
Draw the symbols of D flip flop (positive & negative edge triggered)

DIAGRAM:

Pin Diagram of I.C 7474

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DIGITAL LOGIC DESIGN
OBSERVATIONS:

Write down the truth table on the basis of your observations.

CLR PR CLK D Q Q‟ Remarks

ANALYSIS:

Q.1 Analyze the function of the I.C 7474.

Q.2 Analyze the difference between Latches and Flip flops with respect to Edge triggering and
Level triggering.

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DIGITAL LOGIC DESIGN
 LAB # 08
Construction of Binary Counter circuit

OBJECTIVE: To construct a 4-bit Binary Up-Counter.

EQUIPMENT: Bread Board, Power Supply, Function Generator, I.C 7476 or 7493.

DESCRIPTION:

„Counter‟ is a circuit which counts the number of clock pulses that arrive at its clock input. Counters are
of different types, those which count upward are called “Up- Counters”. A 4-bit Counter can count from
binary number0000 to binary number 1111 i.e. in decimal from 0 to 15.

DIAGRAMS:

Pin Diagram of 7476

CIRCUIT:
+5V

PR PR PR PR
Q4 Q3 Q2 Q1
Q Q Q Q
J J J J CLK
4 3 2 1
Q‟ Q‟ Q‟ Q‟
R R
K K K R K R
Rst
Q‟ K 4-bit Binary Up-Counter

Note: Use TTL Data book/internet to get the pin diagram of the I.C 7493 and draw it.

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DIGITAL LOGIC DESIGN
OBSERVATIONS:

Write down the observed Outputs of the Up counter.

CLK# Q4 Q3 Q2 Q1
0
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15

ANALYSIS:
Q.1 How a four bit Up counter can be converted into a MOD 10 (Decade) counter?

Q.2 What frequency of signals you observe if the outputs of the Counter are viewed by using
Oscilloscope?

Q.3 Analyze the difference of frequencies of Counter‟s outputs with respect to „Frequency
Division‟.

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DIGITAL LOGIC DESIGN
 L AB # 09
Construction of Shift Register circuit

OBJECTIVE: To construct a Shift Register circuit.

EQUIPMENT: Bread Board, Power Supply, I.Cs 7474 or 7494.

DESCRIPTION:

A “Register” is a group of memory elements (flip flops) that work together as a unit. A simple register
can only store a binary word. A register capable of shifting its binary information either to the right or
left is called a shift register.
A shift register can store a binary word, as well as it can shift the bits of its stored word. This bit shifting
is essential for different arithmetic and logic operations in digital systems.

DIAGRAM:
I/P D1 Q1 D2 Q2 D3 Q3 O/P

Clk

Note: Use TTL Data book/internet to get the pin diagram of the I.C 7494 and draw it.

OBSERVATION:

Observe the logics on all the D inputs and Q outputs and enter the values in the following table.

Clk # I/p Data at D i/p s Data at Q o/p s

(Data) D1(i/p) D2 D3 Q1 Q2 Q3(o/p)
0
1
2
3
4
5
ANALYSIS:

Q.1 The constructed Shift register is of how many bits?

Q.2 What is the type of the Shift register?

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DIGITAL LOGIC DESIGN
 LAB # 10
Construction of Ring Counter circuit

OBJECTIVE: To construct a Ring Counter

EQUIPMENT: Bread Board

Power Supply
I.C. 7476 or any other „Ring Counter‟ I.C.
DESCRIPTION:
It is the modified form of a Counter in which among all the outputs there is a unique output (normally
high output) while rest of the outputs are same (normally low).This high output shifts to the next flip
flops on every clock pulse and finally it returns back to the first flip flop.

.
PIN DIAGRAM:

Pin Diagram of 7476

CIRCUIT DIAGRAM:
Draw the complete diagram of a 3 bit Ring counter (using J K Flip Flops, negative edge
triggered).

3 bit Ring Counter

Note: Use TTL Data book/internet to get the pin diagram of the Ring Counter I.C to be used and
draw it.

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DIGITAL LOGIC DESIGN
OBSERVATIONS:

Write down the Truth Table as you observed.

Clk # Q1 Q2 Q3

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DIGITAL LOGIC DESIGN
 LAB # 11(A)
Construction of Adder/Subtractor circuit

OBJECTIVE: To use an Adder I.C to perform binary addition

EQUIPMENT:Bread Board
Power Supply
I.C 7483

DESCRIPTION:
The basic digital circuits used to perform arithmetic operations are Half Adder and Full Adder.
Half Adder circuit contains two inputs and two outputs. It adds two bits at a time, producing
outputs of “sum” and “carry”.
Full adder circuit contains three inputs and two outputs. It adds three bits at a time and gives two
outputs of “sum” and “carry”. A Full adder can be made by combining two Half Adders. I.C.
7483 contains four full adders.

PIN DIAGRAM:

Pin Diagram of 7483

CIRCUIT DIAGRAM:

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DIGITAL LOGIC DESIGN
 Full Adder Using Two Half Adder
OBSERVATION:
Add the numbers and observe the results.
(i) 5 + 5 (ii) 10 + 10 (iii) 15 + 15 (iv) 12 + 3

A4 A3 A2 A1 B4 B3 B2 B1 C0 S4 S3 S2 S1
0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0
1 1 1 1 1 1 1 1
1 1 0 0 0 0 1 1

CALCULATIONS:

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DIGITAL LOGIC DESIGN
 LAB # 11(B)
Construction of Adder/Subtractor circuit

OBJECTIVE: To use a Full adder I.C with necessary circuit to perform binary
subtraction

EQUIPMENT: Bread Board

Power Supply
I.C 7483
I.C 7486

DESCRIPTION:
In order to simplify circuitry in a calculating machine, it is convenient to have a device which
can perform Addition as well as Subtraction.
I.C 7483 I.C. can be used as an „Adder‟ as well as a „Subtractor‟ with appropriate arrangements
i.e. by connecting it with an X-OR gate I.C. This can be done by using the mathematical
technique called as “2‟s Complement Method”.

CIRCUIT DIAGRAM:

Pin Diagram of IC 7483

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DIGITAL LOGIC DESIGN
OBSERVATION:
Subtract the numbers and observe the results.
(i) 5 - 5 (ii) 10 -5 (iii) 15 -10 (iv) 12 – 3

Convert the given numbers in Binary and fill the table as per your observations.

A4 A3 A2 A1 B4 B3 B2 B1 Brw D4 D3 D2 D1

CALCULATIONS:

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DIGITAL LOGIC DESIGN
 LAB # 12
Use of Decoder with Seven Segment Display

OBJECTIVE: To learn the use of Seven Segment Display and Decoder Driver.

EQUIPMENT: Bread Board

Power Supply
7 Segment Display
I.C 7447
DESCRIPTION:
Seven segment display along with decoder driver are used to show the binary numbers in the form of
decimal numbers. These displays are of two types that are Common Anode and Common Cathode types.

CIRCUIT DIAGRAM:

7447 I.C

Pins 1,2,6,7 are the input pins BCDA or in sorted format (MSB to LSB) DCBA is equal to pins
6,2,1,7. Not only inputs from 0000 to 1001 are converted to decimal and displayed on the 7
segment display as 0 to 9, but also 1010 (10) to 1111 (15) are displayed on the display, observe
those patterns and show them on the following diagrams by using different colors.

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DIGITAL LOGIC DESIGN
10 = 11 = 12 =

13 = 14 = 15 =

QUESTIONS:
Q.1 What is the function of „LT‟ Pin in the I.C 7447?

Q.2 What happens if all the inputs, applied to the I.C, are high?

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DIGITAL LOGIC DESIGN