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  • Design 4-bit Binary Adder-Subtractor

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    Ferry khambhata
    8 views3 pages
    1. The document describes the design of a 4-bit binary adder-subtractor circuit using logic gates. 2. A binary adder-subtractor circuit can perform both addition and subtraction of binary numbers by using a mode input (M) - if M is 0 it acts as an adder, if M is 1 it acts as a subtractor. 3. The circuit contains full-adder circuits connected in series to perform addition, and an exclusive-OR gate connected in series with one of the inputs and the mode input (M) to determine whether it performs addition or subtraction.

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    Original Title

    190420107509_Assignment 4

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    1. The document describes the design of a 4-bit binary adder-subtractor circuit using logic gates. 2. A binary adder-subtractor circuit can perform both addition and subtraction of binary numbers by using a mode input (M) - if M is 0 it acts as an adder, if M is 1 it acts as a subtractor. 3. The circuit contains full-adder circuits connected in series to perform addition, and an exclusive-OR gate connected in series with one of the inputs and the mode input (M) to determine whether it performs addition or subtraction.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    8 views3 pages

    Design 4-bit Binary Adder-Subtractor

    Uploaded by

    Ferry khambhata
    1. The document describes the design of a 4-bit binary adder-subtractor circuit using logic gates. 2. A binary adder-subtractor circuit can perform both addition and subtraction of binary numbers by using a mode input (M) - if M is 0 it acts as an adder, if M is 1 it acts as a subtractor. 3. The circuit contains full-adder circuits connected in series to perform addition, and an exclusive-OR gate connected in series with one of the inputs and the mode input (M) to determine whether it performs addition or subtraction.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 3

    Subj

    ectcode:3140707 Subj
    ectName:COA Dat
    e:02/02/2021

    Enr
    oll
    mentno:190420107509 Name:Dev
    aniAkashKi
    shor
    bhai
    .

    *
    ***
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    ***
    ***
    ***
    ***
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    ***
    ***
    ***
    ***

    Pr
    act
    ical
    no:4

    M :De
    AI si
    gn4bi
    tBi
    nar
    yAdder
    -Subt
    ract
    orusi
    ngLogi
    sim.

     Bi
    nar
    yAdder:

     TheAddmicro-
    operat
    ionr
    equi
    resregi
    stersthatcanhol
    dthedat
    a
    andthedi
    git
    alcomponent
    sthatcanperfor
    mt hearit
    hmeti
    c
    addi
    ti
    on.

     ABinar
    yAdderisadi
    git
    alci
    rcui
    tthatper
    for
    mst hear
    it
    hmet
    icsum
    oft
    wobi nar
    ynumber
    sprovi
    dedwi t
    hanylengt
    h.

     ABi
    naryAdderisconstr
    uctedusingful
    l
    -adderci
    rcui
    tsconnect
    ed
    i
    nseri
    es,wit
    htheoutputcarr
    yfrom oneful
    l-
    adderconnect
    edto
    t
    heinputcar
    ryofthenextful
    l
    -adder.

    Out
    put:
    Subj
    ectcode:3140707 Subj
    ectName:COA Dat
    e:02/02/2021

    Enr
    oll
    mentno:190420107509 Name:Dev
    aniAkashKi
    shor
    bhai
    .

     Bi
    nar
    yAdderandSubt
    ract
    or:

     ABinar
    yAdder-Subt
    ract
    ori
    sonewhichi
    scapabl
    eofbothaddi
    ti
    on
    andsubtr
    act
    ionofbinar
    ynumber
    sinoneci
    rcui
    tit
    sel
    f.

     Whenthemodeinput(M)i
    satal
    owlogi
    c,i
    .e.'
    0',
    thecircui
    tactas
    anadderandwhenthemodei
    nputi
    satahi
    ghl ogic,
    i.
    e.'1'
    ,t
    he
    ci
    rcui
    tactasasubt
    ract
    or.

     Theexclusi
    ve-
    ORgat
    econnect
    edi
    nser
    iesr
    ecei
    vesi
    nputM and
    oneoftheinput
    sB.

     WhenM=0,Theci
    rcui
    tactasanAdder
    .

    Out
    put:
    Subj
    ectcode:3140707 Subj
    ectName:COA Dat
    e:02/02/2021

    Enr
    oll
    mentno:190420107509 Name:Dev
    aniAkashKi
    shor
    bhai
    .

     WhenM=1,Theci
    rcui
    tactasanSubt
    ract
    or.

    Out
    put:

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