MC7900 ONSemiconductor

DATA SHEET
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Negative Voltage
Regulators TO−220
T SUFFIX
CASE 221AB
1.0 A
Heatsink surface
MC7900 Series connected to Pin 2. 1
2
The MC7900 series of fixed output negative voltage regulators are 3
intended as complements to the popular MC7800 series devices. Pin 1. Ground
These negative regulators are available in the same seven−voltage 2. Input
3. Output
options as the MC7800 devices. In addition, one extra voltage option
commonly employed in MECL systems is also available in the
negative MC7900 series. D2PAK
D2T SUFFIX
Available in fixed output voltage options from − 5.0 V to − 24 V, CASE 936
these regulators employ current limiting, thermal shutdown, and 1 2
3
safe−area compensation − making them remarkably rugged under
most operating conditions. With adequate heatsinking they can deliver Heatsink surface (shown as terminal 4 in
output currents in excess of 1.0 A. case outline drawing) is connected to Pin 2.
• No External Components Required
• Internal Thermal Overload Protection STANDARD APPLICATION
• Internal Short Circuit Current Limiting
• Output Transistor Safe−Area Compensation Input MC79XX Output
• Available in 2% Voltage Tolerance (See Ordering Information) Cin*

CO**
0.33 mF
• Pb−Free Package May be Available. The G−Suffix Denotes a 1.0 mF
Pb−Free Lead Finish
Gnd A common ground is required between the input

and the output voltages. The input voltage must
14.7 k
2.4 k
2.0 k
2.0 k 8.0 k remain typically 2.0 V above more negative even

during the high point of the input ripple voltage.
25
3.6 k 1.0 k 4.0 k R1

XX, These two digits of the type number
4.0 k
1.2 k indicate nominal voltage.

12 k
1.0 k
1.6 k
** Cin is required if regulator is located an
R2 appreciable distance from power supply filter.
** CO improve stability and transient response.
10 k VO
ORDERING INFORMATION
20 pF See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
10 pF 10 k
2.0 k
20 k 20 k 240 DEVICE MARKING INFORMATION
0.3
1.1 k See general marking information in the device marking
750 section on page 12 of this data sheet.
VI
This device contains 26 active transistors.
Figure 1. Representative Schematic Diagram
© Semiconductor Components Industries, LLC, 2013 1 Publication Order Number:

October, 2021 − Rev. 21 MC7900/D
MC7900 Series
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)

Rating Symbol Value Unit
Input Voltage (− 5.0 V ≥ VO ≥ −18 V) VI −35 Vdc
Input Voltage (24 V) −40
Power Dissipation
Case 221A
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 65 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Case 936 (D2PAK)
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 70 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Storage Junction Temperature Range Tstg −65 to +150 °C
Junction Temperature TJ +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL_STD_883, Method 3015
Machine Model Method 200 V
MC7905B, MC7905C
ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Output Voltage (TJ = +25°C) VO −4.8 −5.0 −5.2 Vdc
Line Regulation (Note 1) Regline mV
(TJ = +25°C, IO = 100 mA)
−7.0 Vdc ≥ VI ≥ − 25 Vdc − 7.0 50
−8.0 Vdc ≥ VI ≥ −12 Vdc − 2.0 25
(TJ = +25°C, IO = 500 mA)
−7.0 Vdc ≥ VI ≥ − 25 Vdc − 35 100
−8.0 Vdc ≥ VI ≥ −12 Vdc − 8.0 50
Load Regulation, TJ = +25°C (Note 1) Regload mV
5.0 mA ≤ IO ≤ 1.5 A − 11 100
250 mA ≤ IO ≤ 750 mA − 4.0 50
Output Voltage VO Vdc
−7.0 Vdc ≥ VI ≥ − 20 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W −4.75 − −5.25
Input Bias Current (TJ = +25°C) IIB − 4.3 8.0 mA

Input Bias Current Change DIIB mA
−7.0 Vdc ≥ VI ≥ − 25 Vdc − − 1.3
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
Output Noise Voltage (TA = +25°C, 10 Hz ≤ f ≤ 100 kHz) Vn − 40 − mV
Ripple Rejection (IO = 20 mA, f = 120 Hz) RR − 70 − dB
Dropout Voltage VI−VO Vdc
IO = 1.0 A, TJ = +25°C − 1.3 −
Average Temperature Coefficient of Output Voltage DVO/DT mV/°C

IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
1. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
*Tlow = −40°C for MC7905B and Tlow = 0°C for MC7905C.
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2
MC7900 Series
MC7905AC
ELECTRICAL CHARACTERISTICS (VI = −10 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
−8.0 Vdc ≥ VI ≥ −12 Vdc; IO = 1.0 A, TJ = +25°C − 2.0 25
−8.0 Vdc ≥ VI ≥ −12 Vdc; IO = 1.0 A − 7.0 50
−7.5 Vdc ≥ VI ≥ − 25 Vdc; IO = 500 mA − 7.0 50
−7.0 Vdc ≥ VI ≥ − 20 Vdc; IO = 1.0 A, TJ = +25°C − 6.0 50
Load Regulation (Note 2) Regload mV

5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − 11 100
250 mA ≤ IO ≤ 750 mA − 4.0 50
5.0 mA ≤ IO ≤ 1.0 A − 9.0 100
Input Bias Current IIB − 4.4 8.0 mA
−7.5 Vdc ≥ VI ≥ − 25 Vdc − − 1.3
5.0 mA ≤ IO ≤ 1.0 A − − 0.5
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − − 0.5
Ripple Rejection (IO = mA, f = 120 Hz) RR − 70 − dB
Dropout Voltage (IO = 1.0 A. TJ = +25°C) VI−VO − 1.3 − Vdc
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C − −1.0 −
MC7905.2C
(TJ = +25°C, IO = 100 mA)
−7.2 Vdc ≥ VI ≥ − 25 Vdc − 8.0 52
−8.0 Vdc ≥ VI ≥ −12 Vdc − 2.2 27
(TJ = +25°C, IO = 500 mA)
−7.2 Vdc ≥ VI ≥ − 25 Vdc − 37 105
−8.0 Vdc ≥ VI ≥ −12 Vdc − 8.5 52
5.0 mA ≤ IO ≤ 1.5 A − 12 105
250 mA ≤ IO ≤ 750 mA − 4.5 52

−7.2 Vdc ≥ VI ≥ − 25 Vdc − − 1.3
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
Dropout Voltage (IO = 1.0 A, TJ = +25°C) VI−VO − 1.3 − Vdc
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C − −1.0 −
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MC7900 Series
MC7906C
(TJ = +25°C, IO = 100 mA)
−8.0 Vdc ≥ VI ≥ − 25 Vdc − 9.0 60
−9.0 Vdc ≥ VI ≥ −13 Vdc − 3.0 30
(TJ = +25°C, IO = 500 mA)
−8.0 Vdc ≥ VI ≥ − 25 Vdc − 43 120
−9.0 Vdc ≥ VI ≥ −13 Vdc − 10 60
5.0 mA ≤ IO ≤ 1.5 A − 13 120
250 mA ≤ IO ≤ 750 mA − 5.0 60

−8.0 Vdc ≥ VI ≥ − 25 Vdc − − 1.3
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C − −1.0 −
MC7908C
(TJ = +25°C, IO = 100 mA)
−10.5 Vdc ≥ VI ≥ −25 Vdc − 12 80
−11 Vdc ≥ VI ≥ −17 Vdc − 5.0 40
(TJ = +25°C, IO = 500 mA)
−10.5 Vdc ≥ VI ≥ −25 Vdc − 50 160
−11 Vdc ≥ VI ≥ −17 Vdc − 22 80
5.0 mA ≤ IO ≤ 1.5 A − 26 160
250 mA ≤ IO ≤ 750 mA − 9.0 80

−10.5 Vdc ≥ VI ≥ − 25 Vdc − − 1.0
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C − −1.0 −
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MC7900 Series
MC7912B, MC7912C
Output Voltage (TJ = +25°C) VO −11.5 −12 −12.5 Vdc
(TJ = +25°C, IO = 100 mA)
−14.5 Vdc ≥ VI ≥ − 30 Vdc − 13 120
−16 Vdc ≥ VI ≥ − 22 Vdc − 6.0 60
(TJ = +25°C, IO = 500 mA)
−14.5 Vdc ≥ VI ≥ − 30 Vdc − 55 240
−16 Vdc ≥ VI ≥ − 22 Vdc − 24 120
5.0 mA ≤ IO ≤ 1.5 A − 46 240
250 mA ≤ IO ≤ 750 mA − 17 120

−14.5 Vdc ≥ VI ≥ − 30 Vdc − − 1.0
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
MC7912AC
−16 Vdc ≥ VI ≥ − 22 Vdc; IO = 1.0 A, TJ = +25°C − 6.0 60
−16 Vdc ≥ VI ≥ − 22 Vdc; IO = 1.0 A − 24 120
−14.8 Vdc ≥ VI ≥ − 30 Vdc; IO = 500 mA − 24 120
−14.5 Vdc ≥ VI ≥ − 27 Vdc; IO = 1.0 A, TJ = +25°C − 13 120

5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − 46 150
250 mA ≤ IO ≤ 750 mA − 17 75
5.0 mA ≤ IO ≤ 1.0 A − 35 150

−15 Vdc ≥ VI ≥ − 30 Vdc − − 0.8
5.0 mA ≤ IO ≤ 1.0 A − − 0.5
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − − 0.5
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
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MC7900 Series
MC7915B, MC7915C
ELECTRICAL CHARACTERISTICS (VI = − 23 V, IO = 500 mA, Tlow* < TJ < +125°C, unless otherwise noted.)
(TJ = +25°C, IO = 100 mA)
−17.5 Vdc ≥ VI ≥ − 30 Vdc − 14 150
−20 Vdc ≥ VI ≥ − 26 Vdc − 6.0 75
(TJ = +25°C, IO = 500 mA)
−17.5 Vdc ≥ VI ≥ − 30 Vdc − 57 300
−20 Vdc ≥ VI ≥ − 26 Vdc − 27 150
5.0 mA ≤ IO ≤ 1.5 A − 68 300
250 mA ≤ IO ≤ 750 mA − 25 150

−17.5 Vdc ≥ VI ≥ − 30 Vdc − − 1.0
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
MC7915AC
−20 Vdc ≥ VI ≥ − 26 Vdc, IO = 1.0 A, TJ = +25°C − 27 75
−20 Vdc ≥ VI ≥ − 26 Vdc, IO = 1.0 A, − 57 150
−17.9 Vdc ≥ VI ≥ − 30 Vdc, IO = 500 mA − 57 150
−17.5 Vdc ≥ VI ≥ − 30 Vdc, IO = 1.0 A, TJ = +25°C − 57 150

5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − 68 150
250 mA ≤ IO ≤ 750 mA − 25 75
5.0 mA ≤ IO ≤ 1.0 A − 40 150

−17.5 Vdc ≥ VI ≥ − 30 Vdc − − 0.8
5.0 mA ≤ IO ≤ 1.0 A − − 0.5
5.0 mA ≤ IO ≤ 1.5 A, TJ = +25°C − − 0.5
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
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MC7900 Series
MC7918C
ELECTRICAL CHARACTERISTICS (VI = − 27 V, IO = 500 mA, 0°C < TJ < +125°C, unless otherwise noted.)
(TJ = +25°C, IO = 100 mA)
−21 Vdc ≥ VI ≥ − 33 Vdc − 25 180
−24 Vdc ≥ VI ≥ − 30 Vdc − 10 90
(TJ = +25°C, IO = 500 mA)
−21 Vdc ≥ VI ≥ − 33 Vdc − 90 360
−24 Vdc ≥ VI ≥ − 30 Vdc − 50 180
5.0 mA ≤ IO ≤ 1.5 A − 110 360
250 mA ≤ IO ≤ 750 mA − 55 180
−21 Vdc ≥ VI ≥ − 33 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W −17.1 − −18.9

−21 Vdc ≥ VI ≥ − 33 Vdc − − 1.0
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, 0°C ≤ TJ ≤ +125°C − −1.0 −
MC7924B, MC7924C
Output Voltage (TJ = +25°C) VO −23 −24 −25 Vdc
(TJ = +25°C, IO = 100 mA)
−27 Vdc ≥ VI ≥ − 38 Vdc − 31 240
−30 Vdc ≥ VI ≥ − 36 Vdc − 14 120
(TJ = +25°C, IO = 500 mA)
−27 Vdc ≥ VI ≥ − 38 Vdc − 118 470
−30 Vdc ≥ VI ≥ − 36 Vdc − 70 240
5.0 mA ≤ IO ≤ 1.5 A − 150 480
250 mA ≤ IO ≤ 750 mA − 85 240
−27 Vdc ≥ VI ≥ − 38 Vdc, 5.0 mA ≤ IO ≤ 1.0 A, P ≤ 15 W −22.8 − −25.2

−27 Vdc ≥ VI ≥ − 38 Vdc − − 1.0
5.0 mA ≤ IO ≤ 1.5 A − − 0.5
IO = 5.0 mA, Tlow* ≤ TJ ≤ +125°C − −1.0 −
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MC7900 Series
20 2.5
Infinite Heatsink
10
qHS = 5°C/W
I O , OUTPUT CURRENT (A)

PD, POWER DISSIPATION (W)
2.0
5.0 TJ = +25°C
4.0 qHS = 15°C/W
3.0
1.5
2.0
No Heatsink
1.0 1.0
0.5
0.4
0.3 qJC = 5° C/W 0.5
0.2
qJA = 65° C/W
PD(max) = 15W
0.1 0
25 50 75 100 125 150 0 3.0 6.0 9.0 12 15 18 21 24 27 30
TA, AMBIENT TEMPERATURE (°C) |VI -VO| INPUT-OUTPUT VOLTAGE DIFFERENTIAL (V)
Figure 2. Worst Case Power Dissipation as a Figure 3. Peak Output Current as a Function
Function of Ambient Temperature of Input−Output Differential Voltage
100 80
Vin = -11 V
VO = -6.0 V
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB) f = 120 Hz

80 IO = 20 mA
70 IO = 20 mA
DVin = 1.0 V(RMS)
60
60
40
50
20
0 40
10 100 1.0 k 10 k 100 k 2.0 4.0 6.0 8.0 10 12 14 16 18 20 22
f, FREQUENCY (Hz) VO, OUTPUT VOLTAGE (V)
Figure 4. Ripple Rejection as a Figure 5. Ripple Rejection as a Function

Function of Frequency of Output Voltage
6.26 5.2
I IB , INPUT BIAS CURRENT (mA)
VO, OUTPUT VOLTAGE (-V)
6.22 5.0
6.18 4.8
6.14 4.6 Vin = -11 V

Vin = -11 V VO = -6.0 V
VD = -6.0 V IO = 20 mA
6.10 IO = 20 mA 4.4
6.06 4.2
-25 0 25 50 75 100 125 150 175 0 25 50 75 100 125
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Output Voltage as a Function Figure 7. Quiescent Current as a
of Junction Temperature Function of Temperature
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MC7900 Series
APPLICATIONS INFORMATION
Design Considerations -10 V 0.56 -5.0 V

The MC7900 Series of fixed voltage regulators are Input
2N3055*
Output
0.56
designed with Thermal overload Protection that shuts down or Equiv
the circuit when subjected to an excessive power overload 0.56
condition. Internal Short Circuit Protection that limits the MJE200*
maximum current the circuit will pass, and Output Transistor or Equiv
MC7905*
Safe−Area Compensation that reduces the output short circuit
current as the voltage across the pass transistor is increased.
In many low current applications, compensation 10 mF
5.6
1.0 mF 1.0 mF
capacitors are not required. However, it is recommended Gnd
+ + +
Gnd
that the regulator input be bypassed with a capacitor if the *Mounted on heatsink.
regulator is connected to the power supply filter with long Figure 9. Current Boost Regulator
wire lengths, or if the output load capacitance is large. An (− 5.0 V @ 4.0 A, with 5.0 A Current Limiting)
input bypass capacitor should be selected to provide good When a boost transistor is used, short circuit currents are
high−frequency characteristics to insure stable operation equal to the sum of the series pass and regulator limits, which
under all load conditions. A 0.33 mF or larger tantalum, are measured at 3.2 A and 1.8 A respectively in this case.
mylar, or other capacitor having low internal impedance at Series pass limiting is approximately equal to 0.6 V/RSC.
high frequencies should be chosen. The capacitor chosen Operation beyond this point to the peak current capability of
should have an equivalent series resistance of less than the MC7905C is possible if the regulator is mounted on a
0.7 W. The bypass capacitor should be mounted with the heatsink; otherwise thermal shutdown will occur when the
shortest possible leads directly across the regulators input additional load current is picked up by the regulator.
terminals. Normally good construction techniques should be
used to minimize ground loops and lead resistance drops 1N4001G or Equiv
since the regulator has no external sense lead. Bypassing the
output is also recommended. +20 V +15 V
Input Output
MC7815
-20 V 10 IO = 200 mA Clamp diode
Input MC7905 + +
- 0.33 mF 1.0 mF 1.0 mF 1N4001G
R
VO ≤ 10 V or Equiv
Gnd Gnd
+ +
1.0 mF 1.0 mF 1N4001G
1.0 mF 1.0 mF or Equiv
+ +
Gnd Gnd MC7915
Figure 8. Current Regulator -20 V -15 V
Input Output
The MC7905, −5.0 V regulator can be used as a constant
current source when connected as above. The output current 1N4001G or Equiv
is the sum of resistor R current and quiescent bias current as Figure 10. Operational Amplifier Supply
follows: The MC7815 and MC7915 positive and negative
5.0 V regulators may be connected as shown to obtain a dual
IO + ) IB
R power supply for operational amplifiers. A clamp diode
The quiescent current for this regulator is typically 4.3 should be used at the output of the MC7815 to prevent
mA. The 5.0 V regulator was chosen to minimize dissipation potential latch−up problems whenever the output of the
and to allow the output voltage to operate to within 6.0 V positive regulator (MC7815) is drawn below ground with an
below the input voltage. output current greater than 200 mA.
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MC7900 Series
Protection Diodes Diode D2 prevents output capacitor from discharging thru

When external capacitors are used with MC7900 series the MC7915 during an input short circuit or fast switch off
regulator it is sometimes necessary to add protection diodes of power supply.
to prevent the capacitors from discharging through low
current points into the regulator or from output polarity Gnd Gnd
+ +
reversals. Generally, no protection diode is required for 1.0 mF 1.0 mF MBRS140
D1
values of output capacitance less then 10mF. Figure 11 shows or Equiv
the MC7915 with the recommended protection diodes. MC7915
-20 V -15 V
• Opposite Polarity Protection Input Output
Diode D1 protects the regulator from output polarity
D2
reversals during startup, power off and short-circuit MBRS140
operation. or Equiv
• Reverse-bias Protection Figure 11. Protection Diodes
DEFINITIONS
Line Regulation − The change in output voltage for a Input Bias Current − That part of the input current that
change in the input voltage. The measurement is made under is not delivered to the load.
conditions of low dissipation or by using pulse techniques Output Noise Voltage − The rms AC voltage at the
such that the average chip temperature is not significantly output, with constant load and no input ripple, measured
affected. over a specified frequency range.
Load Regulation − The change in output voltage for a Long Term Stability − Output voltage stability under
change in load current at constant chip temperature. accelerated life test conditions with the maximum rated
Maximum Power Dissipation − The maximum total voltage listed in the devices’ electrical characteristics and
device dissipation for which the regulator will operate maximum power dissipation.
within specifications.
80 3.5
PD, MAXIMUM POWER DISSIPATION (W)

PD(max) for TA = +50°C
R θ JA, THERMAL RESISTANCE
70 Free Air 3.0

JUNCTION‐TO‐AIR (°C/W)
Mounted
ÎÎÎ
Vertically 2.0 oz. Copper
60 2.5
L
Minimum
ÎÎÎ
ÎÎÎ
50 2.0
Size Pad L
40
30
RqJA ÎÎÎ 1.5
1.0
0 5.0 10 15 20 25 30
L, LENGTH OF COPPER (mm)
Figure 12. D2PAK Thermal Resistance and Maximum

Power Dissipation versus P.C.B. Copper Length
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MC7900 Series
ORDERING INFORMATION
Nominal Output Voltage Operating

Device Output Voltage Tolerance Package Temperature Range Shipping†
MC7905ACD2TR4G −5.0 V 2% D2PAK TJ = 0°C to +125°C 800 Tape & Reel
(Pb−Free)
MC7905BTG 4% TO−220 TJ = −40°C to +125°C 50 Units/Rail
(Pb−Free)
MC7905CTG TO−220 TJ = 0°C to +125°C 50 Units/Rail
(Pb−Free)
MC7906CTG −6.0 V 4% TO−220 TJ = 0°C to +125°C 50 Units/Rail

(Pb−Free)
MC7912ACTG −12 V 2% TO−220 TJ = 0°C to +125°C 50 Units/Rail
(Pb−Free)
MC7912BD2TR4G 4% D2PAK TJ = −40°C to +125°C 800 Tape & Reel

(Pb−Free)
MC7912BTG TO−220 50 Units/Rail
(Pb−Free)
MC7912CTG TO−220 TJ = 0°C to +125°C 50 Units/Rail
(Pb−Free)
MC7915ACD2TG − 15 V 2% D2PAK TJ = 0°C to +125°C 50 Units/Rail
(Pb−Free)
MC7915ACD2TR4G D2PAK 800 Tape & Reel
(Pb−Free)
MC7915ACTG TO−220 50 Units/Rail

(Pb−Free)
MC7915BTG 4% TO−220 TJ = −40°C to +125°C 50 Units/Rail
(Pb−Free)
MC7915BD2TR4G D2PAK 800 Tape & Reel
(Pb−Free)
MC7915CD2TR4G D2PAK TJ = 0°C to +125°C 800 Tape & Reel
(Pb−Free)
MC7915CTG TO−220 50 Units/Rail
(Pb−Free)
MC7918CTG TO−220 50 Units/Rail

(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
MC7900 Series
MARKING DIAGRAMS
TO−220
T SUFFIX
CASE 221AB
MC MC MC MC
79xxACT 7905.2CT 79xxBT 79xxCT
AWLYWWG AWLYWWG AWLYWWG AWLYWWG
1 2 3 1 2 3 1 2 3 1 2 3
D2PAK
D2T SUFFIX
CASE 936
MC MC MC
79xxACD2T 79xxBD2T 79xxCD2T
AWLYWWG AWLYWWG AWLYWWG
2 2 2
1 3 1 3 1 3
xx = Nominal Voltage
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Device
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220, SINGLE GAUGE

CASE 221AB−01
ISSUE A
DATE 16 NOV 2010
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
SEATING
−T− PLANE
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
B F C 4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
T S S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)
SCALE 1:1
4 INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75
Q A B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
1 2 3 U D 0.025 0.035 0.64 0.88
H F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
K H 0.110 0.155 2.80 3.93
Z J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
L R Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
V J S 0.020 0.024 0.508 0.61
G T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
D V 0.045 --- 1.15 ---
Z --- 0.080 --- 2.04
N
STYLE 1: STYLE 2: STYLE 3: STYLE 4:

PIN 1. BASE PIN 1. BASE PIN 1. CATHODE PIN 1. MAIN TERMINAL 1
2. COLLECTOR 2. EMITTER 2. ANODE 2. MAIN TERMINAL 2
3. EMITTER 3. COLLECTOR 3. GATE 3. GATE
4. COLLECTOR 4. EMITTER 4. ANODE 4. MAIN TERMINAL 2
STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. CATHODE
2. DRAIN 2. CATHODE 2. ANODE 2. ANODE
3. SOURCE 3. ANODE 3. CATHODE 3. EXTERNAL TRIP/DELAY
4. DRAIN 4. CATHODE 4. ANODE 4. ANODE
STYLE 9: STYLE 10: STYLE 11:

PIN 1. GATE PIN 1. GATE PIN 1. DRAIN
2. COLLECTOR 2. SOURCE 2. SOURCE
3. EMITTER 3. DRAIN 3. GATE
4. COLLECTOR 4. SOURCE 4. SOURCE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON23085D Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−220, SINGLE GAUGE PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK
CASE 936−03
ISSUE E
DATE 29 SEP 2015
SCALE 1:1
NOTES:
T T 1. DIMENSIONING AND TOLERANCING PER ANSI
TERMINAL 4 Y14.5M, 1982.
C C
K A U
2. CONTROLLING DIMENSION: INCHES.
OPTIONAL ED OPTIONAL ES 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
CHAMFER CHAMFER
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
S MOUNTING SURFACE FOR TERMINAL 4.
V 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
B FLASH OR GATE PROTRUSIONS. MOLD FLASH
H DETAIL C DETAIL C AND GATE PROTRUSIONS NOT TO EXCEED
1 2 3 0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF
TER FPCN EXPIRATION IN OCTOBER 2011.
J INCHES MILLIMETERS
F SIDE VIEW BOTTOM VIEW SIDE VIEW DIM MIN MAX MIN MAX
DUAL GAUGE SINGLE GAUGE A 0.386 0.403 9.804 10.236
G CONSTRUCTION CONSTRUCTION B 0.356 0.368 9.042 9.347
2X D C 0.170 0.180 4.318 4.572
TOP VIEW 0.010 (0.254) M T D 0.026 0.036 0.660 0.914

ED 0.045 0.055 1.143 1.397
ES 0.018 0.026 0.457 0.660
F 0.051 REF 1.295 REF
G 0.100 BSC 2.540 BSC
H 0.539 0.579 13.691 14.707
N T J 0.125 MAX 3.175 MAX

M K 0.050 REF 1.270 REF
L 0.000 0.010 0.000 0.254
M 0.088 0.102 2.235 2.591
SEATING N 0.018 0.026 0.457 0.660
P L PLANE
P 0.058 0.078 1.473 1.981
R 0_ 8_ 0_ 8_
R DETAIL C BOTTOM VIEW S 0.116 REF 2.946 REF
OPTIONAL CONSTRUCTIONS U 0.200 MIN 5.080 MIN
V 0.250 MIN 6.350 MIN
SOLDERING FOOTPRINT* GENERIC

10.490 MARKING DIAGRAM*
XXXXXXG
8.380 ALYWW
16.155
XXXXXX = Specific Device Code

2X A = Assembly Location
3.504 L = Wafer Lot
Y = Year
2X 1.016 WW = Work Week
5.080 G = Pb−Free Package
PITCH DIMENSIONS: MILLIMETERS *This information is generic. Please refer to
*For additional information on our Pb−Free strategy and soldering device data sheet for actual part marking.
details, please download the ON Semiconductor Soldering and Pb−Free indicator, “G” or microdot “ G”,
Mounting Techniques Reference Manual, SOLDERRM/D. may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASH01005A Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: D2PAK PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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DATA SHEET

• Available in 2% Voltage Tolerance (See Ordering Information) Cin*

Gnd A common ground is required between the input

2.0 k 8.0 k remain typically 2.0 V above more negative even

3.6 k 1.0 k 4.0 k R1

1.2 k indicate nominal voltage.

Figure 1. Representative Schematic Diagram

© Semiconductor Components Industries, LLC, 2013 1 Publication Order Number:

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)

Input Bias Current (TJ = +25°C) IIB − 4.3 8.0 mA

Average Temperature Coefficient of Output Voltage DVO/DT mV/°C

Load Regulation (Note 2) Regload mV

Input Bias Current (TJ = +25°C) IIB − 4.3 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.3 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.3 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.4 8.0 mA

Load Regulation (Note 4) Regload mV

Input Bias Current IIB − 4.4 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.4 8.0 mA

Load Regulation (Note 5) Regload mV

Input Bias Current IIB − 4.4 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.5 8.0 mA

Input Bias Current (TJ = +25°C) IIB − 4.6 8.0 mA

I O , OUTPUT CURRENT (A)

RR, RIPPLE REJECTION (dB) f = 120 Hz

Figure 4. Ripple Rejection as a Figure 5. Ripple Rejection as a Function

6.14 4.6 Vin = -11 V

Design Considerations -10 V 0.56 -5.0 V

Protection Diodes Diode D2 prevents output capacitor from discharging thru

• Reverse-bias Protection Figure 11. Protection Diodes

PD, MAXIMUM POWER DISSIPATION (W)

70 Free Air 3.0

Figure 12. D2PAK Thermal Resistance and Maximum

Nominal Output Voltage Operating

MC7906CTG −6.0 V 4% TO−220 TJ = 0°C to +125°C 50 Units/Rail

MC7912BD2TR4G 4% D2PAK TJ = −40°C to +125°C 800 Tape & Reel

MC7915ACTG TO−220 50 Units/Rail

MC7918CTG TO−220 50 Units/Rail

TO−220, SINGLE GAUGE

STYLE 1: STYLE 2: STYLE 3: STYLE 4:

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

STYLE 9: STYLE 10: STYLE 11:

DESCRIPTION: TO−220, SINGLE GAUGE PAGE 1 OF 1

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

TOP VIEW 0.010 (0.254) M T D 0.026 0.036 0.660 0.914

N T J 0.125 MAX 3.175 MAX

SOLDERING FOOTPRINT* GENERIC

XXXXXX = Specific Device Code

DESCRIPTION: D2PAK PAGE 1 OF 1

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

PUBLICATION ORDERING INFORMATION

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