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KULLIYYAH OF ENGINEERING
END.OF.SEMBSTER EXAMTNATION
SEMESTER 1, 2OI7I2OI8 SESSION

Programme : CE Engineering
& CIE Level of Study :UG2
Time :2.30-5.30pm Date :4rH January2018
Duration :3 Hours
Course Code :EECE 2314 Section(s) : t-Z
Ccurse Title : Computer Organization and Microprocessors

This Question Paper Consists of 4 (Four) Printed Pages (Inciuding Cover Page) with 5 (Five)
QLrestions.

INSTRUCTIGN(S) TO CANDIDATES

DO NOT OPEN UNTIL YOU ARE ASKED TO DO SO

g Total rnark of this examination is 100.

o 'Ihis examinatior, is wodh 50 % of the total coLrrse assessnrent.
o Ansr.ver ALL OUlstions.
* Only approved calculator with 'KoE approved' sticker is a loi,ved (non-programnrable and
non-graphical).
* Marks assigned to each problem are listed in the malgins.

Aryt forms of cheating or attempt ta cheat is a serious offence which may lssil to dismissul.

All electronics gadgets are prohibited in the exam hall / venue.

(e.g. mobile / smart phones, smart watches, and smart glosses)

&rprsred-hL.

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 ANSWER ALL QUESTIONS.

QUESTION 1 [20 marks]

a) The execution cycle for a particular instruction may involve more than one reference tc
[.]' t memory or input output device. With these additional considerations, provide a detail
instruction cycle in the form of a state diagrarn. (8)

b) Sumrrarize the two approaches in dealing with multiple interrupts with the aid of a
diagram. (6)

c) A system bus consist of typically from about filly to irundreds of separate lines. On any
bus, the liires can be classified into three functional groups. Describe therir with their
f"rnctions. (6)

QUESTIGN 2 [20 marks]

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a)
'L-)Convert BA4CY into binar:y ar-rd decirnal number syste;n. (4)

b) Discuss the difference(s) between microprocessors and microcontrollers. (6)

c) The operation of a microprocessor is determined by the instructions it executes which

referred to as machine instructions. The instruction must contain the information required
by the processor. Describe the four elements of a machine instruction. (6)

d) Desoibe an embedded system using one example.

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eUESTION3 [20 --l ,,, \e.ll t l'." _ I
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a) Describe four (4) main differences between AVR and ARM microprocessor. (8)

b) What is addressing mode? Provide two examples of arldressing modes that are supported
by AVR microprocessor. -- ' A-r'd"i ' '" 'r "'r 1:r (6) '' i j''
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\ c) A block of data is transferred from main memory to ciclie memory, r,vhile a word of data
? is transfemed from cache memcry to processor.

.-s i. Which one is faster? {2)

7- ii. Then, determine tlie nuriber of adCress lines oii.hre ma;n l:iei-rlory r.r&en there are
3 2M i:lccks oidata with 4 l:ytes each. (4\

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QUESTION 4 [20 marks]

a) Answer the following questions based on the assembly program below (4)
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LDt R16,2 R t(, 1 #.r-,
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a; _
{,O.v
i. FIow manv tirnes does the prograrn loopt Llt = t I? 15 ' 2
0w
Q'T Dx ,d
i;. Which flag is checked by this program for loop controtf(A '-] lC
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qup iii. What is the final value of R20? g - PY'l {ro

b) Write an assembly pi'ogram that receives a number in dX i'egister, counts ihe number cf
EB a h^"t- ones in its binary iepresentation, and returirs this count in BX register.t (6)

c) A procedure is a selfcontained computer program tliat is incorporated irrto a iarger

- P^*Jr* program. Enumerate tlvo (2) reasons for the use of procedure.
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(4)
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d) Fig. 4 shows a main progranl r,r,ith three (3) calls to rrocedures. Illustrates flol cl the
program. (6)

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2546

RETURN

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QUESTION 5 [20 marks]

a) Describe tr,r,o (2) reasons r,r,hy peripherals are nct corlr-ri:cted directly to tlte ,iri.,, Uur.
(4)

b) Explain the diiierence betu,een Programmed 1/O and lr,terrupt driveii I/O. (4)

c) Design a memory system consisting ai 32 i(B cf RiW memory and 54 KB of ROM

men.iory. Use SR"Ah4 Cevices to impiement R/W ;nemory and EPROM devices to
implenient ROM memory. The memory devices to Le used are shown in Fig. 5. R/W
mernory is to reside over the address range A0000H through ATFFFFI and ttre address
rarge of ROIvI memory is to be F0000H thro,lgh FFFFFfi. Assume that tlie
rrricrcprocessor system bus signals available fcluse ar,: A0 through ,{19, D0 through D7,
MEMR' and MEMW'. (i2)

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