University of Benghazi

Faculty of Information Technology

IT222 Computer Architecture - Midterm Exam

Q1) Tick true (√) or false (×): (10Marks)

1. Secondary memory is slow, cheap, direct access and located inside CPU (×)
2. memories are much slower than microprocessors (√ )
3. Cache memory enhances memory access time (√ )
4. The CU is used to store program and data (×)
5. Unified cache refers to which holds the copies of data and instruction together (√ )
6. The processor operates at its high clock rate only when the memory items it
requires are held in the backup store (×)
7. With direct mapping a replacement algorithm is needed in order to determine
which block to replace (×)
8. Von Neumann computers are general-purpose, programmable computers (√ )
9. MMU translates physical addresses into virtual addresses (×)
10. Instructions are executed by the CPU as a sequences of steps (√ )
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Q2) Select the correct answer: (5Marks)
1. The block of the binary information in computer is stored in memory, but all
computations are done in:
a. Timing control 
b. Processor Registers 
c. Secondary memory 
2. What are the major components of CPU?
a. ALU, CU, Main Memory 
b. Register Set, CU, Memory Unit 
c. CU, Register Set, ALU 
3. The main memory is used to:
a. Store copies of the program and data 
b. Execute instructions 
c. None of them 
4. The proportion of all memory accesses that are not satisfied by the cache is:
a. Hit Rate 
b. Miss Rate 
c. None of them 
5. Which type of locality when an item is referenced, items whose addresses are
close by will tend to be referenced soon?
a. Temporal locality 
b. Spacial locality 
c. Both a. & b. 

1
Q3) State the meaning of each acronym? (5Marks)
1. TLB: Translation Lookaside Buffer
2. PA: Physical Address
3. VA: Virtual Address
4. LFU: Least Frequently Used
5. MMU: Memory Management Unit
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Q4) Design a machine with main memory 512KB and block size of 16Bytes. Assume that
a direct mapping cache memory consisting of 64lines is used with this machine. Show the
format of cache memory address? (6Marks)
:‫اوالً استخراج المعطيات‬

M.M size= 512KB= 29 * 210 = 219 | Block size= 16b =24

No. of lines= 64 = 26

Direct Mapping  Tag Block Word Id

Word Id= Power of the Block size = 4bits

Length\ Full address= Power of the M.M size = 19bits

Block = Power of No. of Lines

Block = 6bits

Tag = Full address – (Block + Word Id)  Tag= 19 – (6+4) = 9

Direct Mapping  Tag (9) Block (6) Word Id (4)

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Q5) Consider a system with 64MB physical memory and a 32-bit Virtual address space
with 4KB page size, draw the page table for the system? (4Marks)
:‫اوالً استخراج المعطيات‬
Physical memory size (memory space) = 64MB= 226
Virtual address = 32bit
Page size= 4KB = 212
:‫لكي تستطيع رسم الجدول يجب استخراج القيم التالية‬
Virtual address, Physical address, Offset, no. of frames and no. of pages
Virtual address= 32 bit
Physical address= power of physical memory size = 26

2
 Offset = power of page size = 12
no. of frames = Physical memory size (memory space)\ frame size
frame size = page size
= 226\ 212 = 214
no. of pages = Virtual memory size (address space)\ page size
Virtual memory size= 2 Virtual address = 232
= 232\ 212 = 220

Virtual address = 32bit Physical address = 26bit

Page number (20) offset(12) Frame number (14) offset(12)

Frame 0

Frame 1
Ctrl bit Frame
Page 0

Page 1

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Page n
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. Frame m
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Page 220-1
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Page Table (P.T)

Frame 214-1

Main Memory (M.M)

Fault Hit 3