HP 15-Bsxxx Series - CSL50 CSL52 LA-E801P r1.0

l
B C D E
A
Compal Confidential 1
CSL50/CSL52 Schematics Document

2
Sky Lake-U(2+2)-DDR4 SODIMMx2 2
GPU AMD R17M-M1-30

R17M-M2-50
www.teknisi-indonesia.com
(DDR3L 4GB)
3 3
Date : 2018-01-08 REV :1.0
4 4
SecurityClassification Compal Secret Data Compal Electronics, Inc.

2015/10/22 2017/10/22 Title
IssuedDate DecipheredDate
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeLDocument Number
Cover Page
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CSL50 / CSL52
Date: Monday,January08,2018 Sheet 1 of 59
A B C D E
l
B C D E
ChA:JDIIIIMM1(REV)
UV1 UC1 ChB:JDIIIIMM2(STD)
PCIex4 Port DDR4-SO-DIMM X2

VRAM AMD #1~#4PCIe3. Dual Channel Interleaved
DDR3L x 8PCS R17M-M1-30 P.17~18
0:8Gb/s DDR4 2133MHz1.2V
256Mbx16(4GB) R17M-M2-50
1 1
JHDD
SATA3.0 Port0
P.30 2.5" SATA HDD *sub board
(sub board) LS-G072P
JEDP Sky Lake - U 22 DA4002LZ000
eDPx2Lane JODD
eDPCONN Kaby Lake-RU22 SATA3.0 Port1 M.2 SATA SSD *sub board
P.27 SATAODD P.30 (sub board) LS-G074P

KabyLake-RU42 DA6001WR00S
JHDMI eMMC
(sub board)
*sub board
LS-G075P
JSSD DA6001WS00S
HDMICONN DDI x4Lane Port1
PCIe 3.0:8Gb/s PCIe x2 M.2 SSD(KeyM) NVMe
P.28 P.19
Port#11~#12 *need supported Intel Optane (3D Xpoint)
SATA3.0 Port2
JLAN UL1
RJ45CONN LAN PCIex1 Port#5
P.29 RTL8111HSH-CG P.29 PCIe Gen1 Only:2.5Gb/s
2 JWLAN USB3.0 2
NGFFWLAN+BT PCIex1 Port#6 5Gb/s

(Key E) P.30 PCIe Gen1 Only:2.5Gb/s 1356P BGA JUSB1
USB2.0 Port1 USB3.0port Port1
480Mb/s P.30
JUSB2
Port2 Port2
USB3.0port
P.31
JIO
Port3
USB2.0Port P.31
*sub board
PUB1 PJPB1 LS-G071PR01
Charger
Port4 CardReader DA6001WJ000
Battery AK6485RB63-GLF-GR P.29
(sub board)
P.47 P.46
UK1
JEDP
SMBus1
ECENE LPC
SKL-U 15W2+2 Port5 Camera P.27
3
SMBus2
KB9022QD 33MHz KBL-U 15W2+2 3
P.33 JWLAN
UC3 Port6
UV1 Bluetooth
PS2 P.30
dGPU Thermalsensor JKB JTP
G753T11U P.10 Int.KBD TouchPad JEDP
P.22 SMBus Port7
P.34 P.34 TouchScreen P.27
*sub board
JFAN JKBL LS-G073PR01
DA4002M0000
Fan KBlight
75x70 P.38 P.34 SPI UA1 JSPK
50MHz
UC2 HDA 24MHz HDA Aduiocodec InternalSPK P.32
SPI ROM ALC3247-CG
P.32 JHP
8MBytes P.07
ComboJack
P.32
UT1
TPM
SLB9670VQ2.0
4 P.35 4

Issued Date 2017/08/24 DecipheredDate 2018/08/24 T itle
THIS S HE E T O F E N G IN E E R IN G D RA W IN G IS TH E P ROP RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A ND CONTA INS CONFIDENTSIiiiAzeL Document Number
Block Diagrams
A ND TR A DE S E CR E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C U S TO D Y OF TH E CO M P E TE N T DIV IS ION OF R& D DE Rev
P A RTM E NT E X C E P T A S A UTHORIZE D B Y C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S HE E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom v0.3
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W RITTE N CO N S E N T OF CO M P A L E LE CTRONICS , INC. CSL50 / CSL52
Date: Monday, January 08, 2018 Sheet 2 of 59
A B C D E
4 3 2 1
- 5
+5VALW/+3VALW
AC
Adapter 19.5V
(SY8288C/SY8286B)
P.45 Vout +3VALW +3VALW

Vout +1.8V_PRIM
Vin G5719
EC_ON Vout +5VALW PCH_PWR_EN PGOOD +1.8V_PG
D
EN EN D
P.51
Charger +19.5VB
Charge
Vin
BQ24725 +3VALW
Vout +2.5V
Vin G5719
P.47
PM_SLP_S4# PGOOD +2.5V_PG
EN
P.49
PGOOD SPOK
DC Discharge P.48
Battery
P.46 +1.2V/+0.6VS
Vin(G5616B)
Vout +0.6V_0.6VS
+2.5V_PG Vout +1.2V_VDDQ
EN S5
C C
SM_PG_CTRL
EN S3
P.49
+1.0V_PRIM Vout +1.0V_PRIM

Vin (SY8286R)
+1.8V_PG PGOOD +1.0V_VS_PG_PWR
EN
P.50
CPU_CORE Vout +VCC_CORE

Vin (RT3602AE) Vout +VCC_GT
VR_ON Vout +VCC_SA
EN
B
PGOOD VR_PWRGD B
P.52,53
+VGA_CORE
Vin (RT8812A) Vout +VGA_CORE
VRAM_PG
PGOOD GPU_PGD
EN
P.56
+1.35VS_VGA Vout
+1.35VS_VGA
Vin (SY8286R)
A A
DGPU_PWR_EN PGOOD VRAM_PG

EN
P.55
Security Classification Compal SecretData Compal Electronics, Inc.

Issued Date 2016/09/01 2019/09/01 T itle
Deciphered Date
Power BlockDiagram
THIS S HE E T OF ENGINEERING DRAW ING IS THE P ROP RIE TA RY P ROP E RTY OF COM P A L ELECTRONICS,,, INC. A ND CONTAINS CONFIDENTSIIiAzLe Document Number
Rev
A ND TRA DE S E CRET INFORM A TION. THIS S HE E T M A Y NOT BE TRA NS FE RE D FROM THE CUS TODY OF THE COM P E TE NT DIVISION OF R& D
DE P A RTM E NT E X CEP T A S A UTHORIZE D B Y COM P A L E LE CTRONICS , INC. NEIIITHER THIS S HE E T NOR THE INFORM A TION IIIT CONTAINS M CSL50 / CSL52 v0.3
A Y BE US E D BY OR DIS CLOS ED TO A NY THIRD P A RTY W ITHOUT P RIOR W RITTE N CONS E NT OF COM P A L E LE CTRONICS, IIINC...
Dattte: Friday,,, January05,,,2018 Sheettt 58 of 59
5 4 3 2 1
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A B C D E
-
Power rail Control (EC) Source (CPU)
(TBC)
+RTCVCC X X SOC SMBUS Address Table EC SMBUS Address Table
VIN X X Address(8bit) EC_SMBUSPort Power Rail Device Address(7bit)
SOC_SMBUS NetName Power Rail Device Address(7 bit)
BATT+ X X Write Read
B+ X X
DIMM1 0x50 0xA0 0xA1 BAT 0x16
+VL X X SMBCLK SMBUSPort1 +3VL_EC
+3VL X X SMBDATA +3V_PRIM DIMM2 0x52 0xA4 0xA5 CHGR 0x12
+5VALW EC_ON X TouchPAD 0x2C 0x58 0x59
+3VALW EC_ON X dGPU
1
+3VALW _EC EC_ON X 1
+3V_PCH PCH_PWR_EN X Thermal

SMBUSPort2 +3VS Sensor 0x90
+1.2V_VDDQ SYSON PM_SLP_S5#/PM_SLP_S4# i3_7100U_R1@ i3_7100U_R3@ MX110@ MX130@
+5VS SUSP# PM_SLP_S3# PCH

UC1 UC1 UV1 UV1
+3VS SUSP# PM_SLP_S3#
+1.5VS SUSP# PM_SLP_S3# i3_7100U i3_7100U N16V-GMR1-S-A2 N16S-GTR-S-A2
SA0000A38H0 SA0000A38J0 SA00009IT00 SA00009FP00
+1.05VS SUSP# PM_SLP_S3# S IC FJ8067702739738SR343 H0 2.4GBGA S IC FJ8067702739738SR343H02.4G A32! S IC N16V-GMR1-S-A2 BGA595P S IC N16S-GTR-S-A2 BGA595PGPU
+0.6V_0.6VS SUSP#
+VCC_CORE X VR12.5_VR_ON U_i5_7200U_SR342@ i5_7200U_R3@ ZZZ ZZZ ZZZ ZZZ
Power State
STATE SIGNAL SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
UC1 UC1 2G Micron 2G Micron 4G Micron 4G Micron
S0 (FullON) HIGH HIGH HIGH ON ON ON ON
BOM Structure Table (1/2) U_SI_i5-7200U_SR342H02.5G
SA0000A37H0
i5_7200U
SA0000A37J0
M2G_R1@
X7674032L01
M2G_R3@
X7674032L06
M4G_R1@
X7674032L26
M4G_R3@
X7674032L29
Function Stuff Un-Stuff S IC FJ8067702739739SR342 H0 2.5GBGA S IC FJ8067702739739 SR342H0 2.5GA32! S3 (SuspendtoRAM) LOW HIGH HIGH ON ON OFF OFF
S4 (SuspendtoDisk) LOW LOW HIGH ON OFF OFF OFF
DGPU SKU PX@ U_i7_7500U_SR341@ i7_7500U_R3@ ZZZ ZZZ ZZZ ZZZ
UMA SKU UMA@ S5 (SoftOFF) LOW LOW LOW ON OFF OFF OFF
UC1 UC1 2G Hynix 2G Hynix 4G Hynix 4G Hynix
TPM TPM@
U_SI_i7-7500U_SR341H02.7G i7_7500U H2G_R1@ H2G_R3@ H4G_R1@ H4G_R3@
SA0000A34F0 SA0000A34H0 X7674032L04 X7674032L07 X7674032L25 X7674032L28
S IC FJ8067702739740SR341 H0 2.7GBGA S IC FJ8067702739740SR341H02.7G A32! <USB2.0 port>
45@ ROYALTY HDMIW /LOGO
Part Number Description USB2.0port DESTINATION
ZZZ ZZZ ZZZ ZZZ
R_i5_8250U_QNEF@ i5_8250U_R3@ RO0000002HM HDMI W/Logo:RO0000002HM
2 1 USB3.0Type-C 2
2G Samsung 2G Samsung 4G Samsung 4G Samsung RO0000003HM
UC1 UC1 2 USB2.0/USB3.0
R_i3_7020U_QN96@ R_i3_8130U_QP8K@ S2G_R1@ S2G_R3@ S4G_R1@ S4G_R3@ 3 USB2.0/USB3.0
R_SI_i5_8250U_QNEF Y0 1.6G i5_8250U X7674032L05 X7674032L08 X7674032L27 X7674032L30
SA0000AWB10 SA0000AWB30
S IC FJ8067703282221 SR3LA Y0 1.6G FCBGA S IC FJ8067703282221 SR3LA Y0 1.6GA32!
4 BT
UC1 UC1
5 HD/IR_1/IR_2Camera
R_SI_i3_7020U_QN96Y02.3G R_SI_i3-8130U_QP8KY02.2G 6 IR_2Camera
SA0000BLD00 SA0000BKN10 R_i7_8550U_SR3LC@ i7_8550U_R3@
S IC A32 FJ8067703282620 QN96 Y0 2S.3GCA32I FJ8067703282227QP8K Y0 2.2G 7 Card Reader
R_i7_8550U_QNBF@ U_i3_7020U_QNZU@ UC1 UC1 DAX DAX DAX DAX ZZZ 8 X
9 X
R_SI_i7-8550U_SR3LCY01.8G i7_8550U KBLU-2G KBLR-2G KBLU-4G KBLR-4G EMC for EE
UC1 UC1 SA0000AW C20 SA0000AW C30 10 X
S IC FJ8067703281816 SR3LC Y0 1.8G FCBGA S IC FJ8067703281816SR3LC Y0 1.8G A32!
R_SI_i7_8550U_QNBFY01.8G U_SI_i3-7020U_QNZUH02.3G KBLU_2G@ KBLR_2G@ KBLU_4G@ KBLR_4G@ X4E@
SA0000AW C10 SA0000BLH00 DA6001WM000 DA6001WI000 DA8001EH000 DA8001EI000 X4EABB32L01
S IC A32 FJ8067703281816 QNBF Y0 1S8GCAI.32FJ8067702739769 QNZU H02.3G PCB 29M LA-G07APREV0 MB 3 PCB 29L LA-G07CPREV0 MB 3
SMT EMC FOR EE AG07CCSL50
<PCI-E,SATA,USB3.0/CLK>
ZZZ ZZZ ZZZ ZZZ
Lane# PCI-E SATA USB3.0 DESTINATION CLK
DAZ_U2G DAZ_R2G DAZ_U4G DAZ_R4G
+3V_PRIM 1 1 USB3.0Type-C X
UC1 +3VS
SO-DIMMA DAZ_U2G@ DAZ_R2G@ DAZ_U4G@ DAZ_R4G@
2 2 USB3.0Type-C X
+3V_PRIM DAZ23T00600 DAZ23T00500 DAZ23T00600 DAZ23T00500
R=1K R=10K 3 3 USB2.0/USB3.0 X
SMBCLK PCH_SMBCLK
R7 SMBDATA PCH_SMBDATA
DAX DAX 4 4 USB2.0/USB3.0 X
2N7002 SO-DIMMB
R8 5 1 5 GPU(DISonly)
KBLU-UMA KBLR-UMA CLK0
+3V_PRIM
CPU +3VALW 6 2 6 GPU(DIS only)

R9 +3V_PRIM KBLU_UMA@ KBLR_UMA@
7 3 GPU(DISonly)
3 SML0CLK R=499 R=10K DA6001YA000 DA6001YB000 3
TP_SMBCLK PCB 29M LA-G07DPREV0 M/B 3 PCB 29L LA-E791PREV0 M/B 3
8 4 GPU(DISonly)
SML0DATA 2N7002 TP_SMBDAT
W2 TouchPad 9 5 LAN CLK1
10 6 W LAN CLK2
11 7 0 HDD X
+3V_PRIM+3VS +3VS +3VS_DGPU_AON
12 8 1a ODD CLK3
R=1K R=2.2K
13 9 X X
SML1CLK
+3VS_DGPU_AON
@ 14 10 X X
W3 SML1DATA
V3 2N7002 15 11 1b* X CLK4
EC_SMB_CK2 NVMe x2 SATASSD
EC_SMB_DA2 R=2.2K 16 12 2 X
PX@
U6 2N7002 DGPU
U7 I2CS_SCL
I2CS_SDA
U9 Thermal Sensor:G753T11U
U8 Address : 0x48
UK1:+3VALW_EC(+3VL)
EC_SMB_CK2
79 EC_SMB_DA2
4 4
EC
80
+3V_SMBUS GSEN_I2DAT
R=0 GSEN_I2CLK G-Sensor
HP2DC
R=2.2K
EC_SMB_CK1
77 EC_SMB_DA1
78 R=100 BAT
Issued Date 2016/12/15 2019/12/15 Title
Deciphered Date
Charger THI S S HE ET O F ENGIINEERIING D RAW I NG IS THE P RO P RI E TAR Y P R O P E RTY O F CO MP AL E L EC TR O NI CS , I NC. AND CO NTAI NS CONFIDENTSSIAizLe DocumentNumber
NotesList
AND TR AD E SE C RE T I NF O RMATI O N. THI S SHE E T MAY NO T BE TR ANS F E R E D F RO M THE CUS TO DY OF THE CO MP E TE NT DIVISION OF R& D Rev
DE P AR TME NT EX CE P T AS AUTHO R I Z E D BY CO MP AL EL ECTR O NI CS , I NC . NE I THE R THI S SHE E T NO R THE I NF O R MATI O N IT C O NTAI NS Custom
MAY BE US E D BY OR D I S CLO S ED TO ANY THI RD P AR TY W I THO UT P RI O R W RI TTE N CO NS E NT OF CO MP AL E L ECTR O NI CS , I NC. LA-G07DP(KBL-U_UMA_v60.L
3
)
Date: Friday,January05,2018 Sheet 3 of 59
A B C D E
5 4 3 2 1
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[Diner-PWR Sequence_SKL-U22_DDR3L_Volume_NON CS]
G3->S0 S0->S3/DS3 S0/DS3->S0 S0->S5

+3VL_RTC +3VL_RTC
tPCH01_Min : 9 ms
SOC_RTCRST# SOC_RTCRST#
+19VB +19VB
+3VLP/+5VLP +3VLP/+5VLP
D D
EC_ON EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
Pull-up to DSW well if not implemented.
PM_BATLOW # PM_BATLOW #
PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)
+3V_PRIM +3V_PRIM
+1.8V_PRIM +1.8V_PRIM
EXT _PW R_GATE# If EXT_PW R_GATE# Toffmin is too small, Pwr EXT_PW R_GATE#
gate may choose to completely ignore it
+1.0V_MPHYPLL +1.0V_MPHYPLL
+1.0V_PRIM_CORE +1.0V_PRIM_CORE
tPCH34_Max : 20 ms
+1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM
SUSACK# SUSACK#
tPCH02_Min : 10 ms
PCH_DPW ROK PCH_DPW ROK
tPCH03_Min : 10 ms
EC_RSMRST# EC_RSMRST#
tPLT02_Min : 0 ms Max : 90 ms
AC_PRESENT AC_PRESENT
C C
ON/OFF ON/OFF
PBTN_OUT# PBTN_OUT#
Minimum duration of PW RBTN# assertion = 16mS. PW RBTN# can assert before or after RSMRST#
PM_SLP_S5# PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST# ESPI_RST#
SYSON SYSON
+1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR
+1.35V_VDDQ/+1.35V_VCCSFR_OC +1.35V_VDDQ/+1.35V_VCCSFR_OC
SUSP# SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG +1.0VS_VCCSTG
tCPU10 Min : 1 ms
+1.0VS_VCCIO +1.0VS_VCCIO
+5VS/+3VS/+1.5VS/+1.05VS
B +5VS/+3VS/+1.5VS/+1.05VS B
T4 = Min : 20ms Max : 3 0ms(EC Control)

EC_VCCST_PG EC_VCCST_PG
VR_ON VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL SM_PG_CTRL
tCPU18 Max : 35us
+0.675VS_VTT +0.675VS_VTT
tCPU09 Min : 1 ms
+VCC_SA +VCC_SA
+VCC_CORE +VCC_CORE
+VCC_GT +VCC_GT
VR_PW RGD VR_PW RGD

tCPU16 Min : 0 ns
PCH_PW ROK PCH_PW ROK
H_CPUPW RGD H_CPUPW RGD
SYS_PW ROK SYS_PW ROK
SUS_STAT# SUS_STAT#
A SOC_PLTRST# A
SOC_PLTRST#

Title
T IAL
SS ize HW Reserve
THI S S HE ET OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA RY P ROP E R TY OF C OMP A L E LEC TRONI CS , I NC. A ND CONTAI NS C ONF I DEN A ND TRA D E S
D Document Number Rev
E C RE T I NF ORMA TI ON. THI S S HE ET MA Y NOT BE TRA NS F E RE D F ROM THE C US TOD Y OF THE C OMP E TE NT DI VI SI ON OF R& DE PA RTME N T E XC E PT AS
Custo m v0.3
AUTHORI ZE D BY C OMP A L E LEC TRONI C S, I NC. NEI THE R THI S S HE ET NOR THE I NF ORMA TI ON I T CONTA I NS MA Y BE US E D BY OR DI SCLOSED TO A NY THI
RD P ARTY W I THOUT P RI OR W RI TTE N C ONS E NT OF C OMP AL E LE CTRONI C S, I NC.
CSL50 / CSL52
Date: Friday, January05,2018 Sheet 4 of 59
5 4 3 2 1
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Eletro-XTechnical06
A B C D E
UC1A SKL-U
Rev_0.53
<28> HOST_DP1_N0 E55 DDI1_TXN[0] EDP_TXN[0] C47 EDP_TXN0<27>

<28> HOST_DP1_P0 F55 DDI1_TXP[0] EDP_TXP[0] C46 EDP_TXP0 <27>
<28> HOST_DP1_N1 E58 DDI1_TXN[1] EDP_TXN[1] D46 EDP_TXN1 <27> <eDP>
<HDMI> <28> HOST_DP1_P1 F58 DDI1_TXP[1] EDP_TXP[1] C45 EDP_TXP1 <27>
SOC_DP1_CTRL_DATA(Internal Pull Down): <28> HOST_DP1_N2 F53 DDI1_TXN[2] EDP_TXN[2] A45
<28> HOST_DP1_P2 G53 DDI1_TXP[2] EDP_TXP[2] B45
<28> HOST_DP1_N3 F56 DDI1_TXN[3] EDP_TXN[3] A47
Display Port B Detected G56 DDI1_TXP[3] EDP_TXP[3] B47
<28> HOST_DP1_P3
0 = Port B is not detected. C50 DDI2_TXN[0] DDI EDP EDP_AUXN E45 EDP_AUXN <27>
D50 DDI2_TXP[0] EDP_AUXP F45 EDP_AUXP <27>
1 1
C52 DDI2_TXN[1]
1 = Port B is detected. D52 DDI2_TXP[1] EDP_DISP_UTIL B52
A50 DDI2_TXN[2]
B50 DDI2_TXP[2] DDI1_AUXN G50
D51 DDI2_TXN[3] DDI1_AUXP F50
SOC_DP2_CTRL_DATA(Internal Pull Down): C51 DDI2_TXP[3] DDI2_AUXN E48
DDI2_AUXP F48
DDI3_AUXN G46
Display Port C Detected DISPLAYSIDEBANDS
DDI3_AUXP F46
HOST_DP1_CTRL_CLKL13
HDMI DDC (PortB) <28> HOST_DP1_CTRL_CLK
HOST_DP1_CTRL_DATA L12GPP_E18/DDPB_CTRLCLK L9 HOST_DP1_HPD HOST_DP1_HPD <28>From HDMI
0 = Port C is not detected. <28> HOST_DP1_CTRL_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7 DDI2_HPD
GPP_E14/DDPC_HPD1 L6 TP@ T408 NMI_DBG#_CPU
N7 NMI_DBG#_CPU <10,33>
N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9
1 = Port C is detected. EC_SCI# EC_SCI# <33>
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10 From eDP
EDP_HPD EDP_HPD <27>
GPP_E17/EDP_HPD
N11
N12 GPP_E22/DDPD_CTRLCLK EDP_BKLTEN R12 ENBKL
GPP_E23/DDPD_CTRLDATA R11 ENBKL <33>
EDP_COMP EDP_BKLTCTL U13 ENVDD_CPU BKL_PWM_CPU<27>
E52 1 OF20
EDP_RCOMP EDP_VDDEN ENVDD_CPU <27>
SKL-U_BGA1356
+1.0V_VCCST
+1.0V_PRIM RC123 1 @ 2 100K_0402_5% ENVDD_CPU
1 2 H_THERMTRIP#
1
RC2 1K_0402_5% RC3 UC1D SKL-U RC124 1 2 100K_0402_5% ENBKL
1K_0402_5% Rev_0.53
T248 TP@ CATERR# D63 CATERR#

2 H_PECI A54 PECI 2
<33> H_PECI
2
<33> PROCHOT# 1 2 H_PROCHOT#_R C65 PROCHOT# JTAG
COMPENSATIONPUFOReDP RC4 499_0402_1% H_THERMTRIP# C63 THERMTRIP#
CPU_XDP_TCK0
+1.0V_PRIM A65 SKTOCC# PROC_TCK B61
CPUMISC PROC_TDI D60 SOC_XDP_TDI
1
C55 SOC_XDP_TDO
DS11 D55 BPM#[0] PROC_TDO A61
BPM#[1] PROC_TMS C60 SOC_XDP_TMS
RC1 1 2 EDP_COMP CK0402101V05_0402-2 SOC_XDP_TRST#
B54 PROC_TRST# B59
24.9_0402_1% ESD@ C56 BPM#[2]
CAD note: BPM#[3] B56 PCH_JTAG_TCK1
PCH_JTAG_TCK
SCV00001K00 A6 D59 SOC_XDP_TDI
Trace width=20mils,Spacing=25mil,Maxlength=100mils A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI
A56 SOC_XDP_TDO
BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO
C59 SOC_XDP_TMS
PCH_JTAG_TMS
2
AY5 GPP_B3/CPU_GP2
C61 SOC_XDP_TRST#
GPP_B4/CPU_GP3 PCH_TRST#
A59 CPU_XDP_TCK0
1 49.9_0402_1% CPU_POPIRCOMP AT16 JTAGX
RC5 2
RC6 2 1 49.9_0402_1% PCH_OPIRCOMP AU16 PROC_POPIRCOMP
RC7 2 1 49.9_0402_1% EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
RC8 2 1 49.9_0402_1% EOPIO_RCOMP HO65PCE_RCOMP
OPC_RCOMP
4 OF20
SKL-U_BGA1356
XDP CONN
3 3
+1.0V_PRIM
RC11 2 @ 1 51_0402_5% SOC_XDP_TMS
RC13 2 @ 1 51_0402_5% SOC_XDP_TDI
RC15 2 1 51 +-1% 0402 SOC_XDP_TDO SD000008H80
RC364 2 @ 1 51_0402_5% CPU_XDP_TCK0
+1.0V_PRIM
RC14 2 @ 1 51_0402_5% XDP_PREQ# XDP_PREQ# <11>
RC31 1 @ 2 1K_0402_5% XDP_ITP_PMODE XDP_ITP_PMODE <16>
4 RC365 2 @ 1 51_0402_1% SOC_XDP_TRST# 4
RC35 2 1 51_0402_1% CPU_XDP_TCK0 SD000008H80
RC37 2 @ 1 51_0402_5% PCH_JTAG_TCK1
Compal Electronics, Inc.

RC366 1 @ 2 0_0402_5% CFG3 CFG3 <16> SecurityClassification Compal Secret Data
- Issued Date 2017/04/10 DecipheredDate 2019/12/15 Title
THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTSSIAizLeDocument Number
SKL-U(1/12)DDI,MSIC,XDP,EDP
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PART Y W IT HOUT PRIOR W RIT TEN CONSENT OF COMPAL ELECT RONICS, INC. CSL50 / CSL52 v0.3
Date: Friday, January 05, 2018 Sheet 5 of 59
Eletro-XTechnical06
A B C D E
Eletro-XTechnical07
5 4 3 2 1
Interleaved Memory Interleaved Memory

<Cocoa_1020>
D D
PDG#543016, ODT: CPU side no connect, DRAM side connect to VDDQ(Memory down); FET+R(SO-DIMM)
S K L -U
UC1B SKL- U UC1C
Rev_0.53 Rev_0.53
<17> DDR_M0_D[0..15] DDR0_CKN[0] AU53 DDR_M0_CLK#0 DDR_M0_CLK#0 <17> <18> DDR_M1_D[0..15]

DDR_M0_D0 AL71 AT53 DDR_M0_CLK0 DDR_M1_D0 AF65 AN45 DDR_M1_CLK#0
DDR0_CKP[0] DDR_M0_CLK0 <17> DDR_M1_CLK#0 <18>
DDR_M0_D1 AL68 DDR0_DQ[0] DDR_M1_D1 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] AN46 DDR_M1_CLK#1
DDR_M0_D2 AN68 DDR0_DQ[1] DDR0_CKN[1] AU55 DDR_M0_CLK#1 DDR_M0_CLK#1 <17> DDR1_DQ[1]/DDR0_DQ[17] DDR_M1_CLK#1 <18>
DDR_M1_D2 AK65 DDR1_CKN[1] AP45 DDR_M1_CLK0
DDR_M0_D3 AN69 DDR0_DQ[2] DDR0_CKP[1] AT55 DDR_M0_CLK1 DDR_M0_CLK1 <17>
DDR1_CKP[0]
DDR_M1_CLK0 <18>
DDR_M1_D3 AK64 DDR1_DQ[2]/DDR0_DQ[18] AP46 DDR_M1_CLK1 DDR_M1_CLK1 <18>
DDR_M0_D4 AL70 DDR0_DQ[3] DDR_M0_CKE0 DDR_M1_D4 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
DDR_M0_D5 AL69 DDR0_CKE[0] BA56 DDR_M0_CKE0 <17>
DDR0_DQ[4] DDR_M1_D5 AF67 DDR1_DQ[4]/DDR0_DQ[20]
DDR0_CKE[1] BB56 DDR_M0_CKE1 DDR_M0_CKE1 <17> DDR1_CKE[0] AN56 DDR_M1_CKE0 <18>
DDR_M0_D6 AN70 DDR0_DQ[5] DDR_M1_D6 AK67 DDR1_DQ[5]/DDR0_DQ[21] C0KERM__D1DAP55
DDR_M0_D7 AN71 DDR0_DQ[6] DDR0_CKE[2] AW 56 DDR_M1_D7 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] DDR_M1_CKE1 <18>
AY56 DDR1_CKE[2] DDR_M1_CKE1 AN55
DDR_M0_D8 AR70 DDR0_DQ[7] DDR0_CKE[3] DDR_M1_D8 AF70 DDR1_DQ[7]/DDR0_DQ[23]
DDR_M0_D9 AR68 DDR0_DQ[8] DDR_M0_CS#0 DDR_M1_D9 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] AP53
DDR0_CS#[0] AU45 DDR_M0_CS#0 <17>
DDR0_DQ[9]
DDR_M0_D10AU71 DDR0_DQ[10] DDR0_CS#[1] AU43 DDR_M0_CS#1 DDR_M0_CS#1 <17> DDR_M1_D10AH71 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CS#[0] BB42 DDR_M1_CS#0 DDR_M1_CS#0 <18>
AY42 DDR_M1_CS#1
DDR_M0_D11AU68 DDR0_DQ[11] DDR0_ODT[0] AT45 DDR_M0_ODT0 DDR_M0_ODT0 <17> DDR_M1_D11AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[1] DDR_M1_CS#1 <18>
DDR_M0_D12AR71 DDR0_DQ[12] AT43 DDR_M0_ODT1 DDR_M1_D12AF71 DDR1_DQ[11]/DDR0_DQ[27] BA42 DDR_M1_ODT0
DDR0_ODT[1] DDR_M0_ODT1 <17> DDR_M1_ODT0 <18>
DDR_M0_D13AR69 DDR0_DQ[13] DDR_M1_D13AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW 42 DDR_M1_ODT1 DDR_M1_ODT1 <18>
DDR_M0_D14AU70 DDR0_DQ[14] BA51 DDR_M0_MA5 DDR_M1_D14AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR_M0_MA5 <17>
DDR_M0_D15AU69 DDR0_DQ[15] BB54 DDR_M0_MA9 DDR_M0_MA9 <17> DDR_M1_D15AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 DDR_M1_MA5 DDR_M1_MA5 <18>
<17> DDR_M0_D[16..31] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] <18> DDR_M1_D[16..31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR_M0_D16BB65 DDR0_DQ[16]/DDR0_DQ[32] BA52 DDR_M0_MA6 DDR_M0_MA6 <17> DDR_M1_D16AT66 DDR1_DQ[15]/DDR0_DQ[31] AP50 DDR_M1_MA9 DDR_M1_MA9 <18>
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]BA48 DDR_M1_MA6
DDR_M0_D17AW65 DDR0_DQ[17]/DDR0_DQ[33] AY52 DDR_M0_MA8 DDR_M0_MA8 <17> DDR_M1_D17AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR_M1_MA6 <18>
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] BB48 DDR_M1_MA8
DDR_M0_D18AW63 DDR0_DQ[18]/DDR0_DQ[34] AW 52 DDR_M0_MA7 DDR_M0_MA7 <17> DDR_M1_D18AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR_M1_MA8 <18>
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 DDR_M1_MA7
DDR_M0_BG0 <17> DDR_M1_D19AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR_M1_MA7 <18>
DDR_M0_D19AY63 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] AY55 DDR_M0_BG0 DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52 DDR_M1_BG0
DDR_M0_D20BA65 DDR0_DQ[20]/DDR0_DQ[36] AW 54 DDR_M0_MA12 DDR_M0_MA12 <17> DDR_M1_D20AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR_M1_BG0 <18>
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR_M1_D21AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 DDR_M1_MA12
DDR_M0_D21AY65 DDR0_DQ[21]/DDR0_DQ[37] BA54 DDR_M0_MA11 DDR_M0_MA11 <17> DDR_M1_MA12 <18>
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR_M1_D22AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 DDR_M1_MA11
DDR_M0_D22BA63 DDR0_DQ[22]/DDR0_DQ[38] DDR_M0_ACT# <17> DDR_M1_MA11 <18>
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# BA55 DDR_M0_ACT# DDR_M1_D23AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 DDR_M1_ACT#
DDR_M0_D23BB63 DDR0_DQ[23]/DDR0_DQ[39] AY54 DDR_M0_BG1 DDR_M0_BG1 <17> DDR_M1_ACT# <18>
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_M1_D24AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 DDR_M1_BG1
DDR_M0_D24BA61 DDR0_DQ[24]/DDR0_DQ[40] DDR_M1_BG1 <18>
DDR_M1_D25AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR_M0_D25AW61 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU46 DDR_M0_MA13 DDR_M0_MA13 <17>
C DDR_M1_D26AP60 DDR1_DQ[25]/DDR0_DQ[57] C
DDR_M0_MA15_CAS# <17> BA43 DDR_M1_MA13 DDR_M1_MA13 <18>
DDR_M0_D26BB59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AU48 DDR_M0_MA15_CAS# DDR_M1_D27AN60 DDR1_DQ[26]/DDR0_DQ[58]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR_M0_MA14_WE# <17> DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY43 DDR_M1_MA15_CAS# DDR_M1_MA15_CAS# <18>
DDR_M0_D27AW59 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AT46 DDR_M0_MA14_WE# DDR_M1_D28AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR_M1_MA14_WE# <18>
DDR_M0_D28BB61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU50 DDR_M0_MA16_RAS# DDR_M0_MA16_RAS# <17> DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AY44 DDR_M1_MA14_WE#
AU52 DDR_M0_BA0 DDR_M0_BA0 <17> DDR_M1_D29AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR_M1_MA16_RAS# <18>
DDR_M0_D29AY61 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] AW 44 DDR_M1_MA16_RAS#
DDR_M0_D30BA59 DDR0_DQ[30]/DDR0_DQ[46] AY51 DDR_M0_MA2 DDR_M0_MA2 <17> DDR_M1_D30AT60 DDR1_DQ[29]/DDR0_DQ[61] BB44 DDR_M1_BA0 DDR_M1_BA0 <18>
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_M1_D31AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
AT48 DDR_M0_BA1 DDR_M0_BA1 <17> DDR_M1_MA2 <18>
<17> DDR_M0_D[32..47] DDR_M0_D31AY59 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] <18> DDR_M1_D[32..47]
DDR_M1_D32AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AY47 DDR_M1_MA2 DDR_M1_BA1 <18>
AT50 DDR_M0_MA10 DDR_M0_MA10 <17> A44 DDR_M1_BA1
DDR_M0_D32AY39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_M0_MA1 <17> DDR_M1_D33AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] B AW 46 DDR_M1_MA10 DDR_M1_MA10 <18>
DDR_M0_D33AW39 DDR0_DQ[33]/DDR1_DQ[1] BB50 DDR_M0_MA1 DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR_M1_D34AT37 DDR1_DQ[33]/DDR1_DQ[17] AY46 DDR_M1_MA1 DDR_M1_MA1 <18>
DDR_M0_D34AY37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] AY50 DDR_M0_MA0 DDR_M0_MA0 <17>
BA50 DDR_M0_MA3 DDR_M1_D35AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 DDR_M1_MA0 DDR_M1_MA0 <18>
DDR_M0_D35AW37 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR_M0_MA3 <17>
BB52 DDR_M0_MA4 DDR_M1_D36AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 DDR_M1_MA3 DDR_M1_MA3 <18>
DDR_M0_D36BB39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_M0_MA4 <17> DDR1_MA[3] BA47 DDR_M1_MA4
DDR_M0_D37BA39 DDR0_DQ[37]/DDR1_DQ[5] DDR_M1_D37AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] DDR_M1_MA4 <18>
DDR_M0_D38BA37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM70 DDR_M0_DQS#0 DDR_M0_DQS#0 <17> DDR_M1_D38AP37 DDR1_DQ[37]/DDR1_DQ[21]
DDR_M0_D39BB37 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] AM69 DDR_M0_DQS0 DDR_M0_DQS0 <17> DDR_M1_D39AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66 DDR_M1_DQS#0 DDR_M1_DQS#0 <18>
AT69 DDR_M0_DQS#1 DDR1_DQSN[0]/DDR0_DQSN[2] AH65 DDR_M1_DQS0
DDR_M1_D40AT33 DDR1_DQ[39]/DDR1_DQ[23]
DDR_M0_D40AY35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] DDR_M0_DQS#1 <17> DDR1_DQSP[0]/DDR0_DQSP[2] DDR_M1_DQS0 <18>
DDR_M0_D41AW35 DDR0_DQ[41]/DDR1_DQ[9] AT70 DDR_M0_DQS1 DDR_M1_D41AU33 DDR1_DQ[40]/DDR1_DQ[24] AG69 DDR_M1_DQS#1 DDR_M1_DQS#1 <18>
DDR0_DQSP[1] DDR_M0_DQS1 <17>
DDR_M1_D42AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 DDR_M1_DQS1 DDR_M1_DQS1 <18>
DDR_M0_D42AY33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] BA64 DDR_M0_DQS#2 DDR_M0_DQS#2 <17>
DDR_M1_D43AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 DDR_M1_DQS#2 DDR_M1_DQS#2 <18>
DDR_M0_D43AW33 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] AY64 DDR_M0_DQS2 DDR_M0_DQS2 <17>
DDR_M1_D44AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 DDR_M1_DQS2 DDR_M1_DQS2 <18>
DDR_M0_D44BB35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] AY60 DDR_M0_DQS#3 DDR_M0_DQS#3 <17>
DDR1_DQSP[2]/DDR0_DQSP[6] AR61 DDR_M1_DQS#3 DDR_M1_DQS#3 <18>
DDR_M0_D45BA35 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] BA60 DDR_M0_DQS3 DDR_M0_DQS3 <17> DDR_M1_D45AP33
DDR_M0_DQS#4 <17> DDR_M1_D46AR30 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 DDR_M1_DQS3 DDR_M1_DQS3 <18>
DDR_M0_D46BA33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] BA38 DDR_M0_DQS#4 DDR_M1_D47AP30 DDR1_DQ[45]/DDR1_DQ[29] AT38 DDR_M1_DQS#4
DDR_M0_DQS4 <17> DDR1_DQSP[3]/DDR0_DQSP[7] DDR_M1_DQS#4 <18>
<17> DDR_M0_D[48..63] DDR_M0_D47BB33 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY38 DDR_M0_DQS4 <18> DDR_M1_D[48..63]
DDR_M1_D48AU27
DDR1_DQ[46]/DDR1_DQ[30] AR38 DDR_M1_DQS4
DDR_M0_DQS#5 <17> DDR1_DQSN[4]/DDR1_DQSN[2] DDR_M1_DQS4 <18>
DDR_M0_D48AY31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] AY34 DDR_M0_DQS#5 DDR_M1_D49AT27 DDR1_DQ[47]/DDR1_DQ[31] AT32 DDR_M1_DQS#5
DDR_M0_DQS5 <17> DDR1_DQSP[4]/DDR1_DQSP[2] DDR_M1_DQS#5 <18>
DDR_M0_D49AW31 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] BA34 DDR_M0_DQS5 AR32 DDR_M1_DQS5
DDR_M0_DQS#6 <17> DDR_M1_D50AT25 DDR1_DQ[489]] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_M1_DQS5 <18>
DDR_M0_D50AY29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] BA30 DDR_M0_DQS#6 DDR1_DQSP[5]/DDR1_DQSP[3] AR25 DDR_M1_DQS#6 DDR_M1_DQS#6 <18>
DDR_M0_D51AW29 AY30 DDR_M0_DQS6 DDR_M0_DQS6 <17> DDR_M1_D51AU25 DDR1_DQ[50]
DDR_M0_D52BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 DDR_M0_DQS#7 DDR1_DQSN[6] AR27 DDR_M1_DQS6
DDR_M0_DQS#7 <17> DDR_M1_D52AP27 DDR1_DQ[51] DDR_M1_DQS6 <18>
DDR0_DQSN[7]/DDR1_DQSN[5] DDR1_DQSP[6] AR22 DDR_M1_DQS#7
DDR_M0_D53BA31 DDR0_DQ[52]/DDR1_DQ[36] BA26 DDR_M0_DQS7 DDR_M0_DQS7 <17> DDR_M1_D53AN27 DDR1_DQ[52] DDR_M1_DQS#7 <18>
DDR_M0_D54BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR1_DQSN[7] AR21 DDR_M1_DQS7
DDR_M1_D54AN25 DDR1_DQ[53] DDR_M1_DQS7 <18>
DDR1_DQSP[7]
DDR_M0_D55BB29 DDR0_DQ[54]/DDR1_DQ[38] AW 50 DDR_M0_ALERT# DDR_M1_D55AP25 DDR1_DQ[54]
DDR_M0_ALERT# <17>
DDR_M0_D56AY27 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# AT52 DDR_M0_PAR DDR_M0_PAR <17> DDR_M1_D56AT22 DDR1_DQ[55] AN43 DDR_M1_ALERT# AP43 DDR_M1_ALERT# <18>
DDR_M0_D57AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR1_ALERT# DDR_M1_PAR
DDR_M1_D57AU22 DDR1_DQ[56] DDR_M1_PAR <18>
DDR_M0_D58AY25 DDR0_DQ[57]/DDR1_DQ[41] DDR_VREF_CA AY67 +0.6V_VREFCA DDR_M1_D58AU21 DDR1_DQ[57] DDR1_PAR AT13 DDR_DRAMRST# AR18
+0.6V_VREFCA 2 121_0402_1%
DDR_M0_D59AW25 DDR0_DQ[58]/DDR1_DQ[42] AY68 DDR_M1_D59AT21 DDR1_DQ[58] DRAM_RESET# SM_RCOMP0 RC38 1
2 80.6_0402_1%
DDR_M0_D60BB27 DDR0_DQ[59]/DDR1_DQ[43] DDRCH-A
DDR0_VREF_DQ BA67 +0.6V_B_VREFDQ DDR_M1_D60AN22 DDR1_DQ[59] DDR_RCOMP[0] AT 18 SM_RCOMP1 RC39 1
DDR1_VREF_DQ +0.6V_B_VREFDQ
B DDR_M0_D61BA27 DDR0_DQ[60]/DDR1_DQ[44] DDR_M1_D61AP22 DDR1_DQ[60] DDRCH-B DDR_RCOMP[1] AU18 SM_RCOMP2 RC40 1 2 100_0402_1% B
DDR_M0_D62BA25 DDR0_DQ[61]/DDR1_DQ[45] DDR_VTT_CNTL AW 67 DDR_PG_CTRL DDR_M1_D62AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR_M0_D63BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_M1_D63AN21 DDR1_DQ[62]
DDR0_DQ[63]/DDR1_DQ[47] 2 OF 20 DDR1_DQ[63]
3 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
+1.2V_VDDQ
For VTT power control
+1.2V_VDDQ
+3VS
1
1
RC904 0.1U_0201_10V6K 2 1 CC57

RC905 @ 100K_0402_5%
1
100K_0402_5% @ UC7 RC394

1 NC 100K_0402_5%
VCC 5
2
2
DDR_PG_CTRL 2 A
2
1
Y 4 SM_PG_CTRL <49>
2
RC906 3 GND +1.2V_VDDQ

100K_0402_5% @ @ESD@
74AUP1G07SE-7_SOT353-5 DDR_PG_CT RL 1 2
@ SA00007WE00 CC70 100P_0402_50V8J
2
1
DDR_PG_CTRL 3 1 SM_PG_CTRL
RC32 From ESD Team Request
470_0402_5%
UC9 SB000008E10
2
MMBT3904WH NPN SOT323-3 DDR_DRAMRST# 1 Rshort@2 DDR_DRAMRST#_R RC33 DDR_DRAMRST#_R <17,18>
SB00000QJ00,S TRDRC5115E0LNPN 0_0402_5%
SOT323-3
A A
SecurityClassification Compal Secret Data CompalElectronics,Inc.

Eletro-XTechnica Issued Date 2017/04/10 DecipheredDate 2019/12/15 T itle
SKL-U(2/12)DDRIII
A ND TR A DE S E CR E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F RO M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D DE Rev
P A RTM E NT E X C E P T AS A UTHORIZE D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S HE E T N O R TH E IN F O RM A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W RITTE N CO N S E N T OF C O M P A L E LE CTRONICS , INC. CSL50 / CSL52 v0.3

5 4 3 2 1
Eletro-XTechnical07
Eletro-XTechnical08
5 4 3 2 1
SML0ALERT# (Internal Pull Down):

eSPI or LPC
UC1E
SKL-U 0 = LPC is selected for EC --> For KB9022/9032 Use 1
Rev_0.53 = eSPI is selected for EC --> For KB9032 Only.
SPI -FLASH
SMBUS, SMLINK
HOST_SPI_0_CLK AV2 SPI0_CLK
HOST_SPI_0_SO AW3 SPI0_MISO SMBCLK SMB SML0ALERT#
<35> HOST_SPI_0_SO
HOST_SPI_0_SI GPP_C0/SMBCLK R7
AV3 SMBDATA
<35> HOST_SPI_0_SI
HOST_SPI_0_SIO2 AW2SPI0_MOSI GPP_C1/SMBDATA R8 SMBALERT# (Link to XDP, DDR, TP)
SPI0_IO2 GPP_C2/SMBALERT# R10 TP@T239
1
HOST_SPI_0_SIO3 AU4 SPI0_IO3
HOST_SPI_0_CS0# AU3 SPI0_CS0# SML0CLK RC218
AU2 GPP_C3/SML0CLK R9 1K_0402_1%
SPI0_CS1# GPP_C4/SML0DATA W 2 SML0DATA
HOST_SPI_0_CS2# AU1 SPI0_CS2#
<35> HOST_SPI_0_CS2# GPP_C5/SML0ALERT# W 1 SML0ALERT#
D SML1CLK D
SPI -TOUCH GPP_C6/SML1CLK W 3 SML1
V3 SML1DATA
2
GPP_C7/SML1DATA AM7 GPP_B231 2 SML1ALERT# (Link to EC,DGPU, LAN, Thermal Sensor)
M2
M3 GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# +3V_PRIM
RC902 @
J4 GPP_D2/SPI1_MISO 0_0201_5%
V1 GPP_D3/SPI1_MOSI TP@T234 SML1ALERT# RC903 2 @ 1150K_0402_1%
V2 GPP_D21/SPI1_IO2
M1 GPP_D22/SPI1_IO3 LPC
GPP_D0/SPI1_CS# AY13 LPC_AD0 SML0ALERT# RC360 2 @ 1 10K_0402_5%
GPP_A1/LAD0/ESPI_IO0 BA13 LPC_AD1 LPC_AD0 <33> +3VS
LPC_AD1 <33>
CLINK GPP_A2/LAD1/ESPI_IO1 BB13 LPC_AD2
GPP_A3/LAD2/ESPI_IO2 AY12 LPC_AD3 LPC_AD2 <33> SMBALERT# 8 1
G3 LPC_AD3 <33> 7 2
G2 CL_CLK GPP_A4/LAD3/ESPI_IO3 BA12 LPC_FRAME#
G1 CL_DATA GPP_A5/LFRAME#/ESPI_CS# BA11SUS_STAT# LPC_FRAME# <33> EC_KBRST# 6 3
CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# TP@ T2402 5 4
EC_KBRST# AW13 GPP_A0/RCIN# RC387 1 2 22_0402_5% RPC19 10K_0804_8P4R_5%

<33> EC_KBRST# GPP_A9/CLKOUT_LPC0/ESPI_CLK AW9 CLK_PCI0 CLK_PCI_LPC <33> To EC
To TPM SERIRQ AY11 GPP_A10/CLKOUT_LPC1 AY9 PM_CLKRUN#
<33,35> SERIRQ GPP_A6/SERIRQ 5 OF20 GPP_A8/CLKRUN# AW11 PM_CLKRUN# <33>
LPC Mode 1
CC182
SKL-U_BGA1356
22P 50V J NPO 0402
EMI@
2
+3VS +3VS
to SPI ROM UC2 Source From +3V_PRIM
2
RPH11
2
C HOST_SPI_0_CS0#_R 1 8 EC_SPI_CS0# RC216 RC215 C
EC_SPI_CS0# <33>
HOST_SPI_0_CS0#_R 2 7 HOST_SPI_0_CS0# 10K_0402_5% 10K_0402_5% SML0CLK RC49 1 2 499_0402_1%
HOST_SPI_0_SO_R 3 6 EC_SPI_SO EC_SPI_SO<33>
2
HOST_SPI_0_SO_R 4 5 HOST_SPI_0_SO QC1A SML0DATA RC50 1 2 499_0402_1%
1
15_0804_8P4R_5% SMBCLK 6 1
PCH_SMBCLK<17,18>
RPC7
RPH12 L2N7002SDW1T1G 2NSC88-6 SML1CLK 1 8
HOST_SPI_0_HOLD#1 8 HOST_SPI_0_SIO3 SB00001FF00 SML1DATA 2 7
3 6
5
HOST_SPI_0_SI_R 2 7 HOST_SPI_0_SI SMBCLK
HOST_SPI_0_SI_R 3 6 EC_SPI_SI QC1B SMBDATA 4 5
EC_SPI_SI<33>
4 5 SMBDATA 3 4
PCH_SMBDATA <17,18>
1K_0804_8P4R_5%
15_0804_8P4R_5% L2N7002SDW1T1G 2NSC88-6
SB00001FF00
HOST_SPI_0_WP# 2 1 HOST_SPI_0_SIO2 +3VS +3V_SPI
RC388 15_0402_5%
HOST_SPI_0_SIO2 RC3901 @ 2 1K_0402_1%
+3V_SPI
SPI ROM ( 8MByte Only) CC8 HOST_SPI_0_SIO3 RC3911 @ 2 1K_0402_1%
UC2 1 2 0.1U_0201_10V6K
HOST_SPI_0_CS0#_R 1 8
CS# VCC <DB> Un-pop QC2 for new 0x90 thermal sensor
2
HOST_SPI_0_SO_R 2 7 HOST_SPI_0_HOLD#
HOST_SPI_0_WP# 3 DO(IO1) HOLD#(IO3) 6 W HOST_SPI_0_CLK_R @
4 P#(IO2) CLK 5 HOST_SPI_0_SI_R SML1CLK 6 1
GND DI(IO0) EC_SMB_CK2 <10,33>
QC2A
5 HOST_SPI_0_CS0#_R 1 @ 2
XM25QH64AHIG SOP 8P L2N7002SDW1T1G 2N SC88-6 RC357 1K_0402_5%
SA0000B8300 SPI ROM Part: SB00001FF00 @
ACES_91960-0084L_8P-T Main:SA0000B8300, S IC FL 64M XM25QH64AHIG SOP 8P(XMC)
SML1DATA 3 4
2nd: SA000039A40, S IC FL 64M W25Q64JVSSIQ SOIC 8P SPI ROM(Winbond) EC_SMB_DA2 <10,33>
Use socket footprint 3th: SA00008SL00, S IC FL 64M MX25L6473FM2I-08G SOP 8P(MXIC) QC2B
4rd: SA00007LA10, S IC FL 64M GD25B64CSIGR SOP 8P SPI ROM(GigaDevice) L2N7002SDW1T1G 2NSC88-6
SB00001FF00
B B
+3V_PRIM +3VALW HOST_SPI_0_SIO3 RC51 1 ES@ 2 1K_0402_1%
From WW36 MOW for SKL-U ES sample

2
RC81 RC82
10K_0402_5% 10K_0402_5%
2
SB00001FF00 +3VS_PGPPA
1
SMBCLK 1 6
TP_SMBCLK <34>
QC7A PM_CLKRUN# 1 2
CLK Source CPU to SPI ROMUC2&EC L2N7002SDW1T1G 2NSC88-6 8.2K_0402_5%
RC107
15_0402_5%
5
HOST_SPI_0_CLK 2 1 HOST_SPI_0_CLK_R
HOST_SPI_0_CLK_R <33,35>
RC368 EMI@ SERIRQ 1 2
SMBDATA 4 3 RC122 8.2K_0402_5%
TP_SMBDATA<34>
12
CC9 QC7B SB00001FF00
10P_0402_50V8J L2N7002SDW1T1G 2NSC88-6 Follow 543016_SKL_U_Y_PDG_0_9
@EMI@
EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P MXIC

SA00006N100 S IC FL 64M MX25L6473EM2I-10G SOP 8P
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0FSO8W8P
A A

Eletro-XTechnica Issued Date 2017/04/10 DecipheredDate 2019/12/15 Title
SKL-U(3/12)SPI,ESPI,SMB,LPC
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PART Y W IT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
CSL50 / CSL52 v0.3
Eletro-XTechnical08
5 4 3 2 1
Eletro-XTechnical09
4 3 2 1
5
UC1G SKL-U
Rev_0.53 +3V_PRIM
D AUDIO UMA DIS D
HDA_SYNC BA22 HDA_SYNC/I2S0_SFRM PROJECT_ID 0 1
1
HDA_BIT_CLK AY22 HDA_BLK/I2S0_SCLK
HDA_SDOUT PX@ RC127
BB22 HDA_SDO/I2S0_TXD SDIO/SDXC
HDA_SDIN0 10K_0402_5% 2G VRAM 4GVRAM
<32> HDA_SDIN0 BA21 HDA_SDI0/I2S0_RXD
AY21 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB11
2
HDA_RST# VRAMCLK_SEL VRAM Clock 1
AW22 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 AB13 PROJECT_ID
0
J5 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 AB12
PLAT_SEL0
AY20 I2S1_SFRM GPP_G3/SD_DATA2 W12
1
PLAT_SEL1
AW20 I2S1_TXD GPP_G4/SD_DATA3 W11 RC128
AK7 GPP_G5/SD_CD# W10 UMA@ 10K_0402_5% +3V_PRIM
SOC_GPIOF1
T38TP@
SOC_GPIOF0 AK6 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W8
T39TP@ AK9 GPP_F0/I2S2_SCLK GPP_G7/SD_WP W7
AK10 GPP_F2/I2S2_TXD BA9
2
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9 RC900
2
GPP_A16/SD_1P8_SEL
X76@ 10K_0402_5%
H5 GPP_D19/DMIC_CLK0 SD_RCOMP AB7 SD_RCOMPRC76 2 1 200_0402_1%
D7 GPP_D20/DMIC_DATA0
1
D8 GPP_D17/DMIC_CLK1 GPP_F23 AF13SOC_GPIOF17 T235TP@ VRAMCLK_SEL
C8 GPP_D18/DMIC_DATA1
2
HDA_SPKR RC901
<10,32> HDA_SPKR AW5 GPP_B14/SPKR X76 BOM control RAM size X76@ 10K_0402_5%
7OF20 Net Name 4G 2G
C
SKL-U_BGA1356 VRAMCLK_SEL 1 0 C
1
HDA for AUDIO
RPC9 RC367 1 Rshort@20_0402_5%
<33> ME_FLASH_EN
1 8
<32> HDA_SYNC_R 2 7 HDA_SYNC
<32> HDA_RST#_R 3 6 HDA_RST#
5 HDA_SDOUT +3V_HDA
2
<32>HDA_SDOUT_R 4
G
@
33_0804_8P4R_5% 1 @ 2 RC3801 3 HDA_SDOUT
1K_0402_1% QC380
S
MESS138W-G_SOT323-3
<32> HDA_BIT_CLK_R 2 EMI@ 1 HDA_BIT_CLK

RC383 33_0402_5% HDA_SDOUT: +3V_PRIM
EMI@
CC143 22P50V J NPO0402 ME Flash Descriptor Security Override
@RF@ Low : Disabled(Default)
High : Enabled
2
CC183 22P 50V J NPO0402
EMI request UC1I
SKL_ULT
KBLR@ RC919 SKYL@ RC916
Rev_0.53 10K_0402_5% 10K_0402_5%
CSI-2
1
PLAT_SEL0
PLAT_SEL1
A36 CSI2_DN0 CSI2_CLKN0 C37
B36 CSI2_DP0 CSI2_CLKP0 D37
2
B B
C38 CSI2_DN1 CSI2_CLKN1 C32
D38 CSI2_DP1 CSI2_CLKP1 D32
C36 CSI2_DN2 KBLU@ RC918 KBLU@ RC917
CSI2_CLKN2 C29
D36 CSI2_DP2 10K_0402_5% 10K_0402_5%
CSI2_CLKP2 D29 PLAT_SEL1
A38 CSI2_DN3 CSI2_CLKN3 B26
1
B38 CSI2_DP3 CSI2_CLKP3 A26
0 1
C31 CSI2_DN4 CSI2_COMP E13 CSI2_COMPRC80 2 1 100_0402_1% SKYL@ KBLR@
D31 CSI2_DP4 0 KBL-U KBL-R RC918 RC917
C33 CSI2_DN5 GPP_D4/FLASHTRIG B7 PLAT_SEL0
D33 CSI2_DP5 1 SKL-U NA 10K_0402_5% 10K_0402_5%
EMMC
A31 CSI2_DN6 SD028100280 SD028100280
B31 CSI2_DP6
GPP_F13/EMMC_DATA0 AP2
A33 CSI2_DN7
GPP_F14/EMMC_DATA1 AP1
B33 CSI2_DP7 GPP_F15/EMMC_DATA2 AP3
A29 GPP_F16/EMMC_DATA3 AN3
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN1
C28CSI2_DP8 GPP_F18/EMMC_DATA5 AN2
D28CSI2_DN9 GPP_F19/EMMC_DATA6 AM4
A27 CSI2_DP9 GPP_F20/EMMC_DATA7 AM1
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
9OF20 1
EMMC_RCOMP AT1 EMMC_RCOMP2
RC89 200_0402_1%
SKL-U_BGA1356
A A

Eletro-XTechnica IssuedDate 2017/04/10 DecipheredDate 2019/12/15 Title
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. CSL50 / CSL52
Eletro-XTechnical09
5 4 3 2 1
Eletro-XTechnical10
5 4 3 2 1
+RTCVCC
RC91 1 2 20K_0402_5% PCH_SRTCRST#
CC10 1 2 1U_0402_6.3V6K
CLRP1 1 2 SHORT PADS CLR ME UC1J SKL_ULT

Rev_0.53
RC93 1 2 20K_0402_5% PCH_RTCRST# CLOCKSIGNALS
CC11 1 2 1U_0402_6.3V6K D42 CLKOUT_PCIE_N0

C42 CLKOUT_PCIE_P0
CLKREQ_PEG#0
CLRP2 1 2 SHORT PADS CLR CMOS AR10 GPP_B5/SRCCLKREQ0#
CLK_PCIE_N1 B42 CLKOUT_PCIE_N1
<29> CLK_PCIE_N1
CLK_PCIE_P1
D
RC941 2 1M_0402_5% SM_INTRUDER#
LAN <29> CLK_PCIE_P1
CLKREQ_PCIE#1
A42 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N F43 D
<29> CLKREQ_PCIE#1 AT7 GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P E43
CLK_PCIE_N2 D41 CLKOUT_PCIE_N2 BA17 SUSCLK
<30> CLK_PCIE_N2 GPD8/SUSCLK SUSCLK <30>
PCH_RTCRST# 2 1 CLK_PCIE_P2
0_0402_5% R1088
CLR_CMOS# <33> W LAN <30> CLK_PCIE_P2 CLKREQ_PCIE#2
C41 CLKOUT_PCIE_P2
PCH_KBLU24_IN
PCH_SRTCRST# 2
<30> CLKREQ_PCIE#2 AT8 GPP_B7/SRCCLKREQ2# XTAL24_IN E37
1 XTAL24_OUT E35 PCH_KBLU24_OUT
1
0_0402_5% R1089 Clear CMOS close to RAM door D40 CLKOUT_PCIE_N3
@ XCLK_BIASREF RC96 1 2 2.7K_0402_1%
JCMOS1 CLKREQ_PCIE#3
C40 CLKOUT_PCIE_P3 XCLK_BIASREF E42 +1.0V_CLK5_F24NS
AT10 GPP_B8/SRCCLKREQ3#
0_0603_5% AM18 PCH_RTCX1
CLK_PCIE_N4 RTCX1 AM20 PCH_RTCX2
B40
2
<31> CLK_PCIE_N4 A40 CLKOUT_PCIE_N4 RT CX2

PCIe SSD <31> CLK_PCIE_P4
CLK_PCIE_P4
AU8 CLKOUT_PCIE_P4
CLKREQ_PCIE#4 AN18 PCH_SRTCRST#
+3VS <31> CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4# SRTCRST# AM16 PCH_RTCRST#
E40 RT CRST#
E38 CLKOUT_PCIE_N5
1 2 CLKREQ_PCIE#4 CLKREQ_PCIE#5 AU7 CLKOUT_PCIE_P5 XCLK_BIASREF RC97 1 @ 2 60.4_0402_1%
RC165 10K_0402_5% From 545659_SKL_PCH_U_Y_EDS_R0_7 GPP_B10/SRCCLKREQ5#
1 2 CLKREQ_PCIE#5
RC105 10K_0402_5% <Cocoa_1027> 10 OF 20
RPC10 check un-use GPIO for termination guidance
<DB> Add RX1~4 for KBL U/R Colay
8 1 CLKREQ_PCIE#1 SKL-U_BGA1356 Change XTAL(YC1) to2016Type
7 2 CLKREQ_PCIE#2 KBLU@
6 3 CLKREQ_PEG#0 PCH_KBLU24_IN RX1 2 1 33_0402_1% PCH_XTAL24U_IN PCH_RTCX2
5 4 CLKREQ_PCIE#3
PCH
10K_0804_8P4R_5%
KBLU@ KBLU@
PLTRST RC99 1 2 0_0402_5% PCH_KBLU24_OUT RX2 2 1 33_0402_1% PCH_XTAL24U_OUT 1
RC92
2
1M_0402_5%
PCH_RTCX1 1 2
RC98 10M_0402_5%
Buffer
+3VALW_DSW +3VS @
1 2 PCH_PW ROK CC145 YC1 KBLU@ YC2
RC925 10K_0402_5% 1 2 24MHZ 18PF XRCGB24M000F2P51R0 32.768KHZ 9PF 10PPM 9H03200055
C 1 2 LAN_W AKE# 1 2 C
5
RC926 10K_0402_5% @ UC8 0.1U_0201_10V6K 33 11
+3V_PRIM 1 2 PCH_RSMRST # PLT_RST#_PCH SJ10000Q800
DS12 1 IN1
RC927 PLT_RST# NC NC
10K_0402_5% O 4 PLT_RST# <29,30,31,33,35>
KBLU@ KBLU@
1 2 SYS_RESET# 2 1 PCH_PW ROK CC12 SJ10000UJ00 CC13
GP
2 IN2 1 1
CC15
6.8P 50V C NPO 0402
6.8P 50V C NPO 0402

CC16
RC928 10K_0402_5% 42 SE07168AC80
8J
27P_0402_50V
8J
27P_0402_50V
CK0402101V05_0402-2 SN74AHC1G08DCKR_SC70-5
SE07168AC80
ESD@ 2 2
3
SCV00001K00
2 1 SYS_RESET # 24MHz Parrrrttt: <SI> CC15/CC16 SI change 3.9p=>6.8p

Maiiiiiin::::::SJ10000X700,,,,,,SCRYSTAL24MHZ18PF
CLRP3 SHORT PADS
+--20PPM 8Y24000033((((((TXC))))))::::::2...0x1...6mm
1@ 2 SUSCLK 2nd::::::SJ10000TK00,,,,,,S CRYSTAL 24MHZ 18PF
+--20PPM 7M24000027((((((TXC))))))::::::3...2x2...5mm
RC100 1K_0402_5%
2 1 PCH_DPW ROK
RC101 100K_0402_5%
TP@T254
TP@T255
TP@T256
TP@T257
T P@T 258
+3VALW_DSW UC1K SKL-U
Rev_0.53
SYSTEMPOWERMANAGEMENT
1 2 PM_BATLOW #
RC103 GPP_B12/SLP_S0# AT11 PM_SLP_S0#
8.2K_0402_5% GPD4/SLP_S3# AP15 PM_SLP_S3# PM_SLP_S3# <12,33,40>
1 2 W AKE# PLT_RST#_PCH AN10 GPP_B13/PLTRST# GPD5/SLP_S4# BA16 PM_SLP_S4# PM_SLP_S4# <12,33,40,49>
RC104 1K_0402_5% SYS_RESET# B5 SYS_RESET# GPD10/SLP_S5# AY16 PM_SLP_S5# PM_SLP_S5# <33>
T 296 TP@
1 @2 AC_PRESENT_R PCH_RSMRST# AY17 RSMRST#
<33> PCH_RSMRST#
10K_0402_5%
RC106 SLP_SUS# AN15 PM_SLP_SUS# PM_SLP_SUS# <33>
RC102 1 @ 2 1K_0402_5% H_CPUPW RGD A68 AW 15
B EC_VCCST_PG B65 PROCPW RGD SLP_LAN# BB17 B
Only For Power Sequence Debug VCCST_PW RGD GPD9/SLP_WLAN# AN16 PM_SLP_A#
+3V_PRIM SYS_PWROK GPD6/SLP_A#
<33> SYS_PWROK B6
<33> PCH_PW ROK PCH_PW ROK BA20 SYS_PWROK GPD3/PW RBTN# BA15 PBTN_OUT# PBTN_OUT# <33>
PCH_DPWROK_R BB20 PCH_PW ROK AY15 AC_PRESENT_R 2 1
DSW _PW ROK GPD1/ACPRESENT AU13 PM_BATLOW# RC108 0_0402_5% ACIN <33>
GPD0/BAT LOW #
RC1151@ 2 10K_0402_5% SOC_VRALERT# <33> PCH_SUSWARN# PCH_SUSWARN# AR13
2 Rshort@ 1 SUSACK#_R AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
<33> SUSACK# RC110 0_0402_5% GPP_A15/SUSACK# AU11 EC_PCIE_W AKE#_CPU 2 @1
GPP_A11/PME# AP16 SM_INTRUDER# EC_PCIE_W AKE# <30,33>
WAKE# BB15 RC922 0_0402_5%
+3VALW_DSW <30> WAKE# AM15 WAKE# INTRUDER#
LAN_W AKE#
AW 17 GPD2/LAN_WAKE# AM10 EXT_PW R_GATE#
AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11 SOC_VRALERT# TP@T298
T94 TP@ GPD7/RSVD GPP_B2/VRALERT#
11 OF 20
DS13 ESD@
RC111 2 @ 1 100K_0402_5% PBTN_OUT# SCV00001K00
2 H_CPUPW RGD SKL-U_BGA1356
1
CK0402101V05_0402-2
DS14 @ESD@
SCV00001K00
1 2 SUSACK#
CK0402101V05_0402-2
DC3 SCS00000Z00
RB751V-40 SOD-323
PCH_RSMRST # 1 2 PCH_PW ROK
ESD@
C5229 1 2 SYS_PWROK
2 1 SPOK <48>
0.1U_0402_25V6 DC4 SCS00000Z00
RB751V-40 SOD-323
<33> PCH_DPW ROK 2 Rshort@1 PCH_DPWROK_R

A RC112 0_0402_5% A
From EC(open-drain) +1.0V_VCCST

1
RC113
1K_0402_5% SecurityClassification Compal Secret Data Compal Electronics,Inc.
2
RC1161 2 60.4_0402_1% EC_VCCST_PG

<33,40> EC_VCCST_PG_R
SKL-U(5/12)CLK,GPIO
A ND TR A DE S E CR E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F RO M TH E C U S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D DE Rev
P A RTM E NT E X C E P T AS A UTHORIZE D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S HE E T N O R TH E IN F O RM A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A NY THIRD P A R TY W ITH O U T P R IO R W R ITTE N CO NS E N T OF C O M P A L E LE CTRONICS , INC. CSL50 / CSL52 v0.3

5 4 3 2 1
Eletro-XTechnical10
Eletro-XTechnical1
5 4 3 2 1
UC1F SKL-U +3VS

Rev_0.53
LPSS ISH
AN8 GPP_B15/GSPI0_CS#
AP7 GPP_B16/GSPI0_CLK P2 DGPU_PWR_EN RC382 1 2 10K_0402_5%
GPP_D9 TS_GPIO_CPU <27>
AP8 GPP_B17/GSPI0_MISO GPP_D10 P3
GSPI0_MOSI AR7 GPP_B18/GSPI0_MOSI GPP_D11 P4 +3V_PRIM
AM5 GPP_D12 P1
AN7 GPP_B19/GSPI1_CS# M4
D AP5 GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA N3 D
SOC_GPIOB21 RPC14
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL 1 8
GPP_B22/GSPI1_MOSI N1 W L_OFF# 2 7
T P@T 129 UART_0_CRXD_DT XD AB1 GPP_D7/ISH_I2C1_SDA N2 SOC_GPIOB21 3 6
T P@T 128 UART _0_CT XD_DRXD AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL NMI_DBG#_CPU 4 5
W 4 GPP_C9/UART0_TXD AD11 <5,33> NMI_DBG#_CPU
W L_OFF# AB3 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12 10K_0804_8P4R_5%
<30> W L_OFF# GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
TP@T133 UART_2_CRXD_DT XD AD1 GPP_C20/UART2_RXD
TP@T132 UART _2_CT XD_DRXD AD2 GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA U1
AD3 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U2
AD4 GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U3
GPP_D16/ISH_UART0_CTS#/SML0BALERT# U4
U7 GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD AC1 DGPU_PWR_EN <33>

U6 GPP_C17/I2C0_SCL AC2 DGPU_HOLD_RST#
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS# AC3
U8 AB4
U9 GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C19/I2C1_SCL AY8
AH9 GPP_A18/ISH_GP0 BA8
AH10 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BB7
GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 BA7 +3VS
GPP_A21/ISH_GP3 AY7 ODD_PW R <37>
AH11 ODD_DA# <37>
AH12 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 AW 7
UART _2_CT XD_DRXD GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 AP13 SOC_GPIOA12
GPP_A12/BM_BUSY#/ISH_GP6 T122 TP@
1
AF11 DGPU_HOLD_RST# RC923 1 @ 2 10K_0402_5%

R5194 AF12 GPP_F8/I2C4_SDA
@ 0_0402_5% GPP_F9/I2C4_SCL 6 OF 20
ODD_PW R RC929 1 2 10K_0402_5%
UART_2_CRXD_DT XD
SKL-U_BGA1356
2
ODD_DA# RC930 1 2 10K_0402_5%
C C
CPU THERMAL SENSOR
Functional Strap Definitions Strap Pin Address : 0x48
+3VS UC3
<7,33> EC_SMB_CK2 1 SMBCLK SMBDATA 5 EC_SMB_DA2 <7,33>
SPKR (Internal Pull Down): 2 +3VS
RC117 1 @ 2 100K_0402_5% HDA_SPKR GND
HDA_SPKR <8,32>
TOP Swap Override 3
ALERT # +Vs
4
1
0 = Disable TOP Swap mode.---> AAX05 Use RC118 1 @ 2 4.7K_0402_5% GSPI0_MOSI CC127
G753T 11U_SOT 23-5 0.1U_0201_10V6K
SA00008CH00
1 = Enable TOP Swap Mode. 2
RC201 1 @ 2 150K_0402_1% GSPI1_MOSI
<DB> Change Thermal Sensor IC

GSPI0_MOSI (Internal Pull Down):
No Reboot
0 = Disable No Reboot mode. --> AAX05 Use
1 = Enable No Reboot Mode. (PCH will disable the TCO

Timer system reboot feature). This function is useful
when running ITP/XDP.
B B
GSPI1_MOSI (Internal Pull Down):
Boot BIOS Strap Bit
0 = SPI Mode --> AAX05 Use
1 = LPC Mode
A A
SecurityClassification Compal Secret Data Compal Electronics,Inc.

SKL-U(6/12)GPIO
THIS S HE E T O F E N G IN E E R IN G DRA W ING IS TH E P R O P RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiAzeL Document Number
A ND TR A DE S E CR E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C US TO DY OF TH E C O M P E TE N T DIV IS ION OF R & D DE P Rev
A RTM E NT E X C E P T AS A U TH O RIZ E D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W RITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. CSL50 / CSL52 v0.3

5 4 3 2 1
Eletro-XTechnical1
Eletro-XTechnical12
4 3 2 1
5
UC1H SKL-U
Rev_0.53
SSIC / USB3
PCIE/USB3/SATA
USB3_1_RXN H8 USB3_CRX_DTX_N1 <38>

USB3_1_RXP G8 USB3_CRX_DTX_P1 <38>
H13 C13 USB3_CTX_DRX_N1 <38> USB2.0/USB3.0
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN
USB3_CTX_DRX_P1 <38>
D13
B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP
A17 PCIE1_TXN/USB3_5_TXN J6 USB3_CRX_DTX_N2<38>
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN H6
USB3_CRX_DTX_P2 <38>
USB3_2_RXP/SSIC_1_RXP B13
D G11 PCIE2_RXN/USB3_6_RXN USB3_CTX_DRX_N2 <38> USB2.0/USB3.0 D
USB3_2_TXN/SSIC_1_TXN A13 USB3_CTX_DRX_P2 <38>
F11 USB3_2_TXP/SSIC_1_TXP
D16 PCIE2_RXP/USB3_6_RXP
C16 PCIE2_TXN/USB3_6_TXN J10
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10
H16 USB3_3_RXP/SSIC_2_RXP B15
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15
D17 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
F15 PCIE4_RXN USB3_4_TXN D15
B19 PCIE4_RXP USB3_4_TXP
A19 PCIE4_TXN AB9
PCIE4_TXP USB2N_1 AB10 USB20_N1 <38>
PCIE_CRX_DTX_N5 F16 PCIE5_RXN USB2P_1 USB20_P1 <38> USB2.0/USB3.0
<29> PCIE_CRX_DTX_N5
LAN <29> PCIE_CRX_DTX_P5 PCIE_CRX_DTX_P5 E16 PCIE5_RXP
*PCIe for Device Down CC177 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_N5 C19 PCIE5_TXN USB2N_2 AD6 USB20_N2 <38>
Place AC coupling capacitors very close to either <29> PCIE_CTX_C_DRX_N5
CC176 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_P5 D19 PCIE5_TXP USB2P_2 AD7 USB20_P2 <38> USB2.0/USB3.0
the transmitter or the receiver.
*TX/RX with Cap
<29> PCIE_CTX_C_DRX_P5
AH3
USB2N_3 AJ3 USB20_N3 <39>
<30> PCIE_CRX_DTX_N6 PCIE_CRX_DTX_N6 G18
<30> PCIE_CRX_DTX_P6 PCIE_CRX_DTX_P6F18 PCIE6_RXN
USB2P_3 USB20_P3 <39> USB2.0
*PCI Express*Connector
WLAN <30> PCIE_CTX_C_DRX_N6 CC175 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_N6 D20 PCIE6_RXP AD9
Place AC caps closer to the PCIe* connector.
USB2N_4 AD10 USB20_N4 <39>
*Only TX with Cap, RX Cap on Add inCard <30> PCIE_CTX_C_DRX_P6 CC174 2 1 0.1U_0402_16V7K PCIE_CTX_DRX_P6C20 PCIE6_TXN USB2P_4 USB20_P4 <39> CardReader
PCIE6_TXP
<37> SATA_CRX_DTX_N0 F20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ1 USB20_N5 <27>
<37> SATA_CRX_DTX_P0 E20 PCIE7_RXP/SATA0_RXP USB2P_5 AJ2 USB20_P5 <27> Camera
HDD <37> SATA_CTX_DRX_N0 B21 PCIE7_TXN/SATA0_TXN USB2
<37> SATA_CTX_DRX_P0 A21 PCIE7_TXP/SATA0_TXP USB2N_6 AF6 USB20_N6 <30>
C
USB2P_6 AF7 USB20_P6 <30> BT C
<37> SATA_CRX_DTX_N1 G21 PCIE8_RXN/SATA1A_RXN
<37> SATA_CRX_DTX_P1 F21 PCIE8_RXP/SATA1A_RXP USB2N_7 AH1 USB20_N7 <27>
ODD <37> SATA_CTX_DRX_N1 D21 PCIE8_TXN/SATA1A_TXN USB2P_7 AH2 USB20_P7 <27> TS
<37> SATA_CTX_DRX_P1 C21 PCIE8_TXP/SATA1A_TXP
AF8
E22 USB2N_8 AF9
E23 PCIE9_RXN USB2P_8
B23 PCIE9_RXP AG1
teknisi-indonesia
A23 PCIE9_TXN USB2N_9 AG2
PCIE9_TXP USB2P_9
F25 PCIE10_RXN USB2N_10 AH7
E25 PCIE10_RXP USB2P_10 AH8
D23 PCIE10_TXN
C23 PCIE10_TXP AB6 USB2_COMP RC1191 2 113_0402_1%
USB2_COMP AG3 USB2_ID
RC1201 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
PCIE_RCOMPP A9 USB_OC0#
D56 GPP_E9/USB2_OC0# C9 USB_OC1#
XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 USB_OC2#
<5> XDP_PREQ# BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9 USB_OC3#
SOC_GPIOA7 USB2_ID RC20 1 Rshort@20_0402_5%
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
<31> PCIE_CRX_DTX_N11 DEVSLP0
PCIE_CRX_DTX_N11 E28 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J1 T241TP@
USB2_VBUSSENSE1 Rshort@
2
M.2 SSD <31> PCIE_CRX_DTX_P11
CC178 0.22U 6.3V K X5R 0402 2 1
PCIE_CRX_DTX_P11 E27 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J2 DEVSLP1
RC21 0_0402_5%
<31> PCIE_CTX_C_DRX_N11 PCIE_CTX_DRX_N11 D24 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 J3 DEVSLP2 <31>
*For PCIe* Gen 3/ SATA multiplexed configuration,
<31> PCIE_CTX_C_DRX_P11 CC179 0.22U 6.3V K X5R 0402 2 1 PCIE_CTX_DRX_P11 C24 PCIE11_TXP/SATA1B_TXP
motherboard Tx requires a 220 nF
AC capacitor and NO AC capacitor is required for <31> PCIE_CRX_DTX_N12 PCIE_CRX_DTX_N12E30 H2 SATA_GP0
motherboard Rx channel. This option DOES NOT
s*uPplpaocretADCCccaopusplceldosOeDrDsto/tDheviMc.e2sc.onnector. <31> PCIE_CRX_DTX_P12 PCIE_CRX_DTX_P12 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3 ODD_PLUG# ODD_PLUG#<37>
B *Only TX with Cap, RX Cap on Add in Card CC180 0.22U 6.3V K X5R 0402 2 1 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 B
<31> PCIE_CTX_C_DRX_N12 PCIE_CTX_DRX_N12 A25 PCIE12_TXN/SATA2_TXN G4 SSD1_IF SSD1_IF<31>
CC181 0.22U 6.3V K X5R 0402 2 1 GPP_E2/SATAXPCIE2/SATAGP2
<31> PCIE_CTX_C_DRX_P12 PCIE_CTX_DRX_P12 B25
PCIE12_TXP/SATA2_TXP
GPP_E8/SATALED# H1 SATA_LED# <39>
8OF20 +3VS
SKL-U_BGA1356 2
DEVSLP1 1
SOC_GPIOA7 RC3621 2 10K_0402_5%
GPIO DEVICE CONTROL RC361 10K_0402_5%
When PCIE8/SATA1A is used USB_OC0# USB2 Port 1 and Port2 RPC13

SATA_LED# 1 8
as SATA Port 1 (ODD), then SATA_GP0 2 7
PCIE11/SATA1B (M.2 SSD) USB_OC1# USB2 Port 3 SSD1_IF 3 6
cannot be used as SATA ODD_PLUG# 4 5
USB_OC2# N/A
Port 1. 10K_0804_8P4R_5%
USB_OC3# N/A
+3V_PRIM
DEVSLP0 N/A
RPC20
DEVSLP1 N/A USB_OC1# 1 8
USB_OC3# 2 7
USB_OC0# 3 6
DEVSLP2 NGFF SSD KEY-M USB_OC2# 4 5
SATA_GP0 N/A 10K_0804_8P4R_5%
A SATA_GP1 ODD_PLUG# A
SATA_GP2 PCIE/SATA

SKL-U(7/12)PCIE,USB,SATA
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiiIzzAeLDocumentNumber Rev
v0.3
Eletro-XTechnical12
5 4 3 2 1
Eletro-XTechnical13
4 3 2 1
5
+1.0V_PRIM TO +1.0V_VCCSTU
+1.2V_VDDQ +1.0V_PRIM
UC1N SKL-U
Rev_0.53
+5VALW +1.0V_PRIM +1.0V_PRIM +1.0V_VCCSTU CPU POWER 3 OF4
AU23 VDDQ_AU23 VCCIO AK28

I (Max) : 4.5 A AU28 VDDQ_AU28
R51881 @ 2 0_0603_5% VCCIO AK30 I (Max) : 3.4 A
AU35 VDDQ_AU35 VCCIO AL30
1 1
I (Max) : 0.04 A(+1.0V_VCCSTU) AU42 VDDQ_AU42 VCCIO AL42
1U_0402_6.3V6K
1U_0402_6.3V6K
1 BB23 VDDQ_BB23 VCCIO AM28
CC98
CC97
1@ RON(Max) : 25 mohm CC96 BB32 VDDQ_BB32
D
VCCIO AM30 D
0.1U_0402_25V6
@ 0.1U_0201_10V6K
2 V drop : 0.001 V BB41 VDDQ_BB41 VCCIO AM42
CC151
2
2 BB47 VDDQ_BB47
2 BB51 VDDQ_BB51 VCCSA AK23 +VCC_SA
UC5 VCCSA AK25
1 14 AM40 VCCSA G23
RC142 1 2 0_0402_5% 2 VIN1 VOUT1 13 +1.2V_VDDQ VDDQC VCCSA G25
<33,40,49> SYSON VIN1 VOUT1 A18 VCCSA G27
RC144 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 3 12 1.0V_VCCSTU_CT1 1 2
+1.0V_VCCST VCCST VCCSA G28
<9,33,40,49>PM_SLP_S4# ON1 CT1 CC95 VCCSA J22 I (Max) : 5 A
+1.0V_PRIM A22 VCCSTG_A22 VCCSA J23
RC168 1 2 0_0402_5% 4 VBIAS 11 10P_0402_50V8J
<33,40,49> SUSP# GND VCCSA J27
+1.2V_VCCSFR_OC AL23 VCCPLL_OC VCCSA K23
RC194 1 @ 2 0_0402_5% EN_1.8VS 5 ON2 1 2
CT2 10 VCCSA K25
1.8VS_CT2
<9,33,40> PM_SLP_S3# @CC94

6 9 1000P_0402_50V7K
+1.0V_VCCSFR K20 VCCPLL_K20 VCCSA K27
K21 VCCPLL_K21 VCCSA K28
+1.8V_PRIM 7 VIN2 VOUT2 8
VIN2 VOUT2 +1.8VS VCCSA K30
GPAD 15 VCCIO_SENSE AM23VCCIO_SENSE T124TP@

VSSIO_SENSE AM22VSSIO_SENSE T125TP@
EM5209VF_DFN14_2X3 <Cocoa_1113>
1 SA00007PM00 1 Per H21 VSSSA_SENSE VSSSA_SENSE <52>
1U_0402_6.3V6K
CC100 VSSSA_SENSE H20 VCCSA_SENSE
CC99 I (Max) : 0.536 A(+1.8VS) 0.1U_0201_10V6K 543977_SKL_PDDG_Rev0_91, 14 OF20VCCSA_SENSE VCCSA_SENSE <52>
@
RON(Max) : 25 mohm change CC95 value from
2
V drop : 0.013 V 2 1000pf to 10pf for meet
SKL-U_BGA1356
<= 65us timing for
+1.0V_VCCSTU power rail.
C C
+1.0V_VCCSTU +1.0V_VCCST
RC1401 2 0_0402_5%
PSC Side
+1.0V_PRIM TO +1.0VS_VCCSTG / +1.0VS_VCCIO
1
1U_0402_6.3V6K
I (Max) : 3 A(+1.0VS_VCCIO)
CC48
+5VALW +1.0V_PRIM +1.0V_PRIM
RON(Max) : 6.2 mohm near pin A22 2
V drop : 0.019 V @
Imax :2.77A CC89 1 2 0.1U_0201_10V6K
1 1
0.1U_0201_10V6K
1U_0402_6.3V6K
@
RC208 Follow 544669_SKL_U DDR3L_RVP7_Schematic_Rev1.0
CC88
CC117
UC6 @
1 VIN1 +1.0V_PRIM
2@ 2
2 VIN2
RC189 +1.0V_VCCSFR +1.0V_PRIM
7 +1.0VS_VCCSTG_IO 1 @2 CC90 1 20.1U_0201_10V6K
VIN thermal VOUT 6 SD002000080 PSC Side BSC Side
3 VBIAS 0_0805_5% RC1431 2 0_0402_5%
Imax : 3A
SUSP# RC186 1 2 0_0402_5% 4 GND 5 1
1U_0402_6.3V6K
ON
1
1U_0402_6.3V6K
B RC1871 2 0_0402_5% B
CC56
<33> EC_S0IX_EN @ TPS22961DNYR_WSON8
CC55
Part Number =SA00007XR00 2
2
For Verify S0IX <Cocoa_1027>
connect to EC, check /w EC
RC208 Follow 544669_SKL_U DDR3L_RVP7_Schematic_Rev0_53
+1.0V_PRIM +1.2V_VDDQ +1.2V_VDDQ

BSC Side PSC Side PSC Side BSC Side
BSC Side
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CC47 Follow 543016_SKL_U_Y_PDG_0_9
CC38
CC46
CC27
CC28
CC29
CC30
CC31
CC32
CC33
CC34
CC35
CC36
CC47
CC37
CC39
CC40
CC41
CC42
CC43
CC44
CC45
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+1.35V_VDDQ_CPU : 10UF/6.3V/0603 *6
A
1UF/6.3V/0402 * 4 A

SKL-U(8/12)Power
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeLDocument Number Rev
v0.3
Eletro-XTechnical13
5 4 3 2 1
Eletro-XTechnical14
5 4 3 2 1
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM +1.0V_APLL +3V_PRIM +3V_HDA
1
6 K
1U_0201_6.3V
UC1O SKL-U
0.69A Rev_0.53
1209_follow G group GPIO
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
6 K
1U_0402_6.3V
CC91
CPUPOWER4OF4
RC148 1 Rshort@20_0603_5% RC150 1 Rshort@20_0402_5% 1 1 1 powe rail to +3V_PRIM
@ @ 2 AB19
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
CC147
CC148
CC61
1 1 AB20 VCCPRIM_1P0 AK15 +3V_PGPPA
@ @ 1 near pin K15,L15 P18 VCCPRIM_1P0 VCCPGPPA
AG15 +3V_PGPPB
6 K
1U_0402_6.3V
CC142
CC134
1 CC63 2 2 2 VCCPRIM_1P0 VCCPGPPB Y16 +3V_PGPPC
AF18 VCCPGPPC Y15
1U_0201_6.3V6K +1.0V_PRIM +3V_1.8V_PGPPD
2.574A
CC72
2 2 AF19 VCCPRIM_CORE VCCPGPPD
T16 +3V_PGPPE
2 2 +1.0VO_DSW V20 VCCPRIM_CORE VCCPGPPE AF16 +1.8V_PRIM
V21 VCCPRIM_CORE VCCPGPPF AD15 +3V_PRIM For SD CARD
VCCPRIM_CORE VCCPGPPG
D D
+1.0V_PRIM AL1 V19 +3V_PRIM
DCPDSW_1P0 VCCPRIM_3P3_V19
Follow 543016_SKL_U_Y_PDG_1_0 1 K17 T1
6 K
1U_0201_6.3V
+1.0V_MPHYAON VCCMPHYAON_1P0 VCCPRIM_1P0_T 1 +1.0V_DTS
L1
CC85
+1.0V_CLK5_F24NS +3V_PGPPA VCCMPHYAON_1P0 AA1 +1.8V_PRIM
6 K
1U_0402_6.3V
+3V_PRIM N15 VCCAT S_1P8
+1.0V_PRIM
1
2 1.87A N16 VCCMPHYGT _1P0_N15 AK17
CC68
VCCMPHYGT _1P0_N16 VCCRT CPRIM_3P3 +3V_PRIM_RT C
RC152 1 Rshort@20_0603_5% N17
VCCMPHYGT _1P0_N17
near pin N18 P15
VCCMPHYGT _1P0_P15 VCCRT C_AK19
AK19
P16 BB14 +RTCVCC
2 VCCMPHYGT _1P0_P16 VCCRT C_BB14
1 1
6 M
10U_0402_6.3V
6 M
10U_0402_6.3V
@ @ K15 BB10 +DCPRTC 1 2

+1.0V_PRIM VCCAMPHYPLL_1P0 DCPRTC
RC197 1Rshort@2 0_0402_5% L15 CC71 0.1U_0201_10V6K
CC135
CC130
VCCAMPHYPLL_1P0 A14
2 2 +1.0V_CLK6_24TBT
+3V_SPI V15 VCCCLK1
+1.0V_APLL VCCAPLL_1P0 K19
AB17 VCCCLK2
1 6 K
1U_0402_6.3V
+1.0V_PRIM VCCPRIM_1P0_AB17
@ Y18 L21 +1.0V_APLL
RC154 1 Rshort@20_0402_5% VCCPRIM_1P0_Y18 VCCCLK3
CC67
+1.0V_PRIM +3VALW_DSW AD17 VCCCLK4 N20 +1.0V_CLK4_F100OC
2 VCCDSW _3P3_AD17
AD18
VCCDSW _3P3_AD18
AJ17 VCCCLK5 L19 +1.0V_CLK5_F24NS
+1.0V_CLK4_F100OC +3V_PGPPB VCCDSW_3P3_AJ17
AJ19 A10
+3V_HDA VCCHDA VCCCLK6 +1.0V_CLK6_24TBT
1
6 K
1U_0201_6.3V
RC190 1 Rshort@20_0603_5% near pin AF20, +3V_SPI AJ16
VCCSPI GPP_B0/CORE_VID0
AN11 PRIMCORE_VID0 T130 TP@
RC161 1 Rshort@20_0402_5% AF21,T19, T20 AN13 PRIMCORE_VID1 T131 TP@
CC141
AF20 GPP_B1/CORE_VID1
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
1 1 1
2 +1.0V_PRIM 0.64A AF21 VCCSRAM_ 1P0
6 K
1U_0402_6.3V
@ @ T 19 VCCSRAM_ 1P0
CC136
CC137
T 20 VCCSRAM_ 1P0
CC102
VCCSRAM_1P0
2 2 2 AJ21
+3V_PRIM VCCPRIM_3P3_AJ21
+1.0V_PRIM +1.0V_PRIM AK20 VCCPRIM_1P0_AK20
C C
N18 VCCAPLLEBB
+3V_PGPPC +1.0V_PRIM 15 OF 20
+1.0V_PRIM
SKL-U_BGA1356
Imax : 2.57A RC163 1 Rshort@20_0402_5% near pin N15, N16,
N17,P15,P16 1 1 1
6 K
1U_0402_6.3V
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
1 @
6 K
1U_0402_6.3V
1
RTC Battery
6 K
1U_0402_6.3V
CC80
CC81
CC82
near pin AF18,
CC73
2 2 2
AF19,V20,V21
CC76
2 MAX. 8000mil
2
Per 543016_SKL_U_Y_PDG_0_9
VCCRTC does not exceed 3.2 V From PDG From Battery
+3V_1.8V_PGPPD +1.8V_PRIM CC7 Close UC1.AK19.
Power Rail Voltage +RTCBATT_R +3V_LID
+1.0V_MPHYAON +RTCVCC
1K_0402_5%
RC1721 Rshort@20_0402_5% RC2061 @ 2 0_0402_5% +CHGRTC 3.383V(MAX)
RC19
DC1
RC175 1 Rshort@20_0402_5%
15m ils
2 2 1
15m ils
1 BAT54C(VF) 240 mV 15m ils
6 K
1U_0402_6.3V
@ 1
1 3 +3VL
CC103
1 CC7
+3VL_RTC 3.143V
6 K
1U_0402_6.3V
2 1U_0201_6.3V6K BAV70W 3P C/C_SOT-323

SC600000B00
CC87
2
2 Result : Pass
+3V_PGPPE
B B
NEEDTOCHECK KabylakeNoSupportDeepS3.
+1.0V_CLK6_24TBT RC167 1 Rshort@20_0402_5%
BOM
6 K
1U_0402_6.3V
RC169 1 Rshort@20_0603_5%
+3VALW TO +3V_PRIM
CC74
2
1 1 1 1 I (Max) : 0.46 A(+3V_PRIM)
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 M
22U_0603_6.3V
6 M
10U_0402_6.3V
@ @ @ @
I (Max) : 0.1A RDS(Typ) : 65 mohm
CC86
CC75
CC138
CC139
2 2 2 2 V drop : 0.03V
+3V_PRIM_RT C
RC171 1 Rshort@20_0402_5%
+1.0V_DTS
0.1U_0201_10V
1 1
6 K
1U_0402_6.3V
6 K CC78
CC77
RC162 1 Rshort@20_0402_5%
2 2
+1.2V_VCCSFR_OC +3V_PRIM
+1.2V_VDDQ +3VALW
0.1U_0201_10V
0.1U_0201_10V
Follow 543016_SKL_U_Y_PDG_0_9 1 1
@
1 1
6 K
1U_0402_6.3V
CC150
6 K CC49
6 K CC51
6 K CC50
1U_0402_6.3V
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
2 2 2 2
+3VS +3VS_PGPPA 1 2 2 1
A A
RC141 0_0402_5% RC393 0_0805_5%
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
6 M
22U_0603_6.3V
6 M
22U_0402_6.3V
6 M
22U_0402_6.3V
1 1 1 1 1 1
@ @ @ @ @ @
CC111
CC112
CC113
CC114
CC116
CC115
RC178 1 Rshort@20_0402_5%
2 2 2 2 2 2
+3VALW +3VALW_DSW

- RC173 1 Rshort@20_0603_5%
SKL-U(9/12)Power
Follow 543016_SKL_U_Y_PDG_0_9 THIS S HE E T O F E N G IN E E R IN G DRA W ING IS TH E P R O P RIE TA R Y P R O P E R TY O F C O M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiiAzeL Document Number
A ND TR A DE S E CR E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C US TO DY OF TH E C O M P E TE N T DIV IS ION OF R & D DE P Rev
A RTM E NT E X C E P T AS A U TH O RIZ E D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T N O R TH E IN F O R M A TIO N IT CONTA INS Custom
M A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W RITTE N CO N S E N T OF CO M P A L E LE CTRONICS , INC. CSL50 / CSL52 v0.3

5 4 3 2 1
Eletro-XTechnical14
5 4 3 2 1
Eletro-XTechnical15
+VCC_GT_VR +VCC_GT
J U42A
+VCC_CORE +VCC_CORE 1122 +VCC_GT
+VCC_CORE
J UMP@ UC1M SKL-U
UC1L SKL-U JUMP_43X39_0805 Rev_0.53
Rev_0.53 CPUPOW ER2 OF 4
CPUPOW ER1 OF 4
JU22 N70
VCCGT
A30 VCC_G32 G32 +VCC_GT
1 2 A48 N71
A34 VCC_A30 G33 12 J UMP@ A 53 VCCGT VCCGT R63
A39 VCC_A34 VCC_G33 G35 A 58 VCCGT VCCGT R64
A 44 VCC_A39 VCC_G35 G37 JUMP_43X39_0805 A 62 VCCGT VCCGT R65
AK 33 VCC_A 44 VCC_G37 G38 VCCGT
A 66 VCCGT R66
AK35 VCC_AK33 VCC_G38 G40 VCCGT
AA 63 VCCGT R67
AK37 VCC_AK35
AK38 VCC_AK37
VCC_G40
VCC_G42 J30
G42
JU42A/JU42B for KBLR AA 64 VCCGT
AA 66 VCCGT
VCCGT
VCCGT
R68
R69
D
AK 40VCC_AK38
VCC_J30 J33
VCC_J33 J37 JU221 for KBLU AA 67 VCCGT VCCGT R70
D
AL33 VCC_AK40 AA 69 VCCGT VCCGT R71

AL37 VCC_AL33 VCC_J37 J 40 AA 70 VCCGT VCCGT T62
AL40 VCC_AL37 VCC_J40 K 33 AA 71 VCCGT VCCGT U65
AM32 VCC_AL40 VCC_K 33 K35 AC64 VCCGT VCCGT U68
AM33 VCC_AM32 VCC_K 35 K37 AC65 VCCGT VCCGT U71
AM35 VCC_AM33 VCC_K 37 K38 AC66 VCCGT VCCGT W 63
G30 VCC_AM38 VCC_K 42 K43 Trace Length < 25 mils AC69 VCCGT VCCGT W 66
VCC_G30 VCC_K43 AC70 VCCGT VCCGT W 67
K32 E32 AC71 VCCGT VCCGT W 68
RSVD_K32 VCC_SENSE E33 VCCCORE_SENSE <52> J 43 VCCGT VCCGT W 69
VSS_SENSE VSSCORE_SENSE <52> J 45 VCCGT VCCGT W 70
AK32
RSVD_AK32 B63 SOC_SVID_ALERT# J 46 VCCGT VCCGT W 71 +VCC_GTX_VR
AB62 VIDALERT# A63 J 48 VCCGT VCCGT Y62
P 62 VCCOPC_AB62 VIDSCK VR_SVID_CLK < 52> J 50 VCCGT VCCGT
D64 VR_SVID_DATA
V 62 VCCOPC_P 62 VIDSOUT J 52 VCCGT JU42B
For CPU2+3e SKU VCCOPC_V 62 G20 +1.0V_PRIM J 53 VCCGT AK42 1122
VCCSTG_G20 J 55 VCCGT VCCGTX_AK 42 AK43 +VCC_CORE
H63 J UMP@
VCC_OPC_1P8_H63 J 56 VCCGT VCCGTX_AK 43 AK45
G61 J 58 VCCGT VCCGTX_AK 45 AK46 JUMP_43X39_0805
VCC_OPC_1P8_G61 J 60 VCCGT VCCGTX_AK 46 AK48
AC63 K 48 VCCGT VCCGTX_AK 48 AK50
AE 63 VCCOPC_SENSE K 50 VCCGT VCCGTX_AK 50 AK52
VSSOPC_SENSE 1 @2 K 52 VCCGT VCCGTX_AK 52 AK53
AE62 RC920 0_0402_5% K 53 VCCGT VCCGTX_AK 53 AK55
AG62 VCCEOPIO K 55 VCCGT VCCGTX_AK 55 AK56
VCCEOPIO K 56 VCCGT VCCGTX_AK 56 AK58
AL63 K 58 VCCGT VCCGTX_AK 58 AK60 For CPU2+3e SKU
AJ 62 VCCEOPIO_SENSE K 60 VCCGT VCCGTX_AK 60 AK 70
VSSEOPIO_SENSE
12 OF 20 L62 VCCGT VCCGTX_AK 70 AL43
L63 VCCGT VCCGTX_AL43 AL46
SOC PINS K52 AND AK52 L64 VCCGT VCCGTX_AL46 AL50
SKL-U_BGA 1356 L65 VCCGT VCCGTX_AL50 AL53
SHOULD BE LEFT UNCONNECTED
L66 VCCGT VCCGTX_AL53 AL56
FOR KBL R U42 DESIGNS VCCGTX_AL56 AL60
L67 VCCGT
L68 VCCGT VCCGTX_AL60 AM48
C L69 VCCGT VCCGTX_AM 48 AM50 C
L70 VCCGT VCCGTX_AM 50 AM52
L71 VCCGT VCCGTX_AM 52 AM53
M62 VCCGT VCCGTX_AM 53 AM56
N63 VCCGT VCCGTX_AM 56 AM58
N64 VCCGT VCCGTX_AM 58 AU58
N66 VCCGT VCCGTX_AU 58 AU63
N67 VCCGT VCCGTX_AU 63 BB 57
SVID ALERT N69 VCCGT
VCCGT
VCCGTX_BB 57 BB66
VCCGTX_BB 66
+ 1.0V_VCCST Place the PU VCCGT_SENSE J 70 AK 62 VCCGTX_SENSE T155 TP@
< 52> VCCGT_SENSE VSSGT_SENSE J 69 VCCGT_SENSE VCCGTX_SENSE AL61 VSSGTX_SENSE
resistors close to CPU < 52> VSSGT_SENSE VSSGT_SENSE
VSSGTX_SENSE T219 TP@
13 OF 20
Trace Length < 25 mils
1
SKL-U_BGA 1356
RC179
56_0402_5%
2
SOC_SVID_ALERT# 1 2 (To VR)

VR_ALERT# <52>
RC180 220_0402_5%
+1.0V_VCCST
SVID DATA Place the PU
resistors close to CPU
1
RC181
100_0402_1%
2
B B
VR_SVID_DATA <52> (To VR)
A A
Security Classification Compal Secret Data Compal Electronics,Inc.

Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title
TAIL SKL-U(10/12)Power,SVID
Eletro-XTechnica
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDEN AND Si zee
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D Document Number Rev
CSL50 / CSL52
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
Eletro-XTechnical15
Eletro-XTechnical16
4 3 2 1
5
D D
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF3 GND 2 OF3
Rev_0.53
GND 3 OF3
A5 VSS VSS AL65 AT63 VSS VSS BA49 F8 VSS VSS L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS
VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS
VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS
VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS
VSS N6
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS
VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS J25 VSS VSS T17
VSS C1
AE65 VSS VSS AN33 AW26 VSS VSS C25 J28 VSS VSS T18
AE66 VSS VSS AN35 AW28 VSS J32 VSS
VSS C5 VSS T2
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS
AE69 VSS AW34 VSS J42 VSS VSS T4
C VSS AN40 VSS D14 VSS U10 C
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG19 VSS VSS AP38 AW57 VSS VSS D48 K68 VSS
VSS W 6
AG20 VSS VSS AP42 AW6 VSS VSS D53 K70 VSS
VSS W 9
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS L11 VSS VSS Y19
VSS D6
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18OF20
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356
AK11 VSS VSS AR42 B34 VSS VSS E53
AK18 VSS VSS AR45 B44 VSS E6
VSS E65
AK21 VSS VSS AR46 B48 VSS VSS
B B
AK27 VSS VSS AR5 B58 VSS
VSS F1
AK63 VSS VSS AR50 B62 VSS VSS F13
AK68 VSS VSS AR52 B66 VSS
VSS F2
AK69 VSS VSS AR53 B71 VSS VSS F22
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL48 VSS VSS AT35 BA36 VSS
VSS F4
AL52 VSS VSS AT4 F68 VSS VSS F40
AL58 VSS VSS AT56 VSS BA41
AL64 VSS VSS AT58
16OF20 17OF20
SKL-U_BGA1356 SKL-U_BGA1356
A A

SKL-U(11/12)GND
v0.3
Eletro-XTechnical16
5 4 3 2 1
Eletro-XTechnical17
4 3 2 1
5
D D
UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1
E68 CFG[0] RSVD_TP_BB68 BB68

B67 CFG[1] RSVD_TP_BB69 BB69
D65 CFG[2]
<5>CFG3 D67 CFG[3] RSVD_TP_AK13 AK13 T158TP@
CFG4 E70 CFG[4]
RSVD_TP_AK12 AK12 T159TP@
C68 CFG[5]
D68 CFG[6] RSVD_BB2 BB2
C67 CFG[7] RSVD_BA3 BA3
F71 CFG[8]
G69 CFG[9]
F70 CFG[10] AU5 T162TP@
TP5 AT5
G68 CFG[11] TP6 T163TP@
H70 CFG[12]
G71 CFG[13]
H69 CFG[14]
<DB> Add ball E3/C7 for KBL U/R Colay
RSVD_D5 D5
G70 CFG[15] RSVD_D4 D4 SKL-U
UC1T
RSVD_B2 B2 Remove T166 / T167 for 24MHz GND shielding
E63 CFG[16] RSVD_C2 C2 Rev_0.53
F63 CFG[17] SPARE
B3
RSVD_B3 A3 AW 69 F6
E66 CFG[18] RSVD_A3 T252TP@ RSVD_AW69 RSVD_F6
F66 AW 68 E3 PCH_KBLR24_IN
C
CFG[19] AW 1 AU56 RSVD_AW68 RSVD_E3 C11 C
CFG_RCOMPE60 RSVD_AW1 AW 48 RSVD_AU56 RSVD_C11 B11
CFG_RCOMP E1 PCH_KBLR24_OUT C7 RSVD_AW48 RSVD_B11 A11
XDP_ITP_PMODE E8 ITP_PMODE RSVD_E1 E2 U12 RSVD_C7 RSVD_A11 D12
<5> XDP_ITP_PMODE RSVD_E2 RSVD_U12 RSVD_D12 C12
U11
AY2 BA4 RSVD_U11 RSVD_C12 F52
H11
AY1 RSVD_AY2 RSVD_BA4 BB4 RSVD_H11 RSVD_F52
RSVD_AY1 RSVD_BB4 20OF20
D1 RSVD_D1 RSVD_A4 A4 SKL-U_BGA1356
D3 RSVD_D3 RSVD_C4 C4
K46 RSVD_K46 TP4 BB5
K45 RSVD_K45
A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69 PCH_KBLR24_IN RX3 2 KBLR@ 1 33_0402_1%PCH_XTAL24R_IN
RSVD_AL27 AY3 RC1821 2 0_0402_5%
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
RSVD_C70
F60 RSVD_F60
C54 PCH_KBLR24_OUTRX4 2 KBLR@ 1 33_0402_1%PCH_XTAL24R_OUT1 KBLR@ 2
RSVD_C54 D54 RC915 1M_0402_5%
A52 RSVD_A52 RSVD_D54
KBLR@
BA70 RSVD_TP_BA70 TP1 AY4 YC3 SJ10000UJ00
BA68 RSVD_TP_BA68 TP2 BB3 24MHZ18PFXRCGB24M000F2P51R0
J71 RSVD_J71 VSS_AY71 AY71 PM_ZVM# 1 RC183 2 0_0402_5%
J68 RSVD_J68 ZVM# AR56 T225TP@ 33 11
B
For 2+3e Solution NC NC
B
F65 AW 71 KBLR@ KBLR@
PM_ZVM#
27P_0402_50V8J
27P_0402_50V8J
G65 VSS_F65 RSVD_TP_AW71 AW 70
CC168 CC169
SI1/15 VSS_G65 RSVD_TP_AW70 PM_MSM# 42
F61 RSVD_F61 MSM# AP56PM_MSM# T230TP@ +1.0V_VCCST
E61 RSVD_E61 PROC_SELECT# C64 SKL_CNL#
19OF20 1@ 2
RC184 100K_0402_5%
SKL-U_BGA1356
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0 24MHzParrrttt::::::
Maiiiiiin::::::SJ10000X700,,,,,,SCRYSTAL 24MHZ 18PF+-20PPM
8Y24000033(((TXC)))
2nd::::::SJ10000TK00,,,,,,S CRYSTAL24MHZ18PF+-20PPM
7M24000027(((TXC)))
CFG_RCOMP1 2
RC185 49.9_0402_1%
CFG4
RC193
1 2
1K_0402_1%
A A
Display Port Presence Strap
1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port SecurityClassification Compal Secret Data CompalElectronics,Inc.
E le tro-X Tec h nica
0 : E na bled ; An e x te rn al Display Port device is
IssuedDate 2017/04/10 DecipheredDate 2019/12/15 Title
SKL-U(12/12)RSVD
connected to the Embedded Display Port THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeLDocument Number
Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. CSL50 / CSL52 v0.3
Eletro-XTechnical17
5 4 3 2 1
Eletro-XTechnical18
4 3 2 1
CHANNEL-A REVERSE TYPE

5
JDIMM1A
DDR_M0_CLK0 STD DDR_M0_D0
Interleaved Memory
137
<6> DDR_M0_CLK0 CK0(T) DQ0 8 DDR_M0_D4
DDR_M0_CLK#0 139
<6> DDR_M0_CLK#0
DDR_M0_CLK1 CK0#(C) DQ1 720 DDR_M0_D3
<6> DDR_M0_CLK1 138 CK1(T) DQ2
<6> DDR_M0_CLK#1 DDR_M0_CLK#1 140 DQ3 21 DDR_M0_D7
CK1#(C)
TOP: JDIMM1 CONN Non-ECC DIMM

DDR_M0_D1
DDR_M0_CKE0 DQ4 4 DDR_M0_D5
<6> DDR_M0_CKE0 109 CKE0 DQ5 3
<6> DDR_M0_D[0..15] <6> DDR_M0_CKE1 DDR_M0_CKE1 110 CKE1 DQ6 16 DDR_M0_D2
DQ7 17 DDR_M0_D6
DDR_M0_CS#0 149 S0# DQS0(T) 13DDR_M0_DQS0
<6> DDR_M0_D[16..31] <6> DDR_M0_CS#0 DDR_M0_DQS0 <6>
DDR_M0_CS#1 157 S1# DQS0#(C) 11 DDR_M0_DQS#0
D <6> DDR_M0_CS#1 DDR_M0_DQS#0 <6> D
+3VS +3VS +3VS
<6> DDR_M0_D[32..47] 162 S2#/C0
165 S3#/C1 28 DDR_M0_D8
DQ8 29 DDR_M0_D12
<6> DDR_M0_D[48..63] DQ9 41 DDR_M0_D14
DDR_M0_ODT 0 155
<6> DDR_M0_ODT0
1
1
161 ODT0 DQ10 42 DDR_M0_D10 DQ11 24
RD1 RD4 RD2 <6> DDR_M0_ODT1 DDR_M0_ODT 1
JDIMM1B ODT1 DDR_M0_D9
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5%
STD DQ12 25 DDR_M0_D13
DDR_M0_BG0 115
<6> DDR_M0_BG0 113 BG0 DQ13 38 DDR_M0_D11
111 141 DDR_M0_BG1
+1.2V_VDDQ VDD1 VDD11 +1.2V_VDDQ <6> DDR_M0_BG1 150 BG1 DQ14 37 DDR_M0_D15 DQ15 34
2
2
SA0_CHA_DIM1 SA1_CHA_DIM1 SA2_CHA_DIM1 112 142 DDR_M0_BA0
<6> DDR_M0_BA0
117 VDD2 VDD12 147 DDR_M0_BA1 145 BA0 DDR_M0_DQS1
VDD3 VDD13 <6> DDR_M0_BA1 BA1 DQS1(T) 32 DDR_M0_DQS#1 DDR_M0_DQS1 <6>
118 148
VDD4 VDD14 DQS1#(C) DDR_M0_DQS#1 <6>
1
1
123 153 DDR_M0_MA0 144
VDD5 VDD15 <6> DDR_M0_MA0
RD3 RD5 RD6 124 154
<6> DDR_M0_MA1 DDR_M0_MA1 133 A0 50 DDR_M0_D21
0_0402_5% 0_0402_5% 0_0402_5% 129 VDD6 VDD16 159 DDR_M0_MA2 132 A1 DQ16 49 DDR_M0_D17
130 160
<6> DDR_M0_MA3 DDR_M0_MA3 131 A2 DQ17 62 DDR_M0_D23
135 VDD8 VDD18 163 DDR_M0_MA4 128 A3 DQ18 63 DDR_M0_D18
+3V_PRIM_DA 136 <6> DDR_M0_MA5 DDR_M0_MA5 126 A4 DQ19 46 DDR_M0_D16
VDD10 DDR_M0_MA6 127 A5 DQ20 45 DDR_M0_D20
<6> DDR_M0_MA6
2
2
255 258 <6> DDR_M0_MA7 DDR_M0_MA7 122 A6 DQ21 58 DDR_M0_D19
VDDSPD VT T +0.6V_0.6VS DDR_M0_MA8 125 A7 DQ22 59 DDR_M0_D22
<6> DDR_M0_MA8
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM +0.6V_DDR_VREFCA 164 257
+2.5V <6> DDR_M0_MA9 DDR_M0_MA9 121 A8 DQ23 55 DDR_M0_DQS2
6 K
0.1U_0201_10V
VREFCA VPP1 259 DDR_M0_DQS2 <6>
146 A9 DQS2(T) 53 DDR_M0_DQS#2
2.2U_0402_6.3V6M
2 2 <6> DDR_M0_MA10 DDR_M0_MA10
DDR_M0_DQS#2 <6>
CD1
VPP2 120 A10_AP DQS2#(C)
<6> DDR_M0_MA11 DDR_M0_MA11
1 99 <6> DDR_M0_MA12 DDR_M0_MA12 119 A11 70 DDR_M0_D25
CD2
2 VSS VSS 102 <6> DDR_M0_MA13 DDR_M0_MA13 158 A12 DQ24 71 DDR_M0_D28
SPD ADDRESS FOR CHANNEL A : 5 VSS VSS DQ25 83 DDR_M0_D30

1 1 103 DDR_M0_MA14_WE# 151 A13
6 VSS VSS 106 9/8 Modify <6> DDR_M0_MA14_WE#
DDR_M0_MA15_CAS# 156 A14_W E# DQ26 84 DDR_M0_D31
VSS <6> DDR_M0_MA15_CAS#
9 VSS 107 DDR_M0_MA16_RAS# 152 A15_CAS# DQ27 66 DDR_M0_D24
WRITE ADDRESS: 0XA0 PLACE NEAR TO PIN 10 VSS
14 VSS
VSS
VSS
167 <6> DDR_M0_MA16_RAS# A16_RAS# DQ28 67 DDR_M0_D29
DQ29 79 DDR_M0_D27
READ ADDRESS: 0XA1
168 DDR_M0_ACT# 114
15 VSS VSS 171 <6> DDR_M0_ACT# ACT # DQ30 80 DDR_M0_D26
18 VSS VSS
SA0 = 0; SA1 = 0; SA2 = 0. 172 DDR_M0_PAR 143 DQ31 76 DDR_M0_DQS3
VSS <6> DDR_M0_PAR DDR_M0_DQS3 <6>
19 VSS 175 DDR_M0_ALERT# 116 PARIT Y DQS3(T) 74 DDR_M0_DQS#3
VSS <6>1DDR_M0_ALERT# DQS3#(C) DDR_M0_DQS#3 <6>
VSS 176 RD7 2 DIMM1_CHA_EVENT# 134ALERT #
DDR4 POR OPERATING SPEED: 1867 MT/S
22 VSS +1.2V_VDDQ EVENT#
VSS 180 DDR_DRAMRST#_R 108 RESET# 174 DDR_M0_D32
23 VSS 240_0402_<16,18> DDR_DRAMRST#_R DQ32
C VSS 181 173 DDR_M0_D37 C
26
STRETCH GOAL IS 2133 MT/S 27
VSS
VSS
30 VSS
VSS
VSS
VSS
184
185 PCH_SMBDAT A 254 SDA
DQ33
DQ34
187 DDR_M0_D34
186 DDR_M0_D39
<7,18> PCH_SMBDATA DQ35
188 PCH_SMBCLK 253 170 DDR_M0_D36
31 VSS VSS <7,18> PCH_SMBCLK SCL DQ36
35 VSS 189 169 DDR_M0_D33
VSS DQ37
Layout Note: Layout Note: 36 VSS VSS
192 SA2_CHA_DIM1 166
DQ38
183 DDR_M0_D35
193 SA1_CHA_DIM1 260 SA2 182 DDR_M0_D38
Place near JDIMM1.257,259 Place near JDIMM1.258 39 VSS VSS
196 SA0_CHA_DIM1 256
SA1 DQ39
179 DDR_M0_DQS4
40 VSS VSS SA0 DQS4(T) DDR_M0_DQS4 <6>
197
43 VSS VSS DQS4#(C) 177 DDR_M0_DQS#4 DDR_M0_DQS#4 <6>
44 VSS 201
VSS 195 DDR_M0_D44
47 VSS 202 92
VSS 91 CB0_NC DQ40 194 DDR_M0_D45
48 VSS 205
VSS DQ41 207 DDR_M0_D42
+2.5V 10uF*2 +0.6V_0.6VS 10uF*2 51 VSS VSS
206 101 CB1_NC
DQ42 208 DDR_M0_D43
209 105 CB2_NC
1uF*2 1uF*1 52 VSS VSS
210 For ECC DIMM 88 CB3_NC DQ43 191 DDR_M0_D41
56 VSS VSS DQ44 190 DDR_M0_D40
@ESD@ 213 87 CB4_NC
214 100 CB5_NC
1 1 1 1 1 1 1 1 60 VSS VSS
6 M
10U_0603_6.3V
10U 6.3V M X5R 0603 H0.8
6 K
0.1U_0201_10V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
217 104 CB6_NC DQ46 204 DDR_M0_D47

61 VSS VSS
CC159
218 97 CB7_NC DQ47 200 DDR_M0_DQS5

64 VSS VSS
CD3
CD4
CD7
CD8
DQS5(T) DDR_M0_DQS5 <6>

CD5
CD6
CD9
222 DQS8(T ) DDR_M0_DQS#5

2 2 2 2 2 2 2 2 65 VSS VSS
223
95 DQS8#(C) DQS5#(C) 198 DDR_M0_DQS#5 <6>
68 VSS VSS
69 VSS
226 +1.2V_VDDQ 216 DDR_M0_D53
227 12
72 VSS VSS DM0#/DBI0# DQ49 228 DDR_M0_D54
230 33
73 VSS VSS DQ50 229
231 54 DM1#/DBI1# DDR_M0_D50
77 VSS VSS
234 75 DM2#/DBI2# DQ51 211 DDR_M0_D52
81 VSS 235 178 DM3#/DBI3#
82 VSS 238 199 DM4#/DBI4#
85 VSS 239 220 DM5#/DBI5#
VSS DQ55 221 DDR_M0_DQS6
86 VSS 243 DDR_DRAMRST#_R 241 DM6#/DBI6#
VSS DDR_M0_DQS6 <6>
244 DM7#/DBI7# DQS6(T) DDR_M0_DQS#6
89 VSS VSS 96 DM8#/DBI8# DQS6#(C) 219 DDR_M0_DQS#6 <6>
Layout Note: 90 VSS VSS
247
248
PLACE THE CAP near JDIMM1. 164 93 VSS VSS
251
@ESD@
94 VSS VSS CD10
+3V_PRIM +3V_PRIM_DA
98 VSS VSS
252 PLACE NEAR TO SODIMM 0.1U_0402_25V6 237 DDR_M0_D60
B
DQ56 236 DDR_M0_D57 B
21
DQ57
1 2 262 GND GND 261 249 DDR_M0_D59
DQ58
RD32 0_0402_5% 250 DDR_M0_D62
DQ59
232 DDR_M0_D56
DQ60
+0.6V_DDR_VREFCA 2.2uF*1 FOX_AS0A827-H2RB-7H
DQ61
233 DDR_M0_D61
245 DDR_M0_D58
0.1uF*1 DQ62
246 DDR_M0_D63
CONN@ DQ63
2 2 242 DDR_M0_DQS7
DQS7(T) DDR_M0_DQS7 <6>
DQS7#(C) 240 DDR_M0_DQS#7 DDR_M0_DQS#7 <6>
CD11 CD12
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M Part Number:LTCX0069GA0
Part Value:S SOCKET FOX AS0A827-H2RB-7H 260P DDR4 FOX_AS0A827-H2RB-7H
+1.2V_VDDQ CONN@
DIMM Side CPU Side
2
Layout Note: RD8 +0.6V_DDR_VREFCA +0.6V_VREFCA
Place near JDIMM1 @2
1K_0402_1%
CD13
1
1 0.1U_0402_10V6K
1 RD9 2
VREF traces should be at least 20 mils
10uF*6 2_0402_1% wide with 20 mils spacing to other
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ
1 signals
330uF*1 2
2
CD15
+1.2V_VDDQ RD10 CD14 0.022U_0402_25V7K
1K_0402_1% 0.1U_0402_10V6K 2
1
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
RD11
A 1 A
CD93
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
CD95
24.9_0402_1%
1
CD96
CD24
CD25
CD26
CD27
CD28
CD29
CD30
CD31
CD94
C174 +
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Part Number = SF000006S00
330U_2.5V_M
2
1
@

P18-DDRIV_CHA: DIMM0
THIS S HE E T O F E N G IN E E R IN G DRA W ING IS TH E P RO P R IE TA R Y P R O P E R TY O F CO M P A L E LE CTRONICS , INC. A N D CONTA INS CONFIDENTSIiAzeL Document Number
A ND TR A DE S E C R E T INFORM A TI ON. THIS S HE E T M A Y NO T BE TR A NS F E R E D F RO M TH E CU S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R & D Rev
v0.3
DE P A RTM E NT E X C E P T AS A U TH O R IZ E D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T NO R TH E IN F O R M A TIO N IT CONTA INS M A
Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. CSL50 / CSL52
5 4 3 2 1
Eletro-XTechnical18
Eletro-XTechnical19
(5.2 mm)
5 4 3 2 1
STD
CHANNEL-B Interleaved Memory DDR_M1_CLK0 137
JDIMM2A
CK0(T)
STD
DQ0 8
DDR_M1_D15
DIMM
<6> DDR_M1_CLK0
DDR_M1_CLK#0 139 DDR_M1_D10
<6> DDR_M1_CLK#0
DDR_M1_CLK1 CK0#(C) DQ1 7 DDR_M1_D11
138 DQ2 20
TOP: JDIMM2 C ONN Non-
<6> DDR_M1_D[0..15] <6> DDR_M1_CLK1 CK1(T)
DDR_M1_CLK#1 140 DQ3 21 DDR_M1_D12
<6> DDR_M1_CLK#1 CK1#(C) DDR_M1_D14
+3VS +3VS <6> DDR_M1_D[16..31]
DDR_M1_CKE0 DQ4 4 DDR_M1_D9
<6> DDR_M1_CKE0 109 CKE0 DQ5 3
ECCV
S3
+
<6> DDR_M1_D[32..47] <6> DDR_M1_CKE1 DDR_M1_CKE1 110 CKE1 DQ6 16 DDR_M1_D8
DQ7 17 DDR_M1_D13
1
DDR_M1_CS#0 149 S0# DQS0(T) 13 DDR_M1_DQS1
<6> DDR_M1_D[48..63] <6> DDR_M1_CS#0 DDR_M1_DQS1 <6>
1
1
D RD20 D
RD19 RD21 DDR_M1_CS#1 157 S1# DQS0#(C) 11 DDR_M1_DQS#1
<6> DDR_M1_CS#1 DDR_M1_DQS#1 <6>
0_0402_5% @ 0_0402_5% JDIMM2B 162 S2#/C0
@ 0_0402_5% STD 165 S3#/C1 DQ8 28 DDR_M1_D0
+1.2V_VDDQ 111 VDD1 VDD11 141 +1.2V_VDDQ DQ9 29 DDR_M1_D5
2
2
2
SA0_CHB_DIM2 SA1_CHB_DIM2 SA2_CHB_DIM2 DDR_M1_ODT 0 DQ10 41 DDR_M1_D7
112 VDD2 VDD12 142 <6> DDR_M1_ODT0
DDR_M1_ODT 1
155 ODT0
117 VDD3 VDD13 147 <6> DDR_M1_ODT1 161 ODT1 DQ11 42 DDR_M1_D6
118 VDD4 VDD14 148 DQ12 24 DDR_M1_D4
1
1
DDR_M1_BG0 115 BG0 DQ13 25 DDR_M1_D1
RD22 RD24
123 VDD5 VDD15 153 <6> DDR_M1_BG0
RD23 124 VDD6 VDD16 154 <6> DDR_M1_BG1 DDR_M1_BG1 113 BG1 DQ14 38 DDR_M1_D3
0_0402_5% @ 0_0402_5% 0_0402_5% 129 VDD7 VDD17 159 <6> DDR_M1_BA0 DDR_M1_BA0 150 BA0 DQ15 37 DDR_M1_D2
130 VDD8 VDD18 160 <6> DDR_M1_BA1 DDR_M1_BA1 145 BA1 DQS1(T) 34 DDR_M1_DQS0 DDR_M1_DQS0 <6>
135 DQS1#(C) 32 DDR_M1_DQS#0
+3V_PRIM_DB VDD9 VDD19 163 DDR_M1_MA0 144 A0
DDR_M1_DQS#0 <6>
136 VDD10 <6> DDR_M1_MA0
DDR_M1_MA1 133 A1 50 DDR_M1_D20
<6> DDR_M1_MA1
2
2
2
DQ16 49 DDR_M1_D17
255 VDDSPD VTT 258 DDR_M1_MA2 132 A2
+0.6V_0.6VS <6> DDR_M1_MA2
DDR_M1_MA3 131 A3
DQ17 62 DDR_M1_D19
<6> DDR_M1_MA3 DQ18 63 DDR_M1_D22
164 VREFCA DDR_M1_MA4 128 A4
+0.6V_DDRB_VREFCA VPP1 257 +2.5V <6> DDR_M1_MA4
DQ19 46 DDR_M1_D21
2.2U_0402_6.3V6M
1 2 259 <6> DDR_M1_MA5 DDR_M1_MA5 126 A5
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM CD60 VPP2 <6> DDR_M1_MA6 DDR_M1_MA6 127 A6
DQ20 45 DDR_M1_D16
DQ21
58 DDR_M1_D18
1 VSS 99 <6> DDR_M1_MA7 DDR_M1_MA7 122 A7
CD61
0.1U_0201_10V6K 2 VSS 102 125 A8 DQ22 59 DDR_M1_D23
<6> DDR_M1_MA8 DDR_M1_MA8
1 5 VSS VSS 103 DQ23 55 DDR_M1_DQS2
SPD ADDRESS FOR CHANNEL B :
2 <6> DDR_M1_MA9 DDR_M1_MA9 121 A9
6 VSS VSS 106 DQS2(T)53 DDR_M1_DQS#2 DDR_M1_DQS2 <6>
<6> DDR_M1_MA10 DDR_M1_MA10 146 DQS2#(C) DDR_M1_DQS#2 <6>
9 VSS VSS 107 120 A10_AP
WRITE ADDRESS: 0XA4 <6> DDR_M1_MA11 DDR_M1_MA11 A11
10 VSS VSS 167 70 DDR_M1_D25
PLACE NEAR TO PIN 14 VSS VSS 168
<6> DDR_M1_MA12 DDR_M1_MA12 119 A12
158 DQ24 71 DDR_M1_D24
READ ADDRESS: 0XA3 <6> DDR_M1_MA13 DDR_M1_MA13
15 VSS VSS 171 DDR_M1_MA14_WE# 151 A13 DQ25 83 DDR_M1_D31
18 VSS VSS 172 9/8 Modify <6> DDR_M1_MA14_WE# DDR_M1_MA15_CAS# 156 A14_W E# DQ26 84 DDR_M1_D27
SA0 = 0; SA1 = 1; SA2 = 0. 19 VSS

22 VSS
VSS 175
VSS 176
<6> DDR_M1_MA15_CAS#
<6> DDR_M1_MA16_RAS#
DDR_M1_MA16_RAS# 152 A15_CAS#
A16_RAS#
DQ27 66 DDR_M1_D28
DQ28 67 DDR_M1_D29
DQ29 79 DDR_M1_D30
DDR4 POR OPERATING SPEED: 1867 MT/S 23 VSS
26VSS
VSS 180
VSS 181 <6> DDR_M1_ACT#
DDR_M1_ACT# 114
ACT# DQ30 80 DDR_M1_D26
27VSS DQ31 76 DDR_M1_DQS3
STRETCH GOAL IS 2133 MT/S 30 VSS
31 VSS
VSS 184
VSS 185
VSS 188
<6> DDR_M1_PAR
RD25 2 <6> DDR_M1_ALERT#
DDR_M1_PAR 143
DDR_M1_ALERT# 116 PARITY DQS3(T) 74 DDR_M1_DQS#3
DQS3#(C)
DDR_M1_DQS3 <6>
DDR_M1_DQS#3 <6>
1 DIMM2_CHB_EVENT# 134 ALERT#
C 35 VSS VSS 189 +1.2V_VDDQ DDR_DRAMRST#_R 108 EVENT# 174 DDR_M1_D37 C
240<_064,1072>_1%DDR_DRAMRST#_R DQ32 173 DDR_M1_D33
Layout Note: Layout Note: 36 VSS VSS 192 RESET#
DQ33 187 DDR_M1_D35
39 VSS VSS 193
Place near JDIMM2.257,259 Place near JDIMM2.258 40 VSS VSS 196 PCH_SMBDAT A 254
DQ34 186 DDR_M1_D38
43 VSS VSS 197 <7,17> PCH_SMBDATA 253 SDA DQ35 170 DDR_M1_D32
<7,17> PCH_SMBCLK PCH_SMBCLK
44 VSS VSS 201 SCL DQ36 169 DDR_M1_D36
47 VSS VSS 202 DQ37 183 DDR_M1_D34
SA2_CHB_DIM2 166
48 VSS VSS 205 260 SA2 DQ38 182 DDR_M1_D39
SA1_CHB_DIM2
+2.5V 10uF*2 +0.6V_0.6VS 10uF*2 51 VSS VSS 206 SA0_CHB_DIM2 256 SA1 DQ39 179 DDR_M1_DQS4
DDR_M1_DQS4 <6>
52 VSS VSS 209 SA0 DQS4(T) 177 DDR_M1_DQS#4
1uF*2 1uF*1 56 VSS VSS 210 DQS4#(C) DDR_M1_DQS#4 <6>
57 VSS VSS 213 92 195 DDR_M1_D44
60 VSS VSS 214 91 CB0_NC DQ40 194 DDR_M1_D45
1 1 1 1 1 1 1
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
VSS 217 CB1_NC DQ41 207 DDR_M1_D42

6 K
1U_0402_6.3V
61 VSS
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
101
CD62
CD63
CD66
CD67

CD65
CD64
CD68
2 2 2 2 2 2 2 68 VSS
69 VSS
VSS 223
VSS 226
For ECC DIMM 87
100
CB4_NC
CB5_NC
DQ44 190 DDR_M1_D41
DQ45 203 DDR_M1_D43
73 VSS VSS 230 97 CB7_NC DQ47 200 DDR_M1_DQS5
77 VSS VSS 231 95 DQS8(T) DQS5(T) 198 DDR_M1_DQS#5 DDR_M1_DQS5 <6>
78 VSS VSS 234 DQS8#(C) DQS5#(C) DDR_M1_DQS#5 <6>
81 VSS VSS 235 216 DDR_M1_D48
82 VSS VSS 238 12 DQ48 215 DDR_M1_D53
85 VSS VSS 239 +1.2V_VDDQ 33 DM0#/DBI0# DQ49 228 DDR_M1_D54
86 VSS VSS 243 54 DM1#/DBI1# DQ50 229 DDR_M1_D51
DDR_DRAMRST#_R
Layout Note: 94 VSS VSS 251 220 DM5#/DBI5# DQ54 225 DDR_M1_D50
98 VSS VSS 252 DM6#/DBI6# DQ55 221 DDR_M1_DQS6
PLACE THE CAP WITHIN 200 MILS VSS VSS
241
DM7#/DBI7# DQS6(T) 219 DDR_M1_DQS#6 DDR_M1_DQS6 <6>
96
FROM THE JDIMM2 262 261 DM8#/DBI8# DQS6#(C) DDR_M1_DQS#6 <6>
@ESD@
GND GND CD92
21
0.1U_0402_25V6
B FOX_AS0A827-H2SB-7H DQ56 237 DDR_M1_D60 B
DQ57 236 DDR_M1_D57
+0.6V_DDRB_VREFCA 2.2uF*1 CONN@ DQ58 249 DDR_M1_D58
0.1uF*1 DQ59 250 DDR_M1_D62
Part Number:LTCX0069FA0 DQ60 232 DDR_M1_D56
2 2
Part Value:S SOCKET FOX AS0A827-H2SB-7H 260P DDR4 PLACE NEAR TO SODIMM DQ61 233 DDR_M1_D61
DQ62 245 DDR_M1_D59
CD69 CD70 DQ63 246 DDR_M1_D63
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M +1.2V_VDDQ DQS7(T) 242 DDR_M1_DQS7 DDR_M1_DQS7 <6>
DQS7#(C) 240 DDR_M1_DQS#7 DDR_M1_DQS#7 <6>
+3V_PRIM +3V_PRIM_DB
1 2
RD33 0_0402_5% FOX_AS0A827-H2SB-7H
CONN@
Layout Note:
2
DIMM Side CPU Side
2
Place near JDIMM2 @
CD71
RD26
1 0.1U_0402_10V6K
1K_0402_1% +0.6V_DDRB_VREFCA +0.6V_B_VREFDQ
1
10uF*6
+1.2V_VDDQ
1uF*8 +1.2V_VDDQ
1 RD27 2
330uF*1
2_0402_1%
VREF traces should be at least 20 mils
2 wide with 20 mils spacing to other
2
2
RD28 CD72
1
signals
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
6 M
10U_0603_6.3V
CD81 1K_0402_1% CD82

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0.1U_0402_10V6K
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
6 K
1U_0402_6.3V
1 0.1U_0402_10V6K 2 0.022U_0402_25V7K
CD73
CD74
CD75
CD76
CD77
CD78
CD79
CD80
CD83
CD84
CD87
CD88
CD89
CD85
CD86
CD90
A A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2
1
RD29
24.9_0402_1%
@ @
1
Eletro-XTechnica Issued Date 2017/04/10 DecipheredDate 2019/12/15 Tiiitlle
P19-DDRIV_CHB: DIMM0
A ND TR A DE S E C R E T INFORM A TI ON. THIS S HE E T M A Y N O T BE TR A NS F E RE D F RO M TH E CU S TO D Y OF TH E C O M P E TE N T DIV IS ION OF R& D Rev
v0.3
DE P A RTM E NT E X C E P T AS A UTHORIZE D BY C O M P A L E LE CTRONICS , INC. NE ITHE R THIS S H E E T NO R TH E IN F O RM A TIO N IT CONTA INS M
A Y BE U S E D BY OR DIS CLOS E D TO A N Y THIRD P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T OF C O M P A L E LE CTRONICS , INC. CSL50 / CSL52
5 4 3 2 1
Eletro-XTechnical19
5 4 3 2 1
Eletro-XTechnical20 eDPPower <6,7,9,10,11,13,17,18,28,29,30,31,32,33,36,39,40,52> + 3VS +3VS

W =60mils
SM010014520 3000ma INVPW R_B+ <46,47,48,49,50,53> + 19VB +19VB
+19VB
+LCDVDD 220ohm@100mhz W =60mils
<7,13,29,30,33,34,35,40,48,49,50,51> + 3VALW +3VALW
DCR 0.04
L1 1 @ 20_0805_5%
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1 1 SD002000080
CG3
CG2 @ L2 1 @ 2 0_0805_5%
SD002000080
2 2
@EMI@ C117
1 1
C118 1 2
<EC> < 33> EC_BKOFF# R166
1 2
33_0402_5%
DISPOFF#
1
*UG1 +LCDVDD Current Limit :0.8A 680P_0402_50V7K 68P_0402_50V8J FU1 0.75A_24V_MF-MSMF075/24
R5176
SP040009I00
2 2 10K_0402_5%
D D
UG2
2
GND 9
Rshort@
< 5> ENVDD_CPU
R6 1 2 ENVDD_CPU_R 1 EN1
0_0402_5% IN1 8 + 3VS <CPU> < 5> BKL_PW M_CPU R259
1 Rshort@2
0_0402_5%
INVTPW M
1
R5198 1 @ 2 UG2_FLAG1 2 FLAG1
+3VS OUT1 7 +LCDVDD
100K_0402_5%
ENVDD_CPU R5200 1 @ 2 UG2_EN2 3 EN2 @ R163
IN2 6 +3VS
100K_0402_5%
0_0402_5%
R52011 2 4 OUT2 5
0.1U_0402_16V7K
+3VS FLAG2 +3VS_CAMERA
100K_0402_5%
1U_0402_6.3V4Z
0.1U_0201_10V6K
1U_0402_6.3V4Z
1 1 1 1 1 1
0.1U_0402_16V7K
1U_0402_6.3V4Z
2
R5199 1 @ 2 UG2_FLAG2 G510F51U_MSOP 8
CG75
C5232
CG76
C5231
+3VS
100K_0402_5% SA0000BEY00 @
CG1
CG4
2 2 2 2 2 2
<CPU> RT34 1 Rshort@20_0201_5%EDP_HPD_R
Camera
< 5>EDP_HPD
1
RT11
100K_0402_5%
R170 EMI@ 1
2
@ESD@
2
SM070005U00 MURATA DLM0NSN900HY2D
4 4 0_0201_5% 3 3 USB20_N5_R D7 SCA00000U10
< 11>USB20_N5
@EMI@ USB20_P5_R 2
L12 1 2 USB20_P5_R 1
< 11> USB20_P5 1 2 2 .1U_0402_16V 7K EDP_AUXP_C
USB20_N5_R 3 CT102 1
< 5> EDP_AUXP
EMI@ CT101 1 2 .1U_0402_16V 7K EDP_AUXN_C
PESD5V0U2BT_SOT23 -3 < 5> EDP_AUXN
1 2
R171 0_0201_5%
CT98 1 2 .1U_0402_16V 7K EDP_TXP 0_C
< 5> EDP_TXP 0
1 @2
R5196 0_0603_5%
<CPU> CT97 1 2 .1U_0402_16V 7K EDP_TXN0_C
C < 5> EDP_TXN0 C
SD013000080
D_MIC_CLK
< 32> D_MIC_CLK CT103 1 2 .1U_0402_16V 7K EDP_TXP 1_C
+3VS_CAMERA < 5> EDP_TXP 1
D_MIC_DATA 1 Rshort@2 D_MIC_L_DATA CT100 1 2 .1U_0402_16V 7K EDP_TXN1_C
<32> D_MIC_DATA R175 0_0402_5% < 5> EDP_TXN1
1 1
@
+3VS
C5221 C5222
2 .1U_0402_16V 7K 2 4.7U_0402_6.3V6M
SE00000SO00
C5932 1 220P_0402_50V7KINVTPW M
*FG3 Camera Current Limit : 0.4A
1st:SA000080300, S IC G5250Q1T73U SOT-23 3P POWER SWITCH_0.4A 1 220P_0402_50V7KDISPOFF#
2nd:SA00004ZA00, S IC AP2330W-7 SC59 3P PWR SW_0.4A C5942
www.teknisi-indonesia.com eDP
Touch Screen R5175 EMI@
1 2
0_0201_5%
CONN@
JEDP
L13 EDP_TXP1_C 1
1 1 @EMI@ 2 2 USB20_P7_R TS_GPIO EDP_TXN1_C 2 1
1 @2
@ESD@ < 11> USB20_P7 <10> TS_GPIO_CPU 2
R260 0_0402_5% 3
EDP_TXP0_C 3
D6 4
EDP_TXN0_C 4
4 3 USB20_N7_R 1 2 5
< 11>USB20_N7 3 < 33> TS_GPIO_EC 5
USB20_P7_R 2 SM070005U004 R5187 0_0402_5% 6
EDP_AUXP_C 6
1 MURATA DLM0NSN900HY2D 7 7
USB20_N7_R 3 EMI@ EDP_AUXN_C 8 8
1 2 9 9
+LCDVDD
PESD5V0U2BT_SOT23-3 R173 0_0201_5% 10 10
B EDP_HPD_R 11 11 B
SCA 00000U10
12 12
Touch screen USB20_P7_R 13 13
USB20_N7_R 14 14
DISPOFF#
Touch Screen Power Selection:
15 15
INVTPW M 16 16
TS_GPIO 17 17
+3VS_TOUCH 18 18
19 19
INVPW R_B+
RTS 7 1 @ 2 0_0402_5% 20 20
21 21
22 22
+5VS_TOUCH 23
23
+3VS_TOUCH 24
@ 24
25 GND
FG4 +3VS_TOUCH for FHD with TS +3VS_CAMERA USB20_N5_R
25
26 GND
36
26 35
3 +3VS USB20_P5_R 27 27 GND 34
OUT Cam era 28 GND 33
1 28
D_MIC_CLK 29 GND 32
@ 1 29
IN D_MIC_L_DATA 30 GND 31
CTS3 20m il 30
4.7U_0402_6.3V6M 2
2 GND ACES_50203-03001-002
1
@ CTS7 SP 010023710
SA 00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWERSWITCH
2
+5VS_TOUCH
RTS 8 1 @ 2 0_0402_5%
TS@
FG2 +5VS_TOUCH only for HD with TS
3 +5VS
A OUT A
1
TS@ 20m il
IN 1
CTS6
4.7U_0402_6.3V6M 2
2 GND TS@ 1
CTS1
SA 00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWERSWITCH
2

Eletro-XTechnica
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTSIiiAzeeLDocumentNumber
eDP CONN/Camera/TS
Rev
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. CSL50 / CSL52
5 4 3 2 1
Eletro-XTechnical20
Eletro-XTechnical2
4 3 2 1
5
<6,7,9,10,11,13,17,18,27,29,30,31,32,33,36,39,40,52> +3VS +3VS

+3VS
<27,32,33,34,36,37,40> +5VS +5VS
<5> HOST_DP1_P0 HOST_DP1_P0 0.1U_0402_16V7K 1 2 CG8 HDMI_TX_P2
HOST_DP1_N0 0.1U_0402_16V7K 1 2 CG9
<5> HOST_DP1_N0 HDMI_TX_N2
HOST_DP1_P1 0.1U_0402_16V7K 1 2 CG10
<5> HOST_DP1_P1 HDMI_TX_P1
HOST_DP1_N1 0.1U_0402_16V7K1 2 CG11
<CPU> <5> HOST_DP1_N1 HDMI_TX_N1
1
HOST_DP1_P2 0.1U_0402_16V7K 1 RG47
2 CG12 HDMI_TX_P0
<5> HOST_DP1_P2 HOST_DP1_N2 0.1U_0402_16V7K1 2 CG13 HDMI_TX_N0 1M_0402_5%
<5> HOST_DP1_N2
HOST_DP1_P3 0.1U_0402_16V7K 1
2 CG14
2
<5> HOST_DP1_P3 HOST_DP1_N3 0.1U_0402_16V7K1 HDMI_CLKP RG108
2
<5> HOST_DP1_N3 2 CG15 HDMI_CLKN
D D
1 6 HDMI_HPD 1 2 HP_DETECT
<5> HOST_DP1_HPD
QG1A 10K_0402_5%
20K_0402_5%
5
6
7
8
5
6
7
8
L2N7002SDW1T1G2NSC88-6
SB00001FF00
1
1
5V Level RG56 @
CM17
QG1B SB00001FF00
L2N7002SDW1T1G2NSC88-6 220P_0402_50V7K
4
3
2
1
4
3
2
1
3 4 2
RP1 RP2
2
470_0804_8P4R_5% 470_0804_8P4R_5%
5
+3VS
+3VS
*DDA30_LA-F292PR02: RS_8.2ohm_RP_360ohm
HDMI_R_TX_N0 1 1
@ESD@
D21 teknisi-indonesia
10 9HDMI_R_TX_N0
HDMI_CLKP RG59 1 EMI@ 2 15 +-1% 0402 HDMI_R_CLKP
HDMI_R_TX_P0 2 2 9 8 HDMI_R_TX_P0
2
CG71 EMI@ HDMI_R_CLKN 4 4
C 7 7 HDMI_R_CLKN C
2
360 +-5%0402
SD028360080 HDMI_R_CLKP 5 5 6 6 HDMI_R_CLKP
HOST_DP1_CTRL_CLK 1 6 HDMI_CTRL_CLK
<5> HOST_DP1_CTRL_CLK
1
HDMI_CLKN RG60 1 EMI@ 2 15 +-1% 0402 HDMI_R_CLKN 33

QG2A SB00001FF00
8 L2N7002SDW1T1G2NSC88-6
+3VS
HDMI_TX_N2 RG63 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N2
AZ1045-04F.R7GDFN2510P10EESD
2
SC300001Y00
CG72 EMI@
5
360 +-5%0402
SD028360080
HOST_DP1_CTRL_DATA 4 3 HDMI_CTRL_DAT
<5> HOST_DP1_CTRL_DATA
1
HDMI_TX_P2 RG61 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P2 @ESD@

D22 QG2B SB00001FF00
HDMI_R_TX_N1 1 1 10 9 HDMI_R_TX_N1 L2N7002SDW1T1G2NSC88-6
HDMI_TX_P1 RG65 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P1
HDMI_R_TX_P1 2 2 9 8 HDMI_R_TX_P1
2
CG73 EMI@ HDMI_R_TX_N2 4 4 7 7 HDMI_R_TX_N2 +HDMI_CRT_5V

360 +-5%0402
SD028360080 HDMI_R_TX_P2 5 5 6 6 HDMI_R_TX_P2
+3VS
1
HDMI_TX_N1 RG10 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N1 33 RG105

1 8 HDMI_CTRL_CLK
8 2 7 HDMI_CTRL_DAT
HDMI_TX_P0 RG12 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_P0 3 6 HOST_DP1_CTRL_CLK
B AZ1045-04F.R7GDFN2510P10EESD 4 5 HOST_DP1_CTRL_DATA B
2
SC300001Y00
CG74 EMI@ 2.2K_0804_8P4R_5%
360 +-5%0402 HDMI Conn.
SD028360080
1
HDMI_TX_N0 RG13 1 EMI@ 2 15 +-1% 0402 HDMI_R_TX_N0 @ESD@

DG1 JHDMI CONN@
HP_DETECT 11 10 9 HP_DETECT HP_DETECT 19 HP_DET
+HDMI_CRT_5V 18 +5V
HDMI_CTRL_DAT2 2 9 8 HDMI_CTRL_DAT 17 DDC/CEC_GND
HDMI_CTRL_DAT 16 SDA
HDMI_CTRL_CLK4 4 7 7 HDMI_CTRL_CLK HDMI_CTRL_CLK 15 SCL
14 Utility
5 5 6 6 13 CEC
HDMI_R_CLKN 12 CK-
3 3 @ @ 11 CK_shield
W =40mils 1 HDMI_R_CLKP 10 CK+
10P_0402_50V8J
10P_0402_50V8J
8 1
CM26 CM27 HDMI_R_TX_N0 9 D0-
FG1 +HDMI_CRT_5V
8 D0_shield
AZ1045-04F.R7GDFN2510P10EESD HDMI_R_TX_P0 7 D0+
3 SC300001Y00 2 2 HDMI_R_TX_N1
OUT 6 D1-
5 D1_shield
+5VS 1 HDMI_R_TX_P1 4 D1+ 23
IN HDMI_R_TX_N2 GND1 22
1 1 3 D2- GND2
2 2 D2_shieldGND3 21
GND HDMI_R_TX_P2 1 D2+ GND4 20
CG46 CG47
0.1U_0402_16V7K 2 4.7U_0402_6.3V6M2 ACON_HMRBL-AK120H
A AP2330W-7_SC59-3 A
DC231709273
SA00004ZA00

HDMI Conn/Level shift
v0.3
Eletro-XTechnical2
5 4 3 2 1
5 4 3 2 1
Eletro-XTechnical22 +LAN_VDD_3V3 Rising

JL33
1 1 22
JUMP@
time
+3VALW @
JUMP_43X79 need>0.5mS and
UL2
1
<100mS+LAN_VDD_3V3 CL8,CL23closeLL2.
5
VOUT CL26closeUL1 Pin 3.
VIN CL12closeUL1 Pin 8.
1
@ CL13 ~ CL15 close UL1 Pin22. +LAN_VDD_1V0
GND 2
CL28 <33>LAN_PWR_EN 4
1500P_0402_50V7K
EN
LL2 CL11, CL27 close UL1 Pin30.
2 +LAN_REGOUT
3 1 2
/OC
2.2UH +-20%1239AS-H-2R2M=P22A
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0402_6.3V6M
1
4.7U_0603_6.3V6K
G524B1T11U_SOT23-5 1 1 1 1 1 1 1 1 1
SH000014700 @ @
CL8
CL29
CL23
SA00006Y800
CL11 CL12 CL13 CL14 CL15 CL26 CL27
D @ D
2 2 2 2 2 2 2 2 2 2
EC_LAN_ISOLATEB#_R 2 1 +3VS
RM6
RTL8107ESH-CG/RTL8111HSH-CG Co-Lay 1K_0402_5%
2
+LAN_VDD_3V3 +LAN_VDD_3V3
RM11
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
UL1 +LAN_VDD_3V3=40mil 15K_0402_5%

0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 RTL8111HSH-CG
1
L
1
0.1U_0402_16V7K
@ +LAN_VDD_1V0 +VDDREG=40mil
CL16
SA000084T00
CL20 CL19 CL9 CL5 CL10
@2 2 2 2 2 2 +LAN_REGOUT=60mil
LAN_MDIP0 1 3
2 MDIP0 AVDD10 8
LAN_MDIN0
LAN_MDIP1 4 MDIN0 AVDD10 3 0 +LAN_VDD_3V3 XTLI
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
6 MDIN1 DVDD10 2 1 XTLO
LAN_MDIP2 MDIP2
LAN_MDIN2 7 11 1M_0402_5% RL7
9 MDIN2 AVDD33 32 +LAN_VDD_3V3
LAN_MDIP3
1
MDIP3
LAN_MDIN310 AVDD33 RL15
CL9, CL20 close to UL1 Pin 11 CL10&CL16 close to UL1: Pin23
MDIN3
10K_0402_5% YL1
VDDREG(VDD33) 23
24 +LAN_REGOUT
CL5 & CL19 close to UL1: Pin 32 REGOUT
CLKREQ_PCIE#12 Rshort@1 CLKREQ_PCIE#1_R 12 1 3
<9> CLKREQ_PCIE#1 1 3
19 CLKREQB
2
PLT_RST# RL6 0_0201_5% 21 EC_PME#
<9,30,31,33,35> PLT_RST# PERSTB LANW AKEB20 EC_PME#<33>
EC_LAN_ISOLATEB#_R NC NC
ISOLATEB +LAN_VDD_3V3
<9> CLK_PCIE_P1 CLK_PCIE_P1 15 2 2
16 REFCLK_P LAN_ACT# 24
LED0 27
10P_0402_50V8J
CL25
CL24
10P_0402_50V8J
<9> CLK_PCIE_N1 CLK_PCIE_N1 REFCLK_N LED1/GPO
26 1 @2
13 LED1/GPO 25 LAN_LINK#
PCIE_CTX_C_DRX_P5 LED2(LED1) RL56 4.7K_0402_5%
<11> PCIE_CTX_C_DRX_P5
PCIE_CTX_C_DRX_N5 14 HSIP 1 SJ10000UP00 1
<11> PCIE_CTX_C_DRX_N5
<11> PCIE_CRX_DTX_P5 PCIE_CRX_DTX_P5 CR11 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_P5 17 HSIN HSOP 28 25MHZ 10PFXRCGB25M000F2P34R0
PCIE_CRX_DTX_N5 CR13 1 2 0.1U_0402_10V7K PCIE_CRX_C_DTX_N5 18 CKXTAL1 29 XTLOI
<11> PCIE_CRX_DTX_N5 HSON CKXTAL2
RSET 31 RSET
GND 33
2
C
RL11 C
TSL1 2.49K_0402_1%
LANGND
25 XGND RL55 1 @ 2 0_0805_5% (SA0000ALR00)RTL8107ESH-CG10/100
+V_DAC 1
TCT1 MCT1 24 RP5 (SA000084T00)RTL8111HSH-CGGiga
LAN_MDIP0 2 TD1+ MX1+ 23 RJ45_MDIP0
1
LAN_MDIN0 3 TD1- MX1- 22 RJ45_MDIN0 MCT1 1 8
MCT2 2 7
4 TCT2 MCT2 21 MCT3 3 6
LAN_MDIP1 5 TD2+ MX2+ 20 RJ45_MDIP1 MCT4 4 5
LAN_MDIN1 6 TD2- MX2- 19 RJ45_MDIN1
75_0804_8P4R_1%
7 TCT3 MCT3 18 SD300002E80 2
LAN_MDIP2 8 TD3+ MX3+ 17 RJ45_MDIP2 CL2 +LAN_VDD_3V3
LAN_MDIN2 9 16 RJ45_MDIN2 SE167100J80
TD3- MX3-
JLAN
10 15 1 10P_1808_3KV
TCT4 MCT4 A1 White_LED+
LAN_MDIP3 11 14 RJ45_MDIP3 1
TD4+ MX4+ CL3 LAN_LINK# 2 1 LAN_LINK#_R LAN_ACT#_R A2
LAN_MDIN3 12 13 RJ45_MDIN3 White_LED-
TD4- MX4-
120P_0402_50V8J RL30 1K+-5%0402
LANGND EMI@ RJ45_MDIN3 8 DI_D4-
2
3
LAN-8100G1G DL1 RJ45_MDIP3 7 DI_D4+

2 1
3
@EMI@ SP050008Y00 PESD5V0U2BT 3P CCSOT23 ESD

CL1 CL4 ESD@ RJ45_MDIN16 RX_D2-
SCA00000T00
1
1 0.01U_0402_16V7K 20.1U_0402_16V7K
RJ45_MDIN25
BI_D3-
RJ45_MDIP2 4 BI_D3+
1
RJ45_MDIP1 3 RX_D2+
RJ45_MDIN02 TX_D1-
GND1 9
RJ45_MDIP01 GND2 10
TX_D1+ GND3 11
B1 GND4 12
Am ber_LED+
LAN_ACT# 2 1 LAN_ACT#_R LAN_LINK#_R B2 Amber_LED-
RL31 510_0402_5%
SINGA_2RJ3081-1A8211F LANGND
DC231710035
@ESD@ @ESD@
B DM12 DM13 B
LAN_MDIP0 44 3 3 LAN_MDIN0 LAN_MDIP2 4 4 3 3 LAN_MDIN2
powe rail need to check powe rail need to check

+LAN_VDD_3V3 5 Vbus GND 2 +LAN_VDD_3V3 5 Vbus GND 2
LAN_MDIN1 6 6 1 1 LAN_MDIP1 LAN_MDIN3 6 6 1 1 LAN_MDIP3
YSUSB2.0-5_SOT-23-6-6 YSUSB2.0-5_SOT-23-6-6
SC300001G00 SC300001G00
A A
Eletro-XTechnica Security Classification

Issued Date 2017/08/24
Compal SecretData
Deciphered Date 2018/08/24 Title
THI S S HE ET O F E NG I NE ER I NG D RAW I NG IS THE P RO P R I E TAR Y PRO P ERTY O F C O MP AL E L E CTR O NI CS , I NC . AND CO NTAI NS CONFIDENTSSIAizLe DocumentNumber
LAN 8111
AND TR AD E SE CR E T I NF O R MATI O N. THI S S HE ET MAY NO T BE TR ANS F E RE D F RO M THE CUS TO D Y OF THE C O MP E TE NT DIVISION OF R & D DE P AR
Rev
v0.3
TME NT E X CE P T AS AUTHO RI Z E D BY C O MP AL E L E C TR O NI CS, I NC. NE I THE R THI S S HE E T NO R THE I NF O RMATI O N IT CO NTAI NS
MAY BE US E D BY OR DI S CLO SED TO ANY THI RD PAR TY W I THO UT P R I O R W RI TTE N CO NS E NT OF C O MP AL EL E CTR O NI CS , I NC .
CSL50 / CSL52
5 4 3 2 1
Eletro-XTechnical22
5 4 3 2 1
Eletro-XTechnical23
<6,7,9,10,11,13,17,18,27,28,29,31,32,33,36,39,40,52> + 3VS +3VS
<7,13,29,33,34,35,40,48,49,50,51> + 3VALW +3VALW
D D
+3VS_W LAN
CONN@
2
JW LAN +3VS_W LAN
+3VS_W LAN
RN7
1 2 4.7K_0402_5%
3 1_GND 3.3V_2 4
< 11> USB20_P6 5 3_USB_D+ 3.3V_4 6
1
< 11>USB20_N6 7 5_USB_D- LED1#_6 8
9 7_GND N/C_8 10 @RF@ @RF@ @RF@ @RF@
11 9_N/C
0.1U_0402_25V6
100P_0402_50V8J
0.1U_0402_25V6
100P_0402_50V8J
N/C_10 12 R5181 R5182 R5183 R5184
R5179 R5180
13 11_N/C
100P_0402_50V8J
0.1U_0402_25V6
N/C_12 14
@RF@ @RF@
21
21
21
21
15 13_N/C N/C_14 16
21
21
17 15_N/C LED2#_16 18
19 17_N/C GND_18 20
21 19_N/C N/C_20 22
23 21_N/C N/C_22
23_N/C
+3VS_W LAN 25 24 +3VS_W LAN

27 33_GND N/C_32 26
< 11> PCIE_CTX_C_DRX_P6 29 35_PERp0 N/C_34 28
< 11> PCIE_CTX_C_DRX_N6 37_PERn0 N/C_36 30
31
CLink Reset_38 32
1
39_GND E 51TXD_P80DATA < 33>
1
33
< 11> PCIE_CRX_DTX_P6 35 41_PETp0 CLink DATA_ 40 34 E 51RXD_P80CLK < 33> RN15 @RF@
RN3 < 11> PCIE_CRX_DTX_N6 37 43_PETn0 CLink CLK_42 36
45_ GND 10K_0402_5%
10K_0402_5% COEX3_44 38
39 47_REFCLKP0
< 9> CLK_PCIE_P2 COEX2_46 40
2
41 49_REFCLKN0
< 9> CLK_PCIE_N2 COEX 1_48 42
2
43 51_ GND RN14 1 Rshort@20_0201_5% BT_ON_EC +3VS_W LAN

SUSCLK_50 SUSCLK <9>
45 53_CLKREK0# 44
< 9> CLKREQ_PCIE#2 47 PERST0#_52 PLT_RST# <9,29,31,33,35>
46
< 9,33> EC_PCIE_W AKE# BT_ON_EC < 33>
49 55_PEW ake0# W _DISABLE 2#_54 48 W L_OFF# < 10>
51 57_GND W _DISABLE 1#_56 50
C 53 59_N/C N/C_58 52 C
0.1U_0402_16V7K
55 61_N/C N/C_60 54
1 1
CN3
57 63_GND N/C_62 56
CN2
59 65_N/C RESERVED_64 58 +3VS_W LAN
R5185
R5186
61 67_N/C N/C_66 60
1
10P_0402_50V8J
10P_0402_50V8J
@RF@ @RF@ 22U_0603_6.3V6K
63 69_GND N/C_68 62 2 2
71_N/C N/C_70 64
2
65 73_N/C 3.3V_72
67 75_GND 3.3V_74 66
GND 68
GND 69
NC_70 70
NC_71 71
LOTES_APCI0019 -P 003H
SP 070010DA 0
Active Low
W L_PW REN_EC# <33>
1
NGFF and WLAN RW L1
200K_0402_5%
Unpop QB8 and RL25 for not supportOBFF CW L1

1 2
+3VS_W LAN
22
+3VS +3VS_W LAN 0.1U_0402_16V4Z
B QW L1
G
B
1 3 +3VALW
S
D
2
1
RL25 @ CW L2 PJ23011PSOT23-3
100K_0402_5% 0.1U_0402_16V4Z SB 00000T900
2
G
@ 2
1 3 EC_PCIE_W AKE# 1@2
< 9> W AKE#
RW L2 0_0603_5%
D
SB 00000EN00
QB 8
2N7002H_SOT23-3
A A

Eletro-XTechnica
Issued Date 2017/08/24 Deciphered Date 2018/08/24 Tiitttlle
THIS SHEET OF ENGINEERING DRAW ING IIIS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC. AND CONTAINS CONFIDENTSIiiiAzeeLDocumenttNumber
WLAN-BT
Rev
AND TRADE SECRET INFORMATION... THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIIION OF R& D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, IIINC... NEITHER THIIIS SHEET NOR THE IIINFORMATION IIIT CONTAIIINS MAY BE
USED BY OR DISCLOSED TO ANY THIIIRD PARTY W ITHOUT PRIOR W RIIITTEN CONSENT OF COMPAL ELECTRONICS, INC. CSL50 / CSL52
Date: Friday, January 05,,, 2018 Sheet 30 of 59
5 4 3 2 1
Eletro-XTechnical23
Eletro-XTechnical24
4 3 2 1
5
+3VS +3VS_SSD
JPHW 9 <6,7,9,10,11,13,17,18,27,28,29,30,32,33,36,39,40,52> +3VS +3VS

1 1 22
JUMP_43X79CS27 CSS7 CS8 CS9 1 CSS6

1 CSS5 JUMP@ 1@1 1 1
47U_0603_6.3V6M
10U_0603_10V6M
0.1U_0201_10V6K
1U_0402_6.3V6K
RF@ RF@ CS10
18P_0201_50VNPO
10P_0201_50V
21
2 2 2 2 2 2 10P_0201_50V
RF@
D D
JSSD
1 GND 3P3VAUX 2 +3VS_SSD
3 GND 3P3VAUX 4
5 PETn3 NC 6
7 PETp3 NC 8 TS123
9 GND DAS/DSS# 10 TP@
11 PERn3 3P3VAUX 12
13 PERp3 3P3VAUX 14
15 GND 3P3VAUX 16
17 PETn2 3P3VAUX 18
19 PETp2 NC 20
21 GND NC 22
23 PERn2 NC 24
NC 26
<11> PCIE_CRX_DTX_N11
25 PERp2
27 GND
29 PETn1
Key TYP.M NC 28
NC 30
<SSD> <11> PCIE_CRX_DTX_P11 31 PETp1 NC 32
33 GND NC 34
<11> PCIE_CTX_C_DRX_N11 35 PERn1 NC 36
<11> PCIE_CTX_C_DRX_P11 37 PERp1 DEVSLP 38 DEVSLP2 <11>
C 39 GND NC 40 C
<11> PCIE_CRX_DTX_P12 41 PETn0/SATA-B+ NC 42 RS46 1 2 10K_0402_5%

<11> PCIE_CRX_DTX_N12 43 PETp0/SATA-B- NC 44
45 GND NC 46
<11> PCIE_CTX_C_DRX_N12 47 PERn0/SATA-A- NC 48
49 PERp0/SATA-A+ PLT_RST#_SSDRT3 1 Rshort@2 0_0201_5%
<11> PCIE_CTX_C_DRX_P12 PERST# 50 PLT_RST# <9,29,30,33,35>
51 GND CLKREQ_PCIE#4
CLKREQ# 52 CLKREQ_PCIE#4<9>
<9> CLK_PCIE_N4 53 REFCLKN PEWake# 54
<9> CLK_PCIE_P4 55 REFCLKP NC 56
57 GND NC 58
1 2
+3VS @EMI@ CS16
VARIST_CK0402101V050402 67 NC
SSD_PDET SUSCLK(32kHz) 68
SSD1_IF PU on CPU side RPC13.3_10K 69 3P3VAUX 70
71 GND 3P3VAUX 72
2
@ RS21 1 2
+3VS 73 GND 3P3VAUX 74
100K_0402_5% RS22 10K_0402_5%
75 GND
76
GND1 77
GND2
<11> SSD1_IF
YPCI0016-P003A67PA32
11
D
DC04000L9A0CONN@
2
G
S QS1 SB000009Q80
3
2N7002KW_SOT323-3
B pre PV: change to 10K for redriver detect pin voltage level B
A A

M.2SSD
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE CSL50 / CSL52 v0.3
USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Eletro-XTechnical24
5 4 3 2 1
5 4 3 2 1
Eletro-XTechnical25
+3VS +DVDD +3VS +DVDD_IO
UA1 RA1 RA2
+5VS RA8 +5VS_PVDD1
1 2 1 2 1 2
<8> HDA_SYNC_R
BCLK
9 SYNC DVDD 1 +DVDD
<8>HDA_BIT_CLK_R
5 BCLK DVDD_IO 8 +DVDD_IO
0_0402_5% 0_0402_5%
0_0402_5%
1 2 1 2
AVDD1 20 +5VS_AVDD 1 1
4.7U_0402_6.3V6M CA32
11
10U 6.3V M X5R 0603 CA19

0.1U 16V K X7R 0402 CA20
0.1U 16V K X7R 0402 CA33

CA34 RA53 22_0402_5% AVDD2 33 11
4.7U_0402_6.3V6M CA36
+1.8VS_AVDD
0.1U 16V K X7R 0402 CA37

22P 50V J NPO 0402EMI@
EMI@ INT_MIC 14 MIC2-R/SLEEVE PVDD1 34 +5VS_PVDD1 2 2 22
CA29
13 MIC2-L/RING2 PVDD2 39 +5VS_PVDD2 2 2
GNDA 12 MIC2_CAP15 MIC2_CAP VD33STB 16 VD33STB1RA232 +3VS
0_0402_5%
10U6.3VM X5R0603
D D
SPK_OUT_L+ 35 SPK_L+
SPK_OUT_L- 36 SPK_L-
PC_BEEP SPK_OUT_R- 37SPK_R-

11 PCBEEP SPK_OUT_R+ 38SPK_R+
HPOUT_R 26 HPOUT_R RA38 1 2 30_0402_1%HP_OUTR Headphone
HPOUT_L 25 HPOUT_L RA371 2 30_0402_1%HP_OUTL
100K_0402_5% 2.2K_0402_5%
RA24 1 2 INT_MIC RA40 1 2 MIC2-VREFO23 MIC2-VREFO +5VS +5VS_AVDD +1.8VS +1.8VS_AVDD
+5VS RA39 1 +5VS_PVDD2 RA4 RA5
24 SDATA_OUT 7 4HDA_SDIN0_R1 RA26 2 HDA_SDOUT_R <8>
2 1 2
<33> MUTE_LED_IN HDA_SDIN0<8> 1 2
CA30 1 2 10U 6.3V M X5R 0603 LDO1_CAP LINE1-VREFO-LSDATA_IN
21 LDO1-CAP 22_0402_5%
GNDA 22
CA31 1 2 2.2U 6.3V M X5R 0402 VREF 0_0402_5% 0_0402_5% 0_0402_5%
GNDA VREF
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 1 1 1
10U 6.3V M X5R 0603 CA21

0.1U 16V K X7R 0402 CA22
10U6.3VMX5R0603
CA7
CA15 1 21U_0402_6.3V6K CPVEE DA6
0.1U16VKX7R0402
27 CPVEE 1 1
@
CA8
CA391 2 10U6.3V M X5R 0603 AZ5125-01H.R7G_SOD523-2
CPVDD 29 CPVDD
CBN 28 CBN LINE1_L 18
SC400005Q00
CA5
CA6
+1.8VS
CA16 2 1 1U_0402_6.3V6K CBP30 CBP LINE1_R 17 2 2 2 2
2 2
D_MIC_DATA
21
<27> D_MIC_DATA 2 GPIO0/DMIC_DATA12
2 1 D_MIC_CLK_R 3 GPIO1/DMIC_CLKLDO2_CAP 32 CA27 1 2 10U 6.3V M X5R 0603 GNDA
<27> D_MIC_CLK
BLM15PX221SN1DEMI@ LA6 LDO3_CAP 6 CA281 2 10U 6.3V M X5R 0603
GNDA
1 @EMI@ RA41 10 DCDET GNDA
CA41 +DVDD 1 2 100K_0402_1% 12 JD1
10P_0402_50V8J PLUG_IN# 1 2 200K_0402_1%
RA42 AVSS1 19
31
GNDA
2 GNDA
PDB 40 PDB AVSS2 41
THERMALPAD
ALC3247-CG_MQFN40_5X5
Internal SPK
CONN@
JSPK
SPK_R- RA36 1 EMI@ 2 0_0603_5%SPK_R-_CONN 1
+3VS +DVDD RA34 1 EMI@ 2 0_0603_5%SPK_R+_CONN 1
SPK_R+ 2
SPK_L- RA33 1 EMI@ 2 0_0603_5%SPK_L-_CONN 3 2
C
4 3 C
RA35 1 EMI@ 2 0_0603_5%SPK_L+_CONN
PC Beep SPK_L+ 4
1
RA10 5
G1
1
RA9
wide 40 MIL
10K_0402_0.5% 6
@ 100K_0402_5% G2
ACES_50278-00401-001
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
2
EC Beep<33>EC_BEEP# 1 2 PC_BEEP_RCA44
22
1 1 1 1
0.1U 16V K X7R0402
B
@ QA2 RA16
@EMI@ C11
@EMI@ C12
@EMI@ C13
@EMI@C14
HDA_RST#_R 3 1 PDB 47K_0402_5%
E
<8>HDA_RST#_R 2 2 2 2
SB Beep <8,10> HDA_SPKR 1 2 1 2 1 2 PC_BEEPCA42
C
MMBT3904W H_SOT323-3 1 CA43 0.1U16VKX7R0402
1
SB000008E10 0.1U 16VK X7R0402
@
2 0.1U 16V K X7R 0402 CA23
EC_MUTE# 1 RA17
<33> EC_MUTE# 2
DA2 SCS00000Z00 10K_0402_5%
RB751V-40SOD-323
Close to Codec pin34
2
R5260
1 2
0_0201_5%
Reserve for ESD request.

INT_MIC_R GNDA HP_OUTR_RHP_OUTL_R
Place RA51/RA52/RA53 on moat of UA1 BOT side
3
RA51 1 20_0603_5%
DA4
Rshort@ L03ESDL5V0CC3-2_SOT23-3 DA5
RA52 1 20_0603_5% SCA00002900 L03ESDL5V0CC3-2_SOT23-3
ESD@ SCA00002900
Rshort@ @ESD@
RA541 20_0603_5%
Rshort@
1
1 2
RA6 0_0402_5%
1/20:Swap DA3
RA7@
B 1 2 B
0_0402_5%
12
CA9 EMI@ JHP
0.1U16VK X7R0402 INT_MIC INT_MIC_R
1 RA13 2 0_0402_5% 3 3:M/G_EARTH
EMI@ HP_OUTL 1 RA14 2 0_0402_5% HP_OUTL_R 1 1:L/R_TIPSPRING
EMI@
1 2
CA10 PLUG_IN# 5 5:TRANSFERTERMINAL
0.1U16VK X7R0402
EMI@
6 6:MAKE TERMINAL
12 HP_OUTR 1 RA152 0_0402_5% HP_OUTR_R 2 2:R/L_RINGA
CA11 @EMI@ EMI@
0.1U16VKX7R0402 4 4:G/M_RINGB
1 1 1 7 7:MS_SHELL
12
100P_0603_50V7CA24
100P_0603_50V7CA25
100P_0603_50V7CA26
CA12 @EMI@ SINGA_2SJ3095-067111F
0.1U16VKX7R0402 DC23000DY00
@EMI@
@EMI@
@EMI@
2 2 2 GNDA Pin6 and Pin5
12 Normal OPEN
CA13
0.1U16VK X7R0402
EMI@
GNDA
GNDA
A A
Eletro-XTechnica Security Classification

Compal SecretData
Deciphered Date 2018/08/24 Title
Compal Electronics,Inc.
AUDIO ALC3258-CG
THI S S HE ET O F E NG I NE E RI NG D RAW I NG IS THE PR O P RI E TAR Y P RO P ER TY O F CO MP AL E L E CTR O NI CS , I NC . AND CO NTAI NS CONFIDENTSSIAiizLe DocumentNumber
AND TR AD E SE CR ET I NF O R MATI O N. THI S S HE ET MAY NO T BE TR ANS F E RE D F R O M THE CUS TO D Y OF THE C O MP E TE NT DIVISION OF R& D Rev
DE P AR TME NT EX CE P T AS AUTHO R I Z E D BY CO MP AL EL ECTR O NI CS , I NC . NE I THE R THI S SHE E T NO R THE I NF O R MATI O N IT C O NTAI NS Custom
MAY BE US E D BY OR DIISCLOSED TO ANY THI R D P AR TY W I THO UT P R I O R W RI TTE N C O NS E NT OF CO MP AL EL E CTR O NI C S , I NC . CSL50 / CSL52 v0.3
5 4 3 2 1
Eletro-XTechnical25
Eletro-XTechnical26
5 4 3 2 1
+3VL +3VALW _EC
<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,36,39,40,52,55>
+3VS
+3VS LK1 SM01000Q 500
S SUPPRE_ TAI-TECH HCB1005KF-221T15 0402
+3VALW _EC
EC Board ID (UMA, DIS, phase) control table
1 2 +3VALW _EC 1 2 +EC_VCCA
KBL-U KBL-R
6 K
0.1U_0201_10V
6 K
0.1U_0201_10V
+3VALW _EC
RK1 0_0603_5% 1 1 1 RK4
CK1
CK2
<22,45> +3VALW _EC
2
RK2
<13,39,46,47,48> +3VL +3VL
CK3 100K_0402_1% DB SI PV MV DB SI PV MV
2 2 2 0.1U_0201_10V6K UMA 15K 27K 43K 75K 130K 200K 270K 430K
ECAGND
1
BOARD_ID DIS 20K (0x0 2)
(0x03) 33K 56K
(0x04 )
(0x05)
(0x06)
(0x07) 100K (0x08)
(0x09) 160K (0x0A)
(0x0B) 240K 330K(0x0C)
(0x0D)
(0x0E)
(0x0F) 560K (0x10)
(0x11)
+3V_EC_VDD +3VL
+3V_LID
2
U_PX@ U_UMA@
D
2
ESD@
1 PLT_RST#
1 RK3 2 RK4
56K +-1% 0402
RK4
43K +-1% 0402 U_DB_UMA_15kohm:SD034150280,S RES 1/16W 15K+-1%0402 Reserve EC_CLR_CMOS for clear CMOS D
CK4 0.1U_0402_25V6 0_0402_5% SD034560280 SD034430280 U_DB_DIS_20kohm:SD034200280,S RES 1/16W 20K +-1% 0402 (2016-03-04 ::::ConfirmintelplatformnotsupportECClearCMOSfunction)
U_SI_UMA_27kohm:SD034270280,SRES 1/16W 27K +-1% 0402(2017-10-05 : 2018OPP Add EC Clear CMOS function)
U_SI_ DIS_33kohm:SD034330280,S RES 1/16W 33K +-1%0402
R_PX@ R_UMA@
111
125
U_PV_UMA_43kohm:SD034430280, S RES 116W 43K +-1% 0402 RK106 1 2 0_0402_5% CLR_CMOS# <9>
67
22
33
96
1
UK1
9
RK4 RK4 U_PV_ DIS_56kohm:SD034560280,S RES 1/16W 56K +-1%0402
330K +-1% 0402 270K +-1% 0402 U_MV_UMA_75kohm:SD034750280, S RES 1/16W 75K +-1% 0402
VCC0
VCC_LPC
AVCC
1
U_MV_ DIS_100kohm:SD034100380,S RES 1/16W 100K+-1%0402
VCC
VCC
VCC
VCC
SD034330380 SD00000G280 @
@ D
RK7 2 1 330K_0402_5% EC_RST# EC_CLR_CMOS 2 Q51
+3VALW _EC Pin111:VCC0
T OUCH_ON G 2N7002K_SOT23-3
T2403 TP@ 1 GATEA20/GPIO00 EC_VCCST_PG/GPIO 0F 21 EC_VCCST_PG_R EC_VCCST_PG_R <9,40>
2
@1 2 EC_KBRST # R_DB_UMA_130kohm:SD034130380,S RES 116W 130K+-1%0402 S SB00000 EN00
<7> EC_KBRST# 2 KBRST#/GPIO01 BEEP#/GPIO10 23 EC_BEEP# <32> R_DB_ DIS_160kohm:SD034160380, S RES 116W160K+-1%0402 R483
CK5 0.1U_0402_16V7K SERIRQ 3 SERIRQ
<7,35> SERIRQ EC_FAN_PW M/GPIO12 26 EC_FAN_PW M1 EC_FAN_PW M1 <36>
3
LPC_FRAME# AC_OFF/GPIO13 27 EC_CLR_CMOS @ 10K_0402_5%
<7> LPC_FRAME# LPC_AD3
4 LPC_FRAME# PW MOutput R_SI_UMA_200kohm:SD034200380, SRES 1/16W 200K+-1% 0402
5 LPC_AD3 R_SI_DIS_240kohm:SD000001B80,S RES 116W 240K+-1%0402
<7> LPC_AD3 LPC_AD2
7 LPC_AD2
1
<7> LPC_AD2 LPC_AD1 R_PV_UMA_270kohm:SD00000G280, S RES 1/16W 270K +-1% 0402
8 LPC_AD1 B/I#
<7> LPC_AD1 LPC_AD0 VCIN1_BATT_TEMP/AD0/GPIO38 63 B/I# <46> R_PV_DIS_330kohm:SD034330380,S RES 1/16W 330K+-1%0402
10 LPC_ADL0 PC &MISC
CLK_PCI_LPC
<7> LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 64 ADP_I
CLK_PCI_LPC 12 ADP_I/AD2/GPIO3A 65 ADP_I <45,47>
<7> CLK_PCI_LPC 13 CLK_PCI_EC ADInput AD_BID/AD3/GPIO3B 66
BOARD_ID
ADP_ID
PLT_RST#
1 2 1 2
<9,19,29,30,31,35> PLT_RST#
EC_RST# 37 PCIRST #/GPIO 05 AD4/GPIO42 75 ADP_ID <45>
EC_PME#_ EC_R R5178 1 2
CK9 RK109 22_0402_5% 20 EC_RST# AD5/GPIO43 76 EC_PME# <29>
EC_SCI# 0_0201_5% VR_HOT# 1 2 0_0402_5% PROCHOT# <5>
<5> EC_SCI# EC_SCI#/GPIO0E <52> VR_HOT#
22P 50V J NPO 0402 EMI@ 1@2 PM_CLKRUN#_R 38 RK8
<7> PM_CLKRUN# CLKRUN#/GPIO1D
EMI@ RK10 1 @ 2 0_0402_5%
<9,30> EC_PCIE_W AKE# RK6 68
0_0402_5%
DA0/GPIO3C 70 NMI_DBG# KBL_ON# <34>
<34> KSI[0..7] DAOutput EN_DFAN1/DA1/GP IO3D 71 D
1
KSI0 55 VR_PW RGD
KSI1 56 KSI0/GPIO30 DA2/GPIO3E VR_PW RGD <52>
72 EC_MUTE# H_PROCHOT#_EC 2
KSI2 57 KSI1/GPIO31 DA3/GPIO3F EC_MUTE# <32> G
KSI3 58 KSI2/GPIO32 83 @QK1 S
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1 /GPIO 4 A 84 2N7002_SOT23-3
C 60 KSI4/GPIO34 USB_EN#/PSDAT 1/GPIO4B 85 VR_ON SB00000 EN 00 C
KSI5
3
61 KSI5/GPIO35 PSCLK2/GPIO4C 86 VR_ON <40,52>
1 @ 2 VCIN1_ACOK_R KSI6
<47> VCIN1_ACOK
R4958 0_0402_5% KSI7 62 KSI6/GPIO36
PS2Interface PSDAT 2/GPIO 4D 87 TP_CLK LAN_PW R_EN <29>
<34> KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <34>
KSO0
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <34>
KSO1 RK91 2 0_0402_5%
KSO2 41 KSO1/GPIO21
1 2 VCIN1_AC_IN_R KSO3 42 KSO2/GPIO22 97 ENBKL +3VALW
KSO4 43 KSO3/GPIO23 ENKBL/GPXIOA00 98 ENBKL <5>
R5094 0_0402_5%
44 KSO4/GPIO24 Int. K/B W OL_EN/GPXIOA01 99 ME_FLASH_ EN W L_PW REN_EC# <30>
KSO5 T P_CLK RK12 1 2 4.7K_0402_5%
45 KSO5/GPIO25 ME_EN/GPXIOA 02 109 VCIN0_PH ME_FLASH_EN <8>
KSO6
46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45>
KSO7 T P_DAT A RK13 1 2 4.7K_0402_5%
KSO8 47 KSO7/GPIO27
VCIN1_AC_IN 1 @ 2 VCIN1_AC_IN_R R4960 KSO9 48 KSO8/GPIO28 SPI DeviceInterface
119
49 KSO9/GPIO29 MISO/GPIO5B 120 EC_SPI_ SO <7>
0_0402_5% KSO10
50 KSO10/GPIO 2A MOSI/GPIO5C 126 EC_SPI_SI <7> +3VL
KSO11 EC_SPI_CLK
51 KSO11/GPIO 2B
SPI FlashROM SPICLK/GPIO58 128
For Solve tPCH04(Min 9ms) Sequence Timing KSO12
KSO13 52 KSO12/GPIO 2C SPICS#/GPIO 5A EC_SPI_CS 0# <7>
KSO14 53 KSO13/GPIO 2D RP12
KSO15 54 KSO14/GPIO 2E 73 8 1
81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 SYS_PW ROK TS_GPIO_EC <27> PLT _RST # 7 2
KSO16
82 KSO16/GPIO48 SYS_PW ROK/AD7/GPIO 41 89 EC_S0IX_ EN SYS_PW ROK <9> EC_ON 6 3
KSO17
KSO17/GPIO 49 GPIO50 90 EC_S0IX_ EN <12> PCH_PW R_EN 5 4
BAT_CHG_LED
BATT_CHG_LED#/GPIO52 91 CAP_LOCK# BAT_CHG_LED <45>
CAPS_LED#/GPIO53 92 PW R_LED# CAP_LOCK# <34>
77 GPIO 100K_0804_8P4R_5%
<46,47> EC_SMB_CK 1 PW R_LED# <39>
78 EC_SMB_CLK 1/GPIO 44 PW R_LED#/GPIO54 93
<46,47> EC_SMB_DA 1 BATT_LOW _LED#/GPIO55 ACIN <9>
RK15 1 2 0_0402_5% EC_SMB_CK 2_R 79 EC_SMB_DAT 1/GPIO 45 95 SYSON PBTN_OUT# R295 1 @ 2 1K_0402_5%
<7,10,22> EC_SMB_CK 2 SYSON/GPIO 56
RK16 1 2 0_0402_5% EC_SMB_DA 2_R 80 EC_SMB_CLK 2/GPIO 46 121 BT_ON_EC SYSON <12,40,49>
<7,10,22> EC_SMB_DA 2 EC_SMB_DAT 2/GPIO 47 VR_ON/GPIO57 127 BT_ON_EC <30>
PCH_DPW ROK EC_CLR_CMOS 1 @ 2 RK107
DPW ROK_EC/GPIO59 PCH_DPW ROK <9>
10K_0402_5%
SMBus +3VALW _EC
PM_SLP_S3# PCH_RSMRST#
+5VS <9,12,40> PM_SLP_ S 3 # PM_SLP_S5#
6 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA 03 100 USB_ON#
PCH_RSMRST# <9>
LID_SW #
<9> PM_SLP_ S 5 # 14 GPIO07 GPXIOA04 101 USB_ON# <38,39>
RK18 2 @ 1 47K_0402_5%
SUSACK# VCIN1_PH
B <9> SUSACK# 15 GPIO08 VCIN1_ADP_ PROCHOT/GPXIOA 05 102 VCIN1_PH <45>
+3V_SMBUS
B
PM_SLP_ SUS# 16 H_PROCHOT#_EC
<9> PM_SLP_ SUS#
PCH_SUSW ARN# GPIO0A VCOUT 1_PROCHOT#/GPXIOA06 103
MAINPW ON
<9> PCH_SUSW ARN# 17 GPIO0B VCOUT 0_MAIN_ PW R_ON/GPXIOA 07 104 MAINPW ON <48> EC_SMB_CK 1 8 1 RP11 +3VS
EC_BKOFF#
RK28 18 GPIO0C BKOFF#/GPXIOA08 105 RK25 1
EC_BKOFF# <27>
2 0_0402_5% EC_SMB_DA 1 7 2
2 19 AC_PRESENT/GPIO 0D GPIOGPO GPXIOA09 106 DGPU_PW R_EN <10,24>
EC_SMB_CK 2
1 MUTE_LED_OUT MUT E_LED_IN 25 PW M2/GPIO11 PCH_PW R_EN 6 3
<32> MUTE_LED_IN
FAN_SPEED1 PCH_PW R_EN/GPXIOA 10 107 PCH_PW R_EN <40,51> EC_SMB_DA 2 5 4
28 FAN_SPEED1 /GPIO 14 +1.0VS_PG
<36> FAN_SPEED 1 VCIN1_ACOK_R PW R_VCCST_PG/GPXIOA 11 108 +1.0VS_PG <50>
100K_0402_5% 29 FANFB1/GPIO15
E51T XD_P80D AT A 2.2K_0804_8P4R_5%
<30> E51TXD_P80DATA 30 EC_TX/GPIO16
E51RXD_P80CLK 110 VCIN1_AC_IN_R
RK26 <30> E51RXD_P80CLK 31 EC_RX/GPIO 17 VCIN1_AC_IN/GPXIOD01
PCH_PW ROK 112 EC_ON
<9> PCH_PW ROK 32 PCH_PW ROK/GPIO18 ALW_PWE_EN EC_ON/GPXIOD 02 EC_ON <39,48>
2 1 E51TXD_P80DATA AC_LED# 114 ON/OFF# EC_SCI# RK14 2 1 10K_0402_5%
<45> AC_LED# 34 SUSP_LED#/GPIO19
ON/OFF#/GPXIOD03 115 ON/OFF# <39>
<34> MUTE_LED_OUT 36 NUM_LED#/G PIO 1A GPI LID_SW #/GPXIOD04 LID_SW #
LID_SW # <39>
100K_0402_5% 116 SUSP#
SUSP#/GPXIOD 05 117 VCIN1_AC_IN SUSP# <12,40,49>
GPXIOD06
PECI/GPXIOD07 118 EC_PECI RK17 1 2 43_0402_1%
H_PECI <5>
PBT N_OUT # 122 PBT N_OUT #/GPIO5D SYSON RK23 1 @ 2 100K_0402_5%
<9> PBTN_OUT#
PM_SLP_ S4# 123 +V18R
<9,12,40,49> PM_SLP_ S 4 # PM_SLP_ S4#/GPIO 5E V18R/VCC_IO2 124 +3VALW _EC
1
CK8 SUSP# RK27 1 2 100K_0402_5%
AGND
GND
GND
GND
GND
GND
1 @ 2 PCH_PW ROK 4.7U_0402_6.3V6M

RK20 100K_0402_5% KB9022QD_ LQFP 128 _14 X14 2
11
24
35
94
69
113
1 2 MUTE_LED_IN
RK108 10K_0402_5%
20mil
EC_SPI_CLK RC369 1 2 HOST_SPI_0_CLK_R
SA000075S30 EMI@ 15_0402_5% HOST_SPI_0_CLK_R <7,35>
LK2 SM01000Q 500
ECAGND 2 1
CC144 22P
TAI-TECH HCB1005KF-221T15 0402 CC128 RC369 place nearECSide 50V J NPO 0402
@EMI@
+3VALW _EC
ECAGND <45>
A EMI request A
1
RK21
10K_0402_5%
2
NMI_DBG# 1 2
NMI_DBG#_CPU <5,10>
Security Classification Compal SecretData Compal Electronics,Inc.
Issued Date 2017/04/10 Deciphered Date 2019/12/15 T itle
DK2 SCS00000Z00
RB751V-40 SOD-323
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9022
Eletro-XTechnica
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&SDizeDocument Number
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY
BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CSL50 / CSL52
Date: Tuesday, January 09, 2018 Sheet 33 of 59
5 4 3 2 1
Eletro-XTechnical26
Eletro-XTechnical27
<7,13,29,30,33,35,40,48,49,50,51> +3VALW +3VALW
<12,37,38,39,40,48,49,52,53>+5VALW +5VALW
TP Button BD Connector
+3VALW
CONN@
<33>KSI[0..7] KSI7
KSI6
Keyboard conn
JTP
1 KSI5
1 KSI4
<33> TP_CLK 2
2 KSI3
<33> TP_DATA 3 3 CONN@
4 KSI2 JKB
4 KSI1
5 KSI1 32
<7> TP_SMBCLK 5 G1 7 KSI0 32 G2
34
KSI7 31
<7> TP_SMBDATA 6 6 G2 8 31 G1
33
KSI6 30
PS2+SMBus ACES_51524-0060N-001 KSO9 29
30
29
SP010014M10 KSI4 28
28
KSI5 27
<33> KSO[0..17] KSO17 27
3
1 1 KSO0 26
26
DM5 @ @ KSO16 JKB1 KB Spec KSI2 25
KSO15 25
PESD5V0U2BT 3P CCSOT23ESD C135 C136 KSI3 24
KSO14 24
SCA00000T00 Pin1 KSI1 KSI1 KSO5 23
23
ESD@ 2 2 KSO13 KSO1 22
KSO12 22
Pin32 5V 5V KSI0 21 21
470P_0402_50V8J
470P_0402_50V8J
KSO11 KSO2 20 20
KSO10 KSO4 19
KSO9 19
KSO7 18 18
KSO8
1
KSO8 17 17
KSO7 KSO6 16
KSO6 16
KSO3 15 15
KSO5 KSO12 14
KSO4 14
KSO13 13 13
KSO3 KSO14 12
KSO2 12
KSO11 11 11
KSO1 KSO10 10
KSO0 10
KSO15 9 9
KSO16 8 8
R203 KSO17 7 7
1K_0402_5% 6 6
1 2 +5VS 5
<33>CAP_LOCK# CAP_LOCK# CAP_LOCK#_R 5
1 2 MUTE_LED_OUT_R 4 4
<33>MUTE_LED_OUT
+5VALW +5VS R207 3 3
549_0402_1% 2 2
1 1
+5VS
1
R23 ACES_50690-0320N-P01
100K_0402_5% CAP_LOCK# SP01001RG00
Q9 +5VS_KBL MUTE_LED_OUT
3
S
2
2 G
<33>KBL_ON# ESD@
ACES_51575-00401-001 KSI0 C193 2 1 100P_0402_50V8J
1 1
1
D
4 4 G2 6
0.047U_0402_16V7K
1 PJ2301 1PSOT23-3 3 3 G1 5 CC122 CC123

@ SB00000T900 2 2 2 100P_0402_50V8J 2100P_0402_50V8J
1 1 ESD@ ESD@
C68
2 JKBL
SP01002BY00

2017/08/24 2018/08/24 Title
Eletro-XTechnica THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
KB/TP
Rev
Eletro-XTechnical28
4 3 2 1
5
+3VALW +3VALW <7,13,29,30,33,34,40,48,49,50,51>
D Screw Hole D
TPM2.0 UT1
+3VS_TPM +3VALW
H1 H2
H_2P4N H_3P0
H4
H_3P0
CPU
H8 H9 H10 H11H_5P0
H_5P0 H_5P0H_5P0
TPM@
1 TPM@ 2 PLT_RST#_TPM17 RST# RC9341 2 0_0402_5%
<9,29,30,31,33>PLT_RST# R28 0_0402_5% VDD 1 @ @ @ @ @ @ @
8
VDD
1
1 TPM@ 2 TPM_SERIRQ 2
<7,33>SERIRQ 18 PIRQ# VDD 2 1 1 1 1
1
R5202 0_0402_5% CT1 CT3 CT4 CT2
RT6 1 2 HOST_SPI_0_CLK_R_TPM19 SCLK
<7,33> HOST_SPI_0_CLK_R
TPM@ 33_0402_5% NC 3
NC 4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
RT7 1 2 HOST_SPI_0_CS2#_TPM20 CS# 2 2 2 2
<7> HOST_SPI_0_CS2# TPM@ 33_0402_5% NC 510
NC
<7> HOST_SPI_0_SI
RT8 1 2 HOST_SPI_0_SI_TPM21
MOSI NC 11
TPM@ 33_0402_5% NC 12 TPM@ TPM@ TPM@ TPM@ H13 H14 H16 H17 H18 H19
<7> HOST_SPI_0_SO
RT9 1 2 HOST_SPI_0_SO_TPM 24
MISO NC 13 H_2P3H_3P3 H_2P3 H_2P4X2P9NH_6P0N H_6P0N
TPM@ 33_0402_5% NC 14
+3VS_TPM 2 1 TPM_GPIO 6 GPIO NC 15
RT10 TPM@4.7K_0402_5% @ @
NC 16 @ @ @ @
1
1@2 TPM_PP 7 NC 25
PP
1
RT35 4.7K_0402_5% NC 26
2 NC 27
9GND
23 GND NC 28
1
32 GND NC 29
RT12
33 GND NC 30
C 4.7K_0402_5%
PAD NC 31 FD1 FD2 FD3 FD4 C
TPM@
TPM@
SLB9670VQ1.2FW6.40_VQFN32_5X5 @ @ @ @
2
1
SA00009N230
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
JESDJUMP@
1 2
1 2
JUMP_43X39
B B
A A

TPM/Screw
v0.3
Eletro-XTechnical28
5 4 3 2 1
Eletro-XTechnical29
B C D E
A
+5VS
1A 40 mils +3VS
1
R5177
1 Rshort@2+FAN1
L Layout notes
C4801 C5214 close to CONN CONN@ 1
JFAN
1
0_0603_5% RE50
6 GND2
10K_0402_5% 5 GND1
1 1
10U_0603_10V6M
C4801
0.1U_0402_16V7K
C5214
+FAN1 44
Close to Connector
2
33
<33> FAN_SPEED1 22
2 2 1 <33> EC_FAN_PWM1
CE24 11
0.01U_0402_25V7K
ACES_50271-0040N-001
2 SP02000TS00
+FAN1
RE51
1 @ 2 EC_FAN_PW M1
10K_0402_5%
2 2
3 3
4 4

2017/08/24 2018/08/24
Eletro-XTechnica IssuedDate DecipheredDate
Title
FAN
Eletro-XTechnical29
A B C D E
Eletro-XTechnical30
4 3 2 1
5
<27,28,32,33,34,36,40>+5VS +5VS
2.5" SATAHDD <12,34,38,39,40,48,49,52,53> +5VALW
<7,13,29,30,33,34,35,40,48,49,50,51> +3VALW
+5VALW
+3VALW
D D
<PV> change shortpad
CONN@
+5VS JHDD
*Design Constraint:AC capacitors to be placed as close 1
as possible to theconnector.
Maximum distance from AC capacitors to connector is 500
+5VS_HDD1 2 1
32
mils.
R201 1 Rshort@20_0603_5% <11> SATA_CTX_DRX_P0 C155 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P0
+5VS_HDD1 C156 1 2 0.01U_0402_16V7K 3
<11> SATA_CTX_DRX_N0 SATA_CTX_C_DRX_N0 44
R202 1 Rshort@20_0603_5% 5
C153 1 2 0.01U_0402_16V7K 5
<11> SATA_CRX_DTX_N0 SATA_CRX_C_DTX_N0 6 6
C154 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P0 7 7
<11> SATA_CRX_DTX_P0
8 8
2 9 GND
10 GND
C140
1 470P_0402_50V8JACES_51524-00801-001
EMI@ SP01001A910
C C
SATAODD
+5VALW
1
ROD1
100K_0402_5%
2
JODD
1
D +5VS_ODD
1
S1
2 QOD2 ROD2 <11> SATA_CTX_DRX_P1 CS11 2 1 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 S2 GND
<10>ODD_PWR G CS14 2 1 0.01U_0402_16V7K S3 A+
2N7002K_SOT23 1K_0402_5% <11> SATA_CTX_DRX_N1 SATA_CTX_C_DRX_N1
S SB00000EN00 COD1 S4 A-
S5 GND
3
2 1 CS15 2 1 0.01U_0402_16V7K SATA_CRX_C_DTX_N1

+5VS_ODD <11> SATA_CRX_DTX_N1 S6 B-
CS18 2 1 0.01U_0402_16V7K
22
<11> SATA_CRX_DTX_P1 SATA_CRX_C_DTX_P1

0.047U_0402_16V7K S7 B+
ODD_PLUG#_R GND
80mil 80mil 1Rshort@2
G
3 1 <11>ODD_PLUG# 0_0402_5% 1 Rshort@2ODD_DA#_R R5193

+5VS R5192
<10>ODD_DA# 0_0402_5% P1
S
B P2 DP B
1 1 1
QOD1 @ P3 +5V
COD2
10U_0603_6.3V6M
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
COD
COD
PJ23011PSOT23-3 P4 +5V
SB00000T900 P5 MD 1
2 2 2 1 P6 GND GND 2
2@ 1 GND GND
ESD@
ROD3 0_0805_5% CS7
2 0.1U_0402_16V7K SDAN_603010-013041
SP010029L00
3
SDAN_603010-013041_13P
CONN@
A A

HDD/ODD Conn
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIIzAeLDocumentNumber Rev
Custom v0.3
Eletro-XTechnical30
5 4 3 2 1
A B C D E
Eletro-XTechnical3 < 11>USB3_CTX_DRX_N1

2 1 USB 3_CTX_C_DRX_N1 1
RS 2 EMI@ 0_0402_5%
2 USB3_CTX_L_DRX_N1
<12,24,34,37,39,40,48,49,52,53> +5VALW +5VALW
CS2 0.1U_0402_16V7K
2
RG75
@ 150_0402_5% +USB_VCCA
+5VALW
US1 W =100mils
1
W =100mils OUT
1
RS1 EMI@ 0_0402_5% 1 5
IN
150U_B2_6.3VM_R45M
2 1 USB3_CTX_C_DRX_P1 1 2 USB3_CTX_L_DRX_P1 2
<11> USB3_CTX_DRX_P1 GND 1 @
1000P_0402_50V7K
CS1 0.1U_0402_16V7K CS3 4
47U_0805_6.3V6M
1
0.1U_0402_16V7K
EN 1 1 +
CS 6
2 0.1U_0402_16V7K 3
CS22
OCB CS 5 CS28
CS 4
RS 6 EMI@ 0_0402_5% 1 EMI@ 390P_0402_50V7K
21
2 USB3_CRX_L_DTX_N1 EM5203J-20 SOT23 5P LOAD SW ITCH 2 2 2 2 EMI@
< 11>USB3_CRX_DTX_N1
SA00008RA00
1 1
2
RG76 USB_ON# 1 2
< 33,39> USB_ON#
@ 150_0402_5% RS 4 Rshort@ 0_0402_5%
1
RS 3 EMI@ 0_0402_5% 1
2 USB3_CRX_L_DTX_P1
<11> USB3_CRX_DTX_P1
USB2.0/USB3.0 port 1
RS 47 @EMI@ +USB_VCCA
1 2 JUSB1
0_0201_5% DM2 ESD@ 1
USB20_N1_R VBUS
USB3_CTX_L_DRX_P1 11 10 9 USB3_CTX_L_DRX_P1 2
D-
SM070005U00 DLM0NSN900HY2D_4P 1 USB20_P1_R 3
D+
1 22 USB20_P1_R USB3_CTX_L_DRX_N1 22 9 8 USB3_CTX_L_DRX_N1 4
< 11> USB20_P1 USB3_CRX_L_DTX_N1 GND1
5
USB3_CRX_L_DTX_P1 SSRX-
USB3_CRX_L_DTX_P1 4 4 7 7 USB3_CRX_L_DTX_P1 6
SSRX+ GND3
10
4 3 USB20_N1_R 7 GND2 GND4 11
< 11>USB20_N1
LM3 4 3 USB3_CRX_L_DTX_N1 55 6 6 USB3_CRX_L_DTX_N1 USB3_CTX_L_DRX_N1 8 SSTX- GND5 12
EMI@ USB3_CTX_L_DRX_P1 9 SSTX+ GND6 13
RS 48 @EMI@ 33
1 2 ACON_TARAW -9U1395_9P-T
0_0201_5% 8 DC231709285
USB2.0ChokePart:
Main:SM070005U00,S COM FI_MURATADLM0NSN900HY2D(MURATA) DT1140-04LP-7 U-DFN2510-10 CONN@
2nd:SM070004X00,S COMFI_PANASONICEXC14CE900U(PANASONIC)
SC300005M00
2 2
DM1
USB20_P1_R 6 I/O4 I/O2 3 USB20_P2_R
USB2.0ChokePart:
Main:SM070005U00,S COM FI_MURATADLM0NSN900HY2D(MURATA)
2nd:SM070004X00,S COMFI_PANASONICEXC14CE900U(PANASONIC)
RS 49 @EMI@ +USB_VCCA 5 VDD GND 2

1 2
0_0201_5%
SM070005U00 DLM0NSN900HY2D_4P
USB20_N1_R 4 1 USB20_N2_R
I/O3 I/O1
1 22 USB20_P2_R
< 11> USB20_P2 1 AZC099 -04S.R7G_SOT23 -6
SC300001G00
4 3 USB20_N2_R
< 11>USB20_N2 4 3
LM5
EMI@
RS50 @EMI@
1
0_0201_5%
2
USB2.0/USB3.0 port 2
RS 8 EMI@ 0_0402_5% 1 +USB_VCCA
2 1 USB3_CTX_C_DRX_N2 2 USB3_CTX_L_DRX_N2
< 11>USB3_CTX_DRX_N2
CS23 0.1U_0402_16V7K JUSB2
1
USB20_N2_R VBUS
2
USB20_P2_R D-
RG106 3
D+
@ 150_0402_5% 4
USB3_CRX_L_DTX_N2 GND1
5
USB3_CRX_L_DTX_P2 SSRX-
6 10
SSRX+ GND3
1
2
11
7 GND2 GND4
RS 7 EMI@ 0_0402_5% 1 USB3_CTX_L_DRX_N2 12
8 SSTX- GND5
2 1 USB3_CTX_C_DRX_P2 2 USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P 2 13
<11> USB3_CTX_DRX_P2 9 SSTX+ GND6
CS24 0.1U_0402_16V7K
ACON_TARAW -9U1395_9P-T
DC231709285
RS 10 EMI@ 0_0402_5% 1
2 USB3_CRX_L_DTX_N2 CONN@
3 3
< 11>USB3_CRX_DTX_N2 DM14 ESD@
USB3_CRX_L_DTX_N2 11 10 9USB3_CRX_L_DTX_N2
USB3_CRX_L_DTX_P2 22 9 8 USB3_CRX_L_DTX_P2
2
RG107
@ 150_0402_5% USB3_CTX_L_DRX_N2 44 7 7 USB3_CTX_L_DRX_N2
USB3_CTX_L_DRX_P2 55 6 6 USB3_CTX_L_DRX_P2
1
RS 9 EMI@ 0_0402_5% 1 33
2 USB3_CRX_L_DTX_P2
<11> USB3_CRX_DTX_P2 8
DT1140-04LP-7 U-DFN2510-10
SC300005M00
USB3.0ESDPart:
Main:SC300005M00, S DIO(BR) DT1140-04LP-7U-DFN2510-10(DIODES))))
2nd:SC300003Z00, SDIO(BR)PUSB3F96DFN2510A-10ESD(NXP)
3rd:SC300005N00, SDIO(BR)L02U5V0NA-4CSLP2510P8(LITE ON)
4 4

Eletro-XTechnica
Issued Date 2017/08/24 Deciiphered Date 2018/08/24 Title
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTSIiiAzeeLDocumentNumber
USB 3.0/2.0 conn
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY v0.3
BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. CSL50 / CSL52
A B C D E
Eletro-XTechnical3
Eletro-XTechnical32
A B C D E
+3V_LID
+3VL <13,33,46,47,48> +3VL +3VL
Power Button Switch <12,24,34,37,38,40,48,49,52,53> +5VALW +5VALW
1
R215 <6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,33,36,40,52,55> +3VS +3VS
100K_0402_5% SW1 SN10000CU00
G2
Q4108 <7,13,29,30,33,34,35,40,48,49,50,51,55> +3VALW +3VALW
SW TJG-533KQRH SPST DIP H1.55 6P
2
<33> ON/OFF# ON/OFF# 1 3 ON/OFF#_R 1 3
S
2 4
2N7002K_SOT 23-3
L Layout notes SB00000EN00 @
6
5
JP6
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED )
12
JP6 place Bottom layer SHORT PADS
EMI@ C139 470P_0402_50V8J
1 1
12
CONN@
JIO
1
ESD Diode +5VALW
2
3
1
2
LID_SW# 3
4
4
5
5
ON/OFF#_R +3VS 6
6
7
8 7
3
USB20_N4_R
USB20_P4_R 9 8
Cardreader 10 9
ESD@
D1 USB20_N3_R 11 10
SCA00001B00 USB20_P3_R 12 11
USB2.0( on small BD) 13 12
AZ5123-02S.R7G 3P CASOT23 <33,38> USB_ON#
14 13
15 14
<11> SATA_LED#
16 15
<33> PWR_LED#
17 16
1 1 18 17
1
18
EMI@ EMI@
C138 C137 19
G1 20
2 2 G2
Lid Switch (Hall Effect Sensor) CVILU_CF31181D0R4-10-NH
470P_0402_50V8J
470P_0402_50V8J
SP011411241
RB751V-40 SOD-323
+3V_LID
+3VL +3V_LID
1
DH2 R126
4.7K_0402_5% RS51@EMI@
1 2
2 LM4 0_0201_5% 2
2
U4018 EMI@
12
3 LID_SW#_OUT 1 2 44 33 USB20_N3_R
OUT LID_SW# <33> <11> USB20_N3
2 R5197
VDD 1 0_0402_5% 3.3P_0402_50V8J CC152
GND 1 1
8J
V
10P_0402_50
1 1 2 2 USB20_P3_R
<11> USB20_P3
C19
8J
V
100P_0402_50
C5228
1 APX8131AI-TRG SOT-23
SA00009EM00 EMI@
C18 SM070005U00 DLM0NSN900HY2D_4P
2 2 ESD@ RS52 @EMI@
0.1U_0201_10V6K 1 2
2 0_0201_5%
RS53 @EMI@
1 2
0_0201_5%
LM6 EMI@
+3V_LID 44
<11> USB20_N4 33 USB20_N4_R
3.3P_0402_50V8J CC154
+3VL 1 22 USB20_P4_R
2
<11> USB20_P4 1
R13
EMI@
DB@ 470K_0402_5% SM070005U00 DLM0NSN900HY2D_4P
RS54 @EMI@
2
Q32 1 2
G
0_0201_5%
3 1
DB@
S
2N7002K_SOT23-3 +3V_LID
SB00000EN00
+3V_LID
U4019
2
LID_SW#_OUT R125
1 CP VCC 8
3 DB@ 10K_0402_5% 3
2 1 R124
10K_0402_5% 2D PR# 7
1
DB@ 3 Q# CLR# 6
4 GND Q5
NL17SZ74USG US 8P FLIP-FLOP
SA00003ML00
DB@
DH3DB@ RB751V-
40 SOD-323
2 1
+3V_SMBUS
2 1
+3VL
DH4
RB751V-40 SOD-323
2 1
<33,48> EC_ON
DH5
RB751V-40 SOD-323
4 4
Eletro-XTechnica Security Classification Compal Secret Data Compal Electronics, Inc.

2017/08/24 2018/08/24 T itle
Issued Date Deciphered Date
IOCON
THIS S HE E T OF E NGINE E RING DRA W ING IS THE P ROP RIE TA RY P ROP E RTY OF COM P A L E LE CTRONICS , INC. A ND CONTA INS CONFIDENSSTiIzAeLDocument Number
A ND TRA DE S E CRE T INFORM A TION. THIS S HE E T M A Y NOT BE TRA NS FE RE D FROM THE CUS TODY OF THE COM P E TE NT DIVISION OF R& D Rev
DE P A RTM E NT E X CE P T A S A UTHORIZE D B Y COM P A L E LE CTRONICS , INC. NE ITHE R THIS S HE E T NOR THE INFORM A TION IT CONTA INS Custom v0.3
M A Y BE US E D BY OR DIS CLOS ED TO A NY THIRD P A RTY W ITHOUT P RIOR W RITTE N CONS E NT OF COM P A L E LE CTRONICS , INC. CSL50 / CSL52
Eletro-XTechnical32
A B C D E
Eletro-XTechnical33
B C D E
A
+3VS +3VS <6,7,9,10,11,13,17,18,27,28,29,30,31,32,33,36,39,52>
+5VS +5VS <27,28,32,33,34,36,37>
+3VS
+5VALW
1
+3VALW
10U_0603_6.3V6M
C570
Q21
1 VR_ON <33,52>
14
2 VIN1 VOUT1 13 2
+5VALW VIN1 VOUT1
6
1 For meet tPLT17& tCPU28 powerdown sequence. 1
SUSP# 3 12 C557 1 2 680P_0402_50V7K @
ON1 CT1 tPLT17 : 1us(Max)
4 11 tCPU28: 1us(Max) 2
VBIAS GND Q5002A
5 10 C554 1 2 100P_0402_50V8J L2N7002SDW1T1G2NSC88-6
ON2 CT2
1
<12,33,49> SUSP# SB00001FF00
6 9
7 VIN2 VOUT2 +5VS +3VALW
8
VIN2 VOUT2
1 1 1
10U_0603_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6
15 @RF@ @ESD@
C575
CC140
CC163
GPAD
1
EM5209VF_DFN14_3X2 R5096
2 2 2 EC_VCCST_PG_R<9,33>
1 1 1 1 1 SA00007PM00 @ 100K_0402_1%
CC162
CC158
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
CC16
CC16
CC15
3
2
@ Q5002B
2 2 2 2 2
PM_SLP_S3_H 5 SB00001FF00
1
4
@ESD@ @ESD@ @ESD@ @ESD@ @ESD@
6
@
PM_SLP_S3# 2
<9,12,33> PM_SLP_S3# Q5003A
L2N7002SDW1T1G2NSC88-6 SUSP#
1
SB00001FF00
2 2
6
@
For +1.8V_PRIM Discharge For meet tPLT15 powerdownsequence(Un-Stuff) 2 Q5004A

tPLT15 :1us(Max) L2N7002SDW1T1G2NSC88-6
SB00001FF00
1
+5VALW +1.8V_PRIM
+3VALW
1
1
R5092 R5093
100K_0402_1% 22_0603_1%
1
SYSON<12,33,49>
R5095@
2
3
100K_0402_1%
@
2
Q5004B
Q5001B PM_SLP_S4_H 5 L2N7002SDW1T1G2NSC88-6
PCH_PWR_EN#5 L2N7002SDW1T1G2NSC88-6 SB00001FF00
3
SB00001FF00
4
@ Q5003B
4
3
2
5 SB00001FF00
<9,12,33,49> PM_SLP_S4#
6
4
Q5001A
2 L2N7002SDW1T1G2NSC88-6
3 <33,51> PCH_PWR_EN SB00001FF00 3
1
4 4

DC Interface
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSTiIzAeLDocument Number Rev
Eletro-XTechnical33
A B C D E
Eletro-XTechnical34
4 3 2 1
5
+19V_ADPIN EMIVGA@ PL12

+19V_VIN
5A_Z80_0805_2P
1 2
@ PJP1 EMI@ PL11

ACES_51483-00801-001 5A_Z80_08 05_2
D D
11 1 P @PR1
2
22 0_0402_5%
3 3 1 2ACIN_LED
1000P_0402_50V7K
<33> AC_LED#
0.022U_0402_25V7K
4
4
1000P_0402_50V7K
100P_0402_50V8J
55 6
1
ADP_SIGNAL
EMI@ PC2
EMI@ PC1
EMI@ PC3
EMI@ PC4
67
1
Charge_LED
78
21
21
21
ACIN_LED PR2
8
2
9 100K_0402_5%
10 GND
GND
2
PR3
10K_0402_5% PR4
ADP_SIGNAL1 2 750_0402_1%
ADP_ID <33> 1 2 Charge_LED
<33> BAT_CHG_LED
3
1
LUDZS3.6BT1G_SOD323-2
PR6
100P_0402_50V8J
1000P_0402_50V7K
1
100K_0402_5%
1
10K_0402_5%
PR5
PC6
2
@ PC5
PD3
2
ESD@ PD1 ESD@ PD2
2
1
2
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
C C
<33,47> ADP_I
+3VALW_EC
1
PR9 PR10
16.2K_0402_1% 5.9K_0402_1%
VCIN0_PH <33> VCIN1_PH <33>
12
12
PH1
100K_0402_1%_B25/504250K PR13
B 10K_0402_1% B
2
ECAGND <33>
2
A A

DCConn
Eletro-XTechnical34
5 4 3 2 1
Eletro-XTechnical35
4 3 2 1
5
D D
+3V_LID
@ PR18
0_0402_5% EMI@ PL13
1 2 5A_Z80_0805_2P
+12.6V_BATT +3V_LID +19VB
1 2
OCTEK_BTJ-08KPBR4B
10 +12.6V_BATT+
GND 9 EMI@ PL14
GND 8 5A_Z80_0805_2P
87 1 2
76 EC_SMB_CK1_R
100P_0402_50V8J
0.01U_0402_50V7K
65
1
1
EC_SMB_DA1_R
PC9
1.8K+-1%0805
@EMI@ PC10
54 +3V_LID_R EMI@ PC8 @EMI@ PR20
43 B/I#_R 470K_0402_5%
EMI@
1000P_0402_50V7K PC11
32
21
21
21
21
100P_0402_50V8J
PR19
21
1
2
2
@PJPB1
6
PR14
100_0402_5%
1 2
C EC_SMB_CK1 <33,47> 2 PQ2A C
PR15 L2N7002SDW1T1G2NSC88-6
100_0402_5%
3
1 2
EC_SMB_DA1 <33,47>
1
+3VL
1
5
1M_0402_5%
+3VL
PR21
1
PR16 PQ2B
4
100K_0402_5% L2N7002SDW1T1G2NSC88-6 @
PR17
2
100_0402_5%
1 2 2
B/I# <33>
B B
A A

BATTConn
Eletro-XTechnical35
5 4 3 2 1
Eletro-XTechnical36
B C D
Protection for reverse input
1
+19VB
2
G @ PQB2
2N7002KW_SOT323-3
CHG_N002
S
3
PRB2 @ @ PRB3
1
1M_0402_5% 3M_0402_5% 1
1 2 1 2
+19V_VIN +19VB_CHG
PQB11 P1 PQB12 P2
AON7506_DFN33-8-5 PRB1 PQB13
EMB04N03H_EDFN5X6-8-5 1 EMI@ PLB11 AON7506_DFN33-8-5
0.01_1206_1%
1 2 1UH_2.8A_30%_4X4X2_F
2 3 5 1 4 1 2 1
5 3 2
2 3 5 3
K
PCB25
10U_0805_25V6
4
21
+19V_VIN
0.1U_0402_25
PCB7
2200P_0402_50V
2200P_0402_50V
10U_0805_25V6K
@ PCB6
@EMI@ PCB8
10U_0805_25V6
PCB4
PCB5
0.01U_0402_50V
4
4
PCB9
2
2
2
21
21
21
1
1
1
3
2
V
6
7 K
7 K
PDB1
7 K
K
ACDRV_CHG_R BAS40CW _SOT323-3
BATDRV_CHG 1 2 BATDRV_CHG_R
0.1U_0402_25
0.1U_0402_25
PRB5
PCB1
PCB11
12
11
CHG_N003PCB12 4.12K_0603_1%
21
0.047U_0402_25V7K PQB1
21
PCB10 1 2 CHG_N001 AONH36334_DFN3X3A8-10
PRB6 10_1206_1%
10
0.1U_0402_25V6
V
V
6
6
1
D1 4
D1
PDB2 5 S2
PRB7
2.2_0603_5
2
RB751V-40_SOD323-2
2 6 S2 D1 3 2
D1 2
VCC_CHG
2
%
7 S2 +12.6V_BATT
D2/S1
UG_CHG
G1 1
BTST_CHG 2
1
PCB13 8 G2
REGN_CHG
PRB9
PRB10
4.12K_0603_
4.12K_0603_
1 2 PLB1 PRB11
UG_CHG
LX_CHG
9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0603_25V6K 1 2
ACP_CHG
ACN_CHG
LX_CHG 1 2 CHG 1 4
2
2
PCB14
1
1U_0603_25V6K 2 3
18
17
20
19
16
1
BTST
VCC
REGN
HIDRV
PHASE
21 PAD
EMI@PRB12
10U_0805_25V6
10U_0805_25V6
1 SRN_R
1 SRP_R
4.7_1206_5
PCB15
PCB16
1
1
LODRV 15 LG_CHG
0.1U_0402_25
0.1U_0402_25
1 ACN
PCB18
PCB17
2
2
%
1 SNUB_CHG 2
2 ACP GND 14
PRB13
K
2
2
10_0603_1%
V
V
6
6
CMSRC_CHG SRP1 2 SRP_R
3 CMSRC SRP 13
1
PUB1 PRB14
BQ24725ARGRR_QFN20_3P5X3P5 6.8_0603_1% PCB20
ACDRV_CHG SRN1 2 SRN_R
4 ACDRV SRN 12 .1U_0402_16V7K
680P_0402_50V7
EMI@ PCB19
2
1 2 5 ACOK BATDRV 11 BATDRV_CHG
+3VL PRB15
ACDET
100K_0402_1%
IOUT
SDA
SCL
ILIM
K
3 3
<33> VCIN1_ACOK
9
6
10
+3VL
ILIM_CHG 1 2
IOUT_CHG
ACDET_CHG
SDA_CHG
SCL_CHG
PRB16
1
453K_0402_1%
100K_0402_
PRB20
1
PRB17
422K_0402_1% PCB21
1 2 0.01U_0402_50V7K
+19V_VIN
%2
1
2
02_5% PRB19
0_0402_5% PRB18
1
1
2
2
@ 0_04
EC_SMB_CK1 <33,46>
@
1
0.22U_0402_16V
100P_0402_50V
PCB23
PRB21
66.5K_0402_1
PCB22
EC_SMB_DA1 <33,46>
21
2 1
@ PRB22
2
0_0402_5%
7 K
8J
1 2
ADP_I <33,45>
1
PCB24
4 4
0.1U_0402_25V6
Vin Dectector
2
Min. Typ Max.

L-->H 17.16V 17.63V 18.12V Close EC chip
H-->L 16.76V 17.22V 17.70V
Eletro-XTechnica
VILIM = 20*ILIM*Rsr
Security Classification
Compal Secret Data
2019/09/01 Title
DecipheredDate
ILIM = 3.3*100/(100+620)/20/0.02
T HIS SH EET O F EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y O F C O MPAL EL EC T R O N IC S, INC. AN D CONT AINS CONFIDENSSTiIzAeL Document Number
CHARGER
= 2.291 A AN D T R AD E SEC RET INFORMAT ION . T HIS SH EET MAY N O T BE T RAN SF ER ED FR O M T H E C U ST O DY OF T HE C O MPET EN T DIVISION OF R& D Rev
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MPAL EL EC T R O NIC S, INC. NEIT HER T HIS SH EET N O R T H E IN F O R MAT IO N IT CONT AINS MAY v0.3
BE USED BY OR DISCLOSED TO AN Y T H IR D PAR T Y W IT H O UT PR IO R W RIT T EN C O NSEN T OF CO MPAL EL EC T R O N IC S, INC.
A B C
Date: Friday, January 05, 2018
D
Sheet
Eletro-XTechnical36
47 of 59
Eletro-XTechnical37
5 4 3 2 1
+19VB EMI@ PL304 PU301 @ PR302 PC302

5A_Z80_0805_2P SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2
2200P_0402_50V
V
@EMI@ PC303
0.1U_0402_25
6
21
EMI@ PC304
10U_0805_25V
1
PC305
2 1
2 1
PL302
BS
IN
IN
IN
IN
1.5UH_6A_20%_5X5X3_M
7 K
LX_3V6 20 LX_3V 1 2
D LX LX +3VALWP D
6 K
7 19
GND LX
+3VALW
680P_0402_50V7K 4.7_1206_5%
1
8 18
22U_0603_6.3V6M
@EMI@
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
GND GND
PR30
PC309
PC306
PC307
PC308
2 1
2 1
9 17
21
PG LDO +3VLP
2
1
10 16
2 13V_S2 N 3 1
NC NC PC310
OUT
EN2
EN1
PR304 21 4.7U_0603_6.3V6M
M
M
M
21
NC
FF
100K_0402_5% GND
@EMI@
3.3V LDO 150mA~300mA
13
14
11
12
15
PC311
<9> SPOK
ENLDO_3V5V PC312 PR305 Fsw : 600KHz
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
@PJ302
112 2
+3VALW P +3VALW
JUMP_43X118
@ PJ303
JUMP_43X39
1 1 22
2 Cell battery : Cin=10uF*2pcs +3VLP +3VL
C C
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
+19VB EMI@ PL303 +19VB_5V @ PR306 PC313

5A_Z80_0805_2P 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_5V BST _5V1 2 BST_5V_R 1 2
PU302
SY8288CRAC_QFN20_3X3
1
BS
IN
IN
IN
IN
PL301
LX_5V 6 20 2.2UH_7.8A_20%_7X7X3_M
LX LX
0.1U_0402_25V6
2200P_0402_50V
10U_0805_25V
7 19 LX_5V 1 2 +5VALW P
GND LX
PC314
@EMI@ PC317
EMI@ PC316
8
GND GND 18 PC318
2 1
2 1
2 1
6 K
9 VCC 17 VCC_5V 1 2
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
22U_0603_6.3V6
PG
7 K
PC322
PC301
PC323
PC319
PC328
PR308
1SPOK_5
4.7_1206_5%
2 1
2 1
2 1
2 1
PR307 10 16
21
@EMI@
NC NC 2.2U_0402_6.3V6M
499K_0402_1%
OUT
LDO
EN2
EN1
1 2 ENLDO_3V5V 21
+19VB
FF
GND
V
2
1
@ PR310
M
PR309
14
11
12
13
15
5V_SN
0_0402_5%
499K_0402_1%
2
SPOK
+5VL
680P_0402_50V7K
5V LDO 150mA~300mA
PC324
@EMI@
2
ENLDO_3V5V
2
B B
PC325
4.7U_0603_6.3
PR301
2.2K_0402_5% 5V_3V_EN Fsw : 600KHz
21
1 2
<33,39> EC_ON @ PR311
V6 M
0_0402_5%
1 2
<33> MAINPWON PC326 PR312
1000P_0402_50V7K 1K_0402_1%
5V_FB 1 2 5V_FB_1 1 2
5V_3V_EN
@PJ305
1
+5VALW P 122 +5VALW
1
1M_0402_
JUMP_43X118
PC327
4.7U_0402_6.3
2 PR313
%2
1
V6 M
1
A A
Security Classification CompalSecretData Compal Electronics, Inc.

THIS S HE E T O F E N G IN E E R IN G D RA W IN G IS TH E P R O P R IE TA RY P RO P E R TY O F C O M P A L E L E C TR O N IC S , INC. A N D CONTA INS CONFIDENTSSIAizLe Document Number

3VALW/5VALW
A ND TR A DE S E CR E T IN F O RM A TIO N . THIS S HE E T M A Y N O T BE TR A N S F E R E D F R O M TH E C US TO DY OF TH E CO M P E TE N T DIV IS ION OF R & D Rev
D E P A R TM E NT E X C E P T A S A U TH O R IZ E D B Y C O M P A L E L E C TR O N IC S , INC. NE ITHE R THIS S H E E T NO R TH E IN F O R M A TIO N IT CONTA INS Custom
M A Y BE US E D BY OR DIS CLOS E D TO A N Y TH IR D P A R TY W ITH O UT P R IO R W R ITTE N C O N S E NT OF C O M P A L E L E C TR O N IC S , INC.
CSL50 / CSL52 v0.3
Date: Friday, J anuary 05, 2018 Sheet 48 of 59

5 4 3 2 1
Eletro-XTechnica
5 4 3 2 1
Eletro-XTechnical38
D D
EMI@ PLM2
5A_Z80_0805_2P
1 2 +19VB_DDR PRM1
+19VB 2.2_0603_5%
BST_DDR_R 1 2 BST_DDR
+1.2VP
10U_0805_25V6K
2200P_0402_50V7K
PCM2
@EMI@ PCM1
PCM4 UG_DDR +0.6VSP
21
21
0.1U_0603_25V7K
21
LX_DDR
10U_0603_6.3V6M
10U_0603_6.3V6M
PCM5
PCM6
PUM1
17
18
19
20
16
G5616BRZ1U_TQFN20_3X3
21
21
LX
DH
BST
VTT
VLDOIN
PAD 21
LG_DDR 15 DL
VTTGND 1
1
4
2
14 PGND VTTSNS 2
D1
D1
D1
G1
PLM1 PRM2
1UH_11A_20%_7X7X3_M 11.5K_0402_1%
1 2LX_DDR 10 D1 1 2 CS_DDR13 CS
D2/S1 9 GND 3
+1.2VP PCM7
1
1U_0402_6.3V6K
12 VTTREF_DDR
12 VPP VTTREF 4
S2
S2
S2
G2
@EMI@ PRM3 PRM4
4.7_1206_5% 5.1_0603_5%
5
8
1 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VDD_DDR 11 VCC VDDQSNS 5
VDDQSET
SNB_DDR +5VALW +1.2VP
PCM8
PCM9
PCM10
PCM11
PCM12
PCM13
PGOOD
PCM15
21
21
21
21
21
VDDP_DDR
21
2 12
21
TON
@EMI@ PCM14 0.033U_0402_16V7K
S5
S3
C 680P_0402_50V7K PCM16 C
21
1U_0402_6.3V6K
6
9
7
10
PQM1
AONH36334_DFN3X3A8-10 PRM5
5.1_0603_5%
FB_DDR
1 2 PRM6
TON_DDR
6.04K_0402_1%
+1.2VP
S5_DDR
S3_DDR
@ PW ROK_DDR PRM7 1 2
PTPM1 470K_0402_1%
@ PJM2 +19VB_DDR 1 2
JUMP_43X118
1
+1.2VP +1.2V_VDDQ @ PRM8
112 2
0_0402_5%
PG_+2.5V 1 2 PRM9
10K_0402_1%
1 2
@ PJM3 <12,33,40> SYSON @PRM10
2
0.1U_0402_10V7K
JUMP_43X39 0_0402_5%
11 2
PCM17
+0.6VSP 2 +0.6V_0.6VS
21
@ Vout=0.75* (1+PRM6/PRM9)=1.2V
@ PRM11
0_0402_5%
1 2
<12,33,40> SUSP#
@ PRM12
0_0402_5%
1 2
<6> SM_PG_CTRL
@ PCM18
21
0.1U_0402_10V7K
B B
@ PJ2502
JUMP_43X39
PC2501 1 1 22
22U_0603_6.3V6M +2.5VP +2.5V
12
PU2501
@ PJ2501 PL2501 1UH_MHCD252012A-
JUMP_43X39 1R0M-A8S_3A_20%
+3VALW 11 2 IN_2.5V 4 3 LX_2.5V 1 2
2 VIN LX +2.5VP
2016.12.27 @ PR2501 1 2 5 PG GND 2
+3VALW
68P_0402_50V8J
0_0402_5%
1 2 PR2504 6 1
PC2504
<9,12,33,40> PM_SLP_S4# VFB EN

1
22U_0603_6.3V6M
22U_0603_6.3V6M
100K_0402_5%
PC2505
PC2506
1
21
@ PR2502 Enable 1.2V PG_+2.5V G5719CTB1U_SOT23-6 @EMI@ PR2505 PR2506

21
21
0_0402_5% 4.7_0402_5% 32.4K_0402_1%

SYSON 1 2 EN_2.5V
2
2
.1U_0402_16V7K
1
SNB_2.5V
PC2502
PR2503 FB_2.5V
1M_0402_1%
21
1
2
A @ A
@EMI@ PC2503
2 1
680P_0402_50V7K PRM2507
10K_0402_1% Vout=0.6V *(1+PR2506/PR2507)=2.544V
Imax= 2A, Ipeak= 3A
2
Eletro-XTechnica Security Classification Compal Secret Data

Title
Issued Date 2016/09/01 Deciphered Date 2019/09/01
THI S S HE E T O F ENG I NE E RI NG DRAW IIING I S T HE P R O P RI E TAR Y P R O P E R T Y O F C O MP AL ELECTRONIIICS, INC... A ND CO NTAI NS CONFIDENTSIiAzLeDocumentttNumber

1.2VP/0.6VSP/2.5V
A ND T R AD E S E C R E T INFORMATI ON... THI S S H E E T M A Y NO T BE T R A NS F E R E D F RO M T HE CUS TO D Y OF T HE CO M P E T E NT DIIIVISION OF R&D Rev
DE P AR TME NT E X C E P T A S AUTHO RI ZE D BY C O MP AL ELECTRONICS,,, I NC . NEIITHER THI S S HE E T N O R T HE I NF O RMAT I O N I T CO NTAI NS Custom v0.3
M A Y BE US ED BY OR DI SC L O SE D TO A N Y THI RD P AR TY W I T H O U T P RI O R W R I TTE N C O NS E NT OF C O MP AL E L E CTR O NI C S , IIINC.
Date::: Friday,,, January 05 , 2018 Sheettt49of 59
Eletro-XTechnical38
5 4 3 2 1
Eletro-XTechnical39
A B C D
+1.0V_PRIMP +1.0V_PRIM
@ PJ1002
1 JUMP_43X118 1
1 2
12
<33> +1.0VS_PG
@EMI@ @EMI@
PR1007 PC1009
PR1005
100K_0402_1% +3VALW 1 2SNB_1V 1 2
EMI@ PL1002 2 1
PU1001
5A_Z80_0805_2P
4.7_1206_5% 680P_0402_50V7K
1 2 +19VB_1V 2 9 @ PR1006 PC1007
+19VB IN PG 0_0402_5% 0.1U_0402_25V6
1 BST_1V 1 2 BST_1V_R 1 2 PL1001
3 IN BS
2200P_0402_50V7K
10U_0805_25V
1UH_6.6A_20%_5X5X3_M
0.1U_0402_25V
6 K PC1001
1
LX_1V
1
6 1 2
+1.0V_PRIMP
6 @EMI@ PC1004
1
4 IN LX
EMI@ PC1003
19
LX
2
5 IN
2
PR1008
2
330P_0402_50V
22U_0603_6.3V
22U_0603_6.3V
22U_0603_6.3V
22U_0603_6.3V
7 20 20K_0402_1%
PC1011
PC1012
PC1013
PC1010
GND LX
VGA@ PC1014
2 1
8 14 FB_1V
21
21
21
21
GND FB
7 K
PR1001 18 17 VCC_1V
6 M
6 M
6 M
2 2
6 M
0_0402_5% GND VCC
1
1 2 EN_1V 11 10
<51> +1.8V_PG EN NC
PC1008
ILMT_1V 13 12 2.2U_0402_6.3V6M
21
ILMT NC
1
0.1U_0402_25V7
1K_0402_
15 16
PR1010
+3VALW BYP NC
1M_0402_
PR100
2
PC100
FB=0.6V
2 1
21
K@
+3VALW PAD
%
1
5
2
%
1
SY8286RAC_QFN20_3X3
2
1
1
PC1006 PR1009
@ PR1003 1U_0402_6.3V6K 30K_0402_1%
2
0_0402_5%
N :H>0.8V ; L<0.4V
2
2
N pin don't floating

f have pull down resistor at HW side,
lease delete PR601.
1
@ PR1004
0_0402_5%
3 3
2
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
4 4

T HIS S H E E T O F EN G IN EER IN G D R A W I N G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O MP A L EL EC T R O N IC S, INC. A N D C O N T AIN S CONFIDENTSIizzeL Document Number

1.0V_PRIM
A N D T R A D E S E C R E T IN F O R MAT IO N . T H IS S H E E T M A Y N O T BE T R A N S F E R E D F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D
Rev
D E P A R T ME N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L EL EC T R O NIC S, INC. NEIT H ER T H IS S H E E T N O R T H E IN FO R MAT IO N IT C O NT AIN S Custom v0.3
MA Y BE U S E D BY OR D ISC L O SED T O A N Y T H IR D P A R T Y W IT H O U T PR IO R W RI T T E N C O N S E N T OF C O MP A L EL EC T R O N IC S, INC.
A B C D
Eletro-XTechnica
Eletro-XTechnical39
Eletro-XTechnical40
4 3 2 1
5
D D
PC1801
22U_0603_6.3V6M
@PJ1802
12 1 2
+1.8VSP 1 2 +1.8V_PRIM
JUMP_43X79
PU1801
@PJ1801 PL1801
+3VALW JUMP_43X39 2 1UH_MHCD252012A-1R0M-A8S_3A_20%
11 IN_1.8V 4 LX_1.8V 1 2
2 VIN LX 3 +1.8VSP
1 2 5 PG
+3V_PRIM GND 2
C C
PR1801 6 1
68P_0402_50V8
VFB EN
22U_0603_6.3V6
22U_0603_6.3V6
100K_0402_5%
PC1802
PC1803
PC1804
<50>+1.8V_PG
1
@EMI@ PR1803
G5719CTB1U_SOT23-6
21
21
PR1802
21
20K_0402_1%
4.7_0603_5%
1 2 EN_1.8V
<33,40>PCH_PWR_EN
2
2
J
@PR1804
M
SNUB_1.8V
1
.1U_0402_16V7K
0_0402_5% 2016.11.23
PR1805
@PC180
1M_0402_1
FB_1.8V
21
5
1
@EMI@
%
2
PC1806
680P_0402_50V7K PR1806
2
10K_0402_1%
Vout=0.6V*(1+PR1803/PR1806)=1.8V
2
Imax= 2A, Ipeak= 3A
B B
A A
Security Classification Compal Secret Data Compal Electronics, Inc.

T HIS SH EE T O F E N G IN E ER I NG D R AW I N G IS T H E PR O PR I ET AR Y P R O PE RT Y O F CO M PAL ELECT RO NICS, INC. AN D C O N T A I N S CONFIDENTSiAzLe DocumentNumber

1.8V_PRIM
AN D T R AD E SE C R E T I N F O R M A T IO N . T HIS S H EE T M A Y N O T BE T R AN SF ER ED F R O M T H E C U ST O D Y OF T H E C O M P ET EN T DIVISIO N OF R &D Rev
D EPAR T M EN T E XC EP T AS AU T H O R IZ ED BY C O M PAL ELECT RO NICS, INC. NEIT HER T HIS SH E ET N O R T H E I N F O R M AT I O N IT C O N T AI N S B
M AY BE U SE D BY OR D I SC L O S ED TO AN Y T HI R D PAR T Y W I T H O U T PR I O R W RIT T E N C O N SE N T OF C O M P AL E LE C T RO N I CS , INC.
CSL50 / CSL52 v0.3
Date: Sheet 51 of 59
5 4 3 2 1
Eletro-XTechnica
Eletro-XTechnical40
1 2 3 4 5
Eletro-XTechnical4
A A
RT3602_VREF Vref=0.6V
PCZ3
0.1U_0402_50V7K
953_0402
1
6.8K_0402_
1.78K_0402_1%
1
1
PRZ2
PRZ3
PRZ
2
_
AISPVCCSA <53>
<53>AVCCSA
1
@ PCZ4
1 2 1%
0.47U_0402_25V6K
12
4 10_0402_1%
+VCC_SA
12
11K_0402_1%
1
PRZ1 PRZ8 PRZ10
V6K
VSSSA_SENSE
RT3602_VREF
<14>
0.47U_040P2C_Z62.32<1
PRZ6
100_0402_1% 10K_0402_1% 49.9K_0402_1%

PRZ11
VSSCORE_SENSE
16.2K_0402
2 1 2 1
PRZ5
1 2 VCCSA_SENSE_R 1 2 1 2
21
PRZ15 PRZ13 PRZ14
2
%
2
RT3602_SET1 12 12
1%2
64.9K_0402_1% 453_0402_1%
RT3602_SET2 1 2
_
RT3602_SET3 <12> VCCSA_SENSE

PCZ5 390P_0402_50V7K PCZ6 68P_0402_50V8J
100_0402_1
>
8
2
VR_PSYS 0_0402_5%
+3VS
1
PRZ23
RT3602_VREF 3.9_0402_1%
PRZ24
1
10K_0402_5%
1
close to chock
PRZ22 100_0402_1%
1
% PRZ94
PRZ20
1 2
1
10K_0402_
1 PRZ18
2 0_0402_5%
FB_SA
PRZ1
5.23K_0402
464_0402
1.1K_0402
PRZ17
VR_PWRGD<33>
2
@ PHZ1 PRZ26
2
2
1
2
1
1
100K_0402_1%_B25/50 4250K
%
_ 1
%
%2
42.2K_0402_1% PRZ95 PRZ25
PRZ21
_
1
1
%
2
9
_
1
@ PCZ7
2
1 2 PHZ1_R 1 2 0_0402_5% 0_0402_5%
0.1U_0402_10V6K RT3602_VREF 1 2 VR_ON<33,40>
2
+1.0V_VCCST
2
1
RT3602_EN
IMON_SA
PRZ29
2.211K_0402_
PRZ3
536_0402
2.1K_0402
1 2IMON_CORE_R 1 2
PRZ28
10_040
PRZ31
PRZ33 RGND_MAIN
2_ 5
B B
VR_PSYS
38.3K_0402_1%
%
PRZ35
RGND_S
VSEN_C
COMP_S
14.7K_0402_1%
2
1
2
2
1 2
%
FB_SA
O RE
_
1
PCZ22
0
_
1
%
0.1U_0402_25
1
@ PCZ9
100_0402
75_0402
45.3_0402
0.1U_0402_10V6K PUZ1
21
12
PRZ36
PR1Z39
PRZ38
49
48
47
46
45
44
43
42
41
40
39
38
37
NCP81218MNTXG_QFN48_6X6
%
2
1
2
1
_
1
%
PRZ43 PRZ45
_
1
VSEN_M
RGND_MAI
GND
V
A
I
N
PS
Y S FB_SA
EN
_
1
6
ET
RGND_SA
COMP_SA
ISENP_SA
N
VREF06/P
ISENN_S
VR_SVID_CLK <14>
VR_READ
10K_0402_1% 52.3K_0402_1%
IMON_SA
1 2 1 2 VR_ALERT# <14>
+VCC_CORE PRZ41 VR_SVID_DATA <14>
100_0402_1% PCZ1282P_0402_50V8J IMON_COR1E 36 PWM_SA<53>
RT3602_SET12 IMON_MAIN PWM_SA 35 VR_HOT# <33>
Y
1 2 VSEN_CORE 12 12 DRVEN <53>
PRZ47 FB_CORE 3 SET1 DRVEN 34 1 2
0_0402_5% 270P_0402_50V7K <53>AVCORE1 PCZ13 COMP_CORE4 FB_MAIN VCLK 33 PRZ98 49.9_0402_1% RT3602_VREF
ALERT# 32
<14> VCCCORE_SENSE 1 2 PCZ11 0.1U_0402_50V7K RT3602_SET2 5 COMP_MAIN PRZ991 210_0402_1% PRZ48
12 RT3602_SET3 6 SET2 VDIO 31 PR1Z100100_20402_1% 28.7K_0402_1% PRZ49866_0402_1%
U42@ PRZ106 Ra 7SET3 VR_HOT# 30 IMON_GT 1 2 1 2
12 1 2ISEN1N_MAIN 8 ISEN1N_MAIN IMON_AUXI 29
@PCZ150.47U_0402_25V6K
U42@ 0_0402_5% 9 ISEN2N_MAIN ISENP_AUXI 28
1 2
PCZ16 0.1U_0402_50V7K 10 ISEN2P_MAIN ISENN_AUXI 27 VSEN_GT
<53>AVCORE2
Ra Rb/Rc TSEN_CORE 11 ISEN1P_MAIN VSEN_AUXI 26 COMP_GT AISP1 <53> PRZ50
Rb RT3602_V1IN2 TSEN_MAIN
VIN
COMP_AUXI 25
RGND_AUXI AVGT1<53> 0_0201_5%
1 2
+5VALW U22@ PRZ105 10K_0402_1% 12 VSEN_GT 1 2
PW M_AUX
PWM1_MA
DRVEN_S
TSEN_AU
VCCGT_SENSE <14>
U22 N/A Stuff
M2_MA I
PCZ18
FB_AUX
<53>AISPCORE2 PRZ59
2.2_0805
0.22U_0402_25
0.1U_0402_50V7K PRZ54 PRZ56
Rc
PRZ53
+VCC_GT
T NC
100_0402_1%
PW
X I
29.4K_0402_1% 10K_0402_1%
121
PCZ19
1 2
IN
C
C
N
C
N
C
N
C
N
C
V
E
1 2 1 2 1 2
I
U42 Stuff N/A +5VALW U22@ PRZ104 10K_0402_1%
2
%
_
1
PRZ107
16
17
19
20
21
22
V AK
14
15
DRVEN_SET 18
TSEN_GT 23
<53> AISPCORE1
FB_GT 24
12 12
2 1 RGND_AUXI
1 2
RT3602_VCC 13
RT3602_VREF PRZ51 PRZ52
1
110K_0402_1% 1.65K_0402_1% 0_0402_5% PCZ20 82P_0402_50V8J PCZ21 270P_0402_50V7K
TSEN_CORE_R 1 2 1 2 +19VB_CPU PCZ230
PHZ2 1U_0603_25V6K
C
PRZ93 C
1 2 0_0201_5%
1
FB_GT
1
2
115_0402_1% 8.25K_0402_1%
100K_0402_1%_B25/50 4250K
PRZ6
<53>
<53>
<53>
PWM_GT
PRZ63
PW M_COR
+5VALW PRZ65
M_COR E
VSSGT_SENSE <14>
10_0402_1%
1 2
8.225K_0402_11%
4 374_0402_1%
12
PW
E2
1
PRZ68
PRZ67
1
PCZ23
2
T SEN_CORE_R 4.7U_0603_10V6K PRZ66
2
2
TSEN_GT_R 110K_0402_1%
1
1
100K_0402_1%_B25/50
PRZ71
182K_0402_
+5VALW
12
PRZ70
2
PHZ3
11.5K_0402_ 549K_0402_
PRZ69
2
1
2
1
1.65K_0402_1%
%
1
1
@PRZ72
4250K
0_0402_5%
1
PRZ74
4.02K_0402_
TSEN_GT_R2
PRZ73
DRVEN_SET
%
1
2
1
12
%
1
PRZ75
0_0402_5%
D D
2

Eletro-XTechnica Issued Date 2016/09/01 2019/09/01 T itle
Deciphered Date
CPU_CORE
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTSSIAizLe Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET M A Y NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS M A Y BE CSL50 / CSL52 v0.3
Date: Friday,January 05, 2018 Sheet 52 of 59
1 2 3 4 5
Eletro-XTechnical4
1 2 3 4 5
Eletro-XTechnical42 +19VB_CPU
EMI@ PLZ3
5A_Z80_0805_2P +19VB
1 2 +19VB_CPU
PRZ76
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2.2_0603_5%
100U_25V_NC_6.3X6
100U_25V_NC_6.3X6
PCZ31
PCZ32
1 1
0.1U_0402_25V6
@EMI@ PCZ29
EMI@ PCZ30
CORE1_BST 1 2 CORE1_BST_R
+ +
5
U22@ PCZ26 U42@ PRZ77
PCZ229
10U_0603_25V6M
10U_0603_25V6M
2 1
2200P_0402_50V7K
PQZ1 68U_25V_M_R0.36 2.2_0603_5%
U42@ PCZ26
EMIU42@ PCZ36
EMIU42@ PCZ33
0.1U_0402_25V6
PCZ28
21
21
21
CORE2_BST 1 2 CORE2_BST_R
U42@ PCZ34
U42@ PCZ37
PUZ2 2 2
5
0.1U_0402_25V6
21
AON6380_DFN5X6-8-5
1
U42@
21
21
21
4 BOOT UGATE 3 CORE1_UG 1 2 CORE1_UG_R 4 PUZ3U42@ PCZ35
2
PRZ78
21
0.1U_0402_25V6
5 PW M PHASE 2 CORE1_LX 0_0603_5%
<52> PWM_CORE1 4 B OOT UGATE 3 CORE2_UG 1 2 CORE2_UG_R4
+5VALW
<52> DRVEN 1 EN PGND 6 Rdc=1.19 mohm U42@PRZ79 U42@
3
2
1
+VCC_CORE 5 P W M PHASE 2 CORE2_LX 0_0603_5% PQZ3
PLZ1 <52> PWM_CORE2
1 PRZ802 VCC_CORE18 7 AON6380_DFN5X6-8-5
VCC LGATE 9
GND
1 4 +5VALW DRVEN1 EN PGND 6 Rdc=1.19 mohm +VCC_CORE
3
2
1
1_0402_5%
2 3 1 2 VCC_CORE2 8 7 U42@ PLZ2
A RT9610CGQW_WDFN8_2X2 PQZ2 VCC LGATE 9 A
1 4
4.7_1206_5%
@EMI@PRZ82
PCZ40
5
U42@ PRZ81 GND
0.24UH_22A_+-20%_7X7X3_M
2.2U_0402_16V6K 1_0402_5% 2 3
21
U42@ RT9610CGQW_WDFN8_2X2
AISPCORE1_R
4.7_1206_5%
@EMIU42@ PRZ84
AON6314_N_DFN56-8-5
5
PCZ41 0.24UH_22A_+-20%_7X7X3_M
AISPCORE2_R
21
2.2U_0402_16V6K
CORE1_LG 4 PCZ42
0.1U_0402_25V6
1 21 2 12
2 1CORE1_SNUB2 1
CORE2_LG 4 U42@ PRZ87 U42@ PRZ103 U42@ PCZ43
PRZ85 PRZ102 2.1K_0603_1% 2.1K_0603_1% 0.1U_0402_25V6
3
2
1
2 1CORE2_SNUB 2 1
2.1K_0603_1% 2.1K_0603_1% PRZ88 1 2 1 2 12
4.22K_0402_1% U42@
@EMI@PCZ44
1 2 PQZ4 U42@ PRZ90
680P_0402_50V7K
3
2
1
AON6314_N_DFN56-8-5 4.22K_0402_1%
1 2
@EMIU42@PCZ45
680P_0402_50V7K
AVCORE1 <52>
AVCORE2 <52>
AISPCORE1<52>
AISPCORE2<52>
+19VB_CPU VCC_CORE VCC_GT VCC_SA

FSW=500kHz FSW=500kHz FSW=600kHz
Choke=0.24uH Choke=0.24uH DCR=6.2 mohm +/- 5%
PRG2 DCR=1.19 mohm +/- 5% DCR=1.19 mohm +/- 5%
PCG5
PCG
PCG1
PCG1
0.1U_0402_25V6
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2.2_0603_5%
U22
EMI@ PCG12
0.1U_0402_25V6
GT_BST 1 2 GT_BST_R
EMI@ PCG3
EMI@ PCG4
5
PQG1
U22 U22 LL=10.3 mohm
PCG2 LL=2.4 mohm LL=3.1 mohm TDC=4A
2 1
2 1
2 1
2 1
2 1
2 1
21
B B
PUG1
0.1U_0402_25V6
TDC=21A TDC=18A ICCMAX=4.5A
21
AON6380_DFN5X6-8-5
0
1
4 BOOT UGATE 3 GT_UG 1
PRG3
2 GT_UG_R 4
ICCMAX=32A ICCMAX=31A OCP=9.5A
<52> PWM_GT 5 PW M PHASE 2 GT_LX 2.2_0603_5% OCP=40A OCP=39A
+5VALW DRVEN 1 EN Rdc=1.19 mohm U42
PGND 6
U42 U42 LL=10.3 mohm
3
2
1
+VCC_GT
PLG1
1 PRG1 2 VCC_GT 8 7
VCC LGATE 9 1 4 LL=2.4 mohm LL=3.1 mohm TDC=
GND
1_0402_5%
2 3 TDC=42A TDC=12A ICCMAX=5A
RT9610CGQW_WDFN8_2X2 PQG2 ICCMAX=64A ICCMAX=28A OCP=9.5A
4.7_1206_5%
EMI@ PRG4
5
PCG1
1
0.24UH_22A_20%_7X7X3_M OCP=70A OCP=39A

21
2.2U_0402_16V6K
AON6314_N_DFN56-8-5
AISP1_R
2
GT_LG 4 PRG6 PRG9 PCG8
1.58K_0603_1% 1.58K_0603_1% 0.1U_0402_25V6
1 2 1 2 12
PRG7 PRG8
3
2
1
3K_0402_1% 10K_0402_1%
1 2 1 2
AVGT1_R
330P_0402_50V7K
1GT_SNUB
EMI@PCG9
1 2
PHG1
10K_0402_1%_B25/503370K
AVGT1 <52>
AISP1 <52>
C C
+19VB_CPU
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
PRA2
0.1U_0402_25V6
@EMI@PCA6
2.2_0603_5%
EMI@ PCA2
SA_BST 1 2 SA_BST_R
PCA4
PCA5
2 1
2 1
2 1
2 1
PCA3
PUA1
0.1U_0402_25V6
21
4 BOOT UGATE 3 SA_UG
5 PW M PHASE 2 SA_LX
<52> PWM_SA Rdc=6.2 mohm
1
D1 2
D1 3
+5VALW
D1 4
DRVEN1 6 PQA1 PLA1

ENPGND
G1
AONH36334_DFN3X3A8-10 +VCC_SA
1 2 VCC_SA 1 4
8 VCC LGATE 7
GND 9 9 D2/S1 D1 10
PRA1 1_0402_5% 2 3
RT9610CGQW_WDFN8_2X2
G2
4.7_1206_5%
0.47UH_NA 12.2A_20%
@EMI@ PRA4
PCA1
S
2
2
7 S
5 S
6 2
2.2U_0402_16V6K
21
AISPVCCSA_R
SA_LG
PCA7
0.1U_0402_25V6
1 212 12
2 1 SA_SNUB 2 1
PRA6 PRA9 PRA7 PRA8

953_0603_1% 953_0603_1% 866_0402_1% 1K_0402_1%
1 2 1 2
AVCCSA_R
@EMI@ PCA8
680P_0402_50V7K
12
PHA1
1K_0402_5%_TSM0B102J3652RE
AVCCSA <52>
D D
AISPVCCSA<52>
Eletro-XTechnica
Security Classification Compal Secret Data Compal Electronics, Inc.
CPU Power stage
THI S S HE E T OF E NGI N E E R I N G D RA W I NG I S THE P ROP RI E TA R Y PROP E R T Y OF C OMP A L ELE CT R ON I C S, I NC . A N D C ONTA I NS CONFIDENTSSIAizLe Document Number
A N D TRA D E SE C RE T I NF ORMA TI ON. THI S S HE E T MA Y NOT BE TRA N S FE R E D F R OM THE C US TOD Y OF THE C OMP E TE NT D I VI SI ON OF R &D Rev
D EP AR T ME N T E XC EP T AS A UT H OR I ZE D BY C OMP AL E LE CT R ONI C S , I NC . NE I THE R THI S SHE E T NOR THE I NF ORM A TI ON IT C ONT A I NS MA Y BE US CSL50 / CSL52 v0.3
ED BY OR D I SC L OS E D TO A NY THI RD PA RT Y W I THOU T P RI OR W RI TTE N C ONS E N T OF C OMP AL E LEC TR ONI C S, I NC .
Eletro-XTechnical42
1 2 3 4 5
A
B
C
D
21 21 21 21
+VCC_CORE
2
1
2
1
2
1
PCZ210 PCZ200 PCZ187 PCZ167 PCZ147 PCZ100 PCZ78
1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 6 M 6 M 6 M 6 M 6 M 6 M
2 1 2 1 2 1 2 1
2
1
2
1
2
1
PCZ148 PCZ101 @ PCZ79
2
1
+
PCZ211 PCZ201 PCZ188 PCZ168 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V PCZ68
5
5
1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 6 M 6 M 6 M 390U_2.5V_ESR10M_6.3
2
1
2
1
2
1
6 M 6 M 6 M 6 M X
2 1 2 1 2 1 2 1 PCZ150 PCZ102 @ PCZ80
2
1
6
+
22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V

Eletro-XTechnical43
PCZ212 PCZ202 PCZ189 PCZ169 6 M 6 M 6 M U42@ PCZ215

1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 330U_2V_M
2
1
2
1
2
1
6
M PCZ213 6
M PCZ203 6
M PCZ190 6
M PCZ170 PCZ154 PCZ103 PCZ81
1U_02 1_6.3V6 1U_02 1_6.3V6 1U_02 1_6.3V6 1U_02 1_6.3V6 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
M M M M 6 M 6 M 6 M
2 1 2 1 2 1 2 1
2
1
2
1
2
1

1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
2016.12.29
6 M 6 M 6 M 6 M 6 M 6 M 6 M
2 1 2 1 2 1
2
1
2
1
PCZ205 PCZ192 PCZ172 PCZ127 PCZ83

1U_0201_6.3V 1U_0402_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V
Eletro-XTechnica
6 M 6 K 6 M 6 M 6 M
2 1 21 2 1
2016.11.21
2
1
2
1

1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 6 M 6 M 6 M 6
2
1
21 21 21
U42
U22
M
PCZ207 PCZ194 PCZ174 @ PCZ97
2016.11.21
1U_0402_6.3V 1U_0201_6.3V
1uF*35
1uF*35
1U_0201_6.3V 22U_0603_6.3V
22uF*22
22uF*18
390uF*1
390uF*2
6 K 6 M
2
1
6 M 6 M
2 1 2 1 2 1
@ PCZ98
VCC_CORE：
PCZ208 PCZ195 PCZ175 22U_0603_6.3V

1U_0201_6.3V 1U_0201_6.3V 1U_0201_6.3V
2
1
6 M
6 M 6 M 6 M
2 1 2 1 2 1 PCZ99
2016.11.21
22U_0603_6.3V
PCZ209 PCZ196 PCZ176
6 M
1U_0201_6.3V 1U_0402_6.3V 1U_0201_6.3V
4
4
6 M 6 K 6 M
+VCC_GT
21 21
2
1
2
1
2
1
2
1
2
1
+

1U_0201_6.3V 1U_0402_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V6M 390U_2.5V_ESR10M_6.3X6
6 M 6 K 6 M 6 M 6 M
2 1 2 1 2
1
2
1
2
1
2
1
PCZ198 PCZ178 PCZ158 PCZ132 PCZ110 PCZ71

1U_0201_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
2016.11.21
6 M 6 M 6 M 6 M 6 M 6 M
2 1 2 1
2
1
2
1
2
1
2
1
PCZ199 PCZ179 PCZ159 PCZ134 PCZ111 PCZ72

1U_0201_6.3V 1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 6 M 6 M 6 M 6 M 6 M
2 1
2
1
1
2
1
2
1

1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 6 M 6 M 6 M 6 M
1uF*13
2 1
2
1
1
2
1
2
1
PCZ181 U42@ PCZ161 PCZ136 PCZ113 PCZ74

22uF*33
390uF*1
VCC_GT：
1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
BOM option
U22 & U42
6 M 6 M 6 M 6 M 6 M
2 1
2016.11.10
2
1
2
1
2
1
2
1
2
1
PCZ130 U42@ PCZ162 PCZ137 PCZ114 PCZ75

PCZ182
Issued Date
22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 1U_0201_6.3V 6 M 6 M 6 M 6 M
+VCC_GT_VR
2
1
2
1
1
6 M
3
3
SecurityClassification
2 1 PCZ163 PCZ115 PCZ76
2@
22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
2
1
PCZ133 PCZ183 6 M 6 M 6 M
22U_0603_6.3V 1U_0201_6.3V
2
1
2
1
2
1
6 M 6
M PCZ184 PCZ164 PCZ116 PCZ77
1U_02 1_6.3V6 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V
M 6 M 6 M 6 M
2 1
2
1
2
1
2
1
PCZ185 PCZ165 PCZ117 PCZ85

by JU22(for GT) and JU42A (forIA)
1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V 22U_0603_6.3V

6 M 6 M 6 M 6 M
2 1
2
1
2
1
2016/09/01
PCZ186 PCZ166 PCZ86
1U_0201_6.3V 22U_0603_6.3V 22U_0603_6.3V
6 M 6 M 6 M
U42@
2
1
U42@ PCZ149
22U_0603_6.3V
6 M
+VCC_GTX_VR
Compal Secret Data

2
1
U42@ PCZ152
DecipheredDate
2016.11.21
22U_0603_6.3V
+VCC_SA
6 M 21
2
1
PCZ140 PCZ87
1U_0402_6.3V 22U_0603_6.3V
2
2
6 K 6 M
2 1
2
1
PCZ141 PCZ88
1uF*7
1U_0201_6.3V
22uF*9
22U_0603_6.3V
6 M 6 M
USED BY OR DISCLOSED TO ANY T HIRD PART Y W IT HOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
VCC_SA：
2 1
2
1
U22 & U42
PCZ142 PCZ89
2019/09/01
1U_0201_6.3V 22U_0603_6.3V
6 M 6 M
2 1
2
1
PCZ143 PCZ90
1U_0201_6.3V 22U_0603_6.3V
6 M 6 M
2 1
2
1
PCZ144
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS MAY BE
PCZ91
1U_0201_6.3V 22U_0603_6.3V
6 M 6 M
Date:
Title
2 1
2
1
PCZ119
PCZ145
22U_0603_6.3V
1U_0201_6.3V
6 M
6 M
2
1
2 1 PCZ93
PCZ146 22U_0603_6.3V
1U_0201_6.3V 6 M
2
1
6 M PCZ94
22U_0603_6.3V
CSL50 / CSL52
6 M
Friday, January 05, 2018
2
1
PCZ96
22U_0603_6.3V
6 M
2
1
PCZ95
1
1
PROCESSORDECOUPLING
22U_0603_6.3V
6 M
Sheet
of54
59
Rev
v0.3
A
B
C
D

HP 15-Bsxxx Series - CSL50 CSL52 LA-E801P r1.0

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HP 15-Bsxxx Series - CSL50 CSL52 LA-E801P r1.0

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l

CSL50/CSL52 Schematics Document

GPU AMD R17M-M1-30

Date : 2018-01-08 REV :1.0

SecurityClassification Compal Secret Data Compal Electronics, Inc.

PCIex4 Port DDR4-SO-DIMM X2

P.27 SATAODD P.30 (sub board) LS-G074P

NGFFWLAN+BT PCIex1 Port#6 5Gb/s

SecurityClassification Compal Secret Data Compal Electronics, Inc.

P.45 Vout +3VALW +3VALW

+1.0V_PRIM Vout +1.0V_PRIM

CPU_CORE Vout +VCC_CORE

DGPU_PWR_EN PGOOD VRAM_PG

Security Classification Compal SecretData Compal Electronics, Inc.

+3V_PCH PCH_PWR_EN X Thermal

+5VS SUSP# PM_SLP_S3# PCH

CPU +3VALW 6 2 6 GPU(DIS only)

G3->S0 S0->S3/DS3 S0/DS3->S0 S0->S5

PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)

T4 = Min : 20ms Max : 3 0ms(EC Control)

VR_PW RGD VR_PW RGD

H_CPUPW RGD H_CPUPW RGD

SYS_PW ROK SYS_PW ROK

SecurityClassification Compal Secret Data Compal Electronics, Inc.

<28> HOST_DP1_N0 E55 DDI1_TXN[0] EDP_TXN[0] C47 EDP_TXN0<27>

T248 TP@ CATERR# D63 CATERR#

RC11 2 @ 1 51_0402_5% SOC_XDP_TMS

RC13 2 @ 1 51_0402_5% SOC_XDP_TDI

RC15 2 1 51 +-1% 0402 SOC_XDP_TDO SD000008H80

RC364 2 @ 1 51_0402_5% CPU_XDP_TCK0

RC14 2 @ 1 51_0402_5% XDP_PREQ# XDP_PREQ# <11>

RC31 1 @ 2 1K_0402_5% XDP_ITP_PMODE XDP_ITP_PMODE <16>

4 RC365 2 @ 1 51_0402_1% SOC_XDP_TRST# 4

RC35 2 1 51_0402_1% CPU_XDP_TCK0 SD000008H80

RC37 2 @ 1 51_0402_5% PCH_JTAG_TCK1

Compal Electronics, Inc.

Date: Friday, January 05, 2018 Sheet 5 of 59

Interleaved Memory Interleaved Memory

<17> DDR_M0_D[0..15] DDR0_CKN[0] AU53 DDR_M0_CLK#0 DDR_M0_CLK#0 <17> <18> DDR_M1_D[0..15]

RC904 0.1U_0201_10V6K 2 1 CC57

100K_0402_5% @ UC7 RC394

RC906 3 GND +1.2V_VDDQ

SecurityClassification Compal Secret Data CompalElectronics,Inc.

Date: Friday, January 05, 2018 Sheet 6 of 59

SML0ALERT# (Internal Pull Down):

EC_KBRST# AW13 GPP_A0/RCIN# RC387 1 2 22_0402_5% RPC19 10K_0804_8P4R_5%

to SPI ROM UC2 Source From +3V_PRIM

+3V_PRIM +3VALW HOST_SPI_0_SIO3 RC51 1 ES@ 2 1K_0402_1%

From WW36 MOW for SKL-U ES sample

EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P MXIC

SecurityClassification Compal Secret Data Compal Electronics, Inc.

Date: Friday, January 05, 2018 Sheet 7 of 59

HDA_SYNC BA22 HDA_SYNC/I2S0_SFRM PROJECT_ID 0 1

<32> HDA_BIT_CLK_R 2 EMI@ 1 HDA_BIT_CLK

SecurityClassification Compal Secret Data CompalElectronics,Inc.

RC91 1 2 20K_0402_5% PCH_SRTCRST#

CLRP1 1 2 SHORT PADS CLR ME UC1J SKL_ULT

RC93 1 2 20K_0402_5% PCH_RTCRST# CLOCKSIGNALS

CC11 1 2 1U_0402_6.3V6K D42 CLKOUT_PCIE_N0

<31> CLK_PCIE_N4 A40 CLKOUT_PCIE_N4 RT CX2

6.8P 50V C NPO 0402

2 1 SYS_RESET # 24MHz Parrrrttt: <SI> CC15/CC16 SI change 3.9p=>6.8p

<33> PCH_DPW ROK 2 Rshort@1 PCH_DPWROK_R

From EC(open-drain) +1.0V_VCCST