DIGITAL ELECTRONICS LAB ASSIGNMENT

NAME : MRIMPA PRAMANIK

DEPARTMENT : DETCE
ROLL : DCCPETCES3
No. : 10005612
REGISTRATION : D192005317
SEMESTER : 3rd
SUBJECT : DIGITAL ELECTRONICS LAB ASSIGNMENT

[1]
 Index
SI. NAME OF THE PAGE TEACHER'S
NO. EXPERIMENT NO SIGNATURE

VERIFICATION OF 3-6
1.
ALL LOGIC
GATES

UNIVERSAL LOGIC GATE 7-10

2.

3. DEMORGAN’S THEORY 11-13

4. HALF ADDER AND 14-15

FULL ADDER

SUBTRACTOR 16-18
5.

[2]
 EXPERIMENT 1
• TITLE: Verification of Logic gates & its Truth table.

• OBJECT: To verify Logic gates & its Truth table.

• APPARATUS: [i] Digital trainer board,

[ii] Connecting wire.

• THEORY:

• AND GATE:

A Boolean operator which gives the value one if and only if all the operands
are one, and otherwise has a value of zero.
A circuit which produces an output signal only when signals are received
simultaneously through all input connections.

A B A.B

0 0 0

0 1 0

1 0 0

1 1 1

Circuit diagram and truth table

• OR GATE:

A logical operation which gives the value one if at least one operand has the
value one, and otherwise gives a value of input output zero.

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 A B A+B

0 0 0

0 1 1

1 0 1

1 1 1

7432 Quad 2 Input OR

Circuit diagram and truth table

• NOT GATE:

A Boolean operator with only one variable that has the value one when the
variable is zero and vice versa.
A circuit which produces an output signal only when there is not a signal on its
input.

A Ā
0 1
1 0

Circuit diagram and truth table

[4]
• NAND GATE:

A Boolean operator which gives the value zero if and only if all the operands
have a value of one, and otherwise has a value of one (equivalent to NOT
AND).

A B
0 0 1

0 1 0

1 0 0

1 1 0

Circuit diagram and truth table

• NOR GATE:

A Boolean operator which gives the value one if and only if all operands have a
value of zero and otherwise has a value of zero.

A B
0 0 1

0 1 1

1 0 1

1 1 0

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 Circuit diagram and truth table
• EXCLUSIVE OR GATE (XOR GATE):

XOR Gate is a digital logic gate that gives a true output when the number of
true inputs is odd. An XOR Gate implements an exclusive or; that is, a true
output result of one, and only one, of the inputs to the gate is true.

A B

0 0 0

0 1 1

1 0 1

1 1 0

Circuit diagram and truth table

• EXCLUSIVE NOR GATE (XNOR GATE):

An XNOR Gate is a digital logic gate with two or more inputs and one output
that performs logical equality. The output of an XNOR gate is true when all of
its inputs are true or when all of its inputs are false.

A B
0 0 1

0 1 0

1 0 0

1 1 1

Circuit diagram and truth table

• CONCLUSION: The truth table of the logic gates are verified and ok.

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 EXPERIMENT- 2

• TITLE: Universal Logic Gate

• OBJECT: NAND & NOR as a universal gate & its truth table
• APPARATUS: [i] Digital trainer board.
[ii] Connecting wire.

NAND AS A UNIVERSAL GATE

• NAND TO NOT:

• TRUTH TABLE:
A Y=
A̅
0 1

1 0

• NAND TO OR:

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• TRUTH TABLE:
A B Y=A+B

0 0 0

0 1 1

1 0 1

1 1 1

• NAND TO AND:

• TRUTH TABLE:
A B Y=A.B

0 0 0

0 1 0

1 0 0

1 1 1

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 NOR GATE AS A UNIVERSAL GATE

• NOR TO OR GATE:

• TRUTH TABLE:
A B 𝐴+𝐵 Y=A+B

0 0 1 0
0 1 0 1

1 0 0 1
1 1 0 1

• NOR TO NOT GATE:

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• TRUTH TABLE:
A Y=
A̅
0 1

1 0

• NOR TO AND GATE:

• TRUTH TABLE:
A A̅ B B̅ Y=A.B

0 1 0 1 0

0 1 1 0 0

1 0 0 1 0

1 0 1 0 1

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 EXPERIMENT- 3
• TITLE: Verification of De-morgan’s theorem with logic gates.
• OBJECTIVE: To verify De-morgan’s theorem with logic gates and there
truth table.

• APPARATUS: i) Digital trainer board,

ii) Connecting wire.

• DEMORGAN’S THEORY:
DeMorgan’s Theorems are basically two sets of rules or laws developed from
the Boolean expressions for AND, OR and NOT using two input variables, A
and B. These two rules or theorems allow the input variables to be negated and
converted from one form of a Boolean function into an opposite form.

• DEMORGAN’S FIRST THEOREM:

DeMorgan’s first theorem proves that when two (or more) input variables are
OR and negated, they are equivalent to the AND of the complements of the
individual variables. Thus the equivalent of the NOR function is a negative-
AND function proving that 𝐴̅+̅𝐵̅ =𝐴̅.𝐵̅, and again we can show operation this
using the following truth table.

We can also show that 𝐴̅+̅𝐵̅=𝐴̅.𝐵̅ using the following logic gates example

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The top logic gate arrangement of: 𝐴̅+̅𝐵̅ can be implemented using a standard
NOR gate function using inputs A and B. The lower logic gate arrangement first
inverts the two inputs, thus producing 𝐴̅ and 𝐵̅. Thus then become the inputs to
the AND gate. Therefore the output from the AND gate becomes: 𝐴̅.𝐵̅

Then we can see that a standard AND gate function with inverters (NOT gates)
on each of its inputs produces an equivalent output condition to a standard NOR
gate function, and an individual NOR gate can be represented in this way as the
equivalency of a NOR gate is a negative-AND.

• DEMORGAN’S SECOND THEOREM:

DeMorgan’s Second theorem proves that when two (or more) input variables
are AND and negated, they are equivalent to the OR of the complements of the
individual variables. Thus the equivalent of the NAND function will be a
negative-OR function, proving that 𝐴̅. ̅𝐵̅=𝐴̅ +𝐵̅ . We can show this operation
using the following table.

We can also show that 𝐴̅. ̅𝐵̅ = 𝐴̅+𝐵̅ using logic gates as shown.

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The top logic gate arrangement of: 𝐴.̅ 𝐵 ̅ ̅ can be implemented using a
standard NAND gate with inputs A and B. The lower logic gate arrangement
first inverts the two inputs producing 𝐴̅ and 𝐵̅. These then become the inputs to
the OR gate. Therefore the output from the OR gate becomes: 𝐴̅+𝐵̅.

Then we can see here that a standard OR gate function with inverters (NOT
gates) on each of its inputs is equivalent to a NAND gate function. So an
individual NAND gate can be represented in this way as the equivalency of a
NAND gate is a negative-OR.

• CONCLUTION: The original value and practical value are same. The
truth tables are verified and ok.

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 EXPERIMENT- 4 AND 5
• TITLE: Study of half adder full adder half subtractor and full subtractor.

• OBJECTIVE: To realize half adder and full adder using logic gates.

• APPARATUS: i) Digital trainer board.

ii) Connecting wire.

• HALF-ADDER:

The simplest combinational circuit which performs the arithmetic addition of

two binary digits is called a half-adders. As shown in the diagram, the half-
adder has two inputs and two outputs. The two inputs are two 1-bit numbers A
and 8, and the two outputs are the sum(S) of A and B and the carry bit denoted
by C. From the truth table of the half-adder shown in table, one can understand
that the Sum output is 1 when either of the inputs(A or B) is 1, and the Carry
output is when both the inputs (A and B) are 1.

From Truth table, the logic expression of the sum output can be written as a
Sum of Product expression by summing up the input combination for which the
sum is equal to l.

In the truth table, the sum output is 1 when AB = 01 and AB = 10. Therefore,
the expression for sum is,

Now, this expression can be simplified as,

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• FULL-ADDER:
A half-adder has only two inputs and there is no provision to add a carry
coming from the lower order bits when multi bit addition is performed. For this
purpose, a full-adder is designed. A full-adder is a combinationa l circuit that
performs the arithmetic sum of three input bits and produces a surn output and a
carry.

The logic symbol of the full adder is shown in the diagrams. It consists of three
inputs and two outputs. The two input variables denoted by A (Augend bit) and
B (Addend bit) represent the two significant bits to be added. The third input C
in represents the carry from the previous lower significant position. The outputs
are designated by the symbols 5 (for sum) and C out (for carry).

The truth table for the full-adder circuit is shown above. The binary variable S
gives the value of the LSB of the sum, and the binary variable C out gives the
output carry. A full-adder can be formed using two half-adder circuits and an
OR gate as shown in the previous page.

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 EXPERIMENT- 6

• TITLE: Study of half subtractor and full subtractor.

• OBJECTIVE: To realise half subtractor and full subtractor using logic gates.
• APPARATUS: i) Digital trainer board.
ii) Connecting wire.

• HALF-SUBTRACTOR:
The half-subtractor is a combinational circuit which is used to perform
subtraction of two bites. It has two inputs, X (minued) and Y (subtrahend) and
two outputs D (difference) and Bout (borrow out). The logic symbol for a half-
subtractor is shown. The truth table for half subtractor is shown in Table-1.
From the truth table, it is clear that the different output is O if X=Y and 1 if
X=Y; the borrow output Bout is 1 whenever X<Y. If X is less than Y, then
subtraction is done by borrowing 1 from the next higher order it.

• TRUTH TABLE OF HALF-SUBTRACTOR

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From table 1, as discussed earlier, the Boolean expressions for difference (D)
and Borrow out (Bout) can be written as follows.

From the above equation, the half-subtractor can be implemented using an EX-
OR gate, a NOT gate and a AND gate as show Fig-1.

• FULL-SUBTRACTOR:
A full-subtractor is a combinational circuit that performs subtraction involving
three bits, namely minued bit, subtrahend bit and the borrow from the previous
stage. The logic symbol for full-subtractor is shown in Fig-2.

It has three inputs, X (minued), Y (subtrahend) and Bin (borrow from

previous stage), and two outputs D (difference) and Bout (borrow out. The truth
table for the full-subtractor can be implemented using two half-subtractors and
an OR gate as shown in Fig-2.

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• TRUTH TABLE OF FULL-SUBTRACTOR:

• CONCLUSION: The original value and practical value are same. The truth
tables are verified and ok.

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