Ece Module

MODULES
IN
ELECTRONIC CIRCUITS:
DEVICES AND ANALYSIS
By:
Asso. Prof. DIVINA GRACIA D. RONQUILLO

Engr. ANELA L. SALVADOR
Engr. OLIVER LEXTER JULY A. JOSE
References:
Boylestad, Robert and Louis Nashelsky, Electronic Devices and Circuit Theory,
13th Edition, Singapore: Pearson Education Asia Pte. Ltd., 2016.
Floyd, T. L. Electronic Devices: Conventional Current Version (9th ed.). Jurong,
Singapore: Pearson Education South Asia Pte Ltd., 2012
CONTENTS
MODULE 1 - Introduction to Semiconductors

MODULE 2 - Semiconductor Diodes
MODULE 3 - Diode Applications
MODULE 4 - Transistor Basics and Biasing
MODULE 5 - Transistor Small Signal Amplifiers
MODULE 6 - Transistor Amplifier Circuit Analysis
MODULE 7 - Frequency Response
MODULE 8 - Introduction to Operational-Amplifier (Op-Amp)
MODULE 9 - Op-Amp Application
MODULE 10 - Introduction to Feedback System
MODULE 11 - Passive Filters
MODULE 12 - Active Filters
MODULE 13 - Oscillators
MODULE 14 - Analog-to-Digital Converter and Digital-to-Analog
Converter Circuits
MODULE 15 - Linear Digital and Logic Integrated Circuits (IC)
MODULE 16 - Power Supplies
MODULE 1 INTRODUCTION TO SEMICONDUCTORS
Topic Outcomes
 Become aware of the general characteristics of three important semiconductor

materials: Si, Ge, GaAs.
 Understand conduction using electron and hole theory.
 Describe the properties and difference between n - and p -type materials.
Introduction
It is noteworthy that nowadays, systems are incredibly smaller, current speeds of

operation are truly remarkable, and new gadgets surface every day, leaving us to wonder
where technology is taking us. However, as in many other areas of technology,
fundamental principles change little over time. The first device to be introduced here is
the simplest of all electronic devices, yet has a range of applications that seems endless.
Electronic devices such as diodes, transistors, and integrated circuits are made of a
semiconductive material. An important concept introduced in this module is a PN
junction that is formed when two different types of semiconductive material are joined.
This concept is fundamental to the operation of devices such as the solar cell, the diode,
and certain types of transistors. In this module, the construction, characteristics, and
models of semiconductor diodes were presented.
Electronics Definition
RA 5734, Sec 21 C- The science that deals with the development and application of devices and
systems involving the flow of electrons in vacuum, in gaseous media, plasma and in semi-
conductors.
RA 9292, Sec 3h - The science dealing with the development and application of devices and
systems involving the flow of electrons or other carriers of electric charge, in a vacuum, in
gaseous media, in plasma, in semiconductors, in solid-state and/or in similar devices, including,
but not limited to, applications involving optical, electromagnetic and other energy forms when
transduced or converted into electronic signals.
Development of Electronics
The Vacuum Tube

In 1904, the vacuum tube diode was introduced by J.A. Fleming. In 1906, Lee de Frost
added the third element called “grid” to the vaccum tube diode, resulting to the first amplifier –
the triode.
There was another development in 1906 worth mentioning. Pickard used the first crystal
radio detector. This was a great improvement. It helped to make radio and electronics more
popular. It also suggested the use of semiconductors (crystal) as materials with great promise
for the future of the new field of radio and electronics.
Commercial radio was born in Pittsburgh, Pennsylvania, at station KDKA in 1920. This
marked the beginning of a new era with electronic devices appearing in the home. Commercial
Electronic Circuits: Devices and Analysis 1

television began around 1946, television receivers were very complex compared to most radios.
Other complicated electronic devices were now in used too.
The first vacuum-tube computer was built in 1943 at the University of Pennsylvania.
Soon commercial vacuum-tube computers became available. They were large and expensive,
and generate quite a bit of heat as a result of the vacuum tubes that they used. They were very
unreliable by modern standards. The numerous vacuum tubes and the heat caused many
failures.
The Transistor
In 1947, another major discovery in the history of electronics occurred with the
development of transistor by Shockley, Brattain and Bardeen. With their contribution, they were
awarded the Nobel Prize.
Improvements in the transistor came rapidly and now transistors have all but
completely replaced the vacuum tube. “Solid state” has become a household word. Many people
believe that the transistor is one of the greatest developments of all time.
The Integrated Circuit

The year 1958 marked another breakthrough in electronics. This was the
miniaturization of early microdevices, which led to the utilization of integrated circuits of ICs by
Jack Kilby of Texas Instruments. Integrated circuits are complex combination of several kinds of
devices on a common base, called substrate, or in any piece of silicon. They offer low cost, high
performance, good efficiency, small size, and better reliability than an equivalent circuit built
from separate parts. Today, the Intel Pentium 4 processor has more than 42 million transistors
and a host of other components. Recent advances suggest that 1 billion transistors will soon be
placed in a sliver of silicon smaller than a fingernail.
The first integrated circuit, a phase-shift oscillator, invented by J. S. Kilby in 1958

Computer Chip (CORBIS)
Applications of Electronics
1. Communication Electronics – this includes AM and FM radio, television and satellite

communication.
2. Electric Power – electronics play an important role in the control and monitoring of
electrical systems as in power plants, refineries, etc.
3. Digital Electronics – the circuits for digital applications operate with pulse of voltage or
current. Example of digital electronics includes calculators, computers, data processing
and data communication.
4. Automotive Electronics- applied to cars for changing battery, measuring gauges and
monitoring of engine performances. Important of all is electronic ignition for better
timing of the ignition spark.
5. Industrial Electronics – includes control of heating and welding processes, the use of
elevator’s control, operating of copying machines, automatic door openers and burglar
alarms.
6. Medical Electronics – combines electronics with biology, medical research, diagnosis and
treatment, all use electronic equipments. Examples are the electronic microscope and
electro-cardiograph (ECG) Machine. In hospitals, oscilloscope are commonly used as
display to monitor the heartbeat of patients in the ICU.
Semiconductor Materials: GE, Si, and GaAs
Semiconductors are a special class of elements having a conductivity level between that
of a good conductor and that of an insulator. When doped, conductivity of semiconductor
increases. With a valence of +/– 4 for these elements, the tendency to gain or lose electron to
form a stable 8 shell is the same either way.
In general, semiconductor materials fall into one of two classes: single-crystal and
compound. Single-crystal semiconductors such as germanium(Ge) and Silicon (Si) have
repetitive crystal structure, whereas compound semiconductors such as gallium arsenide
(GaAs), cadmium sulfide (CdS), gallium nitride (GaN), and gallium arsenide phosphide (GaAsP)
are constructed of two or more semiconductor materials of different atomic structures.
The three semiconductors used most frequently in the construction of electronic devices
are Ge, Si, and GaAs.

Covalent Bonding
To fully appreciate why Si, Ge, and GaAs are the semiconductors of choice for the electronics
industry requires some understanding of the atomic structure of each and how the atoms are
bound together to form a crystalline structure.
Atomic
Structure of (a) Silicon; (b) Germanium; and (c) Gallium and Arsenic
As indicated, silicon has 14 orbiting electrons, germanium has 32 electrons, gallium has
31 electrons, and arsenic has 33 orbiting electrons. Gallium has three valence electrons and
arsenic has five valence electrons. Atoms that have four valence electrons are called tetravalent,
those with three are called trivalent, and those with five are called pentavalent.

Covalent bonding of the silicon atom
Some of the unique qualities of Germanium and Silicon noted above are due to their
atomic structure. The atoms of both materials form a very definite pattern that is periodic in
nature. One complete pattern is called crystal and the periodic arrangement of the atoms is a
lattice. In a pure silicon or germanium crystal the four valence electrons of one atom form a
bonding arrangement with four adjoining atoms, as shown in Fig. This bonding of atoms,
strengthened by the sharing of electrons, is called covalent bonding.
Because GaAs is a compound semiconductor, there is sharing between the two different
atoms, as shown below. Each atom is surrounded by atoms of the complementary type. There is
still a sharing of electrons similar to that of Ge and Si, but now five electrons are provided by the
As atom and three by the Ga atom.
Covalent bonding of GaAs crystal
Although the covalent bond will result in a stronger bond between the valence electrons and
their parent atom, it is still possible for the valence electrons to absorb sufficient kinetic energy
from external natural causes to break the covalent bond and assume the “free” state.

Natural causes that can break the bond:
(1) light energy (photons)
(2) thermal energy from the surrounding medium
Intrinsic Semiconductors
The term intrinsic is applied to any semiconductor that has been carefully refined to reduce the
number of impurities to a very low level – essentially as pure as can be made available through
modern technology.
At room temperature, there are approximately 1.5 x 1010 free carriers in a cubic
centimeter of intrinsic silicon material. The free electrons in the materials due only to external
causes are referred to as intrinsic carriers. Table 1.6 compares the number of intrinsic carriers
per cubic centimeter for Ge, Si, and GaAs. It is interesting to note that Ge has the highest number
and the GaAs the lowest.
The number of carriers in the intrinsic form is important, but other characteristic of the
material are more significant in determining its use in the field. One such factor is the relative
mobility (μN) of the free carriers in the material, that is, the ability of the free carriers to move
throughout the material. Table 1.7 clearly reveals that free carriers in GaAs have more than five
times the mobility of free carriers in Si.
Intrinsic Carriers
Semiconductor Intrinsic Carriers (per cm3)
GaAs 1.7 x 106
Si 1.5 x 1010
Ge 2.5 x 1013
Relative Mobility Factor, μN

Semiconductor μN (cm2/V-s)
Si 1500
Ge 3900
GaAs 8500
A change in temperature of a semiconductor material can increase the number of free

electrons quite substantially. As the temperature rises from absolute zero (0K), an increasing
number of valence electrons absorb sufficient thermal energy to break the covalent bond and
contribute to the number of free carriers. This increase number of free carrier will increase the
conductivity index and result in a low resistance level.
Semiconductor materials such as germanium and silicon that shows the reduction in the
resistance with the increase in temperature are said to have negative temperature coefficient.
Conductors have positive temperature coefficient.
Energy Levels
In an isolated structure there are discrete (individual) energy levels associated with each
orbiting electrons as shown.

Energy Levels: (a) discrete level in isolated atomic structure; (b) conduction and valence bands
of an insulator, a semiconductor, and a conductor.
Each material will, in fact, have its own set of permissible energy levels for the electron
in its atomic structure. The farther the electron is from the nucleus, the higher the energy state
and any electron that has left its parent atom has a higher energy state than any electron in the
atomic structure.
Since semiconductors are generally poor conductors, their conductivity can be drastically
increased by the controlled addition of impurities to the intrinsic (pure) semiconductive
material. This process, called doping, increases the number of current carriers (electrons
or holes). The two categories of impurities are n-type and p-type.
Extrinsic Semiconductors: N-Type and P-Type
Extrinsic material – a semiconductor that has been subjected to the doping process.
Extrinsic materials:
(1) N-type
(2) P-type
Doping – a process of adding impurities to pure semiconductor material to provide positive and
negative charges.
Difference Between Intrinsic and Extrinsic Semiconductors
An Intrinsic semiconductor has only covalent bonds for all the atoms, but an extrinsic
semiconductor also has free charges as a result of doping.

Doping of Extrinsic Material
Both n-type and p-type materials are formed by adding impurity atoms into a
germanium and silicon base. The elements for doping generally have an electron valence of
either 5 or 3. As a result, the doped semiconductor has either an excess or a shortage of electrons
in the covalent bond structure.
If certain impurities are added to the intrinsic semiconductor materials, the result will
be permissible energy states in the forbidden band and a net reduction in Eg for both
semiconductor materials – consequently increased carrier density in the conduction band at
room temperature.
Table 1.8
ATOMIC
ELEMENT VALENCE APPLICATION
NUMBER
Donor impurity elements. Gives
Antimony 51 5
electrons to form N-type
Arsenic 33 5
semiconductor. As and Sb for Ge; P for
Phosphorus 15 5
Si.
Intrinsic semiconductor used in pure
Germanium 32 4 crystal form to be doped with
Silicon 14 4 impurity elements. Doped
semiconductors are extrinsic.
Aluminum 13 3 Accept impurity elements. Take
Boron 5 3 electrons to form P-type
Gallium 31 3 semiconductor, Ga and In used for Ge;
Indium 49 3 Al and B for Si.
N-type Material
To increase the number of conduction-band electrons in intrinsic silicon, pentavalent
impurity atoms are added. These are atoms with five valence electrons such as arsenic (As),
phosphorus (P), bismuth (Bi), and antimony (Sb).
Antimony impurity in an n-type material

As illustrated in Figure, each pentavalent atom (antimony, in this case) forms covalent
bonds with four adjacent silicon atoms. Four of the antimony atom’s valence electrons are used
to form the covalent bonds with silicon atoms, leaving one extra electron.
This extra electron becomes a conduction electron because it is not involved in bonding.
Because the pentavalent atom gives up an electron, it is often called a donor atom. The number
of conduction electrons can be carefully controlled by the number of impurity atoms added to
the silicon. A conduction electron created by this doping process does not leave a hole in the
valence band because it is in excess of the number required to fill the valence band.
Effect of donor impurities on the energy band structure
Note that a discrete energy level (called the donor level) appears in the forbidden bond
with an Eg significantly less than that of the intrinsic material. Those “free” electrons due to the
added impurity sit at this energy level and have absolutely no difficulty absorbing a sufficient
measure of thermal energy to move into the conduction band at room temperature there are a
large number of carriers (electrons) in the conduction level and the conductivity of the material
increases significantly. At room temperature in an intrinsic Si material there is about one free
electron for every 1012 atoms (1 to 109 for Ge). If our dosage level were in 10 million (10 7), the
ratio (1012/107 = 105) would indicate that the carrier concentration has increase by a ratio of
10,000 : 1.
Majority and Minority Carriers

Since most of the current carriers are electrons, silicon (or germanium) doped with pentavalent
atoms is an n-type semiconductor (the n stands for the negative charge on an electron). The
electrons are called the majority carriers in n-type material. Although the majority of current
carriers in n-type material are electrons, there are also a few holes that are created when
electron-hole pairs are thermally generated. These holes are not produced by the addition of the
pentavalent impurity atoms. Holes in an n-type material are called minority carriers.
P-type Material
To increase the number of holes in intrinsic silicon, trivalent impurity atoms are added.
These are atoms with three valence electrons such as boron (B), indium (In), and gallium (Ga).
As illustrated in Figure 1–18, each trivalent atom (boron, in this case) forms covalent bonds with
four adjacent silicon atoms. All three of the boron atom’s valence electrons are used in the
covalent bonds; and, since four electrons are required, a hole results when each trivalent atom
is added. Because the trivalent atom can take an electron, it is often referred to as an acceptor
atom. The number of holes can be carefully controlled by the number of trivalent impurity atoms
added to the silicon. A hole created by this doping process is not accompanied by a conduction
(free) electron.

Boron impurity in p-type material
Note that there is now an insufficient number of electron to complete the covalent bonds
or the newly formed lattice. The resulting vacancy is called a hole and is represented by a small
circle of positive sign due to absence of negative charge. Since it’s resulting vacancy will easily
accept a “free” electrons. The impurities added are called acceptor atoms. The resulting p-type
material is electrically neutral, for the same reasons as for the n-type material.
A hole has the same amount of positive charge as proton, equal to that of an electron but
opposite polarity. However, a hole charge is not a proton. A proton is a stable charge in the
nucleus that is not free to move. A hole is a positive charge outside the nucleus present only in
semiconductors because of unfilled covalent bonds. Hole charges can be moved by an applied
potential difference.
Majority and Minority Carriers

Since most of the current carriers are holes, silicon (or germanium) doped with trivalent atoms
is called a p-type semiconductor. The holes are the majority carriers in p-type material. Although
the majority of current carriers in p-type material are holes, there are also a few conduction-
band electrons that are created when electron-hole pairs are thermally generated. These
conduction-band electrons are not produced by the addition of the trivalent impurity atoms.
Conduction-band electrons in p-type material are the minority carriers.
Effect of the hole conduction

If a valence electron acquires sufficient kinetic energy to break its covalent bond to fills
the void created by a hole, then a vacancy or hole, will be created in the covalent bond that
released the electron. There is therefore a transfer of holes to the left and electrons to the right
as shown below.

Electron vs. Hole Flow
Hole Current
In the figure: a) a hole charge is shown at point 1, along with some filled covalent bonds.
Suppose that a valence electron from the filled bond at point 2 moves to point 1. As shown in b)
the bond at point 1 becomes filled and there is a hole charge at point 2. Similarly, an electron can
move from point 3 to point 2 to fill these bonds. With this sequence, the hole charge is moving
from point 1 to point 6 to provide hole current, form left to right here.
To produce this hole current, voltage could be applied across the semiconductor with a
positive terminal at point 1. The direction of hole current is the same as that of conventional
current, opposite from electron flow. All arrow symbols for current in semiconductors are
shown for the direction of hole current.
It should be noted, that hole current flows only in p-type semiconductors. The current is
electron flow in n-type semiconductors and all the wire conductors.
Note: Doping does not really add or subtract charges. The semiconductor is still neutral with
positive and negative charges. However, the doping redistributes the valence electron so that
more free charges are available.
The n- and p-type materials represent the basic building blocks of semiconductor devices.
We will find in the next sections that “joining” of a single n-type with a p-type material will result
in a semiconductor element of considerable importance in electronic systems.
PN Junction
One end of a silicon or germanium crystal can be doped as a p-type material and the
other end as an n-type material. The result is a p-n junction.
Doping increases the free charges in the semiconductor material but the real usefulness
comes from having a junction between successive layers of p and n types. The reason is that the
junction provides an internal contact potential, which is 0.7 V for Si and 0.3 V for Ge. Controlling
this potential across the pn junction makes it possible to control the current in the
semiconductor. The p-type and n-type materials then serve just as electrodes for applying
external voltage to the junction.

PN Junction
At the p-n junction, the negatively charged atoms of the n-type side are attracted to the
positively charged atoms of the p-type side. The electrons in the n-type material migrate across
the junction to the p-type material (electron flow). Or you could say the ‘holes’ in the p-type
material migrate across the junction to the n-type material (conventional current flow). The
result is the formation of a depletion region around the junction.
This region of uncovered positive and negative ions is called the depletion region due to the
“depletion” of free carriers in the region.
In the figure, the semiconductor materials are shown with a thin junction between
successive layers of p-type and n-type formed in a single crystal. The junction itself has a width
of only 10-4 cm. In the magnified view of the junction, the impurity ions are shown in opposite
edges. The ions provide the contact potential across the two sides of a junction labeled Vb. This
potential is considered a barrier voltage because it prevents any more free electron or hole
charges from crossing the junction. In effect, V b maintains the free electrons in the n-type
semiconductor and the hole charges in the p-type to prevent opposite sides from neutralizing
each other.
NOTE: The junction is only an electrical boundary between the p and n semiconductor produced
by alternative types of doping. There is actually no physical separation.
Energy diagrams showing the formation o the pnjunction and depletion region
The Internal Barrier Potential Vb

Looking at the polarity of Vb at the junction at Fig. 1, the negative side of Vb is at the edge
of the P-type semiconductor. Here there are negative ions as a result of the P-type doping. This
side of Vb with negative polarity repels electrons from the N-type semiconductor, preventing
from crossing through the junction. Also, the positive side of V b is at the edge with the N-type
material. The positive ions are produced by the N-type doping. This side of Vb repels hole charges
from the P-type semiconductor to prevent them from crossing through the junction.
Although Vb is an internal contact that cannot be measured directly, its effects can be
overcome by applying an external voltage of 0.3 V for Ge or 0.7 V for Si, in the correct polarity.
The Vb is higher for silicon (in the covalent bonds) junction because its lower atomic number
allows more stability in the covalent bonds.
Depletion Region
Because of its neutral electron – hole pairs, the junction area is considered as a depletion
zone. It has no free charge carriers (holes or electrons) that can be moved, thus it acts as an
insulator. However, the junction still has the ion charges anchored in position to produce V b.
Depletion region comprises the attraction of minority carriers. This is also considered as
a region of uncovered positive and negative ions.
Effect of Temperature
The values 0.3 for Ge and 0.7 for Si are at normal room temperature of 25 °C. However,
Vb decreases at higher temperature. The reason is that more minority charge carriers are
produced by increased thermal energy. The decrease in V b is the reason why avoiding high
temperature is important precaution in operations of circuits with NPN or PNP junction
transistors.
Important Conclusions and Concepts

1. A semiconductor is a material that has a conductivity level somewhere between that of
a good conductor and that of an insulator.
2. A bonding of atoms, strengthened by the sharing of electrons between neighboring
atoms, is called covalent bonding.
3. Increasing temperatures can cause a significant increase in the number of free electrons
in a semiconductor material.
4. Most semiconductor materials used in the electronics industry have negative
temperature coefficients ; that is, the resistance drops with an increase in temperature.
5. Intrinsic materials are those semiconductors that have a very low level of impurities,
whereas extrinsic materials are semiconductors that have been exposed to a doping
process .
6. An n -type material is formed by adding donor atoms that have five valence electrons to
establish a high level of relatively free electrons. In an n -type material, the electron is
the majority carrier and the hole is the minority carrier.
7. A p -type material is formed by adding acceptor atoms with three valence electrons to
establish a high level of holes in the material. In a p -type material, the hole is the majority
carrier and the electron is the minority carrier.
End of Module Questions:

1. Are free electrons in the valence band or in the conduction band?
2. Which electrons are responsible for electron current in silicon?
3. What is a hole?
4. At what energy level does hole current occur?

5. Define doping.
6. What is the difference between a pentavalent atom and a trivalent atom?
7. What are other names for the pentavalent and trivalent atoms?
8. How is an n-type semiconductor formed?
9. How is a p-type semiconductor formed?
10. What is the majority carrier in an n-type semiconductor?
11. What is the majority carrier in a p-type semiconductor?
12. By what process are the majority carriers produced?
13. By what process are the minority carriers produced?
14. What is the difference between intrinsic and extrinsic semiconductors?
15. What is a pn junction?
16. Explain diffusion.
17. Describe the depletion region.
True/False Quiz
1. An atom is the smallest particle in an element.
2. An electron is a negatively charged particle.
3. An atom is made up of electrons, protons, and neutrons.
4. Electrons are part of the nucleus of an atom.
5. Valence electrons exist in the outer shell of an atom.
6. Crystals are formed by the bonding of atoms.
7. Silicon is a conductive material.
8. Silicon doped with p and n impurities has one pn junction.
9. The p and n regions are formed by a process called ionization.
Self-Test
1. Every known element has
(a) the same type of atoms (b) the same number of atoms
(b) a unique type of atom (d) several different types of atoms
2. An atom consists of
(a) one nucleus and only one electron (b) one nucleus and one or more electrons
(b) protons, electrons, and neutrons (d) answers (b) and (c)
3. The nucleus of an atom is made up of
(a) protons and neutrons (b) electrons
(b) electrons and protons (d) electrons and neutrons
4. Valence electrons are
(a) in the closest orbit to the nucleus (b) in the most distant orbit from the nucleus
(b) in various orbits around the nucleus (d) not associated with a particular atom
5. A positive ion is formed when
(a) a valence electron breaks away from the atom
(b) there are more holes than electrons in the outer orbit
(c) two atoms bond together
(d) an atom gains an extra valence electron
6. The most widely used semiconductive material in electronic devices is
(a) germanium (b) carbon (c) copper (d) silicon
7. The difference between an insulator and a semiconductor is
(a) a wider energy gap between the valence band and the conduction band
(b) the number of free electrons
(c) the atomic structure
(d) answers (a), (b), and (c)

8. The energy band in which free electrons exist is the
(a) first band (b) second band (c) conduction band (d) valence band
9. In a semiconductor crystal, the atoms are held together by
(a) the interaction of valence electrons (b) forces of attraction
(b) covalent bonds (d) answers (a), (b), and (c)
10. The atomic number of silicon is
(a) 8 (b) 2 (c) 4 (d) 14
11. The atomic number of germanium is
(a) 8 (b) 2 (c) 4 (d) 32
12. The valence shell in a silicon atom has the number designation of
(a) 0 (b) 1 (c) 2 (d) 3
13. Each atom in a silicon crystal has
(a) four valence electrons
(b) four conduction electrons
(c) eight valence electrons, four of its own and four shared
(d) no valence electrons because all are shared with other atoms
14. Electron-hole pairs are produced by
(a) recombination (b) thermal energy (c) ionization (d) doping
15. Recombination is when
(a) an electron falls into a hole
(b) a positive and a negative ion bond together
(c) a valence electron becomes a conduction electron
(d) a crystal is formed
16. The current in a semiconductor is produced by
(a) electrons only (b) holes only (c) negative ions (d) both electrons and holes
17. In an intrinsic semiconductor,
(a) there are no free electrons
(b) the free electrons are thermally produced
(c) there are only holes
(d) there are as many electrons as there are holes
(e) answers (b) and (d)
18. The process of adding an impurity to an intrinsic semiconductor is called
(a) doping (b) recombination (c) atomic modification (d) ionization
19. A trivalent impurity is added to silicon to create
(a) germanium (b) a p-type semiconductor
(b) an n-type semiconductor (d) a depletion region
20. The purpose of a pentavalent impurity is to
(a) reduce the conductivity of silicon (b) increase the number of holes
(b) increase the number of free electrons (d) create minority carriers
21. The majority carriers in an n-type semiconductor are
(a) holes (b) valence electrons (c) conduction electrons (d) protons
22. Holes in an n-type semiconductor are
(a) minority carriers that are thermally produced
(b) minority carriers that are produced by doping
(c) majority carriers that are thermally produced
(d) majority carriers that are produced by doping
23. A pn junction is formed by
(a) the recombination of electrons and holes
(b) ionization
(c) the boundary of a p-type and an n-type material

(d) the collision of a proton and a neutron
24. The depletion region is created by
(a) ionization (b) diffusion (c) recombination (d) answers (a), (b), and (c)
25. The depletion region consists of
(a) nothing but minority carriers (b) positive and negative ions
(b) no majority carriers (d) answers (b) and (c)
References:
Boylestad, Robert and Louis Nashelsky, Electronic Devices and Circuit Theory, 13th Edition,
Singapore: Pearson Education Asia Pte. Ltd., 2016.
Floyd, T. L. Electronic Devices: Conventional Current Version (9th ed.). Jurong, Singapore:
Pearson Education South Asia Pte Ltd., 2012
Additional Resources:
Lecture Series on Basic Electronics by Prof. T.S.Natarajan, Department of physics, IIT Madras
Lecture - 6 Semiconductor Diodes
https://www.youtube.com/watch?v=wo2S_G4ugz8&list=PL7987F30C41A9ADCB&index=6
Diode and Diode Applications by ALL ABOUT ELECTRONICS

https://www.youtube.com/playlist?list=PLwjK_iyK4LLBj2yTYPYKFKdF6kIg0ccP2

MODULE 2 SEMICONDUCTOR DIODES
Topic Outcomes
 Develop a clear understanding of the basic operation and characteristics of a diode in

the no-bias, forward-bias, and reverse-bias regions.
 Be able to calculate the dc, ac, and average ac resistance of a diode from the
characteristics.
 Understand the impact of an equivalent circuit whether it is ideal or practical.
Introduction
In this module, the operation and characteristics of the diode are covered. Also, three diode
models representing three levels of approximation are presented and testing is discussed. The
semiconductor diode , with applications too numerous to mention, is created by simply joining
an n -type and a p -type material together, nothing more, just the joining of one material with a
majority carrier of electrons to one with a majority carrier of holes. The basic simplicity of its
construction simply reinforces the importance of the development of this solid-state era.
Semiconductor Diodes
As mentioned, a diode is made from a small piece of semiconductor material, usually silicon, in
which half is doped as a p region and half is doped as an n region with a PN junction and depletion
region in between. The p region is called the anode and is connected to a conductive terminal.
The n region is called the cathode and is connected to a second conductive terminal. The basic
diode structure and schematic symbol are shown below:
A diode has three operating conditions:

• No bias
• Forward bias
• Reverse bias
a) No(Zero) Bias – no external force is applied.

A p–n junction with no external bias.
(a) An internal distribution of charge;
(b) a diode symbol, with the defined polarity and the current direction;
(c) demonstration that the net carrier flow is zero at the external terminal of the device when VD = 0 V.
b) Forward Bias – a forward bias is established by applying the positive potential to the P-type
material and the negative potential to the N-type material.
Forward-biased p–n junction. (a) Internal distribution of charge under forward-bias conditions; (b)
forward-bias polarity and direction of resulting current.
The Effect of Forward Bias on the Depletion Region

As more electrons flow into the depletion region, the number of positive ions is reduced. As more
holes effectively flow into the depletion region on the other side of the pn junction, the number

of negative ions is reduced. This reduction in positive and negative ions during forward bias
causes the depletion region to narrow
Note that minority carrier flow has not changed in magnitude, but the reduction in the
width of the depletion region has resulted in heavy majority flow across the junction. The
magnitude of the majority carrier flow will increased exponentially with increasing forward
bias.
Voltage-current relationship
in a forward-biased diode
c) Reverse Bias Condition
A reverse bias condition is established by applying external potential of V volts across

the p-n junction such that the positive terminal is connected to the n-type material and the (g)
negative terminal is connected to the p-type material.

The number of uncovered positive ions in the depletion region of the n-type material will
increase due to large number of “free” electrons drawn to the positive potential of the applied
voltage. For similar reasons, the number of uncovered negative ions will increase in the p-type
material. The net effect, therefore, is the widening of the depletion region.
This widening of the depletion region will establish for a great barrier for the majority
carriers to overcome, effectively reducing the majority carrier flow to zero. The number of
minority carriers, however that find themselves entering the depletion region will not change
resulting in minority carrier flow vectors with the same magnitude with no applied voltage. The
current that exist under this condition is called the Reverse Saturation Current. It is seldom more
than a few microamperes in magnitude except for high-power devices. The term “saturation”
comes from the fact that it reaches the maximum value quickly and does not change significantly
with increase in the reverse bias potential.
Values of reverse voltage can be much higher, in the order of 10 to 20 V or higher, since
there is no forward current.
The diode during the short transition time immediately after the reverse bias diode
Reverse Breakdown
Normally, the reverse current is so small that it can be neglected. However, if the external
reverse-bias voltage is increased to a value called the breakdown voltage, the reverse current
will drastically increase.
This is what happens. The high reverse-bias voltage imparts energy to the free minority
electrons so that as they speed through the p region, they collide with atoms with enough energy
to knock valence electrons out of orbit and into the conduction band. The newly
created conduction electrons are also high in energy and repeat the process. If one electron
knocks only two others out of their valence orbit during its travel through the p region, the
numbers quickly multiply. As these high-energy electrons go through the depletion region, they
have enough energy to go through the n region as conduction electrons, rather than combining
with holes.
The multiplication of conduction electrons just discussed is known as the avalanche
effect, and reverse current can increase dramatically if steps are not taken to limit the current.
When the reverse current is not limited, the resulting heating will permanently damage the
diode. Most diodes are not operated in reverse breakdown, but if the current is limited (by
adding a series-limiting resistor for example), there is no permanent damage to the diode.

Voltage-current relationship in a reverse-biased diode.
Summary of Diode Bias
Resistance Levels
As the operating point of a diode moves from one region to another the resistance of the
diode will also change due to the nonlinear shape of the characteristic curve.
DC or Static Resistance
The application of a dc voltage to a circuit containing a semiconductor diode will result in an

operating point on the characteristic curve that will not change with time. The resistance of the
diode at the operating point can be found simply by finding the corresponding levels of VD and
ID as shown.
𝑽𝑫
𝑹𝑫 =
𝑰𝑫

Determining the dc resistance of a diode at a particular operating point.
In general, therefore, the higher the current through a diode, the lower is the dc resistance level.
AC or Dynamic Resistance
The above reveal that the dc resistance of a diode is independent of the shape of the
characteristic in the region surrounding the point of interest. If a sinusoidal rather than a dc
input is applied, the situation will change completely. The varying input will move the
instantaneous operating point up and down a region of the characteristics and thus defines a
specific change in current and voltage as shown below. With no applied varying signal, the point
of operation would be the Q -point appearing on the figure, determined by the applied dc levels.
The designation Q-point is derived from the word quiescent, which means “still or unvarying.”
Defining the dynamic or ac resistance. Determining the ac resistance at a Q-point.
A straight line drawn tangent to the curve through the Q -point as shown in the above right figure
will define a particular change in voltage and current that can be used to determine the ac or
dynamic resistance for this region of the diode characteristics. An effort should be made to keep
the change in voltage and current as small as possible and equidistant to either side of the Q -
point. In equation form,

∆ 𝑽𝒅
𝒓𝒅 =
∆ 𝑰𝒅
where Δ signifies a finite change in the quantity.
Average AC Resistance
If the input signal is sufficiently large to produce a broad swing such as indicated below, the
resistance associated with the device for this region is called the average ac resistance. The
average ac resistance is, by definition, the resistance determined by a straight line drawn
between the two intersections established by the maximum and minimum values of input
voltage.
∆ 𝑽𝒅
𝒓𝒂𝒗 = |
∆ 𝑰𝒅 𝒑𝒕.𝒕𝒐 𝒑𝒕.
Determining the average ac resistance between indicated limits.
Diode Models
A. Ideal Diode Model

Is a perfect two-state device that exhibits zero impedance when forward-biased and
infinite impedance when reversed biased.
(a) forward bias; (b) reverse bias

The semiconductor diode behaves in a manner similar to a mechanical switch in that it
can control whether current will flow between its two terminals. Ideally, if the semiconductor
diode is to behave like a closed switch in the forward-bias region, the resistance of the diode
should be 0 Ω. In the reverse-bias region its resistance should be ∞ Ω to represent the open-
circuit equivalent.
Ideal Diode Model and Characteristics
The figure below shows the ideal Si diode to a real-world Si diode. The only major difference is
that the commercial diode rises at a level of 0.7 V rather than 0 V, there are a number of
similarities between the two plots. When a switch is closed the resistance between the contacts
is assumed to be 0 Ω . At the plot point chosen on the vertical axis the diode current is 5 mA and
the voltage across the diode is 0 V.
Ideal versus actual semiconductor characteristics.
B. Practical or Actual Diode (Piecewise Linear Model)

One technique for obtaining an equivalent circuit for a diode is to approximate the
characteristics of the device by straight-line segments. The resulting equivalent circuit is called
a piecewise-linear equivalent circuit

Components of the piecewise-linear equivalent circuit.
Defining the piecewise-linear equivalent circuit using straight-line segments

to approximate the characteristic curve.
C. Simplified Equivalent Model
For most applications, the resistance rav is sufficiently small to be ignored in comparison to the
other elements of the network. Removing rav from the equivalent circuit is the same as implying
that the characteristics of the diode
Simplified equivalent circuit for the silicon semiconductor diode.

Diode Characteristics for All Bias Conditions
Silicon semiconductor diode characteristics.

Comparison of Ge, Si, and GaAs diodes
Diode Specification Sheets
Data on specific semiconductor devices are normally provided by the manufacturer in one of
two forms. Most frequently, they give a very brief description limited to perhaps one page. At
other times, they give a thorough examination of the characteristics using graphs, artwork,
tables, and so on. In either case, there are specific pieces of data that must be included for
proper use of the device. They include:
1. The forward voltage VF (at a specified current and temperature)

2. The maximum forward current IF (at a specified temperature)
3. The reverse saturation current IR (at a specified voltage and temperature)
4. The reverse-voltage rating [PIV or PRV or V(BR), where BR comes from the term
“breakdown” (at a specified temperature)]
5. The maximum power dissipation level at a particular temperature
6. Capacitance levels
7. Reverse recovery time trr
8. Operating temperature range

Electrical characteristics of a high-voltage, low-leakage diode.

Terminal characteristics of a high-voltage diode.
Typical Diode Packages
Semiconductor diode notation.

Various types of junction diodes.
Diode Testing
The condition of a semiconductor diode can be determined quickly using (1) a digital display
meter (DDM) with a diode checking function , (2) the ohmmeter section of a multimeter,
or (3) a curve tracer.
Courtesy of Fluke Corporation.

Reproduced with permission
Checking a diode with an ohmmeter.

DMM test for a properly functioning diode Testing a Defective Diode
Curve Tracers (Used with permission from Tektronix Inc.))

1. The characteristics of an ideal diode are a close match with those of a simple switch
except for the important fact that an ideal diode can conduct in only one direction.
2. The ideal diode is a short in the region of conduction and an open circuit in the region of
nonconduction.
3. The region near the junction of a diode that has very few carriers is called the depletion
region.
4. In the absence of any externally applied bias, the diode current is zero.
5. In the forward-bias region the diode current increases exponentially with increase in
voltage across the diode.
6. In the reverse-bias region the diode current is the very small reverse saturation current
until Zener breakdown is reached and current will flow in the opposite direction through
the diode.
7. The reverse saturation current I s will just about double in magnitude for every 10-fold
increase in temperature.
8. The dc resistance of a diode is determined by the ratio of the diode voltage and current
at the point of interest and is not sensitive to the shape of the curve. The dc resistance
decreases with increase in diode current or voltage.
9. The ac resistance of a diode is sensitive to the shape of the curve in the region of interest
and decreases for higher levels of diode current or voltage.
10. The threshold voltage is about 0.7 V for silicon diodes and 0.3 V for germanium diodes.
11. The maximum power dissipation level of a diode is equal to the product of the diode
voltage and current.
12. The capacitance of a diode increases exponentially with increase in the forward-bias
voltage. Its lowest levels are in the reverse-bias region.

1. Explain what the barrier potential is and how it is created.
2. What is the typical value of the barrier potential for a silicon diode?
3. What is the typical value of the barrier potential for a germanium diode?
4. Discuss the significance of the knee of the characteristic curve in forward bias.
5. On what part of the curve is a forward-biased diode normally operated?
6. Which is greater, the breakdown voltage or the barrier potential?
7. On what part of the curve is a reverse-biased diode normally operated?
8. What happens to the barrier potential when the temperature increases?
9. Describe forward bias of a diode.
10. Explain how to forward-bias a diode.
11. Describe reverse bias of a diode.
12. Explain how to reverse-bias a diode.
13. Compare the depletion regions in forward bias and reverse bias.
14. Which bias condition produces majority carrier current?
15. How is reverse current in a diode produced?
16. When does reverse breakdown occur in a diode?
17. Define avalanche effect as applied to diodes.
18. Discuss the significance of the knee of the characteristic curve in forward bias.
19. On what part of the curve is a forward-biased diode normally operated?
20. Which is greater, the breakdown voltage or the barrier potential?
21. On what part of the curve is a reverse-biased diode normally operated?
22. What happens to the barrier potential when the temperature increases?

23. What are the two conditions under which a diode is operated?
24. Under what condition is a diode never intentionally operated?
25. What is the simplest way to visualize a diode?
26. To more accurately represent a diode, what factors must be included?
27. Which diode model represents the most accurate approximation?
True/False Quiz
1. The two regions of a diode are the anode and the collector.
2. A diode can conduct current in two directions with equal ease.
3. A diode conducts current when forward-biased.
4. When reverse-biased, a diode ideally appears as a short.
5. Two types of current in a diode are electron and hole.
Self-Test
1. The term bias means

(a) the ratio of majority carriers to minority carriers
(b) the amount of current across a diode
(c) a dc voltage is applied to control the operation of a device
(d) neither (a), (b), nor (c)
2. To forward-bias a diode,
(a) an external voltage is applied that is positive at the anode and negative at the
cathode
(b) an external voltage is applied that is negative at the anode and positive at the
cathode
(c) an external voltage is applied that is positive at the p region and negative at the
n region
(d) answers (a) and (c)
3. When a diode is forward-biased,
(a) the only current is hole current
(b) the only current is electron current
(c) the only current is produced by majority carriers
(d) the current is produced by both holes and electrons
4. Although current is blocked in reverse bias,
(a) there is some current due to majority carriers
(b) there is a very small current due to minority carriers
(c) there is an avalanche current
5. For a silicon diode, the value of the forward-bias voltage typically
(a) must be greater than 0.3 V
(b) must be greater than 0.7 V
(c) depends on the width of the depletion region
(d) depends on the concentration of majority carriers
6. When forward-biased, a diode
(a) blocks current (b) conducts current
(b) has a high resistance (d) drops a large voltage
7. . A diode is normally operated in
(a) reverse breakdown (b) the forward-bias region
(b) the reverse-bias region (d) either (b) or (c)
8. The dynamic resistance can be important when a diode is

(a) reverse-biased (b) forward-biased
(b) in reverse breakdown (d) unbiased
9. The V-I curve for a diode shows
(a) the voltage across the diode for a given current
(b) the amount of current for a given bias voltage
(c) the power dissipation
(d) none of these
10. Ideally, a diode can be represented by a
(a) voltage source (b) resistance (c) switch (d) all of these
11. . In the practical diode model,
(a) the barrier potential is taken into account (b) the forward dynamic resistance is
taken into account
(c) none of these (d) both (a) and (b)
12. In the complete diode model,
(a) the barrier potential is taken into account
(b) the forward dynamic resistance is taken into account
(c) the reverse resistance is taken into account
(d) all of these
References:
Lecture - 6 SemiConductor Diodes
https://www.youtube.com/watch?v=wo2S_G4ugz8&list=PL7987F30C41A9ADCB&index=6


MODULE 3 DIODE APPLICATIONS
Topic Outcomes
1. Understand the concept of load-line analysis and how it is applied to diode networks.
2. Become familiar with the use of equivalent circuits to analyze series, parallel, and
series-parallel diode networks.
3. Explain and analyze the operation of half-wave and full-wave rectifiers
4. Be able to predict the output response of a clipper and clamper diode configuration.
5. Explain and analyze the operation of diode limiters and clampers
DC Networks
Loadline Analysis
Consider the network at (a) employing a diode having the characteristics in (b). Note that the
“pressure” established by the battery is to establish a current through the series circuit in the
clockwise direction. The fact that this current and the defined direction of conduction of the
diode are a “match” reveals that the diode is in the “on” state and conduction has been
established. The resulting polarity across the diode will be as shown and the first quadrant ( VD
and ID positive) will be the region of interest—the forward-bias region.
Applying Kirchhoff’s voltage law to the series circuit of Fig. 2.1a will result in
𝐸 = 𝑉𝐷 + 𝐼𝐷 𝑅
The two variables in the above equation (VD and ID) are the same as the diode axis variables
(b). This similarity permits a plotting the equation on the same characteristics (b). The
intersections of the load line on the characteristics can easily be determined if one simply
employs the fact that anywhere on the horizontal axis ID = 0 A and anywhere on the vertical axis
VD = 0 V.
Therefore, with VD = 0 V and with ID = 0 A,
𝐸
𝐼𝐷 = | 𝑉𝐷 = 𝐸|𝐼𝐷=0𝐴
𝑅 𝑉𝐷=0𝑉
The point of intersection between the two is the point of operation for this circuit. The
point of operation is usually called the quiescent point (abbreviated “Q-pt.”) to reflect its “still,
unmoving” qualities as defined by a dc network.
Drawing the load line and finding

the point of operation.
Series/Parallel Diode Configurations with DC Inputs
For each configuration the state of each diode must first be determined. Which diodes
are “on” and which are “off”? Once determined, the appropriate equivalent can be substituted
and the remaining parameters of the network determined.
For each configuration, mentally replace the diodes with resistive elements and note the
resulting current direction as established by the applied voltages (“pressure”). If the resulting
direction is a “match” with the arrow in the diode symbol, conduction through the diode will
occur and the device is in the “on” state. The description above is, of course, contingent on the
supply having a voltage greater than the “turn-on” voltage (VT) of each diode.
If a diode is in the “on” state, one can either place a 0.7-V drop across the element, or the
network can be redrawn with the VT equivalent circuit. In time the preference will probably
simply be to include the 0.7-V drop across each “on” diode and draw a line through each diode
in the “off” or open state. Initially, however, the substitution method will be utilized to ensure
that the proper voltage and current levels are determined.
In general, a diode is in the “on” state if the current established by the applied sources is
such that its direction matches that of the arrow in the diode symbol, and D = 0.7 V for silicon
and VD = 0.3 V for germanium.
For general purposes, keep the following in mind for the analysis to follow:
1. An open circuit can have any voltage across its terminals, but the current is always 0 A.
2. A short circuit has a 0-V drop across its terminals, but the current is limited only by the
surrounding network.
2
Note: Source Notation
Problems:
1) Determine the VD for the circuits below:
2) Determine the VD and ID for the networks below:
(c) (d)
3
AND/OR Gates
The network to be analyzed in the following is an OR gate for positive logic. That is, the 10-V
level is assigned a “1” for Boolean algebra and the 0-V input is assigned a “0.” An OR gate is
such that the output voltage level will be a 1 if either or both inputs is a 1. The output is a 0 if
both inputs are at the 0 level. An AND gate is one where a 1 output is only obtained when a 1
input appears at each and every input.
The analysis of AND/OR gates is made easier by using the approximate equivalent for a diode
rather than the ideal because we can stipulate that the voltage across the diode must be 0.7 V
positive for the silicon diode to switch to the “on” state.
Positive logic OR gate Positive logic AND gate
Rectification
- The process of converting an ac signal into a dc signal

Types:
1. Half-wave rectification
2. Full-wave rectification
a. Center-tap
b. Bridge type
1. Half-wave rectifier - simplest rectifier circuits. It removes negative half-cycle of the ac input
signal to establish a dc level
4
Over one full cycle, defined by the period T, the average value (the algebraic sum of the
areas above and below the axis) is zero. The circuit of a half-wave rectifier will generate a
waveform vo that will have an average value of particular, use in the ac-to-dc conversion process.
When employed in the rectification process, a diode is typically referred to as a rectifier. Its
power and current ratings are typically much higher than those of diodes employed in other
applications, such as computers and communication systems.
During the interval t _ 0 → T/2 in Fig. 2.43 the polarity of the applied voltage vi is such as
to establish “pressure” in the direction indicated and turn on the diode with the polarity
appearing above the diode. Substituting the short-circuit equivalence for the ideal diode will
result in the equivalent circuit below, where it is fairly obvious that the output signal is an exact
replica of the applied signal. The two terminals defining the output voltage are connected
directly to the applied signal via the short-circuit equivalence of the diode.
Conduction Region
For the period T/2 → T, the polarity of the input vi is as shown and the resulting polarity
across the ideal diode produces an “off” state with an open-circuit equivalent. The result is the
absence of a path for charge to flow and vo = iR = (0)R = 0 V for the period T/2 → T. The output
5
signal vo now has a net positive area above the axis over a full period and an average value
determined by
Nonconduction Region
Half Wave Rectified Output
The effect of using a silicon diode with VT = 0.7 V is that the applied signal must now be
at least 0.7 V before the diode can turn “on.” For levels of vi less than 0.7 V, the diode is still in an
open circuit state and vo = 0 V as shown in the same figure. When conducting, the difference
between vo and vi is a fixed level of VT = 0.7 V and vo = vi = VT, as shown in the figure. The net
effect is a reduction in area above the axis, which naturally reduces the resulting dc voltage level.
For situations where Vm = VT, the average value with a relatively high level of accuracy is
2. Full-wave Rectifier - a rectifier that uses both cycle of the input signal for its output.
Bridge Network FW
6
for ideal diodes
for practical diodes

PIV
The required PIV of each diode (ideal) can be obtained at the peak of the positive region
of the input signal. For the indicated loop the
maximum voltage across R is Vm and the PIV
rating is defined by
7
Center Tapped Transformer FW
for ideal diodes
for practical diodes
8
2.1 Clippers - have the ability to “clip” off a portion of the input signal without distorting the
remaining part of the alternating waveform. The half-wave rectifier is an example of the
simplest form of diode clipper—one resistor and diode. Depending on the orientation of
the diode, the positive or negative region of the input signal is “clipped” off. There are
two general categories of clippers: series and parallel. The series configuration is defined
as one where the diode is in series with the load, while the parallel variety has the diode
in a branch parallel to the load.
Simple Series Clippers
Simple Parallel Clippers
General procedure for analyzing clipping networks:

1. Make a mental sketch of the response of the network based on the direction of the diode
and the applied voltage levels.
2. Determine the applied voltage (transition voltage) that will cause a change in state for
the diode.
3. Be continually aware of the defined terminals and polarity of vo.
9
4. It can be helpful to sketch the input signal above the output and determine the output at
instantaneous values of the input.
Summary of Clipping Circuits
10
11
2.4 Clampers
The clamping network is one that will “clamp” a signal to a different dc level. The
network must have a capacitor, a diode, and a resistive element, but it can also employ an
independent dc supply to introduce an additional shift. The magnitude of R and C must be
chosen such that the time constant = RC is large enough to ensure that the voltage across
the capacitor does not discharge significantly during the interval the diode is non-
conducting. Throughout the analysis we will assume that for all practical purposes the
capacitor will fully charge or discharge in five time constants.
For a clamping network:

The total swing of the output is equal to the total swing of the input signal.
In general, the following steps may be helpful when analyzing clamping networks:
1. Start the analysis of clamping networks by considering that part of the input signal that
will forward bias the diode.
2. During the period that the diode is in the “on” state, assume that the capacitor will charge
up instantaneously to a voltage level determined by the network.
3. Assume that during the period when the diode is in the “off” state the capacitor will hold
on to its established voltage level.
4. Throughout the analysis maintain a continual awareness of the location and reference
polarity for vo to ensure that the proper levels for vo are obtained.
5. Keep in mind the general rule that the total swing of the total output must match the
swing of the input signal.
Example: Determine vo for the network below:
12
Summary of Clamping Networks
13
Clamping Network with Sinusoidal Input
2.2 Voltage Multipliers
Voltage-multiplier circuits are employed to maintain a relatively low transformer peak
voltage while stepping up the peak output voltage to two, three, four, or more times the peak
rectified voltage.
Half wave Voltage

Doubler
14
Full Wave Voltage Doubler
Voltage Tripler and

Quadrupler
15
2.3 Zener Diodes
- Semiconductor diode that is being operated in the reverse-biased condition.
- Maintain its voltage when the breakdown is reached even the current changes.
- Constant voltage device.
- Backbone of voltage regulation device.
- Result of two phenomena
 Avalanche Breakdown
 Zener Breakdown
The analysis of networks employing Zener diodes is quite similar to that applied to the
analysis of semiconductor diodes in previous sections. First the state of the diode must be
determined followed by a substitution of the appropriate model and a determination of the other
unknown quantities of the network. Unless otherwise specified, the Zener model to be employed
for the “on” state will be as shown below. For the “off” state as defined by a voltage less than VZ
but greater than 0 V with the polarity, the Zener equivalent is the open circuit that appears in
the same figure.
Zener diode equivalent circuits for the “on” state and

“off” state
16
Avalanche breakdown Phenomena
The mechanism by which avalanche breakdown occurs and that free electrons gain
enough energy, while moving under the influence of high reverse potential so that upon striking
an electron they can free it from bonds holding its parent atom. Once this occurs, there current
carriers are available; the original electron will move under the influence of high reverse
potential and repeat the action. Thus, a snowballing of avalanche occurs, and many free
(electrons) current carriers become available. As long as the current is limited to a safe value by
external resistance in the circuit. The diode is undamaged and can continue this type of service
indefinitely.
Zener Breakdown Phenomena

This is caused by a high field emission. This occurs when the voltage applied in the
reverse bias condition is great enough to produce forces which rip electrons from the lattice
structure thereby making free holes electron pair.
PRV – peak Reverse Voltage or Peak Inverse Voltage (PIV)

- The maximum voltage that can be applied to a diode before it enters the zener
region.
There are three regions in the Zener Diode operation.

1. Forward Region
2. Leakage region
3. Reverse Region
Characteristic Curves for Si and Ge
17
Zener Diode Applications
The most common application of Zener diode is to establish a fixed reference voltage for
biasing and comparison purposes.
The location of Zener diode potential can be controlled by varying the doping level. An
increase in doping producing an increase number of added impurities will decrease the Zener
potential. Zener diodes are available having Zener potential of 1.8 to 200V with the power
ratings from ¼ to 50 watts. Silicon is usually preferred in the manufacture of Zener diode
because of its higher temperature and higher current capability.
A. Basic Zener Regulator : Fixed Vi and R
The simplest of Zener diode networks appears in Fig. 2.106. The applied dc voltage is fixed, as is
the load resistor. The analysis can fundamentally be broken down into two steps.
1. Determine the state of the Zener diode by removing it from the network and calculating
the voltage across the resulting open circuit.
2. Substitute the appropriate equivalent circuit and solve for the desired unknowns.
3.
B. Fixed Vin Variable RL]

Due to offset voltage (Vz), there is a specific range of resistor values (and therefore load
current) which will ensure that the zener diode is in the “on state”.
Two small a load resistor RL will result in a voltage VL across the load resistor less that
Vz and the zener will be in the “off state”.
18
at VL = VZ
NOTE: if RL < RL min, zener diode is “off”

if RL > RL min, zener diode is “on”
C. Fixed RL Variable Vin
Analysis:
For fixed values of RL in Fig. 2.106, the voltage Vi must be sufficiently large to turn the
Zener diode on. The minimum turn-on voltage Vi = Vimin is determined by
19
The maximum value of Vi is limited by the maximum Zener current IZM. Since IZM = IR = IL,
Since IL is fixed at VZ/RL and IZM is the maximum value of IZ, the maximum Vi is defined by
Problems:
1. For the network below, determine the range of R L and IL that will result in VRL being
maintained at 10V.
Vz RS 10 (1k)
RL min = -------------- = ------------- = 263.16Ω
Vin – Vz 48 – 10
by KCL at a:
IRS = IZ + IL
IL = IRS - IZ
IRS by KVL:
VRS 38 V
IRS = ---------- = --------- = 38 mA
RS 1k
by KVL:
48 – VRS – 10 = 0
VRS = 38 V
ILmin = IRS - IZmax
= 38 mA – 32 mA
ILmin = 6 mA
10 V
RLmax = ---------- = 1.67 kΩ
6 mA
20
VL 10 V
ILmax = ---------- = ---------- = 38 mA
RLmin 263.16Ω
2. Design the network of the figure below and maintain load voltage equals 12 V for a load
variation IL from 2 mA to 200 mA.
Given: VL = VZ = 12 V
ILmin = 2 mA
ILmax = 200 mA
VL 12 V VL 2V
RLmin = ------------ = ------------ RLmax = ------------ = ------------
ILmax 200 mA ILmin 2mA
= 60Ω = 6kΩ
Vz RS VRS
RL min = -------------- IRS = ----------
Vin – Vz RS
RLmin (Vin – Vz) Vin – Vz

RS = -------------------- = ------------
VZ RS
60 (16 – 12) (16 – 12)
= --------------------- = ------------
12 20
RS = 20Ω IRS = 200 mA
Iz = IRS - IL
Design Specifications:
IZ min = (200 – 200) mA VZ = 12 V
= 0 mA IZ max = 198 mA
IZ max = (200 – 2) mA PZmax = 2.376 W
= 198 mA RS = 20Ω
PZmax = VZ IZmax RLmin = 60Ω
= 12 (198 mA) RLmax = 6kΩ
PZmax = 2.376 watts
21
2.7 Other Special Purpose Diodes
Schottky Diode
In recent years there has been increasing interest in a two-terminal device referred to as
Schottky-barrier, surface barrier, or hot-carrier diode. Its areas of application were first limited
to the very high frequency range due to its quick response time (especially important at high
frequencies) and a lower noise figure (a quantity of real importance in high-frequency
applications). In recent years, however, it is appearing more and more in low-voltage / high
current power supplies and ac-to-dc converters. Other areas of the device include radar systems,
Schottky TTL logic for computers, mixers and detectors in communication equipment,
instrumentation, and analog-to-digital converters.
Comparison of
characteristics of
hot-carrier and p-n
junction diodes.
Schottky (hot-carrier) diode: (a)

equivalent circuit; (b) symbol.
Varactor Diode
Varactor [also called varicap, VVC (voltage-variable capacitance), or tuning] diodes are
semiconductor, voltage-dependent, variable capacitors. Their mode of operations depends on
22
the capacitance that exists at the p-n junction when the element is reverse-biased. Under
reverse-bias conditions, it was established that there is a region of uncovered charge on either
side of the junction that together make up the depletion region width Wd.
Varicap characteristics: C (pF) versus VR.
Varicap diode: (a) equivalent circuit in the

reverse-bias region; (b) symbols
Tunnel Diode
The Tunnel diode was first introduced by Leo Esaki in 1958. Its characteristics are
different from any diode discussed thus far in that it has a negative resistance region. In this
region, an increase in terminal voltage results in a reduction in diode current. The tunnel diode
is fabricated by doping the semiconductor materials that will form the p-n junction at a level one
hundred to several thousand times that of a typical semiconductor diode.
Tunnel diode characteristics.
23
Tunnel diode: (a) equivalent circuit; (b)
symbols.
Photo Diode
The interest in light-sensitive devices has been increasing at an almost exponential rate
in recent years. The resulting field of optoelectronics will be receiving a great deal of research
interest as efforts are made to improve efficiency levels. Through the advertising media, the
layperson has become quite aware that light sources offer a unique source of energy. This
energy, transmitted as discrete packages called photons, has a directly related to the frequency
of the traveling light wave.
24
Photodiode: (a) basic biasing arrangement and construction; (b) symbol. Photodiode
characteristics.
Light Emitting Diode
The increasing use of digital displays in calculators, watches, and all forms of
instrumentation has contributed to the current extensive interest in structures that will emit
light when properly biased. The two types in common use today to perform this function are the
light-emitting diode (LED) and the liquid-crystal display (LCD).
As the name implies, the light-emitting diode (LED) is a diode that will give off visible
light when it is energized. In any forward-biased p-n junction there is, within the structure and
primarily close to the junction, a recombination of holes and electrons. This recombination
requires that the energy possessed by the unbound free electron be transferred to another state.
In all semiconductor p-n junctions some of this energy will be given off as heat and some in the
form of photons. In silicon and germanium the greater percentage is given up in the form of heat
and emitted light is insignificant. In other materials, such as gallium arsenide phosphide or
gallium phosphide, the number of photons of light energy emitted is sufficient to create a very
visible light source.
The process of giving off light by applying an electrical source of energy is called
electroluminescence.
(a) Process of
electroluminescence in the
LED;
(b) graphic symbol.
25
Standard response curve of the human eye, showing the
eye’s response to light energy peaks at green and falls off for
blue and red.
Problems:
1. Solve for I .
2. Solve for Vo.
3. Solve for ID and VO.
26
4. Draw the output voltage waveform.
5. Draw the output voltage waveforms.
6. Draw VO.
7. Design the clamping network below.
27
7. Design the clamping network below.
1. The characteristics of a diode are unaltered by the network in which it is employed.

2. The network simply determines the point of operation of the device.
3. The operating point of a network is determined by the intersection of the network
equation and an equation defining the characteristics of the device.
4. For most applications, the characteristics of a diode can be defined simply by the
threshold voltage in the forward-bias region and an open circuit for applied voltages less
than the threshold value.
5. To determine the state of a diode, simply think of it initially as a resistor, and find the
polarity of the voltage across it and the direction of conventional current through it. If
the voltage across it has a forward-bias polarity and the current has a direction that
matches the arrow in the symbol , the diode is conducting.
6. To determine the state of diodes used in a logic gate, first make an educated guess about
the state of the diodes, and then test your assumptions . If your estimate is incorrect,
refine your guess and try again until the analysis verifies the conclusions.
7. Rectification is a process whereby an applied waveform of zero average value is changed
to one that has a dc level . For applied signals of more than a few volts, the ideal diode
approximations can normally be applied.
8. It is very important that the PIV rating of a diode be checked when choosing a diode for
a particular application. Simply determine the maximum voltage across the diode under
reverse-bias conditions , and compare it to the nameplate rating. For the typical half-
wave and full-wave bridge rectifiers, it is the peak value of the applied signal. For the CT
transformer full-wave rectifier, it is twice the peak value (which can get quite high).
9. Clippers are networks that “ clip ” away part of the applied signal either to create a
specific type of signal or to limit the voltage that can be applied to a network.
10. Clampers are networks that “ clamp ” the input signal to a different dc level. In any event,
the peak-to-peak swing of the applied signal will remain the same.

1. At what point on the input cycle does the PIV occur?
2. For a half-wave rectifier, there is current through the load for approximately what
percentage of the input cycle?
3. What is the average of a half-wave rectified voltage with a peak value of 10 V?
4. What is the peak value of the output voltage of a half-wave rectifier with a peak sinewave
input of 25 V?
28
5. What PIV rating must a diode have to be used in a rectifier with a peak output voltage
of 50 V?
6. How does a full-wave voltage differ from a half-wave voltage?
7. What is the average value of a full-wave rectified voltage with a peak value of 60 V?
8. Which type of full-wave rectifier has the greater output voltage for the same input
voltage and transformer turns ratio?
9. For a peak output voltage of 45 V, in which type of rectifier would you use diodes with a
PIV rating of 50 V?
10. What PIV rating is required for diodes used in the type of rectifier that was not selected
in Question 4?
11. Discuss how diode limiters and diode clampers differ in terms of their function.
12. What is the difference between a positive limiter and a negative limiter?
13. What is the maximum voltage across an unbiased positive silicon diode limiter during
the positive alternation of the input voltage?
14. To limit the output voltage of a positive limiter to 5 V when a 10 V peak input is applied,
what value must the bias voltage be?
15. What component in a clamping circuit effectively acts as a battery?
True/False Quiz
1. A basic half-wave rectifier consists of one diode.

2. The output frequency of a half-wave rectifier is twice the input frequency.
3. The diode in a half-wave rectifier conducts for half the input cycle.
4. PIV stands for positive inverse voltage.
5. Each diode in a full-wave rectifier conducts for the entire input cycle.
6. The output frequency of a full-wave rectifier is twice the input frequency.
7. A bridge rectifier uses four diodes.
8. In a bridge rectifier, two diodes conduct during each half cycle of the input.
9. The purpose of the capacitor filter in a rectifier is to convert ac to dc.
10. The output voltage of a filtered rectifier always has some ripple voltage.
11. A smaller filter capacitor reduces the ripple.
12. Line and load regulation are the same.
13. A diode limiter is also known as a clipper.
14. The purpose of a clamper is to remove a dc level from a waveform.
15. Voltage multipliers use diodes and capacitors.
Self-Test
1. The average value of a half-wave rectified voltage with a peak value of 200 V is
(a) 63.7 V (b) 127.2 V c) 141 V (d) 0 V
2. When a 60 Hz sinusoidal voltage is applied to the input of a half-wave rectifier, the output
frequency is
(a) 120 Hz (b) 30 Hz (c) 60 Hz (d) 0 Hz
3. The peak value of the input to a half-wave rectifier is 10 V. The approximate peak value
of the output is
(a) 10 V (b) 3.18 V (c) 10.7 V (d) 9.3 V
4. For the circuit in Question 15, the diode must be able to withstand a reverse voltage of
(a) 10 V (b) 5 V (c) 20 V (d) 3.18 V
5. The average value of a full-wave rectified voltage with a peak value of 75 V is
(a) 53 V (b) 47.8 V (c) 37.5 V (d) 23.9 V
29
6. When a 60 Hz sinusoidal voltage is applied to the input of a full-wave rectifier, the output
frequency is
(a) 120 Hz (b) 60 Hz (c) 240 Hz (d) 0 Hz
7. The total secondary voltage in a center-tapped full-wave rectifier is 125 V rms.
Neglecting the diode drop, the rms output voltage is
(a) 125 V (b) 177 V (c) 100 V (d) 62.5 V
8. When the peak output voltage is 100 V, the PIV for each diode in a center-tapped full-
wave rectifier is (neglecting the diode drop)
(a) 100 V (b) 200 V (c) 141 V (d) 50 V
9. When the rms output voltage of a bridge full-wave rectifier is 20 V, the peak inverse
voltage across the diodes is (neglecting the diode drop)
(a) 20 V (b) 40 V (c) 28.3 V (d) 56.6 V
10. The ideal dc output voltage of a capacitor-input filter is equal to
(a) the peak value of the rectified voltage
(b) the average value of the rectified voltage
(c) the rms value of the rectified voltage
11. A certain power-supply filter produces an output with a ripple of 100 mV peak-to-peak
and a dc value of 20 V. The ripple factor is
(a) 0.05 (b) 0.005 (c) 0.00005 (d) 0.02
12. A 60 V peak full-wave rectified voltage is applied to a capacitor-input filter. If f = 120 Hz,
RL = 10 k , and C = 10 F, the ripple voltage is
(a) 0.6 V (b) 6 mV (c) 5.0 V (d) 2.88 V
13. If the load resistance of a capacitor-filtered full-wave rectifier is reduced, the ripple
voltage
(a) increases (b) decreases (c) is not affected (d) has a different frequency
14. Line regulation is determined by
(a) load current
(b) zener current and load current
(c) changes in load resistance and output voltage
(d) changes in output voltage and input voltage
15. Load regulation is determined by
(a) changes in load current and input voltage
(b) changes in load current and output voltage
(c) changes in load resistance and input voltage
(d) changes in zener current and load current
16. A 10 V peak-to-peak sinusoidal voltage is applied across a silicon diode and series
resistor. The maximum voltage across the diode is
(a) 9.3 V (b) 5 V (c) 0.7 V (d) 10 V (e) 4.3 V
17. In a certain biased limiter, the bias voltage is 5 V and the input is a 10 V peak sine wave.
If the positive terminal of the bias voltage is connected to the cathode of the diode, the
maximum voltage at the anode is
(a) 10 V (b) 5 V (c) 5.7 V (d) 0.7 V
18. In a certain positive clamper circuit, a 120 V rms sine wave is applied to the input. The
dc value of the output is
(a) 119.3 V (b) 169 V (c) 60 V (d) 75.6 V
19. The input of a voltage doubler is 120 V rms. The peak-to-peak output is approximately
(a) 240 V (b) 60 V (c) 167 V (d) 339 V
20. If the input voltage to a voltage tripler has an rms value of 12 V, the dc output voltage is
approximately
(a) 36 V (b) 50.9 V (c) 33.9 V (d) 32.4 V
30
21. When a silicon diode is working properly in forward bias, a DMM in the diode test
position will indicate
(a) 0 V (b) OL (c) approximately 0.7 V (d) approximately 0.3 V
22. When a silicon diode is open, a DMM will generally indicate
(a) 0 V (b) OL (c) approximately 0.7 V (d) approximately 0.3 V
23. In a rectifier circuit, if the secondary winding in the transformer opens, the output is
(a) 0 V (b) 120 V (c) less than it should be (d) unaffected
24. If one of the diodes in a bridge full-wave rectifier opens, the output is
(a) 0 V (b) one-fourth the amplitude of the input voltage
(c) a half-wave rectified voltage (d) a 120 Hz voltage
25. If you are checking a 60 Hz full-wave bridge rectifier and observe that the output has a
60 Hz ripple,
(a) the circuit is working properly (b) there is an open diode
(c) the transformer secondary is shorted (d) the filter capacitor is leaky
References:
Lecture - 7 Application of Diodes
https://www.youtube.com/watch?v=qhXZuVFhVzo&list=PL7987F30C41A9ADCB&index=7
Lecture - 7 Waveshaping using Diodes
https://www.youtube.com/watch?v=YchvppCoSvc&list=PL7987F30C41A9ADCB&index=8

31
MODULE 4 TRANSISTOR BASICS AND BIASING
Topic Outcomes
1. Become familiar with the basic construction and operating characteristics of the
Bipolar Junction Transistor and Field Effect Transistors
2. Be able to perform a load-line analysis of the most common BJT configurations and FET
networks.
3. Discuss and analyze various BJT and FET biasing configurations.
Transistor Fundamentals
During the period 1904–1947, the vacuum tube was undoubtedly the electronic device
of interest and development. In 1904, the vacuum-tube diode was introduced by J. A. Fleming.
Shortly thereafter, in 1906, Lee De Forest added a third element, called the control grid, to the
vacuum diode, resulting in the first amplifier, the triode. In the following years, radio and
television provided great stimulation to the tube industry. Production rose from about 1
million tubes in 1922 to about 100 million in 1937. In the early 1930s the four-element tetrode
and five-element pentode gained prominence in the electron-tube industry. In the years to
follow, the industry became one of primary importance and rapid advances were made in
design, manufacturing techniques, high-power and high-frequency applications, and
miniaturization.
On December 23, 1947, however, the electronics industry was to experience the advent
of a completely new direction of interest and development. It was on the afternoon of this day
that Walter H. Brattain and John Bardeen demonstrated the amplifying action of the first
transistor at the Bell Telephone Laboratories. The original transistor (a point-contact
transistor) is shown below. The advantages of this three terminal solid-state device over the
tube were immediately obvious: It was smaller and lightweight; had no heater requirement or
heater loss; had rugged construction; and was more efficient since less power was absorbed by
the device itself; it was instantly available for use, requiring no warm-up period; and lower
operating voltages were possible.
Transistor Construction
The transistor is a three-layer semiconductor device consisting of either two n- and one
p-type layers of material or two p- and one n-type layers of material. The former is called an
npn transistor, while the latter is called a pnp transistor. Both are shown in Fig. 3.2 with the
proper dc biasing. The emitter layer is heavily doped, the base lightly doped, and the collector
only lightly doped. The outer layers have widths much greater than the sandwiched p- or n-
type material.
For the transistors shown the ratio of the total width to that of the center layer is
0.150/0.001 = 150:1. The doping of the sandwiched layer is also considerably less than that of
the outer layers (typically, 10_1 or less). This lower doping level decreases the conductivity
1
(increases the resistance) of this material by limiting the number of “free” carriers. For the
biasing, the terminals have been indicated by the capital letters E for emitter, C for collector,
and B for base. The abbreviation BJT, from bipolar junction transistor, is often applied to this
three terminal device. The term bipolar reflects the fact that holes and electrons participate in
the injection process into the oppositely polarized material. If only one carrier is employed
(electron or hole), it is considered a unipolar device.
Types of transistors: (a) pnp; (b) npn.
3.3 Transistor Operation

The basic operation of the transistor will now be
described using the pnp transistor. The operation of the npn
transistor is exactly the same if the roles played by the
electron and hole are interchanged. Note the similarities
between this situation and that of the forward-biased diode in
Chapter 1. The depletion region has been reduced in width
due to the applied bias, resulting in a heavy flow of majority
carriers from the p- to the n-type material.
Forward-biased junction of a pnp transistor.
Reverse-biased junction of a pnp transistor
2
Majority and minority carrier flow of a pnp
transistor.
Note: One p-n junction of a transistor is reverse

biased, while the other is forward biased.
Applying Kirchhoff’s current law to the transistor
of Fig. 3.5 as if it were a single node, we obtain
and find that the emitter current is the sum of the collector and base currents. The collector
current, however, is comprised of two components—the majority and minority carriers. The
minority-current component is called the leakage current and is given the symbol ICO (IC
current with emitter terminal Open). The collector current, therefore, is determined in total by
Basic BJT Construction
3
Standard BJT Symbols
Transistor Configurations
1) Common Emitter – most commonly used; input is applied in the base and the
output is taken from the collector.
Notation and symbols used with the common-emitter configuration: (a) npn transistor; (b)
pnp transistor.
4
(a) (b)
Characteristics of a silicon transistor in the common-emitter configuration: (a) collector
characteristics; (b) base characteristics.
2) Common Base – input is applied in the emitter and output taken from the collector; has
low current gain but high voltage gain.
Notation and symbols used with the common-base configuration: (a) pnp transistor; (b)
npn transistor.
5
(a) (b)
(a) Input or driving point characteristics for a common-base silicon transistor amplifier.
(b)Output or collector characteristics for a common-base transistor amplifier.
3) Common Collector – is sometimes called Emitter follower; input is applied to the base
and output taken from emitter.
Notation and symbols used with the common-collector configuration: (a) pnp ; (b) npn.
6
Other Transistor Basics
For each transistor there is a region of operation on the characteristics which will
ensure that the maximum ratings are not being exceeded and the output signal exhibits
minimum distortion. All of the limits of operation are defined on a typical transistor
specification sheet.
Operating Regions
• Active—Operating range of the amplifier.
• Cutoff—The amplifier is basically off. There is voltage, but little current.
• Saturation—The amplifier is full on. There is current, but little voltage.
Transistor Currents
Transistor Voltages
VCC – collector biasing

voltage. This is a power
supply voltage that is
directly or indirectly
applied to the collector
terminal of the
transistor.
VBB – base biasing voltage.
This is a dc voltage that
is used to bias the base
of the transistor. It may
directly applied from a
dc apply voltage or may
be applied to the base
by resistor circuit.
VEE – emitter biasing voltage. For common emitter, VEE will be nothing more than a
ground connection
VC – is a dc voltage measured from the collector terminal to ground
7
VB – dc voltage measured from base terminal to the ground
VE – dc voltage measured from the emitter terminal to the ground
VBE – voltage measured between base-emitter junction
VCE – voltage measured between collector-emitter junction
Alpha and Beta I

Alpha () relates the DC currents IC and IE : α dc  C
IE
Ideally: a = 1
In reality: a is between 0.9 and 0.998
ΔI C
Alpha () in the AC mode: αac 
ΔI E
 represents the amplification factor of a transistor. ( is sometimes referred to

as hfe, term used in transistor modeling calculations)
β dc 
IC IC
Inthe
ac 
DC mode:
VCE  cons tan t
IB 
InIBAC mode:
Power Dissipation
Common Base: PCmax  VCBIC
Common-Emitter: PCmax  VCE IC
Common- PCmax  VCE IE
Collector
Defining the linear (undistorted)
region of operation for a
transistor.
8
Transistor specification sheet.
Transistor testing
• Curve Tracer
Provides a graph of the characteristic curves.
• DMM
Some DMMs measure bDC or hfe.
• Ohmmeter
9
Transistor Casing and Terminal Identification
Various types of transistors: (a) Courtesy General Electric Company;

(b) and (c) Courtesy of Motorola Inc.; (d) Courtesy International Rectifier Corporation.
Transistor Biasing
The basic function of a transistor is to accomplish amplification. One important

requirement during amplification is that only the magnitude of the signal should increase and
there should be no change in signal shape. The increase in magnitude of the signal without any
change in shape is known as faithful amplification. In order to achieve this, means are provided
to ensure that input circuit (i.e. base-emitter junction) of the transistor remains forward biased
and output circuit (i.e. collector-base junction) remains properly reverse biased at all times.
This is known as transistor biasing. Biasing to a transistor can be provided by a battery or a
10
circuit. The latter method is perfect because batteries are costly and require frequent
replacement.
Transistor biasing means to keep the input circuit (i.e. base-emitter junction) always
forward biased and output circuit (i.e. collector-base junction) always reverse biased. To
ensure this, the following basic conditions must be fulfilled:
1. There should be proper zero signal current flow. In other words, in the absence of
signal, the collector current should be at least equal to the maximum collector due
to signal alone.
2. There should be proper minimum VBE. For silicon transistors, this value should not
fall below 0.7V and for germanium transistor it should not fall below 0.5V.
3. There should be proper minimum VCE. For silicon transistors, this value should not
fall below 1V and for germanium transistors, it should not fall below 0.5 V
The conditions (1) ensure the base-emitter junction shall remain properly forward
biased during all parts of the signal. On the other hand, conditions ( 3) ensure that collector-
base junction shall remain properly reverse at all times.
Biasing – refers to the DC voltages applied to a transistor in order to turn it on so that it
can amplify the AC signal.
Biasing and the Three States of Operation
• Active or Linear Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
 Cutoff Region Operation
Base–Emitter junction is reverse biased
Base–Collector junction is reverse biased
 Saturation Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is forward biased
Methods of Transistor Biasing. In practice, transistor biasing is obtained by utilizing the

battery VCC connected in the output circuit. The following are the most commonly methods of
biasing:
• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Collector-emitter loop
• Voltage divider bias circuit
• DC bias with voltage feedback
11
Stabilization of Operating Point. The zero signal values of IC and VCE is called the
operating point. An important requirement of a biasing circuit is that it should ensure
stabilization of operating point i.e. it should hold the zero signal IC and VCE constant
irrespective of the changes in temperature or transistor replacement. Any biasing circuit which
does not provide stabilization of operating point is undesirable because it will ultimately lead
to the destruction of transistor due to thermal runway.
The base resistor method of

transistor biasing does not provide
stabilization of operating point and is
rarely used in practice. The biasing
with feedback resistor provides only
some stabilization. However, voltage
divider methods provides very good
stabilization of operating point and
has become the universal method for
transistor biasing.
Stability factor. The rate of
change collector current w.r.t.
leakage current ICO (i.e. ICBO) at constant b and Ib is called stability factor i.e.
The stability factor indicates the change in collector current I C due to change in
collector leakage current ICO. Thus a stability factor of 50 means that I C changes 50 times as
much as any change in ICO. In order to achieve greater thermal stability, it is desirable to have
as low stability factor as possible. The ideal value of S is 1. However, it is impossible to achieve
this ideal value (i.e. S = 1) in a biasing circuit. Experience shows that a biasing circuit that has S
< 10 will give satisfactory performance. The main reason foe using potential divider method of
biasing is that is has low stability factor. Typical value of stability factor for this circuit is about
10.
12
Types of Transistor Bias Circuits
A. Fixed Bias Circuit

Error!
Required: IB, IC, VCE

Solution:
Redraw the DC equivalent Circuit
To solve IB, take the base emitter loop:
By KVL: VCC – IBRB – VBE = 0

VCC - VBE
13
IB =
RB
but IC =  IB
for VCE take the collector to the emitter loop:
By KVL: VCC – ICRC – VCE = 0
VCE = VCC - IBRC
Example:
For the circuit below determine: a) IBQ b) ICQ
c) VCEQ d) VCB
VCC - VBE 12 – 0.7

a) ICQ = = = 0.047 mA
RB 240k
b) ICQ = IBQ = 50(0.047 mA) = 2.35 mA
c) VCC – ICRC – VCE = 0
VCEQ = 12 – (2.35 mA)(2.2k) = 6.83V
d) VCE = VC – VE; VE = 0
VC = VCE = 6.83V
14
VBE = VB – VE
VB = VBE = 0.7V
Therefore VCB = VC – VB
= 6.83 – 0.7
= 6.13 V
B. Emitter Stabilized Bias Circuit
Determine: IBQ, ICQ, VCEQ, VBC

Solution: at base to emitter loop
By KVL: VCC – IBRB – VBE - IERE = 0
VCC - VBE
IB =
RB + (1+) RE
20 – 0.7
IBQ = 430k + (50+1) 1k
= 40.12 A
ICQ =  IBQ
15
= (40.12 A) 50
= 2.006 mA
IE = IB (1 + )
= 40.12 A (1 + 50)
= 2.046 mA
VE = IE RE;
= (2.046 mA) 1k
= 2.046 V
for VCE: collector-emitter loop:
-VCE – IERE – VCC – ICRC = 0
VCE = VCC - IBRC – IB (1 + ) RE
= 20 – (2.0006)(2) – (2.046)(1)
= 13.942 V
VBC = VB - VC
= (VBE + VE) – (VCE - VE)
= (0.7 + 2.046) – (13.942 – 2.046)
= 2.746 – 15.988
= -13.242 V
C. Voltage Divider Bias Circuit (Beta independent Biasing)

NOTE: If circuit parameters are chosen, voltage divider bias can make collector current
and collector emitter voltage stable, though beta transistor gain is varying.
This is a very stable bias circuit.
The currents and voltages are almost independent of variations in .
16
Solution 1: Use Thevenin’s Analysis
R1R2 35k(4k)
RTH = = = 3.56 k
R1 + R2 35k+4k
VCCR2 20V(4k)
RTH = = = 2.05 V
R1 + R2 35k+4k
VCCR2 20V(4k)
ETH = = = 2.05V
R1 + R2 35k+4k
at base to emitter loop: by KVL:

ETH – IBRTH – VBE – IERE = 0;
IE = IB (1 + )
ETH – IBRTH – VBE – IB (1 + ) RE = 0
ETH-VBE 2.05 – 0.7
17
IB = = RTH+(1+)RE
3.59+(1+150)(2)
= 4.42A
ICQ = IB
= 150 (4.42 A)
= 0.663 mA
for VCEQ use collector to emitter loop

VCC – ICRC – VCE – IERE = 0
VCE = VCC – ICRC – IERE
= 20 – (0.633)(3) – (1 + 150)(4.42)(2k)
= 16.68 V
For VBC:
VBC = VB - VC (by double subscript notation)
= (VBE + VE) – (VCE - VE); VE = IERE
= [0.7 + (0.667m)(2k)] – [16.68 + 1.33]
= 2.03 V – 18.01 V
= -15.98 V
Solution 2: Approximation Analysis
for the base-emitter loop:
if Ri is very much greater than R2 (Ri >> R2) then I1 will go to R2, that is I1  I2.
18
Design Criteria for RIN:
RIN  10R2 for II  I2
(1 + ) RE  10R2;  >> 1
RE  10 R2 (if satisfied, use approximation method)
for the given circuit: RE  10 R2

150(2)  10(4)
300  40
then we approx. I I – I2 = I
VCC
R 2 VCC
I = VB 
R1  R 2
R1+R2
20
=
(35k+4)k
= 0.513 mA
using base-emitter loop:

I1 = I2 = I
VCC – I1R1 – VBE – IERE = 0
VCC – IR1 - VBE

IE =
RE
20 – (0.513) (35k) – 0.7
=
2k
IE = 0.673 mA
IC  IE since IB = 0
IC  0.673 mA
For VCB
using collector-emitter loop:
19
VCC – ICRC – VCE – IERE = 0
VCE = VCC – ICRC – IERE
VCE = (20) – (0.673 mA)(3k) – (0.673mA)(2k)
VCE = 16.64V
D. Collector Feedback Bias Circuit
Determine: ICQ and VCEQ

Solution:
IC ’ = I C + IB
VCC – IC’RC – IBRB – VBE – IERE = 0;
IE  IC  IC’ = ( + 1) IB
VCC - ( + 1) IBRC - IBRB - VBE - ( + 1) IBRE = 0
VCC - VBE 10 – 0.7
IB = =
IB( RC-RB-RE) 250k+90(4.7+1.2)k
= 11.91 A
ICQ = IB
= 90(11.91A)
= 1.07 A
For VCEQ:
20
VCC – IC’RC – VCE – IERE = 0;
IE  IC  IC ’
VCE = VCC – IC‘RC – ICRE
= VCC - IC (RC + RE)
VCE = 10 – 1.07m (4.7 + 1.2)k
= 3.69V
Loadline Analysis
Loadline – is the line drawn over collector curves to determine all possible operating
points.
At saturation condition:
1.) set VCE = 0 (short circuit VCE)
2.) IC = ICSAT (maximum value that collector current could have)
VCC
ICSAT = --------
RC
At cut-off condition:
1.) Open circuit VCE; IC = 0
2.) VCE = VCC (maximum value that VCE could have)
NOTES: -Upper end of the loadline approximates the value of ICSAT  VCC / RC
-Lower end of the loadline approximates the value of VCE cut off  VCC
Transistor Designs Solved Problems

Determining circuit components when output current and voltage level are defined.
A. Fixed Bias Circuit

For the transistor characteristics shown, determine the value of V CC, RC, RB
21
From the loadline: ICSAT = 10 mA
VCE cut off = 25 V
IBQ = 50 A
But ICSAT = VCC / RC ;

VCE cut off = VCC
RC = VCC / ICSAT
= (25V)/(10mA)
RC = 2.5 k
for the base emitter loop:

by KVL: VCC - IBRB - VBE = 0
RB = (VCC - VBE)/IB
= (25-0.7)/50
RB = 486 k
B. Voltage Divider Bias
Given: ICQ = 2mA and VCEQ = 10 V. Determine R1 and RC
Solution:
VE = IERE
= (2mA) (1.2k)
= 2.4 V
For RC, use collector – emitter loop:
VCC - ICRC - VCE - VE = 0

VCC - VCE - VE
RC =
IC
18 – 10 – 2.4
=
2mA
22
RC = 2.8k
For R1 : Since IB  0
VCC divides its voltage to R1 and R2: then using the base voltage VB
Solving for the base voltage VB by voltage divider:
VCC (R2)
VB =
R1 + R2
VB = VBE + VE
= 0.7 + 2.4
VB = 3.1 V
Then
(18) (18)
3.1 =
R1 + (18)
18(18) – 18(3.1)
R1 =
3.1
R1 = 86.52k
C. Emitter Stabilized Bias
Stabilized Bias
NOTE: RE and RC can’t be
solved right away through
collector emitter loop. RE
stabilizes  and leakage
current. VE limits the swing of
the VCE if VE is about ¼ to
1/10 of VCC, there is linearity
in the VCE swing.
23
Design condition:
VE = 1/10
VCC = (1/10)(20)
= 2V
IB = IC / 
= (2mA)/(150)
= 13.33A
IE = (1+) IB
= (1+150)(13.33A)
= 2.01mA
RE = VE / IE
= (2V)/(2.01mA)
= 1 k
for RC: use collector to emitter loop

VCC - ICRC - VCE - VE = 0
VCC - VCE - VE (10 – 10 – 2)V
RC = IC = 2mA
RC = 4k
for RB: use base emitter loop:
VCC - IBRB - VBE - VEE = 0
VCC - VBE - VEE 20 – 0.7 – 2

RB = =
IB 13.33A
RB = 1.3 M
Problem Exercises
1) For the emitter-stabilized bias circuit given, determine:
24
2) Given the information provided, determine:
3) For the voltage-divider bias configuration, determine:
25
4) Given the information provided, determine:
26
5) For the collector feedback configuration, determine:
6) For the network, determine:
7) Determine RC and RB for a fixed-bias configuration if VCC = 12V, ß=80 and ICQ = 2.5mA with
VCEQ = 6V. Use standard values.
27
Field Effect Transistors
Field-effect transistors (FETs) are the next generation of transistors after BJTs. A
FET has three terminals: the drain (D), the gate (G), and the source (S). The output
current of an FET depends on an electric field that depends on a gate control voltage. A
FET operates as a voltage-dependent device. That is, the drain (output) current
depends on the input gate voltage. One major characteristic of field effect transistors is
its very high input impedance, which make it ideal as an input stage device.
There are three types of FETs: enhancement metal oxide semiconductor field-
effect transistors (enhancement MOSFETs), depletion metal oxide semiconductor
field-effect transistors (depletion MOSFETs), and junction field-effect transistors
(JFETs).
Junction Field Effect Transistor (JFET)
JFETs are either n-channel or p-channel device depending on its construction. The basic
construction of an n-channel JFET is shown in Figure 1. There exists a p-n junction
in between the gate and the channel thus, the name junction FET.
Figure 1: JFET Construction

The symbol for the junction FET is shown in Figure 2.
(a) N-channel JFET (b) P-

channel JFET Figure 2: JFET
Symbols
28
The JFET output has three regions of operation; ohmic, saturation and breakdown.
In the ohmic region the JFET output acts like a voltage controlled resistance, while in
saturation the current across
29
the transistor appears to be constant and the breakdown region is the region where the
transistors starts to fail and be destroyed.
The JFET input must be reversed biased so that no current will flow back to the gate. The
simplest biasing arrangement to explain the operating regions of a JFET is by providing a zero
volt input (gate) at the transistor and a bias voltage from the drain to the source.
Figure 3: JFET at VGS = 0
In this arrangement (𝑉𝐺� = 0), when 𝑉𝐷� = 0, the junction creates a depletion region and
from here the first approximation for the FET is that 𝐼𝐺 = 0 and also 𝐼𝐷 = 𝐼�. When 𝑉𝐷� is
gradually increased the current will also increase according to Ohm’s Law, the transistor is
now working in the ohmic region. As 𝑉𝐷� increases, the depletion region widens, thus
making the output resistance larger until it reached a point called the pinch-off voltage, 𝑉𝑃 ,
where the resistance of the channel increased and the channel current stops increasing
reaching a saturation point, entering the saturation region. The current at this saturation
point, 𝑉𝐺� = 0 and 𝑉𝐷� > 𝑉𝑃 is called the drain-to-source saturation current,
𝐼𝐷��. This is the region where the transistor can act as an amplifier.
Figure 4: Output Characteristic of an n-channel JFET at VGS = 0
30
The gate-to-source voltage is used to control the current of the transistor. When a negative
voltage,
𝑉𝐺�, is applied to the transistor it establishes depletion regions similar to those obtained with
𝑉𝐺� =
31
0 but at lower levels of 𝑉𝐷�. Therefore, the result of applying a negative bias to the gate is to
reach the saturation level at a lower level of 𝑉𝐷�. The resulting saturation level for 𝐼𝐷 has
been reduced and in fact will continue to decrease as 𝑉𝐺� is made more and more negative.
Eventually 𝑉𝐺�, when 𝑉𝐺� =
−𝑉𝑝, will be sufficiently negative to establish a saturation level that is essentially 0 mA, and
for all
practical purposes the device has been “turned off.”
Figure 5: n-Channel JFET characteristics with IDSS = 8 mA and VP = -4 V
The transfer characteristic of a JFET is determined by Shockley’s equation. The transfer

characteristics defined by Shockley’s equation are unaffected by the network in which the
device is employed.
𝑉𝐺�2
𝐼 =𝐼 (1 − )
𝐷 𝐷��
𝑉𝑃
Where
𝐼𝐷��: maximum drain-to-source saturation current
𝑉𝑃 : pinch-off voltage
𝐼𝐷: drain saturation current due to 𝑉𝐺�
𝑉𝐺�: gate-to-source voltage
32
Figure 6: Obtaining the transfer curve from the drain characteristics.
33
Depletion-Type Metal Oxide Semiconductor FET (D-MOSFET)
The basic construction of an n-channel depletion-type MOSFET is shown in Figure 7.
Figure 7: Basic Construction of an N-channel D-MOSFET
Note that there is no direct electrical connection between the gate terminal and the
channel of a MOSFET. It is the insulating layer of SiO2 in the MOSFET construction that
accounts for the very desirable high input impedance of the device.
The reason for the label metal-oxide-semiconductor FET is fairly obvious: metal for the drain,
source, and gate connections to the proper surface—in particular, the gate terminal and
the control to be offered by the surface area of the contact, the oxide for the silicon dioxide
insulating layer, and the semiconductor for the basic structure on which the n- and p-type
regions are diffused.
The D-MOSFET almost works the same way as the JFET. When VGS = 0, the drain current is
designated as 𝐼𝐷��. If 𝑉𝐺� is decreased, a lower 𝑉𝐷� is required to saturate the transistor.
Also if 𝑉𝐺� is made less than zero and gradually decreased, the channel depletes this is called
the depletion-mode of the transistor. This depletion of channel and will stop until it reach its
pinch-off voltage. Shockley’s equation is the transfer equation of a D-MOSFET.
When 𝑉𝐺� is made greater than zero, the channel of the transistor widens thus increasing
the 𝑉𝐷� required to saturate the transistor. This mode is called the enhancement mode of
operation.
34
Figure 8: Current Flow in a D-MOSFET
35
Figure 9: Drain and transfer characteristics for an n-channel depletion-type MOSFET
The symbols for the D-MOSFET is shown in Figure 10.
(a) N-channel D-MOSFET (b) P-channel D-MOSFET
(c) N-channel D-MOSFET 4 terminals (d) P-channel D-MOSFET 4 terminals

Figure 10: D-MOSFET Symbols
Enhancement-Type Metal Oxide Semiconductor FET (E-MOSFET)
Although there are some similarities in construction and mode of operation between
depletion-type and enhancement-type MOSFETs, the characteristics of the enhancement-
type MOSFET are quite different from anything obtained thus far. The transfer curve is not
defined by Shockley’s equation, and the drain current is now cut off until the gate-to-source
voltage reaches a specific magnitude.
The construction of an enhancement-type MOSFET is quite similar to that of the

depletion-type MOSFET, except for the absence of a channel between the drain and source
terminals.
36
Figure 11: Construction of an N-channel E-MOSFET
If 𝑉𝐺� is set at 0 V and a voltage applied between the drain and source of the device, the
absence of an n-channel (with its generous number of free carriers) will result in a
current of effectively zero amperes. In Figure 11 both 𝑉𝐷� and 𝑉𝐺� have been set at some
positive voltage greater than 0 V, establishing the drain and gate at a positive potential
with respect to the source. The positive potential at the gate will pressure the holes
(since like charges repel) in the p-substrate along the edge of the SiO2 layer to leave the
area and enter deeper regions of the p-substrate, as shown in the figure. The result is a
depletion region near the SiO2 insulating layer void of holes. However, the electrons in the
p-substrate (the minority carriers of the material) will be attracted to the positive gate and
accumulate in the region near the surface of the SiO2 layer. The SiO2 layer and its insulating
qualities will prevent the negative carriers from being absorbed at the gate terminal. As 𝑉𝐺�
increases in magnitude, the concentration of electrons near the SiO2 surface increases
until eventually the induced n-type region can support a measurable flow between drain and
source. The level of 𝑉𝐺� that results in the significant increase in drain current is called the
threshold voltage and is given the symbol VT.
Figure 12: Channel Formation in an E-MOSFET
37
The saturation of the transistor is related to 𝑉𝐺� by
𝑉𝐷��𝑎� = 𝑉𝐺� − 𝑉�
38
The transfer characteristic is given by
𝐼𝐷 = 𝑘(𝑉𝐺� − 𝑉� )2
Figure 13: Transfer Characteristic of an E-MOSFET

The symbols for the E-MOSFETs are shown in Figure 14.
(a) N-channel E-MOSFET (b) P-channel E-MOSFET
(c) N-channel E-MOSFET 4 terminals (d) P-channel E-MOSFET 4 terminals

Figure 14: E-MOSFET Symbols
1. Transistors are three-terminal devices of three semiconductor layers having a base or

center layer a great deal thinner than the other two layers. The outer two layers are
both of either n - or p -type materials, with the sandwiched layer the opposite type.
2. One p – n junction of a transistor is forward-biased, whereas the other is reverse-
biased
3. The dc emitter current is always the largest current of a transistor, whereas the base
current is always the smallest . The emitter current is always the sum of the other two.
4. The collector current is made up of two components : the majority component and
the minority current (also called the leakage current ).
5. The arrow in the transistor symbol defines the direction of conventional current flow
for the emitter current and thereby defines the direction for the other currents of the
1
device.
6. A three-terminal device needs two sets of characteristics to completely define its
characteristics.
7. In the active region of a transistor, the base–emitter junction is forward-biased ,
whereas the collector–base junction is reverse-biased .
8. In the cutoff region the base–emitter and collector–base junctions of a transistor are
both reverse-biased.
9. In the saturation region the base–emitter and collector–base junctions are
forwardbiased
10. On an average basis, as a first approximation, the base-to-emitter voltage of an
operating transistor can be assumed to be 0.7 V .
11. The quantity alpha (a) relates the collector and emitter currents and is always close to
One.
12. The impedance between terminals of a forward-biased junction is always relatively
small , whereas the impedance between terminals of a reverse-biased junction is
usually quite large .
13. The arrow in the symbol of an npn transistor points out of the device ( n ot p ointing
i n ), whereas the arrow points in to the center of the symbol for a pnp transistor
( p ointing i n ).
14. No matter what type of configuration a transistor is used in, the basic relationships
between the currents are always the same , and the base-to-emitter voltage is the
threshold value if the transistor is in the “on” state.
15. The operating point defines where the transistor will operate on its characteristic
curves under dc conditions . For linear (minimum distortion) amplification, the dc
perating point should not be too close to the maximum power, voltage, or current
rating and should avoid the regions of saturation and cutoff.
16. For most configurations the dc analysis begins with a determination of the base
current.
17. For the dc analysis of a transistor network, all capacitors are replaced by an opencircuit
Equivalent.
18. The fixed-bias configuration is the simplest of transistor biasing arrangements, but it
is also quite unstable due its sensitivity to beta at the operating point.
19. Determining the saturation (maximum) collector current for any configuration can
usually be done quite easily if an imaginary short circuit is superimposed between
the collector and emitter terminals of the transistor. The resulting current through the
short is then the saturation current.
20. The equation for the load line of a transistor network can be found by applying
Kirchhoff’s voltage law to the output or collector network. The Q -point is then
determined by finding the intersection between the base current and the load line
drawn on the device characteristics.
21. The emitter-stabilized biasing arrangement is less sensitive to changes in beta—
providing more stability for the network. Keep in mind, however, that any resistance
in the emitter leg is “seen” at the base of the transistor as a much larger resistor , a
fact that will reduce the base current of the configuration.
22. The voltage-divider bias configuration is probably the most common of all the
configurations.
23. Its popularity is due primarily to its low sensitivity to changes in beta from one
transistor to another of the same lot (with the same transistor label). The exact
analysis can be applied to any configuration, but the approximate one can be applied
only if the reflected emitter resistance as seen at the base is much larger than the lower
resistor of the voltage-divider bias arrangement connected to the base of the transistor.
24. When analyzing the dc bias with a voltage feedback configuration, be sure to
remember that both the emitter resistor and the collector resistor are reflected
back to the base circuit by beta. The least sensitivity to beta is obtained when the
reflected resistance is much larger than the feedback resistor between the base and
the collector.
25. For the common-base configuration the emitter current is normally determined
first due to the presence of the base-to-emitter junction in the same loop. Then the fact
that the emitter and the collector currents are essentially of the same magnitude is
employed.
26. A clear understanding of the procedure employed to analyze a dc transistor network
will usually permit a design of the same configuration with a minimum of difficulty
and confusion. Simply start with those relationships that minimize the number of
unknowns and then proceed to make some decisions about the unknown elements of
the network.
27. In a switching configuration, a transistor quickly moves between saturation and cutoff,
or vice versa . Essentially, the impedance between collector and emitter can be
approximated as a short circuit for saturation and an open circuit for cutoff.
28. A current-controlled device is one in which a current defines the operating conditions
of the device, whereas a voltage-controlled device is one in which a particular
voltage defines the operating conditions.
29. The JFET can actually be used as a voltage-controlled resistor because of a unique
sensitivity of the drain-to-source impedance to the gate-to-source voltage.
30. The maximum current for any JFET is labeled I DSS and occurs when V GS 0 V.
31. The minimum current for a JFET occurs at pinch-off defined by VGS = VP.
32. The relationship between the drain current and the gate-to-source voltage of a JFET is
a nonlinear one defined by Shockley’s equation. As the current level approaches
33. IDSS , the sensitivity of I D to changes in V GS increases significantly.
34. The transfer characteristics ( I D versus V GS ) are characteristics of the device itself
and are not sensitive to the network in which the JFET is employed.
35. When VGS = VP>2, ID = IDSS>4; and at a point where ID = IDSS>2, VGS 0.3 V.
36. Maximum operating conditions are determined by the product of the drain-to-source
voltage and the drain current.
37. MOSFETs are available in one of two types: depletion and enhancement .
38. The depletion-type MOSFET has the same transfer characteristics as a JFET for drain
currents up to the I DSS level. At this point the characteristics of a depletion-type
MOSFET continue to levels above I DSS , whereas those of the JFET will end.
39. The arrow in the symbol of n -channel JFETs or MOSFETs will always point in to the
center of the symbol , whereas those of a p -channel device will always point out of
the center of the symbol.
40. The transfer characteristics of an enhancement-type MOSFET are not defined by
Shockley’s equation but rather by a nonlinear equation controlled by the gate-to-source
voltage, the threshold voltage, and a constant k defined by the device employed. The
resulting plot of I D versus V GS rises exponentially with incrseasing values of V GS .
41. Always handle MOSFETs with additional care due to the static electricity that exists
in places we might least suspect. Do not remove any shorting mechanism between the
leads of the device until it is installed.
42. A CMOS (complementary MOSFET) device employs a unique combination of a p -
channel and an n -channel MOSFET with a single set of external leads. It has the
advantages of a very high input impedance, fast switching speeds, and low operating
power levels, all of which make it very useful in logic circuits.
43. A fixed-bias configuration has, as the label implies, a fixed dc voltage applied from
gate to source to establish the operating point.
44. The nonlinear relationship between the gate-to-source voltage and the drain current
of a JFET requires that a graphical or mathematical solution (involving the solution of
two simultaneous equations) be used to determine the quiescent point of operation.
45. All voltages with a single subscript define a voltage from a specified point to ground .
46. The self-bias configuration is determined by an equation for V GS that will always pass
through the origin. Any other point determined by the biasing equation will establish
a straight line to represent the biasing network.
47. For the voltage-divider biasing configuration, one can always assume that the gate
current is 0 A to permit an isolation of the voltage-divider network from the output
section.
48. The resulting gate-to-ground voltage will always be positive for an n -channel
JFET and negative for a p -channel JFET. Increasing values of R S result in lower
quiescent values of I D and more negative values of V GS for an n -channel JFET .
49. The method of analysis applied to depletion-type MOSFETs is the same as applied to
COMPUTER ANALYSIS 471
50. JFETs, with the only difference being a possible operating point with an I D level
above the I DSS value.
51. The characteristics and method of analysis applied to enhancement-type MOSFETs
are entirely different from those of JFETs and depletion-type MOSFETs. For values
of V GS less than the threshold value, the drain current is 0 A.
52. When analyzing networks with a variety of devices, first work with the region of the
network that will provide a voltage or current level using the basic relationships
associated with those devices. Then use that level and the appropriate equations to find
other voltage or current levels of the network in the surrounding region of the system.
53. The design process often requires finding a resistance level to establish the desired
voltage or current level. With this in mind, remember that a resistance level is defined
by the voltage across the resistor divided by the current through the resistor. In the
design process, both of these quantities are often available for a particular resistive
element.
54. The ability to troubleshoot a network requires a clear , firm understanding of the
terminal behavior of each of the devices in the network. That knowledge will provide
an estimate of the working voltage levels of specific points of the network, which can be
checked with a voltmeter. The ohmmeter section of a multimeter is particularly helpful
in ensuring that there is a true connection between all the elements of the network.
55. The analysis of p -channel FETs is the same as that applied to n -channel FETs except
for the fact that all the voltages will have the opposite polarity and the currents the
opposite direction .
True/False Quiz
1. A bipolar junction transistor has three terminals.
2. The three regions of a BJT are base, emitter, and cathode.
3. For operation in the linear or active region, the base-emitter junction of a transistor is
forwardbiased.
4. Two types of BJT are npn and pnp.
5. The base current and collector current are approximately equal.
6. The dc voltage gain of a transistor is designated bDC.
7. Cutoff and saturation are the two normal states of a linear transistor amplifier.
8. When a transistor is saturated, the collector current is maximum.
9. bDC and hFE are two different transistor parameters.
10. Voltage gain of a transistor amplifier depends on the collector resistor and the internal
acresistance.
11. Amplification is the output voltage divided by the input current.
12. A transistor in cutoff acts as an open switch.
13. DC bias establishes the dc operating point for an amplifier.
14. Q-point is the quadratic point in a bias circuit.
15. The dc load line intersects the horizontal axis of a transistor characteristic curve at VCE
VCC.
16. The dc load line intersects the vertical axis of a transistor characteristic curve at IC 0.
17. The linear region of a transistor’s operation lies between saturation and cutoff.
18. Voltage-divider bias is rarely used.
19. Input resistance at the base of the transistor can affect voltage-divider bias.
20. Stiff voltage-divider bias is essentially independent of base loading.
21. Emitter bias uses one dc supply voltage.
22. Negative feedback is employed in collector-feedback bias.
23. Base bias is less stable than voltage-divider bias.
24. A pnp transistor requires bias voltage polarities opposite to an npn transistor.
25. The JFET always operates with a reverse-biased gate-to-source pn junction.
26. The channel resistance of a JFET is a constant.
27. The gate-to-source voltage of an n-channel JFET must be negative.
28. ID becomes zero at the pinch-off voltage.
29. VGS has no effect on ID.
30. VGS(off ) and VP are always equal in magnitude but opposite in polarity.
31. The JFET is a square-law device because of the mathematical expression of its transfer
characteristic curve.
32. Forward transconductance is the change in drain voltage for a given change in gate
voltage.
33. The parameters gm and yfs are the same.
34. The D-MOSFET can be operated in two modes.
35. An E-MOSFET operates in the depletion mode.
36. A D-MOSFET has a physical channel and an E-MOSFET has an induced channel.
37. ESD means electronic semiconductor device.
38. MOSFETs must be handled with care.
References:
Lecture - 10 Transistors
https://www.youtube.com/watch?v=hOT72IdQBbw&list=PL7987F30C41A9ADCB&index=10
Lecture – 11-12 Transistor Biasing
https://www.youtube.com/watch?v=PSdHf6yozyc&list=PL7987F30C41A9ADCB&index=11
https://www.youtube.com/watch?v=9FJJre-HG_0&list=PL7987F30C41A9ADCB&index=12
Bipolar Junction Tra by ALL ABOUT ELECTRONICS

https://www.youtube.com/playlist?list=PLwjK_iyK4LLDoFG8FeiKAr3IStRkPSxqq
JFET and MOSFETby ALL ABOUT ELECTRONICS

https://www.youtube.com/playlist?list=PLwjK_iyK4LLC-tRT_Uml3T-ifdcmuykjV
MODULE 5 TRANSISTOR SMALL SIGNAL AMPLIFIERS
Topic Outcome
1. Describe and analyze the operation of amplifier

2. Discuss the different transistor equivalent model
3. Calculate different parameters for transistor amplifier
Introduction
This module will discuss how transistor is used as small signal amplifier. There are three models
commonly used in the small-signal ac analysis of transistor networks: the re model, the hybrid p
model, and the hybrid equivalent model. This module will emphasizes the re model only. Small-
signal refers to the use of signals that take up a relatively small percentage of an amplifier’s
operational range. Equations use to different bias to determine the transistor ac parameters will
tackle on this topic.
This module will focus on converting transistor bias to its equivalent ac model by using re model.
The students will learn how to reduce an amplifier to an equivalent dc and ac circuit for easier
analysis. The applications of other theorem such as Kirchhoff’s current and voltage law, etc. to
determine the equations for different parameters is also covered by topic. Most importantly, the
application of dc analysis contributes in determining ac resistance of BJT and current source of FET.
Amplifier Operation
Now we know that in dc biasing, the transistor is purely dc operation. DC analysis in transistor is to
establish an operating point (Q-point) which variations of current and voltage occur in response to
an input signal. In some applications where a small signal must be amplified, variations about the Q-
point are very small. Small-signal amplifiers are designed to amplify small ac signals. Sometimes it
refers to linear amplifications.
Linear Amplification
In an operation of amplifier, linear amplification provides a signal whose output is exact amplified
replica of the input signal. Consider the voltage-divider biased transistor in figure 5.1, a sinusoidal
ac source capacitively coupled to the base terminal through capacitor 𝐶1 and load through 𝐶2 .
Remember that capacitor block dc, thus preventing the source internal resistance and load
resistance from changing the dc voltage bias of the transistor. The capacitors appear as shorts to
the signal voltage. The sinusoidal source voltage causes the base voltage to vary sinusoidally above
and below its dc bias level. The dc variation of the base current produces a larger variation of the
collector current because of the gain of the transistor.
The collector voltage, 𝑉𝑐 , decreases as the sinusoidal collector current increases. The collector
current, 𝐼𝑐 varies above and below its Q-point value. Same as the sinusoidal collector-to-emitter
voltage, it varies below and above the level of operating point, and produced an output of 180° out

of phase with the base voltage. Remember that a transistor always produced a phase inversion
between the base voltage and the collector voltage.
For example, assume that a certain amplifier has a value of Q-point base current of 50µ𝐴 and
extends 10µ𝐴 above and below the Q-point. The effect is the collector current also varying from
6𝑚𝐴 to 4𝑚𝐴 with peak-to-peak of 2𝑚𝐴 at Q-point dc current of 5𝑚𝐴. The collector-to-emitter also
varying from 1𝑉 to 2𝑉 for a peak to peak value of 1𝑉 at collector-to-emitter Q-point dc voltage of
1.5𝑉. You will also notice that the input and output has the same shape of signal.
Figure 5.1 Voltage-divider Amplifier Circuit
Figure 5.2 AC Load-line Operation of certain Amplifier

BJT Small Signal Modeling
The use of equivalent model is the key to transistor small-signal analysis.
“A model is a combination of circuit elements, properly chosen, that best approximates the actual
behavior of a semiconductor device under specific operating conditions.”
The schematic symbol for the device can be replaced by this equivalent model. The basic methods
of circuit analysis applied to determine the desired small-signal parameters.
Out of the three ac transistor model (𝑟𝑒 , ℎ𝑦𝑏𝑟𝑖𝑑 𝜋, 𝑎𝑛𝑑 ℎ𝑦𝑏𝑟𝑖𝑑 𝑒𝑞𝑢𝑖𝑣𝑎𝑙𝑒𝑛𝑡 𝑚𝑜𝑑𝑒𝑙), the 𝑟𝑒 model
became the more desirable approach this is because important parameters were determined by the
actual conditions (rather than using data sheet values).
In this case, the modification of the circuit into two-port network is shown in figure 5.3. This will
define ac equivalent parameters of the system input and output impedance, current, and voltages.
The appearance of the circuit will change but it is better but the quantities we will find in the
reduced network is the same in the original network. 𝑍𝑖 is defined from base to ground of the
network, the 𝐼𝑖 as the base current of the transistor, the 𝑉𝑜 as the voltage from collector to ground,
and the 𝐼𝑜 as the current through the load resistor 𝑅𝐶 .
Figure 5.3 Transistor System Equivalent Model
For all the analysis, the direction of currents, voltage polarities, and impedance level is defined in
figure 5.3.
- Both input and output current are defined to enter to the system.
- Notice that the output current is entering to the system rather than leaving, thus the
negative sign must apply.
- If 𝑉𝑜 has the opposite polarity, a negative sign must be apply.
- 𝑍𝑖𝑛 is the impedance “looking into” the system” and 𝑍𝑜 is the impedance “looking back into”
the system.
- Looking in figure 5.3, both input and output impedance are both positive values and
resistive.
- For the direction of 𝐼𝑖 and 𝐼𝑜 the resulting voltage across the resistive elements will have the
same polarity as 𝑉𝑖 and 𝑉𝑜 , respectively if not then a negative sign would be applied.
- For each 𝑍𝑖 = 𝑉𝑖 /𝐼𝑖 and 𝑍𝑜 = 𝑉0 /𝐼𝑜 with positive results with positive results if they all have
defined directions and polarity in figure 5.3.

- If the output current of an actual system has a direction opposite to the equivalent network,
a minus sign must be applied because the output voltage must be defined appearing in
figure 5.3.
Always remember the figure 5.3 as we analyze the BJT network in this module. This will be
helpful also in introduction to “System Analysis” (to be discussed on the next module).
If we rearrange the elements in figure 5.2, establishing common ground, 𝑅1 will be parallel to 𝑅2
and 𝑅𝐶 will appear in from collector to emitter, the equivalent circuit as shown in figure 5.4. To
determine the desired parameters, we will employ resistors, independent current source; some
circuit techniques such as Thevenin’s, Nodal Analysis etc. can be applied.
Figure 5.4 Voltage-Divider for ac analysis
Since we are discussing amplification, we would expect how the 𝑉𝑜 is related to 𝑉𝑖 or the
𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑔𝑎𝑖𝑛 of the amplifier.
Thus the following ac equivalent of transistor can be obtained by the following procedure;
1. Set all the DC sources to zero.

2. Replacing all capacitors by short circuit.
3. Removing all the elements bypassed by the short circuit.
4. Redraw the network in more convenient form.
5. Introduce the equivalent model of the transistor in the circuit.
The 𝒓𝒆 Transistor Model
The 𝑟𝑒 model reflects the operation of the BJT at mid-frequencies. The 𝑟𝑒 model is an equivalent
network that is used to predict the performance of the transistor amplifier. Small 𝑟𝑒 represents the
resistance looking into the emitter terminal of a transistor.
Common-Emitter Configuration

Using the transistor characteristics and approximation, we will now construct the equivalent circuit
for common-emitter configuration. Shown in figure 5.5-a is the input side of the transistor. Notice
that applied voltage 𝑉𝑖 is same as the voltage across base-collector 𝑉𝑏𝑒 with base current 𝐼𝑏 .
Figure 5.5 Common-Emitter Configuration (a) input size (b) diode equivalent
Given a different level of current 𝐼𝐸 , the characteristics curve of the voltage across base-emitter
𝑉𝑏𝑒 , is same to a forward-biased diode. Therefore the input side of the equivalent circuit is simply a
single diode with current 𝐼𝑒 . Next is to establish a component to the network that will relate 𝐼𝑒 of
figure 5.5-b to the output characteristics.
By approximation, the entire characteristics at the output section can be replaced by a controlled
source whose magnitude is beta times the base current as shown in fig. 5.6.
Figure 5.6 BJT Equivalent Circuit
Now that all the input and output parameters from the original circuit has been determined, the
equivalent network for common-emitter has been established in figure 5.6.

Figure 5.7 Defining Input Impedance,𝒁𝒊
The model is need to be improve because due to the direct connection between input and output
networks. It can be done by replacing the diode by its equivalent resistance determined by the
emitter current, shown in figure 5.7, and the diode resistance 𝑟𝑒 is defined by the equation 5.1.
26𝑚𝑉
𝑟𝑒 = 𝒆𝒒. 𝟓. 𝟏
𝐼𝐸
Solving for impedance in the input side of the transistor
𝐼𝑖 𝑉𝑏𝑒
𝑍𝑖 = =
𝐼𝑏 𝐼𝑏
𝑉𝑏𝑒 = 𝐼𝑒 𝑟𝑒 = (𝐼𝑐 + 𝐼𝑏 𝑟𝑒 = (𝐶𝐼𝑏 + 𝐼𝑏 𝑟𝑒
= (𝛽 + 1 𝑟𝑒
Then 𝑍𝑖 is (equation 5.2),
𝑉𝑏𝑒 (𝛽 + 1 𝐼𝑏 𝑟𝑒
𝑍𝑖 = =
𝐼𝑏 𝐼𝑏
𝑍𝑖 = (𝛽 + 1 𝑟𝑒 𝒆𝒒. 𝟓. 𝟐
Thus the improved equivalent circuit is shown in figure 5.8

Figure 5.8 Improved BJT Equivalent Circuit
An output impedance of the BJT can now be defined and will appear as a resistor in parallel with
the output as shown in the equivalent circuit of Fig. 5.9.
Figure 5.9 Improved BJT Equivalent Circuit with 𝒓𝒐
Common-Base Configuration
The general characteristics of the input and output circuit will generate an equivalent circuit that
will approximate the actual behavior of the device. The base-to-emitter junction of the transistor is
forward bias thus; a diode can be used to model the junction.
Figure 5.10 Common-base Transistor Configuration
Consider a common-base configuration of a PNP transistor shown in figure 5.10. The emitter-base
is represented by a diode equivalent circuit shown in figure 5.11. The collector current is related to
the emitter current by the constant alpha 𝛼. The direction of the 𝐼𝑐 in the output circuit is now
opposite that of the defined output current.

Again, the diode can be replaced by diode resistance, 𝑟𝑒 . Using the method in common-emitter, the
common-base equivalent network is shown in figure 5.12.
Figure 5.11 Common-base Equivalent Circuit
Common-base has very low impedance because from figure 5.11, it is only the value of 𝑟𝑒 . Because
the output current is opposite to 𝐼𝑜 , thus there is no phase shift between input and output voltages.
In the case of the common-emitter, there is a phase shift of 180°.
The improve common-base equivalent circuit with 𝑟𝑜 is shown in figure 5.12.
Figure 5.12 Improved Common-base Equivalent Circuit with𝒓𝒐
Small Signal Analysis Procedure
1. Perform DC Analysis
2. Compute for internal model parameters
3. Draw the AC small signal equivalent
4. Perform the circuit analysis
Common-Emitter Fixed-Bias Configuration
The first configuration we were going to analyze is the common-emitter fixed-bias configuration
shown in figure 5.13.

Figure 5.13 Common-emitter Fixed-bias (CEFB) Configuration
The input is applied to base terminal of the transistor but remember that 𝑉𝑖 ≠ 𝑉𝑏 and the output is
connected to the collector. Following the procedure, we will remove the effects of the dc supply 𝑉𝑐𝑐
and replace the capacitors by short-circuit equivalents. Rearranging the circuit the resulting
network shown in figure 5.14, this includes the relocation of collector and base resistance through
their input and output sections of the transistor to have a common ground for the whole circuit.
Figure 5.14 CEFB Configuration removal of the effects of 𝑽𝑪𝑪 , 𝑪𝟏 , and 𝑪𝟐
Substituting the 𝑟𝑒 model to the for the common-emitter configuration to figure 5.14 results in the
network of figure 5.15.

Figure 5.14 Integration of 𝒓𝒆 Model to CEFB Configuration
To determine the small-signal parameters, first we need find the value of 𝑟𝑒 , 𝛽 𝑎𝑛𝑑 𝑟𝑜 . Typically, the
value of 𝛽 and 𝑟𝑜 are specified on the transistor data sheet. 𝑟𝑒 can be determined from dc analysis
through the value of 𝐼𝐸 . Given that 𝛽, 𝑟𝑒 , 𝑎𝑛𝑑 𝑟𝑜 has been already determined; the important
parameters of the two-port model are defined by the following equations using figure 5.14.
The equivalent 𝑍𝑖 (eq. 5.3) looking at the figure
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1)𝑟𝑒 𝒆𝒒. 𝟓. 𝟑
The output impedance 𝑍𝑜 of any system is defined when 𝑉𝑖 = 0. Looking at the figure 5.15, when
𝑉𝑖 = 0, 𝐼𝑖 is also equal to zero that will gave a value 𝐼𝑏 also equal to zero. This will results open
circuit equivalence for current source. Then we can get the equation for 𝑍𝑜 (eq. 5.4).
Figure 5.15 Determining 𝒁𝒐 for CEFB Configuration
𝑍𝑜 = 𝑅𝑐 ||𝑟𝑜 𝒆𝒒. 𝟓. 𝟒
The voltage gain of the amplifier is the relationship of its output voltage to the input voltage.
Equation 5.5 defined transistor voltage gain.
𝑉𝑜
𝐴𝑣 =
𝑉𝑖
𝑉𝑜 = 𝐼𝑜 𝑍𝑜 = −𝛽𝐼𝑏 (𝑅𝑐 ||𝑟𝑜 )
𝑉𝑖 = 𝑉𝑅𝐵 = 𝑉(𝛽+1 𝑟𝑒 = 𝐼𝑏 (𝛽 + 1 𝑟𝑒
𝛽𝐼𝑏 (𝑅𝑐 |𝑟𝑜

𝐴𝑣 = −
𝐼𝑏 (𝛽 + 1 𝑟𝑒
𝛽 (𝑅𝑐 |𝑟𝑜
𝐴𝑣 = − 𝒆𝒒. 𝟓. 𝟓
(𝛽 + 1 𝑟𝑒
The negative sign in the gain of common emitter reveals that phase shift of 180° occurs between the
input and output signal as shown in figure 5.16. This is because 𝛽𝐼𝑏 establishes a current through
𝑅𝐶 that will result in a voltage across 𝑅𝐶 , the opposite of that defined by 𝑉𝑂 .

Figure 5.16 𝟏𝟖𝟎° phase shift between the input and output voltage signal
Common-Emitter Voltage-Divider Configuration
Figure 5.17 Voltage-Divider Configuration (a) Bias Circuit (b) ac Equivalent
Now, let us analyze the voltage-divider configuration shown in figure 5.17-a. Substituting the 𝑟𝑒
model to the circuit will results into an equivalent network shown in figure 5.17-b. The absence of
the resistor 𝑅𝐸 is due to the effect of the shorted bypass capacitor. When 𝑉𝐶𝐶 is set to zero, it places
one end of 𝑅1 and 𝑅𝐶 at ground potential. Then the input impedance of the circuit is defined by the
equation (eq. 5.6)
𝑍𝑖 = 𝑅1 𝑅2 (𝛽 + 1 𝑟𝑒 𝒆𝒒. 𝟓. 𝟔
The output impedance by setting the input voltage to zero (eq. 5.7)
𝑍𝑜 = 𝑅𝐶 ||𝑟𝑜 𝒆𝒒. 𝟓. 𝟕
And the equation for the voltage gain is (eq.5.8)

𝐴𝑣 = −
(𝛽 + 1 𝑟𝑒
The negative sign of voltage gain reveals a 180° phase shift between 𝑉𝑜 and 𝑉𝑖 .
Common-Emitter (CE) Emitter-Bias Configuration
Bypassed
We can use the same analysis using the fixed-bias configuration.
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1)𝑟𝑒
𝑍𝑜 = 𝑅𝑐 ||𝑟𝑜
𝐴𝑣 = −
(𝛽 + 1 𝑟𝑒
Unbypassed w/o 𝑟𝑜
The fundamental common-emitter bias circuit is shown in figure 5.18-a with equivalent ac analysis
model shown in figure 5.18-b. Notice also that there is no 𝑟𝑜 and the effect of 𝑟𝑜 will be discussed on
the next part.
Figure 5.18 Common-Emitter Unbypassed Configuration (a) Bias Circuit (b) ac Equivalent
For the input impedance, we will the equivalent circuit in figure 5.19 to calculate the total
impedance.

Figure 5.19 Defining 𝒁𝒊 for Emitter unbypassed Bias
Applying Kirchhof’s Law
𝑉𝑖 = 𝐼𝑏 𝛽𝑟𝑒 + 𝐼𝑒 𝑅𝐸
𝑉𝑖 = (𝛽 + 1)𝐼𝑏 𝑟𝑒 + (𝛽 + 1)𝐼𝑏 𝑅𝐸
Getting the value of 𝑍𝑏 looking at 𝑅𝐵
𝑉𝑖
𝑍𝑏 =
𝐼𝑏
𝑍𝑏 = (𝛽 + 1 (𝑅𝐸 + 𝑟𝑒 )
Then the input impedance is, eq. 5.8
𝑍𝑖 = 𝑅𝐵 ||𝑍𝑏
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1 (𝑅𝐸 + 𝑟𝑒 𝒆𝒒. 𝟓. 𝟖
For the 𝑍𝑜 (eq. 5.9), set input voltage to zero, then 𝐼𝑏 𝑎𝑛𝑑 𝛽𝐼𝑏 is also zero and can be replaced by
open circuit. Then 𝑍𝑜 is
𝑍𝑜 = 𝑅𝐶 𝒆𝒒. 𝟓. 𝟗
For the voltage gain eq. 5.10
𝛽𝑅𝐶
𝐴𝑣 = − 𝒆𝒒. 𝟓. 𝟏𝟎
(𝛽 + 1 (𝑅𝐸 + 𝑟𝑒
Unbypassed w 𝑟𝑜
The following equations are already derived for values of 𝑍𝑖𝑛 , 𝑍𝑜 , and 𝐴𝑉 in equations 5.11, 5.12 and
5.13 respectively for the unbaypassed emitter-emitter bias configuration.

𝑅
(𝛽 + 1 + 𝐶
𝑟𝑜
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1 + 𝑅 𝒆𝒒. 𝟓. 𝟏𝟏
𝑅 +𝑅 𝐸
1+ 𝐶 𝑟 𝐸
𝑜
𝛽 (𝑟𝑜 + 𝑟𝑒
𝑍𝑜 = 𝑅𝐶 || 𝑟𝑜 + 𝒆𝒒. 𝟓. 𝟏𝟐
𝛽𝑟
1+ 𝑒
𝑅𝐸
𝛽𝑅𝐶 𝑟𝑒 𝑅𝐶
𝑍𝑏 1 + 𝑟𝑜 + 𝑟𝑜
𝐴𝑣 = − 𝒆𝒒. 𝟓. 𝟏𝟑
𝑅
(𝛽 + 1 + 𝐶
𝑟𝑜
(𝛽 + 1 +
𝑅𝐶 + 𝑅𝐸 𝑅𝐸
1+ 𝑟𝑜
Emitter-Follower (Common-Collector)
When the output is taken from the emitter terminal of the transistor, the ci rcuit is referred to as
an emitter-follower or also known as the common-collector configuration.
Figure 5.20 Emitter-Follower Configuration (a) Bias Circuit (b) ac Equivalent
Figure 5.20-a shows the basic emitter-follower circuit and equivalent ac network in figure 5.20-b.
The input impedance is describe in eq. 5.14
𝑍𝑖 = 𝑅𝐵 ||𝑍𝑏
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1 (𝑅𝐸 + 𝑟𝑒 𝒆𝒒. 𝟓. 𝟏𝟒
In getting 𝑍𝑜 , we need to firs to established the current 𝐼𝑒

𝑉𝑖
𝐼𝑏 =
𝑍𝑏
Multiplied both sides by (𝛽 + 1 to get the value of 𝐼𝑒
(𝛽 + 1 𝑉𝑖
𝐼𝑒 =
𝑍𝑏
(𝛽 + 1 𝑉𝑖
𝐼𝑒 =
(𝛽 + 1 (𝑅𝐸 + 𝑟𝑒 )
𝑉𝑖
𝐼𝑒 =
(𝑅𝐸 + 𝑟𝑒 )
Reconstructing the network in figure 5.20 to define the output impedance, results shown in figure
5.21
Figure 5.21 Defining 𝒁𝒐 for Emitter-Follower Bias
Setting the 𝑉𝑖 = 0, thus the equation for 𝑍𝑜 is shown in eq.15
𝑍𝑜 = 𝑟𝑒 ||𝑅𝐸 𝒆𝒒. 𝟏𝟓
The equation for 𝐴𝑣 (eq. 5.16) using figure 5.21 is
𝑉𝑜
𝐴𝑣 =
𝑉𝑖
𝑅𝐸
𝐴𝑉 = 𝒆𝒒. 𝟓. 𝟏𝟔
𝑅𝐸 + 𝑟𝑒
Because 𝑅𝐸 is much greater to the value of 𝑟𝑒 , the voltage gain for the emitter-follower bias is
approximately equal to 1.
The effects of 𝑟𝑜 in the parameters are shown in equations 15.17-19.
(𝛽 + 1 𝑅𝐸
𝑍𝑖 = 𝑅𝐵 || (𝛽 + 1 𝑟𝑒 + 𝒆𝒒. 𝟓. 𝟏𝟕
𝑅
1+ 𝐸
𝑟𝑜

𝑍𝑜 = 𝑟𝑜 𝑅𝐸 𝑟𝑒 𝒆𝒒. 𝟓. 𝟏𝟖
(𝛽 + 1 𝑅𝐸
𝑍𝑏
𝐴𝑣 = 𝒆𝒒. 𝟓. 𝟏𝟗
𝑅
1 + 𝑟𝐸
𝑜
Common-Base Configuration
Shown in figure 5.22-a is a circuit for common-base configuration and the equivalent network in
figure 5.22-b. The transistor output impedance 𝑟𝑜 is not included for the common-base
configuration because it is typically in the megohm range and can be ignored in parallel with the
resistor RC.
Figure 5.20 Common-Base Configuration (a) Bias Circuit (b) ac Equivalent
The important parameters of the common-base configuration are stated in eq. 5.20-22 using figure
5.22-b.
𝑍𝑖𝑛 = 𝑅𝐸 ||𝑟𝑒 𝒆𝒒. 𝟓. 𝟐𝟎
𝑍𝑜 = 𝑅𝐶 𝑒𝑞. 𝟓. 𝟐𝟏
𝑉𝑜 𝛼𝐼𝑒 𝑅𝐶 𝛼𝑅𝐶
𝐴𝑣 = = = 𝟓. 𝟐𝟐
𝑉𝑖 𝐼𝑒 𝑟𝑒 𝑟𝑒

Since the voltage gain is positive, these indicate that 𝑉𝑜 and 𝑉𝑖𝑛 are in phase in common-base
configuration.
JFET Small Signal Modeling
A major component of the FET ac model is the fact that an ac voltage is applied to the input gate-to-
source terminals will control the currents form the drain to source terminals.
“The gate-to-source voltage controls the drain-to-source (channel) current of a JFET.”
Remember from the FET transistor bias that a dc gate-to-source voltage controls the level of the dc
current through Shockley’s equation:
2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝑃
From the equation, the change in 𝐼𝐷 will result from change in 𝑉𝐺𝑆 that can be determined using the
transconductance factor 𝑔𝑚 in the following relationship
∆𝐼𝐷 = 𝑔𝑚 ∆𝑉𝐺𝑆
The prefix "𝑡𝑟𝑎𝑛𝑠" reveals that it establishes a relationship between an output and an input
quantity, while conductance is the current-to-voltage ratio similar to the ratio that defines the
conductance of a resistor. Solving for the transconductance:
∆𝐼𝐷
𝑔𝑚 =
∆𝑉𝐺𝑆
One approach to solve 𝑔𝑚 is same on finding the ac resistance of the diode.
“The derivative of a function at a point is equal to the slope of the tangent line drawn at that point.”
Therefore, taking the derivative of 𝐼𝐷 with respect to 𝑉𝐺𝑆 using Shockley’s equation will give us the
equation for transconductance (𝑒𝑞. 5.23).
2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝑃
2
𝑑𝐼𝐷 𝑑 𝑉𝐺𝑆
𝑔𝑚 = = 𝐼𝐷𝑆𝑆 1 −
𝑑𝑉𝐺𝑆 𝑑𝑉𝐺𝑆 𝑉𝑃
𝑑 𝑉𝐺𝑆 𝑉𝐺𝑆 1
= 2𝐼𝐷𝑆𝑆 1− = 𝐼𝐷𝑆𝑆 1 − 0−
𝑑𝑉𝐺𝑆 𝑉𝑃 𝑉𝑃 𝑉𝑃
2𝐼𝐷𝑆𝑆 𝑉𝐺𝑆
𝑔𝑚 = 1− 𝒆𝒒. 𝟓. 𝟐𝟑
|𝑉𝑝 | 𝑉𝑃
JFET ac Equivalent Model

The input impedance of all commercially available JFETs is very large to the point that we can
assume that the input terminal is an open-circuit
𝑍𝑖 = ∞𝛺
The output impedance of JFETs is typically appear in JFET data sheet as 𝑔𝑜𝑠 or 𝑦𝑜𝑠 with unit of µ𝑆. In
Equation form of the output impedance,
1 1
𝑍𝑜 = =
𝑔𝑜𝑠 𝑦𝑜𝑠
Now that we already derived the JFET’s important parameters, we can draw introduce its
equivalent circuit. The ac equivalent circuit for JFET is shown in figure 5.21. The control of 𝐼𝐷 by 𝑉𝑔𝑠
is represented by current source 𝑔𝑚 𝑉𝑔𝑠 connected form drain to source. The current source has its
arrow pointing from drain to source to establish a 180° phase shift between output and input
voltages. From our derivation, the input impedance is presented in open circuit and the output by
resistor, 𝑟𝑑 . The gate-to-source voltage is the 𝑉𝑔𝑠 from the dc level. In situations where 𝑟𝑑 is ignored,
𝑉𝑔𝑠 and 𝑔𝑚 𝑉𝑔𝑠 is the only present components in the equivalent circuit.
Figure 5.21 JFET ac Equivalent Network
JFET Fixed-bias Configuration
Once 𝑟𝑑 and 𝑔𝑚 are determined from analysis, the next step is to substitute the ac model to the
transistor bias circuit to define the important parameters.

Figure 5.22 JFET Common-Base Configuration (a) Bias Circuit (b) ac Equivalent
The fixed-bias configuration for JFET configuration is shown in figure 5.22-a and its ac equivalent
network in figure 5.22-b. Looking in figure 5.22-b, the input impedance can be determined by
looking at the input side of the network. The equation for 𝑍𝑖𝑛 is (eq. 5.24)
𝑍𝑖𝑛 = 𝑅𝐺 𝒆𝒒. 𝟓. 𝟐𝟒
Setting the input voltage to zero, the output impedance is defined by equation 5.25.
𝑍𝑜 = 𝑟𝑑 ||𝑅𝐷 𝒆𝒒. 𝟓. 𝟐𝟓
Solving for the gain of the network (equation 5.26), the following steps are considered.
𝑉𝑜 = −𝑔𝑚 𝑉𝑔𝑠 (𝑟𝑑 ||𝑅𝐷 )
Looking at the input side, 𝑉𝑖 is
𝑉𝑖 = 𝑉𝐺𝑆
Substitute 𝑉𝑖 to 𝑉𝐺𝑆
𝑉𝑜 = −𝑔𝑚 𝑉𝑖 (𝑟𝑑 ||𝑅𝐷 )
𝑉𝑜
𝐴𝑣 = = −𝑔𝑚 (𝑟𝑑 | 𝑅𝐷 𝒆𝒒. 𝟓. 𝟐𝟔
𝑉𝑖
JFET Voltage-Divider Configuration
Figure 5.23 JFET Voltage-Divider Configuration (a) Bias Circuit (b) ac Equivalent

Shown figure 5.23-a is the basic circuit for the voltage-divider network with its equivalent ac model
shown in figure 5.23-b. Using the equivalent circuit we can now introduce the equations for
𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑣 stated by equation 27-29.
𝑍𝑖 = 𝑅1 ||𝑅2 𝒆𝒒. 𝟓. 𝟐𝟕
𝑍𝑜 = 𝑟𝑑 ||𝑅𝐷 𝒆𝒒. 𝟓. 𝟐𝟖
𝐴𝑣 = −𝑔𝑚 (𝑟𝑑 | 𝑅𝐷 𝒆𝒒. 𝟓. 𝟐𝟗
JFET Self-Biased Configuration (bypassed)
From figure 5.24-a, the resistor 𝑅𝑆 will be removed because the effects of capacitor, 𝐶𝑆 . Figure 5.24-
b shows the ac model network for self-bias unbypass configuration. The equation for 𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑣
is describe by eq. 30-32.
Figure 5.24 JFET Self-Bias (bypass) Configuration (a) Bias Circuit (b) ac Equivalent
𝑍𝑖 = 𝑅𝐺 𝒆𝒒. 𝟓. 𝟑𝟎
𝑍𝑜 = 𝑟𝑑 ||𝑅𝐷 𝒆𝒒. 𝟓. 𝟑𝟏
𝐴𝑣 = −𝑔𝑚 (𝑟𝑑 | 𝑅𝐷 𝒆𝒒. 𝟓. 𝟑𝟐
JFET Self-Biased Configuration (unbypassed)
For the unbypassed 𝑅𝑠 , we will consider also the effects of 𝑟𝑑 to determine the ac important
parameters. Without the effect of 𝑟𝑑 , the equivalent ac model is shown in figure 5.25.

Figure 5.25 JFET Self-Bias (unbypass) Configuration ac equivalent w/o 𝒓𝒐
Looking at the input, 𝑍𝑖 is (eq. 5.33)
𝑍𝑖 = 𝑅𝐺 𝒆𝒒. 𝟓. 𝟑𝟑
For the equation of 𝑍𝑜 (eq.5.34), the following derivation is taken; setting the input voltage to zero,
the voltage across the resistor at gate terminal is also zero. Applying Kirchhoff’s law
𝐼𝑜 + 𝐼𝐷 = 𝑔𝑚 𝑉𝐺𝑆
And
𝑉𝐺𝑆 = −(𝐼𝑜 + 𝐼𝐷 𝑅𝑆
So that
𝐼𝑜 (1 + 𝑔𝑚 𝑅𝑠 = −𝐼𝐷 (1 + 𝑔𝑚 𝑅𝑠
For 𝑔𝑚 𝑉𝐺𝑆 = 0, then
𝐼𝑜 = −𝐼𝐷
Looking at the output
𝑉𝑜 = −𝐼𝐷 𝑅𝐷
Eliminating the effect of 𝑟𝑑
𝑉𝑜
𝑍𝑜 = = 𝑅𝐷 𝒆𝒒. 𝟓. 𝟑𝟒
𝐼𝑜
Including the effect of 𝑟𝑑 , figure 5.26

Figure 5.25 JFET Self-Bias (unbypass) Configuration ac equivalent w/ 𝒓𝒐
The input impedance is the same to bypassed network, however for the output impedance; (eq.
5.35) set the input voltage to zero.
𝐼𝐷 𝑅𝐷
𝑍𝑜 = −
𝐼𝑜
Applying Kirchhoff’s current law at node a
𝐼𝑜 = 𝑔𝑚 𝑉𝑔𝑠 + 𝐼𝑟𝑑 − 𝐼𝐷
But
𝑉𝑟𝑑 = 𝑉𝑜 + 𝑉𝑔𝑠
Then
𝑉𝑜 + 𝑉𝑔𝑠
𝐼𝑜 = 𝑔𝑚 𝑉𝑔𝑠 + − 𝐼𝐷
𝑟𝑑
Now,
𝑉𝑔𝑠 = −(𝐼𝐷 + 𝐼𝑜 𝑅𝑆
Substituting
1 𝐼 𝑅
𝐼𝑜 = − 𝑔𝑚 + (𝐼𝐷 + 𝐼𝑜 𝑅𝑆 − 𝐷 𝐷 − 𝐼𝐷
𝑟𝑑 𝑟𝑑
With results equation of 𝐼𝑜 with respect to 𝐼𝐷
𝑅𝑆 𝑅𝑆 𝑅𝐷
𝐼𝑜 1 + 𝑔𝑚 𝑅𝑆 + = −𝐼𝐷 1 + 𝑔𝑚 𝑅𝑆 + +
𝑟𝑑 𝑟𝑑 𝑟𝑑

Or
𝑅 𝑅
−𝐼𝐷 1 + 𝑔𝑚 𝑅𝑆 + 𝑟𝑆 + 𝑟𝐷
𝑑 𝑑
𝐼𝑜 =
𝑅𝑆
1 + 𝑔𝑚 𝑅𝑆 +
𝑟𝑑
Substituting 𝐼𝑜 to the equation; 𝑍𝑜 = 𝑉𝑜 /𝐼𝑜 , while 𝑉𝑜 = −𝐼𝐷 𝑅𝐷
𝑉𝑜 𝐼𝐷 𝑅𝐷
𝑍𝑜 = =−
𝐼𝑜 𝑅 𝑅
−𝐼 𝐷 1 + 𝑔𝑚 𝑅𝑆 + 𝑟 𝑆 + 𝑟𝐷
𝑑 𝑑
𝑅
1 + 𝑔𝑚 𝑅𝑆 + 𝑟𝑆
𝑑
𝑅
1 + 𝑔𝑚 𝑅𝑆 + 𝑟𝑆
𝑑
𝑍𝑜 = 𝑅 𝒆𝒒. 𝟓. 𝟑𝟓
𝑅𝑆 𝑅𝐷 𝐷
1 + 𝑔𝑚 𝑅𝑆 + +
𝑟𝑑 𝑟𝑑
Using the same figure, the equation of 𝐴𝑣 (eq. 5.36) will be determined using the following steps
Apply Kirchhoff’s voltage law at the input of the circuits
𝑉𝑖 − 𝑉𝑔𝑠 − 𝑉𝑅𝑆 = 0
𝑉𝑔𝑠 = 𝑉𝑖 − 𝐼𝐷 𝑅𝑆
The voltage across 𝑟𝑑
𝑉𝑟𝑑 = 𝑉𝑜 − 𝑉𝑅𝑆
And
𝑉𝑟𝑑 𝑉𝑜 − 𝑉𝑅𝑆
𝐼′ = =
𝑟𝑑 𝑟𝑑
Applying current Kirchhoff’s Law
𝑉𝑜 − 𝑉𝑅𝑆
𝐼𝐷 = 𝑔𝑚 𝑉𝑔𝑠 +
𝑟𝑑
Rearranging and substituting some variables from other equations
−𝐼𝐷 𝑅𝐷 − 𝐼𝐷 𝑅𝑆
𝐼𝐷 = 𝑔𝑚 (𝑉𝑖 − 𝐼𝐷 𝑅𝑆 +
𝑟𝑑
𝑔𝑚 𝑉𝑖
𝐼𝐷 =
𝑅 + 𝑅𝑆
1 + 𝑔𝑚 𝑅𝑆 + 𝐷
𝑟𝑑

Given the output voltage
𝑉𝑜 = −𝐼𝐷 𝑅𝐷
Then 𝐴𝑣
𝑉𝑜 𝑔𝑚 𝑅𝐷
𝐴𝑣 = =− 𝒆𝒒. 𝟓. 𝟑𝟔
𝑉𝑖 𝑅 +𝑅
1 + 𝑔𝑚 𝑅𝑠 + 𝐷 𝑟 𝑆
𝑑
JFET Common-Gate
Figure 5.26 JFET Common-Gate Configuration (a) Bias Circuit (b) ac Equivalent
The common-gate configuration which is parallel to the common-base of BJT is shown in figure
5.26-a. Substituting the JFET equivalent will result in figure 5.27-b. Notice that the controlled
𝑔𝑚 𝑉𝑔𝑠 is connected to drain to source terminals parallel with 𝑟𝑑 . Since the gate terminal is connected
to the common ground network, and the controlled current is connected to drain to source, the
isolation between input and output circuits has been lost. The following equations (eq.5.37-39) for
the important are already derived.
𝑟𝑑 + 𝑅𝐷
𝑍𝑖𝑛 = 𝑅𝑆 || 𝒆𝒒. 𝟓. 𝟑𝟕
1 + 𝑔𝑚 𝑟𝑑
𝑍𝑜 = 𝑅𝐷 ||𝑟𝑑 𝒆𝒒. 𝟓. 𝟑𝟖

𝑅
𝑔𝑚 𝑅𝐷 + 𝑟𝐷
𝑑
𝐴𝑣 = 𝒆𝒒. 𝟓. 𝟑𝟗
𝑅𝐷
1+ 𝑟
𝑑
D-MOSFET AND E-MOSFET SMALL SIGNAL MODELING
The small-signal analysis for D-MOSFET and E-MOSFET is same to the JFET
1. Dc biasing level is important in amplification in ac domain

2. All voltages with a single subscript define a voltage from a specified terminal or point to
ground.
3. In many applications of BJT in linear amplification, considering the use of the superposition
theorem to separate the dc and ac analyses and designs.
4. When introducing the ac model for a BJT:
a. All dc source are set to zero resulting to a short-circuit connected to the ground.
b. All capacitors (bypass and coupling) are replace by short-circuit equivalent.
c. All elements in parallel by the short-circuit equivalent should be remove from the
network.
d. The network introduced by steps 3.a-b should be redrawn for better analysis.
5. Both input and output impedance cannot be measured by ohmmeter.
6. Output impedance of the amplifier is measured by setting the input signal to zero.
7. The 𝑟𝑜 for the 𝑟𝑒 model can be obtained from data sheet or graphical measurement.
8. Elements that removed from dc analysis by capacitors will appear to ac analysis because it
connects through short-circuit equivalent of the capacitors.
9. Parameter beta(𝛽) and 𝑉𝐶𝐸 are the least sensitive to change in collector current while 𝑍𝑜 is
the most sensitive.
10. The BJT 𝑟𝑒 model in the ac domain is sensitive to the actual dc operating conditions of the
network.
11. Most data sheets for BJT include a list of hybrid parameters.
12. Voltage-divider is more stable compared to fixed-bias configuration.
13. The nonlinear relationship between the gate-to-source voltage and the drain current of a
JFET requires that a graphical or mathematical solution be used to determine the Q-point of
operation.
14. The self-bias configuration is determined by an equation for VGS that will always pass
through the origin.
15. The method of ac analysis applied to JFET and DMOSFET are similar, with only difference is
the possible value of 𝐼𝐷 .
16. The design process often requires finding a resistance level to establish the desired voltage
or current level.
End of Module Test

1. For the fixed-bias configuration in figure 5.13 with 𝑉𝐶𝐶 = 12𝑉, 𝑅𝐵 = 220𝑘𝛺, 𝑅𝐶 =
2.2𝑘𝛺, 𝛽 = 60, 𝑎𝑛𝑑 𝑟𝑜 = 40𝑘𝛺,
a. Draw the ac equivalent network.
b. Calculate the network 𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑉 at no load.
2. For the circuit in figure 5.40 determine 𝑉𝐶𝐶 for a no-load gain of −160.
Figure 5.40 Problem 2 Circuit

3. For the Voltage-divider configuration in figure 5.17 given 𝑉𝐶𝐶 = 16𝑉, 𝑅1 = 39𝑘𝛺, 𝑅2 =
4.7𝑘𝛺, 𝑅𝐶 = 3.9𝑘𝛺, 𝑅𝐸 = 1.2𝑘𝛺, 𝛽 = 100, 𝑎𝑛𝑑 𝑟𝑜 = 50𝑘𝛺,
a. Draw the ac equivalent network.
b. Calculate the network 𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑉 at no load.
4. For the network of Figure 5.41, Calculate
a. 𝑟𝑒
b. 𝑍𝑖 and 𝑍𝑜
c. 𝐴𝑉
d. Determine the effect to the network if we change the value of 𝑟𝑜 to 20𝑘𝛺
5. For the circuit in figure 5.42,

a. Draw the ac equivalent circuit

b. Determine 𝑟𝑒 , 𝑍𝑖 , 𝑍𝑜 , 𝑎𝑛𝑑 𝐴𝑉 .
6. Given the circuit in figure 5.43, if 𝐼𝐷𝑆𝑆 = 10𝑚, 𝑉𝑝 = −6𝑉 and 𝑟𝑑 = 40𝑘𝛺
a. Determine 𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑉 ,
b. Determine 𝑍𝑖 , 𝑍𝑜 𝑎𝑛𝑑 𝐴𝑉 if 𝐼𝐷𝑆𝑆 and 𝑉𝑝 are one half of the original values. Compare
the solutions from problem 6.a and the effects.
7. For JFET voltage divider in figure 5.23 with values of 𝑉𝐷𝐷 = 20𝑉, 𝑅1 = 82𝑀𝛺, 𝑅2 =
11𝑀𝛺, 𝑅𝐷 = 2𝑘𝛺, 𝑅𝑆 = 610𝛺, 𝐼𝐷𝑆𝑆 = 12𝑚𝐴, 𝑉𝑃 = 3𝑉, 𝑟𝑑 = 50𝑘𝛺, 𝑉𝑖𝑛 = 20𝑚𝑉
a. Determine 𝑍𝑖 , 𝑍𝑜 , 𝑎𝑛𝑑 𝑉𝑜
b. Repeat 7.a with the capacitor 𝑉𝑠 removed and compare results.
8. In figure 5.44,
a. Determine 𝑍𝑖 , 𝑍𝑜 and 𝐴𝑉 if 𝑟𝑑 = 60𝑘𝛺.
b. Repeat 8.a if 𝑟𝑑 = 25𝑘𝛺, compare results
c. Determine 𝑉𝑜 if 𝑉𝑖 = 2𝑚𝑉.

9. Determine the 𝑉𝑜 for network in figure 5.45 if 𝑉𝑖 = 0.8𝑚𝑉 and 𝑟𝑑 = 40𝑘𝛺
References:
Floyd, T. L. Electronic Devices: Conventional Current Version (9th ed.). Jurong, Singapore: Pearson
Education South Asia Pte Ltd., 2012

MODULE 6 TRANSISTOR AMPLIFIER CIRCUIT ANALYSIS
Topic Outcome
1. Analyze the effects of source resistor and load resistor on the input and output impedance
and overall gain of the Transistor Bias Circuit.
2. Discuss cascaded configurations with transistor amplifiers.
Introduction
In the previous section we only determined the gain of transistor amplifier with input and output
connected directly to the terminal of the transistor. In this module we will analyze the effects of our
source resistor and load resistor to the single stage and multiple stage amplifier. Also the
calculation of the individual effects of load resistor and source resistor, and both to the no-load gain
will cover by this module.
After finishing this topic, the students will learn the effect of 𝑅𝐿 and 𝑅𝑆 to amplifier circuit and can
calculate the voltage-gain affected by the said resistances.
Effect of Source and Load Resistors
All parameters determined in previous module have been for unloaded amplifier whose input
voltage is connected directly to the transistor.
The circuit in figure 6.1 is typical network with unloaded voltage gain specified in eq. 6.1 discussed
in module 5.
Figure 6.1 Unloaded Amplifier Configuration
𝑉𝑜
𝐴𝑉𝑁𝐿 = 𝒆𝒒. 𝟔. 𝟏
𝑉𝑖
When source is added to the circuit, (figure 6.2-a) we can derive its new voltage gain by simplifying
our circuit (figure 6.2-b)

Figure 6.2 Unloaded Amplifier with Source (a) Configuration (b) Equivalent Circuit
𝑊𝑕𝑒𝑟𝑒: 𝑉𝑠 = 𝑠𝑜𝑢𝑟𝑐𝑒 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑍𝑖 = 𝑅𝑖
𝑍𝑜 = 𝑅𝑜
𝐴𝑉𝑁𝐿 = 𝑢𝑛𝑙𝑜𝑎𝑑𝑒𝑑 𝑔𝑎𝑖𝑛
from small signal analysis.
Since 𝑅𝑠 and 𝑅𝑖 is in series, we can determine the equation for gain with source resistance (eq. 6.2).
The voltage gain for this configuration is the ratio of output voltage and the source resistance
𝐴𝑣𝑠𝑜 = 𝑉𝑜 /𝑉𝑠 .
General term for voltage gain
𝑉𝑜
𝐴𝑉𝑁𝐿 =
𝑉𝑖
By voltage theorem at the input side, 𝑉𝑖 wrt 𝑉𝑠
𝑅𝑖
𝑉𝑖 = 𝑉
𝑅𝑖 + 𝑅𝑠 𝑠
From voltage gain general term
𝑉𝑜 = 𝐴𝑉𝑁𝐿 𝑉𝑖
Substitute equation for 𝑉𝑖
𝑅𝑖
𝑉𝑜 = 𝐴𝑉𝑁𝐿 𝑉𝑠
𝑅𝑖 + 𝑅𝑠
Getting the equation for 𝐴𝑉𝑆𝑂 = 𝑉𝑜 /𝑉𝑠 eq. 6.2

𝑉𝑜 𝑅𝑖
= 𝐴𝑉𝑆𝑂 = 𝐴𝑉𝑁𝐿 𝒆𝒒. 𝟔. 𝟐
𝑉𝑠 𝑅𝑖 + 𝑅𝑠
𝑤𝑕𝑒𝑟𝑒 𝐴𝑉𝑆𝑂 𝑖𝑠 𝑡𝑕𝑒 𝑔𝑎𝑖𝑛 𝑤𝑖𝑡𝑕 𝑡𝑕𝑒 𝑒𝑓𝑓𝑒𝑐𝑡 𝑜𝑓 𝑠𝑜𝑢𝑟𝑐𝑒 𝑟𝑒𝑠𝑖𝑠𝑡𝑜𝑟 𝑎𝑙𝑜𝑛𝑒
To analyze the effects of load resistor but without the source resistance figure 6.3-a, the loaded gain
will change because the output impedance of the system is in series with 𝑅𝐿 figure 6.3-b. Using the
general equation for 𝐴𝑣 = 𝑉𝑂 /𝑉𝑖 , but the output voltage now will be measured across the load
resistor.
Figure 6.3 Loaded Amplifier w/o Source (a) Configuration (b) Equivalent Circuit
Getting the voltage across 𝑅𝐿 in terms of 𝐴𝑉𝑁𝐿 , by voltage divider at the output terminal,
𝑅𝐿
𝑉𝑅𝐿 = 𝐴𝑉𝑁𝐿 𝑉𝑖
𝑅𝑜 + 𝑅𝐿
Substituting to general equation
𝑅𝐿
𝑉𝑜 𝐴𝑉𝑁𝐿 𝑉𝑖 𝑅𝑜 + 𝑅𝐿
𝐴𝑉𝐿 = =
𝑉𝑖 𝑉𝑖
Then the equation (eq. 6.3) for the loaded gain
𝑅𝐿
𝐴𝑉𝐿 = 𝐴𝑉𝑁𝐿 𝒆𝒒. 𝟔. 𝟑
𝑅𝑜 + 𝑅𝐿
𝑤𝑕𝑒𝑟𝑒 𝐴𝑉𝐿 𝑖𝑠 𝑡𝑕𝑒 𝑔𝑎𝑖𝑛 𝑤𝑖𝑡𝑕 𝑡𝑕𝑒 𝑒𝑓𝑓𝑒𝑐𝑡 𝑜𝑓 𝑙𝑜𝑎𝑑 𝑟𝑒𝑠𝑖𝑠𝑡𝑜𝑟 𝑎𝑙𝑜𝑛𝑒
The circuit with load and source resistor is shown in figure 6.4-a. To simplify the equation for
analysis, the source voltage and resistor is connect in series to the input of the network, and the
output resistor is in series with the load resistance as shown in figure 6.4-b

Figure 6.4 Loaded Amplifier w/ Source (a) Configuration (b) Equivalent Circuit
Using again the general equation for the voltage gain
𝑉𝑜
𝐴𝑣 =
𝑉𝑖
The output voltage will measure across the load resistance while the input is across the input
impedance of the ac network from the source voltage. We can write the equation for the gain with
effects of both 𝑅𝐿 and 𝑅𝑆
𝑉𝑅𝐿
𝐴𝑉𝑆 =
𝑉𝑠
Recall,
𝑅𝐿
𝑉𝑅𝐿 = 𝐴𝑉𝑁𝐿 𝑉𝑖
𝑅𝑜 + 𝑅𝐿
And
𝑅𝑖
𝑉𝑖 = 𝑉
𝑅𝑖 + 𝑅𝑠 𝑠
We can do some substitution to determine the overall voltage gain (eq. 6.4)
𝑅
𝐴𝑉𝑁𝐿 𝑉𝑖 𝑅 +𝐿 𝑅
𝑜 𝐿
𝐴𝑉𝑆 =
𝑅𝑖 + 𝑅𝑆
𝑉𝑖
𝑅𝑖
𝑅𝐿 𝑅𝑖
𝐴𝑉𝑆 = 𝐴𝑉𝑁𝐿
𝑅𝑜 + 𝑅𝐿 𝑅𝑖 + 𝑅𝑆
Or

𝑅𝑖
𝐴𝑉𝑆 = 𝐴𝑉
𝑅𝑖 + 𝑅𝑆
𝑤𝑕𝑒𝑟𝑒 𝐴𝑉𝑆 𝑖𝑠 𝑡𝑕𝑒 𝑜𝑣𝑒𝑟𝑎𝑙𝑙 𝑔𝑎𝑖𝑛 𝑤𝑖𝑡𝑕 𝑡𝑕𝑒 𝑒𝑓𝑓𝑒𝑐𝑡 𝑜𝑓 𝑙𝑜𝑎𝑑 𝑎𝑛𝑑 𝑠𝑜𝑢𝑟𝑐𝑒 𝑟𝑒𝑠𝑖𝑠𝑡𝑎𝑛𝑐𝑒
Cascaded-System
The two-port systems approach is particularly useful for cascaded systems such block diagram
shown in figure 6.5. 𝐴𝑣1 , 𝐴𝑉2 , 𝐴𝑉3 𝑎𝑛𝑑 𝐴𝑉𝑛 are the voltage gain of each single network under the
effects of load resistors. 𝐴𝑣1 is determined with the input impedance of 𝐴𝑣2 , acting as load
resistance of 𝐴𝑣1 , same to 𝐴𝑣2 𝑡𝑜 𝐴𝑣3 , 𝐴𝑣3 𝑡𝑜 𝐴𝑣4 … 𝐴𝑣 𝑛 −1 𝑡𝑜 𝐴𝑣𝑛 .
Figure 6.5 Cascaded System Block Diagram
The total gain of the system is then determined by the product of the individual gains (eq. 6.5) as
follows:
𝐴𝑉𝑇 = 𝐴𝑉1 𝐴𝑉2 𝐴𝑉3 … 𝐴𝑉𝑁 𝒆𝒒. 𝟔. 𝟓
The equivalent network model for figure 6.5 is shown in figure 6.6 to be used for better analysis
and getting the overall gain of a cascaded network. The overall gain for the cascaded network in
figure 6.6 is defined by the equation 6.6.
𝑅𝑖
𝐴𝑉𝑆(𝑇𝑂𝑇𝐴𝐿 ) = 𝐴𝑉𝑇 𝒆𝒒. 𝟔. 𝟔
𝑅𝑖 + 𝑅𝑆
Figure 6.6 Cascaded System Equivalent Model
Consider cascaded circuit shown in figure 6.7, let us determine the equation that will define its
overall gain.

Figure 6.7 Cascaded Two Fixed-Bias BJT
By dc analysis we can determine the value of each individual 𝐼𝐸 to be used on small signal analysis.
𝐼𝐸1 = 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑓𝑜𝑟 𝑡𝑕𝑒 𝑓𝑖𝑟𝑠𝑡 𝑠𝑡𝑎𝑔𝑒
𝐼𝐸2 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑓𝑜𝑟 𝑡𝑕𝑒 𝑠𝑒𝑐𝑜𝑛𝑑 𝑠𝑡𝑎𝑔𝑒
By dc analysis, calculate for the important individual stage parameters
- First stage:
26𝑚𝑉
𝑟𝑒1 =
𝐼𝐸1
𝑍𝑖1 = 𝑖𝑛𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒
𝑍𝑜1 = 𝑜𝑢𝑡𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒
𝐴𝑉𝑁𝐿1 = 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑔𝑎𝑖𝑛
- Second stage:
26𝑚𝑉
𝑟𝑒2 =
𝐼𝐸2
𝑍𝑖2 = 𝑖𝑛𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒
𝑍𝑜2 = 𝑜𝑢𝑡𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑎𝑛𝑐𝑒
𝐴𝑉𝑁𝐿2 = 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑔𝑎𝑖𝑛
Drawing the equivalent network, shown in figure 6.8, and applying the values from the previous
steps.

Figure 6.8 Cascaded Two Fixed-Bias BJT Equivalent System Approach
Computing for individual gain looking at the network, with effects of the load resistors
𝑅𝑖2
𝐴𝑉1 = 𝐴𝑉𝑁𝐿1
𝑅𝑜1 + 𝑅𝑖2
𝑅𝐿
𝐴𝑉2 = 𝐴𝑉𝑁𝐿2
𝑅𝑖2 + 𝑅𝐿
Solving the total gain for 𝐴𝑣
𝐴𝑉(𝑇𝑂𝑇𝐴𝐿 ) = 𝐴𝑉1 𝐴𝑉2
Then the overall gain for the cascaded network is defined by equation 6.7
𝑅𝑖1
𝐴𝑉𝑆(𝑇𝑂𝑇𝐴𝐿 ) = 𝐴𝑉 𝑇𝑂𝑇𝐴𝐿
𝑅𝑠 + 𝑅𝑖1
Note that the value of 𝑅𝑠 here is the internal resistance of the voltage source. In the case of FET, to
avoid confusion that you may misinterpret 𝑅𝑠 as the source resistor, we could use variable 𝑅𝑠𝑜𝑢𝑟𝑐𝑒
for the source resistance.
1. The total gain of a multistage amplifier is the product of the individual gains.
2. Single-stage amplifiers can be connected in sequence with capacitively-coupling and direct
coupling methods to form multistage amplifiers.
3. The gain obtained with a source resistance in place will always be less than that obtained
under loaded or unloaded conditions due to the drop in applied voltage across the source
resistance.
4. For the same configuration 𝐴𝑉𝑁𝐿 > 𝐴𝑉𝐿 > 𝐴𝑉𝑆 .
5. For a particular design, the larger the level of RL, the greater is the level of ac gain.
6. For a particular amplifier, the smaller the internal resistance of the signal source, the
greater is the overall gain.

7. For any network that have coupling capacitors, the source and load resistance do not affect
the dc biasing levels
End of Module Test
1. For the fixed-bias configuration if 𝑉𝐶𝐶 = 12𝑉, 𝑅𝐵 = 220𝑘𝛺, 𝑅𝐶 = 2.2𝑘𝛺, 𝛽 = 60, 𝑎𝑛𝑑 𝑟𝑜 =
40𝑘𝛺,
a. Determine the overall loaded gain with the effect of source resistance 300𝛺 and load
resistance 1𝑘𝛺.
b. Change the value of 𝑅𝑆 and 𝑅𝐿 to 500𝛺 and 2𝑘𝛺 respectively. Compare the results
2. For the Voltage-divider configuration circuit, if 𝑉𝐶𝐶 = 16𝑉, 𝑅1 = 39𝑘𝛺, 𝑅2 = 4.7𝑘𝛺, 𝑅𝐶 =
3.9𝑘𝛺, 𝑅𝐸 = 1.2𝑘𝛺, 𝛽 = 100, 𝑎𝑛𝑑 𝑟𝑜 = 50𝑘𝛺, determine the overall gain with the effect of
𝑅𝑠 = 100𝛺 and 𝑅𝐿 = 2.2𝑘𝛺.
3. For JFET voltage divider network with values of 𝑉𝐷𝐷 = 20𝑉, 𝑅1 = 82𝑀𝛺, 𝑅2 = 11𝑀𝛺, 𝑅𝐷 =
2𝑘𝛺, 𝑅𝑆 = 610𝛺, 𝐼𝐷𝑆𝑆 = 12𝑚𝐴, 𝑉𝑃 = 3𝑉, 𝑟𝑑 = 50𝑘𝛺, 𝑉𝑖𝑛 = 20𝑚𝑉, determine the loaded gain
if 𝑅𝑠 = 500𝛺 and 𝑅𝐿 = 3.3𝑘𝛺.
4. Solve for 𝐴𝑉𝑁𝐿 , 𝐴𝑉 𝑎𝑛𝑑 𝐴𝑉𝑆 for the circuit in figure 6.9 and draw its equivalent network.
Figure 6.9 Circuit for Problem 4

5. For cascaded circuit in figure 6.10 and 6.11, solve for
a. Individual stage input and output impedance
b. 𝐴𝑉𝑁𝐿1 and 𝐴𝑉𝑁𝐿2
c. 𝐴𝑉(𝑇𝑂𝑇𝐴𝐿 )
d. 𝐴𝑉𝑆 𝑇𝑂𝑇𝐴𝐿

Figure 6.10 Cascaded Two BJT Fixed-Bias
Figure 6.11 Cascaded BJT and E-MOSFET
References:


MODULE 7 Frequency Response
Topic Outcomes
 Become acquainted with the frequency response of a BJT and FET amplifier.
 Be able to find the Miller effect capacitance at the input and output of an amplifier due to
a feedback capacitor
Introduction
The analysis thus far has been limited to a particular frequency. For the amplifier, it was
a frequency that normally permitted ignoring the effects of the capacitive elements, reducing
the analysis to one that included only resistive elements and sources of the independent and
controlled variety. We will now investigate the frequency effects introduced by the larger
capacitive elements of the network at low frequencies and the smaller capacitive elements of
the active device at high frequencies. Because the analysis will extend through a wide frequency
range, the logarithmic scale will be defined and used throughout the analysis. In addition,
because industry typically uses a decibel scale on its frequency plots, the concept of the decibel
is introduced in some detail. The similarities between the frequency response analyses of both
BJTs and FETs permit the coverage of both in the same module.
Frequency Response of an Amplifier
 Consider a sinusoidal signal of angular frequency 𝜔 represented by 𝐴𝑉𝑚 sin(𝜔𝑡 + 𝜑). If

the voltage gain of amplifier has a magnitude A and the signal suffer a phase change 𝜃,
then the output will be
𝜃
𝐴𝑉𝑚 sin(𝜔𝑡 + 𝜑 + 𝜃 = 𝐴𝑉𝑚 sin[𝜔 (𝑡 + ) + 𝜑]
𝜔
 If the amplification A is independent of frequency and if the phase shift 𝜃 is proportional

to frequency, then the amplifier will followed the input signal although the signal will be
𝜃
shifted in time by . It means both amplitude and time delay responses are sensitive
𝜔
indicator of frequency distortion.

 For an amplifier stage the frequency characteristic may be divided into three regions.
o Mid-band frequency: the region of frequency where the amplification and delay
is reasonably constant i.e. gain is nearly equal to one.

o Below mid-band frequency: in this region, the active circuit may behave as
simple high pass circuit. The response decrease with decreasing frequency and
output approaches to zero.
o Above mid-band frequency: in above mid-band frequency, the circuit behaves
like a low pass circuit and the response decreases with increase in frequency.
Low Frequency Response:

In the low-frequency region of the single-stage BJT or FET amplifier, it is the R-C
combinations formed by the network capacitors CC, CE and CS and the network resistive
parameters that determine the cutoff frequencies. In fact, an R-C network similar to the below
can be established for each capacitive element and the frequency at which the output voltage
drops to 0.707 of its maximum value determined. Once the cutoff frequencies due to each
capacitor are determined, they can be compared to establish which will determine the low-
cutoff frequency for the system.
(a) (b) (c)
Fig (a): R-C combination that will define a low cutoff frequency
(b): R-C circuit at very high frequencies
(c): R-C circuit at low frequency i.e. 𝑓 = 0
The output and input voltages are related by the voltage-divider rule in the following manner:

𝑅𝑉𝑖
𝑉𝑂 =
𝑅 + 𝑋𝑐
𝑉𝑜 𝑅 𝑋𝑐 1 1
𝐴𝑣 = = = 1/ (1 − 𝑗 ( ) = 1/(1 − 𝑗 ( ) = 1/(1 − 𝑗( )
𝑉𝑖 𝑅 − 𝑗𝑋𝑐 𝑅 𝜔𝑅𝐶 2𝜋𝑓𝑅𝐶
𝑓1
𝐴𝑣 = 1/(1 − 𝑗( )
𝑓
1
Where 𝑓1 =
2𝜋𝑅𝐶
In the magnitude and phase form,

𝑉𝑜 𝑓1 2 𝑓1
𝐴𝑣 = = 1/ (√(1 + ( ) ∗ tan−1
𝑉𝑖 𝑓 𝑓
1
At 𝑓 = 𝑓1|𝐴𝑉 | = = 0.707 → −3𝑑𝐵
√2
Low Frequency Response of BJT Amplifier:
For any BJT configuration, it will simply be necessary to find the appropriate equivalent
resistance for the R-C combination and the capacitors CC , CE and CS will determine the
low- frequency response of the network.
Loaded BJT amplifier with capacitors that affect the low-frequency response

Cs: It is normally connected between the applied source and the active device, the general form
of the R-C configuration is established by the network. The total resistance is now 𝑅𝑠 + 𝑅𝑖 and
the cutoff frequency is
1
𝑓𝑙𝑠 =
2𝜋(𝑅𝑆 + 𝑅𝑖 )𝐶𝑆
Where 𝑅𝑠 = source resistance
𝑅𝑖 = input resistance of the active device
Determining the effect of Cs on the low frequency response
Cc: The coupling capacitor is normally connected between the output of the active device and
the applied load, the R-C configuration that determines the low cutoff frequency due to Cc
appears and the total series resistance is now 𝑅𝐿 + 𝑅𝑜 and the cutoff frequency due to Cc is
determined by
1
𝑓𝑙𝑐 =
2𝜋(𝑅𝑜 + 𝑅𝐿 )𝐶𝑐
Where 𝑅𝐿 = load resistance
𝑅𝑂 = output resistance of active device
Determining the effect of Cc on the low frequency response
𝐶𝐸 : The cutoff frequency due to 𝐶𝐸 can be determined using the following equation

1
𝑓𝑙𝑐 =
2𝜋(𝑅𝑒 )𝐶𝐸
Where 𝑅𝑒 = the resistance of active by seen the emitter
Determining the effect of CE on the low frequency response
The highest low-frequency cutoff determined by 𝐶𝑐 , 𝐶𝐸 and 𝐶𝑠 will have the greatest impact
since it will be the last encountered before the mid-band level.
Low Frequency Response of FET Amplifier
The analysis of the FET amplifier in the low-frequency region will be quite similar to
that of the BJT amplifier. There are again three capacitors CG, Cc and Cswill determine the
low-frequency response of the network.
Capacitive elements that affect the low-frequency response of a JFET amplifier
𝐶𝐺 : The coupling capacitor between the source and the active device, the ac equivalent

network will appear as shown in below figure. The cutoff frequency determined by 𝐶𝐺 will
then be
1
𝑓𝑙𝐺 =
2𝜋(𝑅𝑠𝑖𝑔 + 𝑅𝑖 )𝐶𝐺
Where 𝑅𝑖=input resistance of active device i.e.in FET 𝑅𝑖 = 𝑅𝐺

𝑅𝑠𝑖𝑔 = source resistance
Determining the effect of CG on the low-frequency response
Cc: The coupling capacitor between the active device and the load the network. The
resulting cutoff frequency is
1
𝑓𝑙𝐶 =
2𝜋(𝑅𝑜 + 𝑅𝐿 )𝐶𝐶
Where 𝑅𝑜 = output resistance of active device
𝑅𝐿 = load resistance
Determining the effect of Cc and Cs on the low-frequency response

𝐶𝑆 : It is the source capacitance and the resulting cut off frequency is
1
𝑓𝑙𝐶 =
2𝜋𝑅𝑒𝑞 𝐶𝐶
1
Where 𝑅𝑒𝑞 = 𝑅𝑆 || 𝑤ℎ𝑒𝑛 𝑟𝑑 ≅∞
𝑔𝑚
High Frequency Response
At the high-frequency end, there are two factors that will define the 3-dB point: the
network capacitance (parasitic and introduced) and the frequency dependence of ℎfe (β).
In the high-frequency region, the RC network of concern has the configuration

appearing in the below figure. The gain of the following RC network is given by
𝑓
𝐴𝑉 = 1/ (1 + 𝑗 ( ))
𝑓2
Where 𝑓2 =cutoff frequency of a device

1
At 𝑓 = 𝑓2 , |𝐴𝑣 | = = 0.707 → −3𝑑𝐵
√2
R-C combination that will define a high cutoff frequency
High Frequency Response of BJT Amplifier
During high frequency response various parasitic capacitances (𝐶𝑏𝑒 , 𝐶𝑐𝑒 𝑎𝑛𝑑 𝐶𝑏𝑐 )
of the transistor have been included with the wiring capacitances (𝐶𝑤𝑖 , 𝐶𝑤𝑜 ) introduced in
the network. The capacitance 𝐶𝑖 includes the input wiring capacitance𝐶𝑤𝑖 , the transition
capacitance𝐶𝑏𝑒 , and the Miller capacitance 𝐶𝑀𝑖 the capacitance 𝐶𝑜 includes the output
wiring capacitance𝐶𝑤 , the parasitic capacitance𝐶𝑐𝑒 , and the output Miller capacitance . In
𝑜
general, 𝐶𝑏𝑒 the capacitance is the largest of the parasitic capacitances, with 𝐶𝑐𝑒 the
smallest. In fact, most significantly the network consists of 𝐶𝑏𝑒 and 𝐶𝑏𝑐 and do not
include 𝐶𝑐𝑒 unless it will affect the response of a particular type of transistor in a specific
area of application.
Electronic Circuits: Devices and Analysis

7
High-frequency response of BJT amplifier
High-frequency ac equivalent model of BJT amplifier
The Thévenin equivalent circuit for the input and output networks of the above
network is given below. For the input network, the3-dB frequency is defined by
1
𝑓𝐻𝑖 =
2𝜋(𝑅𝑇ℎ1 )𝐶𝑖
Where 𝑅𝑇ℎ1 = 𝑅𝑆 ∥ 𝑅1 ∥ 𝑅2 ∥ 𝑅𝑖
𝐶𝑖 = 𝐶𝑀𝑖 + 𝐶𝑤𝑖 + 𝐶𝑏𝑒 = 𝐶𝑤𝑖 + 𝐶𝑏𝑒 + (1 − 𝐴𝑣 )𝐶𝑏𝑐
Similarly for output network, the 3dB frequency is defined by

8
1
𝑓𝐻𝑜 =
2𝜋(𝑅𝑇ℎ2 )𝐶𝑜
Where 𝑅𝑇ℎ2 = 𝑅𝐶 ∥ 𝑅𝐿 ∥ 𝑟𝑜
𝐶𝑜 = 𝐶𝑀𝑜 + 𝐶𝑊𝑜 + 𝐶𝑏𝑒
Thévenin circuits for the input and output networks of the network
High Frequency Response of FET Amplifier
The analysis of the high-frequency response of the FET amplifier will proceed in a
very similar manner to that encountered for the BJT amplifier. There are interelectrode
and wiring capacitances that will determine the high-frequency characteristics of the amplifier.
The capacitors 𝐶𝑔𝑠 and 𝐶𝑔𝑑 typically vary from 1 to 10 pF, while the capacitance 𝐶𝑑𝑠 is
usually quite a bit smaller, ranging from 0.1 to1 pF.
The cutoff frequencies defined by the input and output circuits can be obtained by first
finding the Thevenin equivalent circuits for each section.

9
High-frequency response of FET amplifier
High-frequency ac equivalent model of BJT amplifier
For the input circuit,
1
𝑓𝐻𝑖 =
2𝜋(𝑅𝑇ℎ1 )𝐶𝑖
Where 𝑅𝑇ℎ1 = 𝑅𝑠𝑖𝑔 ∥ 𝑅𝐺
𝐶𝑖 = 𝐶𝑀𝑖 + 𝐶𝑤𝑖 + 𝐶𝑔𝑠 = 𝐶𝑤𝑖 + 𝐶𝑔𝑠 + (1 − 𝐴𝑣 )𝐶𝑔𝑑
For the output circuit,
1
𝑓𝐻𝑜 =
2𝜋(𝑅𝑇ℎ2 )𝐶𝑜
Where 𝑅𝑇ℎ2 = 𝑅𝐷 ∥ 𝑅𝐿 ∥ 𝑟𝑑
𝐶𝑜 = 𝐶𝑀𝑜 + 𝐶𝑤𝑜 + 𝐶𝑑𝑠

1
𝐶𝑀𝑜 = (1 − )𝐶
𝐴𝑉 𝑔𝑑
The Thevenin equivalent circuits for the (a) input circuit and (b) output circui
The RC Coupled Amplifier
A cascade common emitter (CE) transistor stage
 It has excellent frequency response in an audio frequency range and cheaper in cost.
 The drawback of this approach is the lower frequency limit imposed by the
coupling capacitor and poor impedance matching.

Summary
 The coupling and bypass capacitors of an amplifier affect the low-frequency response.
 The internal transistor capacitances affect the high-frequency response.
 The decibel is a logarithmic unit of measurement for power gain and voltage gain.
 A decrease in voltage gain to 70.7% of midrange value is a reduction of 3 dB.
 A halving of the voltage gain corresponds to a reduction of 6 dB.
 The dBm is a unit for measuring power levels referenced to 1 mW.
 Critical frequencies are values of frequency at which the RC circuits reduce the voltage gain
to 70.7% of its midrange value.
 Each RC circuit causes the gain to drop at a rate of 20 dB/decade.
 For the low-frequency RC circuits, the highest critical frequency is the dominant critical
frequency.
 A decade of frequency change is a ten-times change (increase or decrease).
 An octave of frequency change is a two-times change (increase or decrease).
 For the high-frequency RC circuits, the lowest critical frequency is the dominant critical
frequency.
 The bandwidth of an amplifier is the range of frequencies between the dominant lower
critical frequency and the dominant upper critical frequency.
 The gain-bandwidth product is a transistor parameter that is constant and equal to the
unity-gain frequency.
 The dominant critical frequencies of a multistage amplifier establish the bandwidth.
 Two frequency response measurement methods are frequency/amplitude and step.
True or False Quiz

1. Coupling capacitors in an amplifier determine the low-frequency response.
2. Bypass capacitors in an amplifier determine the high-frequency response.
3. Internal transistor capacitance has no effect on an amplifier’s frequency response.
4. Miller’s theorem states that both gain and internal capacitances influence high-frequency
response.
5. The midrange gain is between the upper and lower critical frequencies.
6. The critical frequency is where the gain is 6 dB less than the midrange gain.
7. dBm is a unit for measuring power levels.
8. A ten-times change in frequency is called a decade.

9. An octave corresponds to a doubling or halving of the frequency.
10. The input and output RC circuits have no effect on the frequency response.
11. A Bode plot shows the voltage gain versus frequency on a logarithmic scale.
12. Phase shift is part of an amplifier’s frequency response.
References
Floyd, T. L. (2012). Electronic Devices: Conventional Current Version (9th ed.). Jurong,
Singapore: Pearson Education South Asia Pte Ltd.
13
MODULE 8 INTRODUCTION TO OPERATIONAL AMPLIFIER
Topic Outcome
1. Describe the characteristics and modes of operational amplifier.

2. Analyze op-amps with negative feedback and its effects
3. Analyze op-amp the open-loop frequency response
4. Analyze op-amp the close-loop frequency response
Introduction
In this section, the basic concepts and operation of an operational amplifier (op-amp) will be
discussed. Op-amp is a voltage amplifying device that can perform different operations. It is the
most useful device in analog circuitry. One parameter that will measure the performance of the op-
amp is its CMRR. It can operate at lower voltages and power. The principle of negative feedback
that results of the usefulness of this device is also demonstrated. Negative system connected to op-
amp changes its bandwidth, cut-off frequency and gain.
Upon completion of this module, the students will learn the basic op-amps, which are widely used
of all linear IC. Students will also learn about open-loop and closed-loop frequency responses,
bandwidth, phase shift, and other frequency-related parameters. The effect of negative feedback to
operational-amplifier will be examined.
Operational Amplifier (Op-amp)
An op-amp is a direct coupled, very high gain differential amplifier with high input impedance and
low output impedance usually packed in small IC. The term operational refers to its capabilities to
perform mathematical operation (addition, subtraction, differentiation and integration) as its main
applications. Figure 8.1 shows the symbols for op-amps (a. 2-input terminals, b. with 2 dc supply).
Figure 8.1 Op-amp symbols (a) without dc supply (b) with dc supply terminals
Internal Block Diagram of an Op-Amp
A typical op-amp is made up of three amplifiers (differential amplifier, voltage amplifier, and push-
pull amplifier) shown in figure 8.2.

Figure 8.2 Op-amp Basic Internal Arrangement
- Differential Amplifier (Input Stage) - Provides amplification between the difference of the
two input voltage.
- Voltage Amplifier (Gain Stage) - Provides additional gain
- Push-pull Amplifier (Output Stage) - Provides better power output
Input Signal Modes
Input signal modes are determined by the differential amplifier input stage of the op-amp.
Differential Mode
Differential mode operates in two different operation; single-ended and double-ended differential
mode. Single-ended differential mode results when one signal is connected to one input with the
other input connected to the ground. Figure 8.3-a show that the inverting input of the op-amp is
connected to the input voltage producing an inverted amplified signal at the output. While in figure
8.3-b, the input signal is connected to the noninverting input of the op-amp resulting a noninverted
amplified signal at the output.
Figure 8.3 Single-ended Differential Mode (a) input at inverting (b) input at noninverting
In the double-ended differential mode, two opposite (out of phase) voltage signals are applied to
the inputs (figure 8.4-a) or single source connected between the two inputs. The amplified
difference between the two inputs appears on the output.

Figure 8.4 Double-ended Differential Mode (a) opposite input (b) single source between inputs
Common Mode
In this type of input signal mode, two identical signal voltages are applied to the two inputs, as
shown in figure 8.5, where they tend to cancel, resulting in a zero output voltage.
Figure 8.5 Common-mode Operation
Common Mode Rejection
A significant feature of a differential connection is that the signals that are opposite at the inputs
are highly amplified, whereas those that are common to the two inputs are only slightly amplified—
the overall operation being to amplify the difference signal while rejecting the common signal at the
two inputs. Since noise is common to both inputs, the differential connection tends to provide
attenuation. Common-mode rejection means that this unwanted signal will not appear on the
output and distort the desired signal. Noise are pick-up energy on the input lines, power lines, or
other sources.
Common-Mode Rejection Ratio (CMRR)
Desired signals can appear on only in differential mode while unwanted signal appear in common
mode. Common-mode rejection ratio (CMRR) is the ability of amplifier to reject common mode.
Ideally, an op-amp provides a very high gain for differential-mode signals and zero gain for
common-mode signals. However, practical op-amps exhibit a very small gain (less than 1), while
providing a high open-loop differential voltage gain (several thousands). The higher the open-loop

gain with respect to common mode gain, the better the performance of the op-amp in terms of
rejection of common-mode signals. The good measure of an op-amp’s performance in rejecting
unwanted common-mode signals is thru CMRR (ratio of the open-loop differential voltage gain, 𝐴𝑜𝑙 ,
to the common-mode gain, 𝐴𝑐𝑚 ) defined by the equation 8.1.
𝐴𝑜𝑙
𝐶𝑀𝑅𝑅 = 𝒆𝒒. 𝟖. 𝟏
𝐴𝑐𝑚
or expressing in decibel (𝑑𝐵) eq.8.2,
𝐴𝑜𝑙
𝐶𝑀𝑅𝑅 = 20 log 𝒆𝒒. 𝟖. 𝟐
𝐴𝑐𝑚
The higher the CMRR the better and means 𝐴𝑜𝑙 is much higher and 𝐴𝑐𝑚 has much lower values.
Open-loop Gain
The open-loop voltage gain is set by the internal design alone (internal voltage gain or the ratio of
the output to the input voltage with no external components of the op-amp). It is not a well-
controlled parameter and can range up to 106𝑑𝐵. Open-loop gain often refers to 𝑙𝑎𝑟𝑔𝑒 −
𝑠𝑖𝑔𝑛𝑎𝑙 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑔𝑎𝑖𝑛 𝑖𝑛 𝑑𝑎𝑡𝑎𝑠𝑕𝑒𝑒𝑡𝑠.
A 100,000 CMRR means the differential gain is 100,000 times more than common-mode gain. If the
amplitudes of the differential input signal and the common-mode noise are equal, the desired signal
will appear on the output 100,000 times greater in amplitude than the noise. Thus, the noise or
interference has been essentially eliminated.
Maximum Output Voltage Swing (𝑽𝒐 𝒑−𝒑 )
When there is no input voltage in an op-amp, its output is ideally zero

(𝑞𝑢𝑖𝑒𝑠𝑐𝑒𝑛𝑡 𝑜𝑢𝑡𝑝𝑢𝑡 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑜𝑓 𝑡𝑕𝑒 𝑜𝑝 − 𝑎𝑚𝑝). When an input signal is applied, the ideal limits of
the peak-to-peak output signal are the ± 𝑑𝑐 𝑠𝑢𝑝𝑝𝑙𝑦 (±𝑉𝑠 ), but in reality the op-amp never reach the
maximum peak-to-peak output voltage. The output voltage of an op-amp also varies to the load
resistance connected to its output terminal.
In some application, op-amps do not use both the positive and negative dc supply. One example is
the analog-to-digital converter that only uses a sing dc voltage source. In this case, the op-amp
output is designed to operate between ground and a full scale output that is near the positive
supply voltage.
Input Offset Voltage
If the input of the op-amp is zero volts, ideally its output is equal to zero also. However in practical
op-amp, there is a small dc output voltage (𝑉𝑜𝑢𝑡 (𝑒𝑟𝑟𝑜𝑟 ) ) when there is no differential input voltage.
Its primary cause is a slight mismatch of the base emitter voltages of the differential amplifier input
stage of an op-amp.

The input offset voltage (𝑉𝑜𝑠 ) is the differential dc voltage required between the inputs to force the
output to zero volts. Ideally its value should be equal to zero. In practical op-amp, the 𝑉𝑜𝑠 is in the
range of 2𝑚𝑉 or less.
Input Offset Voltage Drift
The offset voltage drift is defined as how much current change occurs in the input offset voltage for
each degree change in temperature. The typical value of the voltage drift is in the range of 5µ𝑉 to
50µ𝑉 per degree Celsius. Op-amp with a higher nominal value of input offset voltage exhibits a
higher drift.
Input Bias Current
The dc current required by the input of the amplifier to properly operate the first stage of an op-
amp is called the input bias current. It is the average of both input current defined in eq. 8.3 and
illustrated in figure 8.6.
Figure 8.6 Input Bias Current Concepts
𝐼𝑖𝑛 1 + 𝐼𝑖𝑛 2
𝐼𝑏𝑖𝑎𝑠 = 𝒆𝒒. 𝟖. 𝟑
2
Input Impedance (𝒁𝒊𝒏 )
Two basic ways of specifying the input impedance of an op-amp are the differential and the
common mode.
- Differential Input Impedance (𝑍𝑖𝑛 (𝑑) ) - total resistance between inverting and non inverting
input as shown in figure 8.7-a. It can be measured by determining the change in bias current
for a given change in differential input voltage.
- Common-Mode Input Impedance (𝑍𝑖𝑛 (𝑐𝑚 ) ) - the total resistance between each input
terminal and ground (figure 8.7-b). It can be measured by determining the change in bias
current for a given change in common-mode input voltage.

Figure 8.6 Input Impedance (a) Differential (b) Common-mode
Input Offset Current
In ideal operation of the op-amp, if two input bias currents are equal, the difference is zero. But in
practical op-amp, the bias currents are not equal. The input offset current (𝐼𝑜𝑠 ) is the absolute value
of the difference of the input bias currents define by equation 8.4.
𝐼𝑜𝑠 = 𝐼𝑖𝑛 1 − 𝐼𝑖𝑛 2 𝒆𝒒. 𝟖. 𝟒
In actual, offset current are usually small (least order of magnitude less than current bias) and can
be neglected in some applications. However, a high gain high input impedance amplifier should
have a small value of 𝐼𝑜𝑠 as possible because the difference in currents through large input
resistances produce a significance amount of offset voltage. Thus offset voltage, 𝑉𝑜𝑠 (eq.8.5)
developed can be computed.
𝑉𝑜𝑠 = 𝐼𝑖𝑛 1 𝑅𝑖𝑛 − 𝐼𝑖𝑛 2 𝑅𝑖𝑛 = 𝐼𝑖𝑛 1 + 𝐼𝑖𝑛 2 𝑅𝑖𝑛
𝑉𝑜𝑠 = 𝐼𝑜𝑠 𝑅𝑖𝑛 𝒆𝒒. 𝟖. 𝟓
And the error created by input offset voltage (𝐼𝑜𝑠 ) amplified by gain 𝐴𝑣 of the op-amp is describe in
equation 8.6.
𝑉𝑜𝑢𝑡 𝑒𝑟𝑟 = 𝐴𝑣 𝐼𝑜𝑠 𝑅𝑖𝑛 𝒆𝒒. 𝟖. 𝟔
Note that change in offset current with temperature also affects the 𝑉𝑜𝑢𝑡 (𝑒𝑟𝑟 ) . Normally the current
range of 0.5𝑛𝐴/°𝐶 is the temperature coefficient for 𝐼𝑜𝑠 .
Output Impedance
Output Impedance (𝑍𝑜𝑢𝑡 ) are measure across the output terminal of the op-amp illustrated in figure
8.7
Figure 8.7 Op-am Output Impedance

Slew Rate
Slew rate of an op-amp is defined as the maximum rate of change of the output voltage in a step
input voltage. The slew rate is dependent upon the high-frequency response of the amplifier stages
within the op-amp
Figure 8.9 Test Circuit for Slew Rate
Slew rate is measured in a circuit shown in figure 8.9. The circuit connection is a unity-gain,
noniverting configuration. A pulse signal is applied to the noninverting input resulting to ideal
output voltage. The width of the input pulse must be sufficient to allow the output to “slew” from its
lower limit to its upper limit. A time interval, ∆𝑡, is required for the output voltage to have a
transition from lower limit – 𝑉𝑚𝑎𝑥 to +𝑉𝑚𝑎𝑥 (upper limit), once the step input is applied. Thus the
slew rate is express in equation 8.7.
∆𝑉𝑜𝑢𝑡
𝑆𝑙𝑒𝑤 𝑟𝑎𝑡𝑒 = 𝒆𝒒. 𝟖. 𝟕
∆𝑡
Since this response is not ideal, the limits are taken at 90% of – 𝑉𝑚𝑎𝑥 and +𝑉𝑚𝑎𝑥 .
Frequency Response
The principle is the same in basic amplifiers. The internal amplifier stages that make up an op-amp
have voltage gains limited by junction capacitances. Since op-amp doesn’t have coupling capacitors,
its low frequency response extends down to 0𝐻𝑧 (dc).
Negative Feedback
Negative feedback is one of the most useful concepts in electronics, particularly in op-amp
applications. It is the process of returning the output voltage of amplifier to the input with a phase
angle that opposes the input signal.
The concept of negative feedback is illustrated in figure 8.10.

Figure 8.10 Illustration of Negative Feedback Illustration
The open loop gain of an op-amp as discussed is usually very high that will results to saturated
output states give a very small input voltage. Assume a value of input voltage of 1𝑚𝑉 and an open-
loop gain of 100,000, by computation in will give an output voltage of 100𝑉. Since the output level
of an op-am will not reach 100V, the output will be driven to saturation. With negative feedback, the
closed-loop gain (𝐴𝑐𝑙 ) can be reduced and controlled so that the amplifier can perform linear
function. Negative feedback also provide stable voltage gain, and control of the input and output
impedances and amplifier bandwidth.
Table 8.1 shows the summarized effects of negative feedback on op-amp performance.
Table 8.1 General Effects of Negative Feedback
𝑨𝑽 𝒁𝒊𝒏 𝒁𝒐 𝑩𝑾
w/o negative 𝐴𝑜𝑙 is too high for Relatively high Relatively low Relatively narrow
feedback linear amplifier
application
w/ negative 𝐴𝑐𝑙 can be set to Can be increased Can be reduced Significantly
feedback desired value or reduced to a desired wider
value
Closed-Loop Voltage Gain, (𝑨𝒄𝒍 )
The closed-loop voltage gain is the voltage gain with external feedback circuit. The amplifier
consists of the op-amp and an external negative feedback circuits connecting the output to the
inverting input. The external components determine the value of the closed-loop configuration. The
three basic configurations are:
- Noninverting amplifier
- Voltage Follower
- Inverting amplifier
Noninverting Amplifier
A noninverting amplifier configuration is shown in figure 8.11. The input signal is applied to the
noninverting input and the output is fed back to the inverting input through feedback circuit

(formed by resistor 𝑅𝑖 and feedback resistor 𝑅𝑓 ). 𝑅𝑖 and 𝑅𝑓 form a voltage-divider circuit that
reduces 𝑉𝑜𝑢𝑡 and connects the reduced voltage 𝑉𝑓 to the inverting input.
Figure 8.11 Noninverting Amplifier
In determining the equation for the noninverting voltage gain (eq. 8.8) the following steps is
performed.
The voltage feedback is expressed as
𝑅𝑖
𝑉𝑓 = 𝑉
𝑅𝑖 + 𝑅𝑓 𝑜𝑢𝑡
The differential voltage amplified by the open-loop gain of the op-amp that produces an output
voltage
𝑉𝑜𝑢𝑡 = 𝐴𝑜𝑙 𝑉𝑖𝑛 − 𝑉𝑓
The attenuation of feedback (𝐵) circuit though voltage-divider
𝑅𝑖
𝐵=
𝑅𝑖 + 𝑅𝑓
Substituting 𝐵𝑉𝑜𝑢𝑡 for 𝑉𝑓 in the 𝑉𝑜𝑢𝑡
𝑉𝑜𝑢𝑡 = 𝐴𝑜𝑙 (𝑉𝑖𝑛 − 𝐵𝑉𝑜𝑢𝑡 )
Applying basic algebra
𝑉𝑜𝑢𝑡 1 + 𝐴𝑜𝑙 𝐵 = 𝐴𝑜𝑙 𝑉𝑖𝑛
Expressing overall voltage gain using 𝑉𝑜𝑢𝑡 /𝑉𝑖𝑛
𝑉𝑜𝑢𝑡 𝐴𝑜𝑙
=
𝑉𝑖𝑛 1 + 𝐴𝑜𝑙 𝐵
Since 𝐴𝑜𝑙 𝐵 is much larger than 1, we can approximate

1 + 𝐴𝑜𝑙 𝐵 ≈ 𝐴𝑜𝑙 𝐵
Thus
𝑉𝑜𝑢𝑡 𝐴𝑜𝑙 1
= =
𝑉𝑖𝑛 𝐴𝑜𝑙 𝐵 𝐵
Therefore the gain of a closed-loop noninverting amplifier is
𝑅𝑓
𝐴𝑐𝑙 (𝑁𝐼) = 1 + 𝒆𝒒. 𝟖. 𝟖
𝑅𝑖
You will see that the closed-loop gain based on its equation is dependent to the value of 𝑅𝑓 and 𝑅𝑖 .
Voltage Amplifier
Figure 8.12 Voltage-follower Amplifier
A voltage follower shown on figure 8.12 is a special case of the noninverting amplifier. The output
voltage is fed back to the inverting input by straight connection. It has a unity gain derived from
closed-loop gain of 1/𝐵 . Since 𝐵 = 1, the closed-loop voltage gain of the voltage follower (eq.8.9) is
𝐴𝑐𝑙 𝑉𝐹 = 1 𝒆𝒒. 𝟖. 𝟗
Voltage-follower configuration has high input impedance and its very low output impedance. These
features make it a nearly ideal buffer amplifier for interfacing high-impedance sources and low-
impedance loads.
Inverting Amplifier
An op-amp connected as an inverting amplifier is shown in figure 8.13. The input signal is applied
through a series input resistor 𝑅𝑖 to the inverting input. The output is fed back through resistor 𝑅𝑓

also to the inverting input and the noninverting input is connected to the ground.
Figure 8.13 Inverting Amplifier
It is better to use the ideal op-amp parameters to analyze this type of circuit shown in figure 8.14. It
has infinite input impedance (𝑍𝑖 ) that results to a zero current in the inverting input. If there is zero
current through the 𝑍𝑖 , then there must be no voltage drop between the inverting and noninverting
inputs. The voltage at the inverting input is zero because the noninverting input is connected to the
ground. This will result to a virtual ground to the inverting input terminal (because of the zero
voltage illustrated in figure 8.14-a). Figure 8.14-b shows the current throug 𝑅𝑖 is same as current 𝑅𝑓
since there is no current to the inverting input.
Figure 8.14 Inverting Amplifier Concept (a) Virtual Ground (b) 𝑰𝟏 = 𝟎
𝐼𝑖𝑛 = 𝐼𝑓
The voltage across resistor 𝑅𝑖 equals 𝑉𝑖𝑛 because the resistor is connected to virtual ground at the
inverting input of the op-amp.
𝑉𝑖𝑛
𝐼𝑖𝑛 =
𝑅𝑖
We can solve for the inverting amplifier closed-loop gain (𝐴𝑐𝑙 (𝐼) ) through the following steps.
𝑉𝑜𝑢𝑡
𝐼𝑓 = −
𝑅𝑓
Since 𝐼𝑖𝑛 = 𝐼𝑓

𝑉𝑜𝑢𝑡 𝑉𝑖𝑛
− =
𝑅𝑓 𝑅𝑖𝑛
Using the general equation for voltage gain 𝑉𝑜𝑢𝑡 /𝑉𝑖𝑛 the voltage of an inverter amplifier is defined
by equation 8.10.
𝑉𝑜𝑢𝑡 𝑅𝑓
=−
𝑉𝑖𝑛 𝑅𝑖
𝑅𝑓
𝐴𝑐𝑙 (𝐼) = − 𝒆𝒒. 𝟖. 𝟏𝟎
𝑅𝑖
Notice that the voltage gain for inverting amplifier is the ratio of 𝑅𝑓 to 𝑅𝑖 and independent to the
op-amp open-loop gain. The negative feedback stabilizes the voltage gain.
Effects of Negative Feedback in Op-Amp Impedances
The following equations shows the effect of negative feedback to the op-amp impedances
Noninverting amplifier input (eq. 8.11) and output (eq. 8.12) impedance.
𝑍𝑖𝑛 𝑁𝐼 = 1 + 𝐴𝑜𝑙 𝐵 𝑍𝑖𝑛 𝒆𝒒. 𝟖. 𝟏𝟏
𝑍𝑜
𝑍𝑜(𝑁𝐼) = 𝒆𝒒. 𝟖. 𝟏𝟐
1 + 𝐴𝑜𝑙 𝐵
Voltage-Follower input (eq. 8.13) and output (eq. 8.14) impedance.
𝑍𝑖𝑛 𝑉𝐹 = 1 + 𝐴𝑜𝑙 𝑍𝑖𝑛 𝒆𝒒. 𝟖. 𝟏𝟑
𝑍𝑜
𝑍𝑜(𝑉𝐹) = 𝒆𝒒. 𝟖. 𝟏𝟒
1 + 𝐴𝑜𝑙
Inverting amplifier input (eq. 8.15) and output (eq. 8.16) impedance.
𝑍𝑖𝑛 ≅ 𝑅𝑖 𝒆𝒒. 𝟖. 𝟏𝟓
𝑍𝑜
𝑍𝑜(𝑁𝐼) = 𝒆𝒒. 𝟖. 𝟏𝟔
1 + 𝐴𝑜𝑙 𝐵
Open-Loop Frequency and Phase Response
The frequency response indicates how the voltage gain changes with frequency, and the phase
response indicates how the phase shift between the input and output signal changes with
frequency.

Bandwidth Limitations
The midrange open-loop gain of an op-amp extends from zero frequency (dc) up to a critical
frequency at which the gain is 3 dB less than the midrange value (since there is no coupling
capacitor between stages).
An example of Bode plot for certain op-amp is shown in figure 8.15. Notice that the curve rolls off
(decreases) at per decade per octave). The midrange gain is 200,000, which is 106 dB, and the
critical (cutoff) frequency is approximately 10 Hz.
Figure 8.15 Ideal Bode plot for Open-loop Gain vs Frequency
𝟑𝒅𝑩 Open-Loop Bandwidth
In general, the bandwidth is the difference of the high cut-off frequency and low-cut frequency. It is
also the frequency range between points where the gain is 3𝑑𝐵 less than the midrange frequency.
𝐵𝑊 = 𝑓𝑐𝑕 − 𝑓𝑐𝑙
Since there is no critical low frequency in an op-amp, we can say that bandwidth is sane as the
critical high frequency, eq. 8.17.
𝐵𝑊 = 𝑓𝑐𝑕 𝒆𝒒. 𝟖. 𝟏𝟕
Gain-Versus-Frequency Analysis
The RC lag (figure 8.16) circuits within an op-amp are responsible for the roll-off in gain as the
frequency increases. From this theory, the attenuation of 𝑅𝐶 lag circuit can expressed as
𝑉𝑜𝑢𝑡 𝑋𝑐
=
𝑉𝑖𝑛 𝑅2 + 𝑋𝑐2

Figure 8.6 RC lag Circuit
Dividing both by 𝑋𝑐
𝑉𝑜𝑢𝑡 1
=
𝑉𝑖𝑛 1 + 𝑅2 /𝑋𝑐2
The critical frequency of an RC circuit is
𝑓𝑐 = 1/2𝜋𝑅𝐶
Dividing both sides by f
𝑓𝑐 1
=
𝑓 2𝜋𝑓𝐶𝑅
Using 𝑋𝑐 = 1/2𝜋𝑓𝐶
𝑓𝑐 𝑋𝑐
=
𝑓 𝑅
Substituting this results to 𝑉𝑜𝑢𝑡 /𝑉𝑖𝑛 , it produce expression for attenuation of an RC lag circuit
𝑉𝑜𝑢𝑡 1
=
𝑉𝑖𝑛 1 + 𝑓 2 /𝑓𝑐2
Thus, the total open-loop gain of the op-amp is the product of the midrange open-loop gain,
𝐴𝑜𝑙 (𝑚𝑖𝑑 ) , and the attenuation of the 𝑅𝐶 circuit, eq. 8.18.
𝐴𝑜𝑙 (𝑚𝑖𝑑 )
𝐴𝑜𝑙 = 𝒆𝒒. 𝟖. 𝟏𝟖
1 + 𝑓 2 /𝑓𝑐2
Phase Shift
RC circuit causes propagation delay resulting to phase shift between input and output signal. From
basic theory, phase shift (eq. 8.18), 𝜃,is
𝑅
𝜃 = − tan−1 ( )
𝑋𝑐
Since 𝑅/𝑋𝑐 = 𝑓/𝑓𝑐 ;

𝑓
𝜃 = − tan−1 𝒆𝒒. 𝟖. 𝟏𝟗
𝑓𝑐
Effect of Negative Feedback on Bandwidth
Since the negative feedback affects the overall gain, the closed-loop critical frequency 𝑓𝑐(𝑐𝑙 ) of an op-
amp is defined by the equation (eq.8.20)
𝑓𝑐(𝑐𝑙 ) = 𝑓𝑐 𝑜𝑙 1 + 𝐵𝐴𝑜𝑙 𝑚𝑖𝑑 𝒆𝒒. 𝟖. 𝟐𝟎
The equation shows that the closed-loop critical frequency is higher than the open-loop critical
frequency by the factor (1 + 𝐵𝐴𝑜𝑙 𝑚𝑖𝑑 ).
The bandwidth for the closed-loop amplifier is also increase by the same factor (eq.8.21)
𝐵𝑊𝑐𝑙 = 𝐵𝑊𝑜𝑙 1 + 𝐵𝐴𝑜𝑙 𝑚𝑖𝑑 𝒆𝒒. 𝟖. 𝟐𝟏
Figure 8.7 shows the Bode plot comparisons between closed-loop gain and open-loop gain. When
the open-loop gain of an op-amp is reduced by negative feedback, the bandwidth is increased. They
also have the same roll-off rate.
Figure 8.7 Close-loop and Open-loop gain Comparisons
1. Op-amp is another term for operational amplifier

2. The basic op-amp has three basic terminals not including power and ground: inverting
input, noninverting input, and output.
3. The input stage of an op-amp is a differential amplifier.
4. Differential operation involves the use of opposite-polarity inputs.
5. Common-mode operation involves the use of the same-polarity inputs.
6. The ideal op-amp has infinite input impedance, zero output impedance, infinite open-loop
voltage gain, and infinite bandwidth.
7. The CMRR is a measure of an op-amp’s ability to reject common-mode inputs.
8. Negative feedback occurs when a portion of the output voltage is connected back to the
inverting input.
9. Basic op-amp connections include:
a. Inverting amplifier
b. Noninverting amplifier
c. Unity-gain amplifier
End of Module Test
Multiple Choice
1. An IC op-amp has
a. two inputs and two outputs
b. two inputs and one output
c. three inputs and one output
2. A differential amplifier
a. is part of an op-amp
b. has two outputs
c. has one input and one output
d. none of the above
3. In the double-ended differential mode
a. the outputs are different amplitudes
b. a signal is applied between the two inputs
c. only one supply voltage is used
d. unity amplifier
4. Common-mode gain is
a. Very high
b. Very low
c. Unity
d. Unpredictable
5. What is the CMRR if 𝐴𝑑 = 3500 and 𝐴𝑐 = 0.35
a. 1225
b. 80dB
c. 10000
d. b and c
6. With zero volts on both inputs, an op-amp ideally should have an output equal to
a. Positive supply voltage
b. Zero
c. Negative supply voltage
d. CMRR
7. What is the values for open-loop gain of an op-amp
a. 1
b. 2000

c. 30dB
d. 100,000
8. The output of a particular op-amp increases 8 V in 12 The slew rate is
a. 96V/µs
b. 0.67V/µs
c. 1.5V/µs
d. None of the choices
9. Negative feedback
a. increases the input and output impedances
b. increases the input impedance and the bandwidth
c. decreases the output impedance and the bandwidth
d. does not affect impedances or bandwidth
10. The frequency at which the open-loop gain is equal to 1 is called
a. the upper critical frequency
b. the cutoff frequency
c. the notch frequency
d. the unity-gain frequency
Problem Solving
1. What is the output voltage in the circuit shown in figure 8.8

2. In figure 8.9, what is the range of the voltage-gain adjustment in the circuit
3. What is the range of the output voltage for an inverting amplifier with feedback resistor of
200𝑘𝛺 and 𝑅𝑖 = 20, with input voltage range of 0.1 𝑡𝑜 0.5 𝑉.

4. For a noninverting amplifier with feedback resistor of 360𝑘𝛺 and 𝑅𝑖 = 12𝑘𝛺, what input
must be applied to results an output of 2.8V.
5. What is the range of the output voltage in figure 8.10.
References:

MODULE 9 OP-AMP APPLICATION
Topic Outcome
1. Describe the different types of op-amp circuit.

2. Analyze the operation different application of an op-amp.
Introduction
The Module will provide knowledge about the principles, operation and characteristics of the op-
amp. The used of op-amps in variety of circuits and application (Comparator, Summing and
Subtracting Amplifier, Integrator, Differentiator, ac and dc millivoltmeter, and Display Driver) is
going to cover by this module.
After finishing this module, students will learn to analyze op-amp circuit and used them to some
application. They will learn how to design a comparator, summing amplifier, differentiator etc.
based on the requirements. The plotting the output waveform from the op-amp circuit is also part
of this topic. The ideas that students will earn here will serve as a stepping stone for the future
topics (Filter, Oscillator and Linear IC)
Comparators
Comparator is a specialized op-amp circuit that main function is to compares two input voltages,
with output is either one of two states (high or low). Op-amp comparator provides very fast
switching times that optimize the comparison function. It is also often used to interface between an
analog and digital circuit. Lists are the different types of op-amp as comparators circuit.
- Zero-Level Detection
- Nonzero-Level Detection
- Output Bounding
Zero-Level Detection
One application of an op-amp used as a comparator is to determine when an input voltage exceeds
a certain level. Figure 9.1 shows an op used in zero-level detection circuit. The inverting input is
connected to the ground to produce zero lever reference, and the input voltage is connected to the
noninverting terminal. A very small difference in the input voltages will produce a saturation level
at the output because of the high open-loop gain of the amplifier. You will also see in the figure that

an input of sinusoidal voltage in the noninverting input drives the circuit to produce a square wave
output voltage. When the sine wave is positive, the output is at maximum positive level and when it
crosses to zero, the output goes to maximum negative level.
Figure 9.1 Zero-level Detection Circuit and Response
Nonzero-Level Detection
The modified zero-level detector by applying fixed reference voltage source to the reference input
terminal (in figure 9.2 the voltage reference is connected the inverting input). The reference voltage
can be in the form of fixed dc voltage source (figure 9.2-a), voltage divider (figure 9.2-b), or the
used of zener diode (figure 9.2-c). The voltage reference for figure 9.2-b is defined by the equation
9.1.
𝑅2
𝑉𝑟𝑒𝑓 = (+𝑉) 𝒆𝒒. 𝟗. 𝟏
𝑅1 + 𝑅2
Figure 9.2 Nonzero-Level Detection Circuit (a) fixed dc voltage (b) Voltage-Divider (c) Zener Diode

The response of the nonzero-level detection circuit is shown in figure 9.3. Notice that the output
remain at maximum negative level as long as 𝑉𝑖𝑛 is less than 𝑉𝑟𝑒𝑓 . When voltage 𝑉𝑖𝑛 exceeds 𝑉𝑟𝑒𝑓 ,
the output goes to maximum positive level.
Figure 9.3 Nonzero-Level Detection Response
Output Bounding
In some applications, the output voltage levels of a comparator should be limit to some values that
less than to the maximum output voltage level. Figure 9.4 shows the used of zener diode used to
limit the output voltage range (bounding).
Figure 9.4 Comparator used Zener Diode for Bounding
Considering figure 9.4, the operations is as follows. The anode of the zener diode is connected to the
inverting input (the node is a virtual ground). When the output voltage reaches positive value equal
to zener voltage, it limits the value equal to zener voltage (shown in figure 9.6). When the output
switches negative, the zener diode become forward bias and act as a normal diode, limiting the
negative output voltage to 0.7𝑉. Turning the diode around, the operation is illustrated in figure 9.7.

Figure 9.6 Bounded at Positive Value
Figure 9.7 Bounded at Negative Value
The operation when two zener diodes arranged as indicated in figure 9.8 limit the output voltage to
sum of the zener voltage and diode forward voltage drop (0.7 V), both positively and negatively.
Figure 9.8 Double-bounded Comparator
Summing Amplifier
A summing amplifier has two or more inputs that provide a means of algebraically summing
multiple voltages, each multiplied by a constant-gain factor. Considering the circuit in figure 9.9, we
can express its output voltage in terms of the input as (equation 9.2).

Figure 9.9 Summing Amplifier Circuit
𝑅𝑓 𝑅𝑓 𝑅𝑓 𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = − ( 𝑉𝐼𝑁1 + 𝑉𝐼𝑁2 + 𝑉𝐼𝑁3 + 𝑉𝐼𝑁(𝑛−1) + 𝑉 ) 𝒆𝒒. 𝟗. 𝟐
𝑅1 𝑅2 𝑅3 𝑅𝑛−1 𝑅𝑛 𝐼𝑁(𝑛)
Voltage Subtraction
Two signals can be subtracted from one another using the circuits in figure 9.10 and 9.11.
Figure 9.10 used op-amp stages to perform subtraction between input signals. The resulting output
voltage is defined by eq. 9.3.
Figure 9.10 Voltage Subtraction using 2 Op-amp
𝑅𝑓 𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = − ( 𝑉𝑖𝑛2 − 𝑉 ) 𝒆𝒒. 𝟗. 𝟑
𝑅2 𝑅3 𝑅1 𝑖𝑛1
Another circuit that can perform subtraction is shown in 9.11. Using superposition, the output
voltage is (eq.9.4)

Figure 9.11 Voltage Subtraction Circuit
𝑅3 𝑅2 + 𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛1 − 𝑉𝑖𝑛2 𝒆𝒒. 𝟗. 𝟒
𝑅1 + 𝑅3 𝑅2 𝑅2
Integrators
An op-amp integrator simulates mathematical integration, which is basically a summing process

that determines the total area under the curve of a function. An ideal integrator used capacitor as
feeding element forms an RC circuit with the input resistor shown in figure 9.12.
Figure 9.12 Op-amp RC Integrator
Using the same figure, we can determine some important parameters of the integrator.
The charge of the capacitor is proportion to the charging current (𝐼𝑐 ) and time (𝑡)
𝑄 = 𝐼𝑐 𝑡
And the charge in terms voltage

𝑄 = 𝐶𝑉𝑐
Then we can express the voltage of capacitor as
𝐼𝑐
𝑉𝑐 = 𝑡
𝐶
Recall that the capacitor voltage in a simple 𝑅𝐶 is exponential. This is because the charging current
continuously decreases as the capacitor charges and causes the rate of change of the voltage to
continuously decrease. The capacitor charging current in an op-amp with RC circuit as integrator,
produced a linear voltage rather than exponential.
Using figure 9.12, the value of input current is
𝑉𝑖𝑛
𝐼𝑖𝑛 =
𝑅𝑖
If input voltage, 𝑉𝑖𝑛 , is constant, then 𝐼𝑖𝑛 is also constant because of the zero voltage in the inverting
input, keeping a constant voltage in 𝑅𝑖 . The high 𝑍𝑖 in an op-amp, there is a very small amount of
current (negligible) at the inverting input, we can assume the value of input current and current
flowing through capacitor is the same.
𝐼𝑐 = 𝐼𝑖𝑛
Both current now is constant.
The constant value of capacitor current tends to charge the capacitor linearly that produces a linear
value of 𝑉𝑐 . The positive side of the capacitor is held at 0 V by the virtual ground of the op-amp. The
voltage at the output of the op-amp decreases linearly from zero as the capacitor charge. This
Voltage 𝑉𝑐 , is called a negative ramp and is the consequence of a constant positive input.
The output voltage is the same as the voltage on the negative side of the capacitor (figure 9.12).
Notice in figure 9.13, when we applied a constant value of positive input voltage in a form of pulse,
the output ramp decreases negatively until the op-amp reach negative saturation level.

Figure 9.13 Integrator Response in a Step Input
Thus, the rate at which the capacitor charges and the slope of the output ramp is set by the
ratio 𝐼𝑐 /𝐶.
Since,
𝑉𝑖𝑛
𝐼𝑐 =
𝑅𝑖𝑛
Then the equation for the rate of change of the integrator’s output voltage (eq. 9.5) is
∆𝑉𝑜𝑢𝑡 𝑉𝑖𝑛
=− 𝒆𝒒. 𝟗. 𝟓
∆𝑡 𝑅𝑖 𝐶
Differentiator
The differentiator circuit in figure 9.14 consists of capacitor as input element and resistor as
feedback element. The differentiator circuit produced an output that is proportional to the rate of
change of the input voltage.
Figure 9.14 Op-amp RC Differentiator

Figure 9.15 shows the operation of the differentiator when we applied a positive-going ramp to the
input.
Figure 9.15 Differentiator with Positive-going Ramp Input
Because of the virtual ground in the inverting input, then 𝐼𝑐 = 𝐼𝑖𝑛 , and 𝑉𝑐 = 𝑉𝑖𝑛 .
Using the equation for the capacitor’s current in terms of its voltage
𝑉𝑐
𝐼𝑐 = 𝐶
𝑡
Since the current at the inverting input is very small, we can assume 𝐼𝑐 = 𝐼𝑅 . Both current are
constant because the slope of the capacitor voltage is constant. The output voltage that is equal to
the voltage across the feedback resistor is also constant. The equation for the output voltage is (eq.
9.6)
𝑉𝑜𝑢𝑡 = 𝐼𝑅 𝑅𝑓 = 𝐼𝑐 𝑅𝑓
𝑉𝑐
𝑉𝑜𝑢𝑡 = − 𝑅 𝐶 𝒆𝒒. 𝟗. 𝟔
𝑡 𝑓
Applying a triangular wave to the differentiator will results an output waveform shown in figure
9.16.

Figure 9.16 Differentiator Response in Triangular-wave input
The output is negative when the input is a positive-going ramp and positive when the input is a
negative-going ramp. During the positive slope, (𝑡0 − 𝑡1 ), the capacitor is charging from the input
source the constant current through the resistor is going to the output terminal. During the
negative slope of the input, (𝑡1 − 𝑡2 ), the current is in the opposite direction because the capacitor
is discharging.
If the slope increases, output voltage also increases same If the slope decreases the output voltage
also decreases. Thus, the output voltage is proportional to the rate of change of the input. The
constant of proportionality is the time constant, 𝑅𝑓 𝐶.
dc Millivoltmeter
Figure 9.17 shows an op-amp used as basic dc millivoltemter. The amplifier provides a meter with
high 𝑍𝑖 and scale factors that dependent only on resistor value. The meter of the circuit represents
millivolts range of signal at the input of the circuit. An analysis of the op-amp circuit provides the
circuit transfer function
𝐼𝑜 𝑅𝑓 1 100𝑘𝛺 1 1𝑚𝐴
| |= =( )( )=
𝑉1 𝑅1 𝑅𝑠 100𝑘𝛺 10𝛺 10𝑚𝑉

Figure 9.17 Op-amp dc millivoltmeter
It means that an input of 10𝑚𝑉 will result of 1𝑚𝐴 reading through the meter. If we change the input
to 5𝑚𝑉, the current that will flow to the meter will be 0.5𝑚𝐴, which is half-scale deflection.
Changing the value of 𝑅𝑓 to 200𝑘𝛺 will give us a full scale factor of
𝐼𝑜 100𝑘𝛺 1 1𝑚𝐴
| |=( )( )=
𝑉1 200𝑘𝛺 10𝛺 5𝑚𝑉
giving us a 5𝑚𝑉 full scale of the meter.
ac Millivoltmeter
Another application of op-amp is the ac millivoltmeter shown in figure 9.18. The circuit transfer
function is defined by
𝐼𝑜 𝑅𝑓 1 100𝑘𝛺 1 1𝑚𝐴
| |= =( )( )=
𝑉1 𝑅1 𝑅𝑠 100𝑘𝛺 10𝛺 10𝑚𝑉

Figure 9.18 Op-amp ac millivoltmeter
which appears the same as the dc millivoltmeter, except that in this case the signal handled is an ac
signal. The full scale deflection of the meter is 10𝑚𝑉 ac input voltage. An ac input of 5 mV will result
in half-scale deflection.
Display Driver
Op-amp circuits can be used to drive lamp display or LED display, see circuit figure 9.19. In f
Figure 9.19 Op-amp Display Driver Circuits
When the noninverting input in figure 9.19-a goes above the inverting input, the output goes to
positive saturation level that will drive the lamp “on” when transistor conducts. Shown also in the
figure, is a 30𝑚𝐴 current output from the op-amps is connected to the base of the transistor, which
then drives 600𝑚𝐴 through a suitably selected transistor. In figure 9.19-b shows an op-amp circuit

that can supply 20𝑚𝐴 to drive an LED display when the noninverting input goes positive compared
to the inverting input.
Summary
 In an op-amp comparator, when the input voltage exceeds a specified reference voltage, the
output changes state.
 Hysteresis gives an op-amp noise immunity.
 A comparator switches to one state when the input reaches the upper trigger point (UTP)
and back to the other state when the input drops below the lower trigger point (LTP).
 The difference between the UTP and the LTP is the hysteresis voltage.
 Bounding limits the output amplitude of a comparator.
 The output voltage of a summing amplifier is proportional to the sum of the input voltages.
 An averaging amplifier is a summing amplifier with a closed-loop gain equal to the
reciprocal of the number of inputs.
 In a scaling adder, a different weight can be assigned to each input, thus making the input
contribute more or contribute less to the output.
 Integration is a mathematical process for determining the area under a curve.
 Integration of a step input produces a ramp output with a slope proportional to the
amplitude.
 Differentiation is a mathematical process for determining the rate of change of a function.
 Differentiation of a ramp input produces a step output with amplitude proportional to the
slope.
True or False Quiz
1. The output of a comparator has two states.

2. The reference voltage on a comparator input establishes the gain.
3. Hysteresis incorporates positive feedback.
4. A comparator with hyteresis has two trigger points.
5. A summing amplifier can have more than two inputs.
6. The gain of a summing amplifier must always be unity (1).
7. DAC stands for digital-to-analog comparator.
8. An R/2R ladder circuit is one form of DAC.
9. An integrator produces a ramp when a step input is applied.

10. In a practical integrator, a resistor is connected across the capacitor.
11. When a triangular waveform is applied to a differential, a sine wave appears on the
output.
12. In a practical differentiator, a resistor is connected in series with the capacitor.
References:

MODULE 10 INTRODUCTION TO FEEDBACK SYSTEM
Topic Outcomes
1. Discuss the concept of negative feedback.

2. Differentiate feedback connection types.
3. Compute parameters with feedback connections.
4. Demonstrate practical feedback circuits.
Introduction
This module will discuss introduction to feedback system. Feedback is occurs when the output of a
system is used as input back into the system. Feedback system may increase or decrease the input
signal. There are two types of feedback (positive and negative). Positive feedback increases the
input signal while negative feedback reduces the input signal. There are four basic way on how to
add feedback in a system. This will also discuss the effects of feedback to the gain, bandwidth and
phase-angle when added to an amplifier.
At the end of this module, the students will learn the different ways to connect feedback to
amplifier system. Students will also learn the effects of positive and negative feedback. They can
apply the knowledge they learn in open-looped and closed-loop operational amplifier. The
calculation of gains and bandwidth introduced by the feedback circuit is also covered by this
module. Students will learn to choose the proper type of feedback in future application.
Feedback Concepts
A circuit may have positive or negative feedback depending on the polarity of the signal being fed
back to the system. The positive feedback drives a circuit into oscillation, while the negative
feedback decreased the voltage gains of the system but improved number of circuits featured.
A simple block diagram of a feedback amplifier system is shown in figure 10.1. Input Signal Vs is
applied to mixer circuit combined with the feedback signal, Vf . The difference of Vs and Vf is the
input voltage of the amplifier A. Then the output voltage Vout is connected to the feedback circuit
that causes reduction to the output signal as feedback signal to the input mixer network.
In negative feedback, the polarity of the input signal is opposite to the feedback signal. Negative
feedback reduced overall voltage gain but improved the following areas:

1. Higher input impedance
2. Better stabilized voltage gain
3. Improved frequency response
4. Lower output impedance
5. Noise Reduction
6. More linear operation
Figure 10.1 Feedback Amplifier System Block Diagram
Feedback Connection Types
There are four basic ways to implement feedback signal to other system. Both voltage and current
may be fed back to the input to a system either in series or parallel.
- Voltage refers to connecting the output voltage as input to the feedback network.
- Current refers to tapping off some output current through the feedback
network.
- Series refers to connecting the feedback signal in series with the input signal
voltage.
- Shunt refers to connecting the feedback signal in shunt (parallel) with an input
current source.
The four basic ways are (Figure 10.2 - block diagram for each feedback system):
1. Voltage-series feedback
2. Voltage-shunt feedback
3. Current-series feedback
4. Current-shunt feedback

Figure 10.2 Feedback System Block Diagram; Voltage-series (a), Voltage-shunt (b), Current-
series (c), and Current-shunt (d)
The summary of comparison between the gain with and without feedback circuit is shown in table
10.1. Parameter A represents the gain without feedback, and β is the feedback that reduced the gain
by factor 1 + βA.
Table 10.1 Summary of Gain, Feedback, and Gain with Feedback from Fig. 11.2
𝐕𝐨𝐥𝐭𝐚𝐠𝐞 𝐕𝐨𝐥𝐭𝐚𝐠𝐞 𝐂𝐮𝐫𝐫𝐞𝐧𝐭 𝐂𝐮𝐫𝐫𝐞𝐧𝐭

− 𝐒𝐞𝐫𝐢𝐞𝐬 − 𝐒𝐡𝐮𝐧𝐭 − 𝐒𝐞𝐫𝐢𝐞𝐬 − 𝐒𝐡𝐮𝐧𝐭
𝐕𝐨 𝐕𝐨 𝐈𝐨 𝐈𝐨
𝐆𝐚𝐢𝐧 𝐰𝐢𝐭𝐡𝐨𝐮𝐭 𝐟𝐞𝐞𝐝𝐛𝐚𝐜𝐤 (𝐀)
𝐕𝐢 𝐈𝐢 𝐕𝐢 𝐈𝐢
𝐕𝐟 𝐈𝐟 𝐕𝐟 𝐈𝐟
𝐅𝐞𝐞𝐝𝐛𝐚𝐜𝐤 (𝛃)
𝐆𝐚𝐢𝐧 𝐰𝐢𝐭𝐡 𝐟𝐞𝐞𝐝𝐛𝐚𝐜𝐤 𝐀 𝐟
𝐕𝐬 𝐈𝐬 𝐕𝐬 𝐈𝐬

Voltage-Series Feedback
Voltage-series feedback block diagram is shown in figure 11.2 (a). Notice that the output voltage Vo
is fed back in series with the input signal. This feedback results an overall gain reduction. The
voltage gain of the amplifier stage is defined by equation 10.1, given that there is no feedback.
Vo Vo
A= = 𝐞𝐪 𝟏𝟎. 𝟏
Vs Vi
If a feedback signal Vf is connected in series with the input, then
Vi = Vs − Vf
Since
Vo = AVi = A(Vs − Vf ) = AVs − AVf = AVs − A(βVo )
Then
AVs = (1 + βA)Vo
Now the overall voltage gain including the feedback can be compute using equation 10.2.
Vo A
Af = = 𝐞𝐪 𝟏𝟎. 𝟐
Vs 1 + βA
The gain with feedback is reduced by factor 1 + βA.
Voltage-Shunt Feedback
In figure 10.2 (b), we can obtain gain with feedback describe by eq. 10.3
Vo AIi AIi AIi

Af = = = =
Is Ii + If Ii + βVo Ii + βAIi
A
Af = 𝐞𝐪 𝟏𝟎. 𝟑
1 + βA
Voltage-Series Feedback Input Impedance
Figure 10.3 shows the detailed voltage-series connection. The input impedance (equation 10.4) can
derive using the circuit.

Vi Vs − Vf Vs − βVo Vs − βAVi
Ii = = = =
Zi Zi Zi Zi
Ii Zi = Vs − βAVi
Vs = Ii Zi + βAVi = Ii Zi + βAIi Zi
Vs
Zif = = Zi + (βA)Zi = Zi (1 + βA) 𝐞𝐪 𝟏𝟎. 𝟒
Ii
Figure 10.3 Voltage-series Feedback Connection
Notice that the input impedance with series feedback is equal to the input impedance without
feedback multiplied by the factor Zi (1 + βA). This can be applies also current-series configurations
(figure 10.2-c).
Voltage-Shunt Feedback Input Impedance
We can determine the voltage-shunt input impedance using detailed representation in figure 10.4.
Following is the process in deriving the equation (eq. 10.5) for input impedance of voltage shunt.
Vi
Vi Vi Vi Ii
Zif = = = =
Is Ii + If Ii + βVo Ii + βVo
Ii Ii
Zi
Zif = 𝐞𝐪 𝟏𝟎. 𝟓
1 + βA

Figure 10.4 Voltage-shunt Feedback Connection
The reduced input impedance applies to the voltage-series (fig. 10.2-a) and voltage-shunt (fig. 10.2-
b) connection.
Output Impedance with Feedback
The output impedance for figure 10.2 is dependent whether voltage (decreased) or current
(decreased) feedback is used.
Voltage-Series Feedback Output Impedance
Figure 10.3 provides sufficient circuit detail in determining the output impedance with feedback.
The output impedance determined by applying a voltage V, resulting in a current I, with Vs shorted
out (Vs = 0).
We can derive the equation for output impedance (eq. 10.6)
V = IZo + AVi
For Vs = 0,
Vi = Vf
So that
V = IZo − AVf = IZo − A(βV)
V + βAV = IZo
Then the equation for output impedance with feedback:

V Zo
Zof = = 𝐞𝐪 𝟏𝟎. 𝟔
I 1 + βA
Current-Series Feedback Output Impedance
The output impedance with current-series feedback can be determined by applying a signal V to the
output with Vs shorted out, resulting in a current I, the ratio of V to I being the output impedance.
The more detailed connection of the current-series feedback is shown in figure 10.5. The resulting
output impedance (eq.10.7) is determined as follows.
With Vs = 0,
Vi = Vf
V V V
I= − AVi = − AVf = − AβI
Zo Zo Zo
Zo (1 + βA)I = V
V
Zof = = Zo (1 + βA) 𝐞𝐪. 𝟏𝟎. 𝟕
I
Figure 10.5 Current Feedback Connection
Table 10.2 shows the summary of the effect of feedback on input and output impedance.

Table 10.2 Effect of Feedback Connection on Input and Output Impedance
𝐂𝐮𝐫𝐫𝐞𝐧𝐭
𝐕𝐨𝐥𝐭𝐚𝐠𝐞 − 𝐒𝐞𝐫𝐢𝐞𝐬 𝐕𝐨𝐥𝐭𝐚𝐠𝐞 − 𝐒𝐡𝐮𝐧𝐭 𝐂𝐮𝐫𝐫𝐞𝐧𝐭 − 𝐒𝐡𝐮𝐧𝐭
− 𝐒𝐞𝐫𝐢𝐞𝐬
Zi Zi
Feedback Input Zi (1 + βA) Zi (1 + βA)
1 + βA 1 + βA
Impedance (Zif ) (increased) (increased)
(decreased) (decreased)
Zo Zo
Feedback Output Zo (1 + βA) Zo (1 + βA)
1 + βA 1 + βA
Impedance(Zof ) (increased) (increased)
(decreased) (decreased)
Reduction in Frequency Distortion
For a negative-feedback amplifier having βA ≫ 1, the gain with feedback is Af ≅ 1/β. This value
indicate that the feedback network is purely resistive and the gain of the feedback is not dependent
on frequency (even the gain is dependent on the frequency). The frequency distortion arising
because of varying amplifier gain with frequency is considerably reduced in a negative-voltage
feedback amplifier circuit.
Reduction in Noise and Nonlinear Distortion
Signal feedback tends to hold down the amount of noise signal (such as power-supply hum) and
nonlinear distortion. The factor (1 + βA) reduces the input noise and improvement of nonlinear
distortion. As trade-off, there is a reduction in overall gain. An additional amplifier stage will
increase the overall gain but it will introduce as much noise (reduced by the feedback amplifier).
This may be improved by readjusting the gain of the feedback amplifier circuit to obtain higher gain
while also providing reduced noise signal.
Effect of Negative Feedback on the Gain and Bandwidth
The overall gain with negative feedback describe by the equation
A A 1
Af = ≅ = for βA ≫ 1
1 + βA βA β
as long βA ≫ 1, the overall gain is approximately 1/β. In a basic amplifier, the open loop gain has
open-loop drops because of the active devices and capacitances at high frequencies. At low

frequencies for capacitively coupled amplifier stages the gain may also drop. Once the open-loop
gain A drops low enough and the factorβA ≫ 1, then based on the equation described by Af ≅ 1/
β is no longer holds true.
Figrue 10.6 Effect of negative feedback on gain and bandwidth.
Figure 10.6 shows the comparisons of bandwidth and gain for amplifier with and without feedback.
The feedback has a lower gain but provide provided an increase in β and in the upper 3-dB
frequency. Since the feedback amplifier has lower gain, the net operation was to trade gain for
bandwidth.
Ao = openloop gain
B = open loop bandwidth
Af = gain with feedback
Bf = bandwidth with feedback
Gain Stability with Feedback
Differentiating eq. 10.2 we can determine the stability of the amplifier with feedback (eq. 10.8).
dAf 1 dA
| |= | |
Af |1 + βA| A
dAf 1 dA
| |= | | for βA ≫ 1 𝐞𝐪. 𝟏𝟎. 𝟖
Af |βA| A

dAf
This means that magnitude of the relative change in gain | | is reduced by the factor|βA|.
Af
Practical Feedback Circuit
Practical feedback circuits will provide a means of demonstrating the effect feedback has on the
various connection types.
Voltage-Series Feedback
Figure 10.7 FET Amplifier Stage with Voltage-series Feedback
Figure 10.7 shows an FET amplifier with series-voltage feedback. The Vo is measured across the
network of resistors R1 and R 2 . Vf is connected with the VS with the difference voltage of Vi .
The gain of the amplifier without feedback is defined by the equation 10.9.
Vo
A= = −g m R L 𝐞𝐪. 𝟏𝟎. 𝟗
Vi
where R L is parallel combinations of R1 and R 2 :
R L = R D R o (R1 + R 2 )
The feedback network provides a feedback factor of:
Vf R2
β= =−
Vo R1 + R 2

Then the negative feedback gain using the values of A and β in eq.10.2,
A gmRL
Af = =−
1 + βA 1 + [(R 2 R L /(R1 + R 2 )]g m
If βA ≫ 1, then
1 R2
Af ≅ =−
β R1 + R 2
Current-Series Feedback
Another feedback technique is to sample the output current Io and return a proportional voltage in
series with the input. It increases the input resistance and stabilizes the amplifier gain.
Figure 10.8 Transistor amplifier with unbypassed emitter resistor (a) amplifier circuit with current
feedback (b) ac equivalent circuit without feedback.
Deriving the voltage gain with feedback (eq. 10.10);
Io A (−hfe /hie ) hfe

Af = = = ≅−
Vs 1 + βA 1 + (−R )(− hfe ) hie + hfe R E
E hie + R E
The input and out impedances are calculated;
hfe R E
Zif = Zi (1 + βA) ≅ hie (1 + ) = hie + hfe R E
hie

hfe R E
Zof = Zo (1 + βA) = R C (1 + )
hie
The voltage gain with feedback is
Vo Io R C Io hfe R C
Avf = = = R C = Af R C ≅ − 𝐞𝐪. 𝟏𝟎. 𝟏𝟎
Vs Vs Vs hie + hfe R E
Voltage-Shunt Feedback
An example of voltage-shunt feedback circuit is shown in figure 10.9 with equivalent ideal
characteristics (Ii = 0A, Vi = 0V and A = ∞).
Vo
A= =∞
Ii
If 1
β= =−
Vo Ro
Figure 10.9 Voltage-shunt negative feedback amplifier: (a) constant-gain circuit; (b) equivalent
circuit.
The transfer resistance gain with feedback is defined by the equation 10.11.
Vo Vo A 1
Af = = = = = −R o 𝐞𝐪. 𝟏𝟎. 𝟏𝟏
Vs Ii 1 + βA β
The usual gain is described by equation 10.12.
Vo Is 1
Avf = = (−R o ) = −R o /R1 𝐞𝐪. 𝟏𝟎. 𝟏𝟐
Is V1 R1

Feedback Amplifier-Phase and Frequency Considerations
We know that the amplifier gain will change with frequency. Also the phase shift will also change
with frequency. The relationship of frequency and phase shift when it comes to feedback signal,
they both increases as some feedback signal is added to the input signal. The amplifier may lead to
oscillations due to positive feedback. If the amplifier oscillates at some low or high frequency, it is
no longer useful as an amplifier. It requires proper feedback design otherwise a transient
disturbance could cause a seemingly stable amplifier to suddenly start oscillating.
Nyquist Criterion
To check the stability of a feedback amplifier (as function of frequency), one factor to consider is
the βA product and the phase shift. Nyquist method is a popular technique investigates the stability
of feedback system. A complex plane called Nyquist diagram is used to plot the gain and phase shift
of feedback amplifier.
Figure 10.10 Feedback System (a) Complex plane, (b) Nyquist plot
Figure 10.10-a shows show a complex plane in determining the phase shift angles. There are few
points of βA shown in different phase-shift angles. Using positive real axis as reference (0o ), the
magnitude of βA = 2 at phase shift of 0o at point 1. With βA = 3 the phase shift equal to −135 at
point 2 and at βA = 1, the phase shift equal to 180 at point 1. Every points represents both gains
and phase shift. If the points representing gain and phase shift for an amplifier circuit are plotted at
increasing frequency, then a Nyquist plot is obtained as shown by the plot in Fig. 14.14-b. For RC
type coupling, the gain of 0 and frequency of 0Hz is located at the origin of the plot. As the phase
shift increases, frequencies f1 , f2 , and f3 and magnitude βA also increases. At f4 , the value of A is the

vector length from the origin to point f4 and the phase shift is the angle ∅. At a frequency f5 , the
phase shift is 180° and at higher frequencies, the gain is shown to decrease back to 0.
The Nyquist criterion for stability can be stated as follows:
The amplifier is unstable if the Nyquist curve encloses (encircles) the –1 point, and it is stable
otherwise.
Figure 10.11 Nyquist Stability Condition: (a) stable; (b) unstable.
Figure 10.11 demonstrated Nyquist criterion. Notice that in figure 10.11-a, Nyquist plot didn’t
encircle the point −1 therefore it is stable whereas, figure 10.11-b is unstable because since the
curve does encircle the −1 point. Always remember that encircling the 1 point means that at a
phase shift of 180° the loop gain (βA) is greater than 1; therefore, the feedback signal is in phase
with the input and large enough to result in a larger input signal than that applied, with the result
that oscillation occurs.
Gain and Phase Margins
Gain margin (GM) is defined as the negative of the value of |βA| in decibels at the frequency at
which the phase angle is 180°. Thus, 0 dB, equal to a value of βA = 1, is on the border of stability
and any negative decibel value is stable. The GM may be evaluated in decibels from the curve of fig
10.12.
Phase margin (PM) is defined as the angle of 180° minus the magnitude of the angle at which the
value |βA| is unity (0 dB). The PM may also be evaluated directly from the curve of Fig. 10.12.

Figure 10.12 Gain and Phase Margin Bode Plot
End of Module Problems
1
1. Calculate the gain of a negative-feedback amplifier having A =-2000 and 𝛽 = −
10
2. If the gain of an amplifier changes from a value of -1000 by 10%, calculate the gain change
1
if the amplifier is used in a feedback circuit having 𝛽 = − .
20
3. Calculate the gain, input, and output impedances of a voltage-series feedback amplifier
1
having A = -300, 𝑅𝑖 = 1.5 kΩ, Ro = 50 kΩ and 𝛽 = − .
15
4. Calculate the gain with and without feedback for an FET amplifier as in Fig. 14.7 for
circuit values 𝑅1 = 800 𝑘Ω, 𝑅2 = 200Ω, 𝑅𝑜 = 40 𝑘Ω, 𝑅𝐷 = 8 𝑘Ω, 𝑎𝑛𝑑 𝑔𝑚 = 5000 𝑚𝑆.
5. For a circuit as in Fig. 14.11 and the following circuit values, calculate the circuit gain and
the input and output impedances with and without feedback:
𝑅𝐵 = 600 𝑘Ω 𝑅𝐸 = 1.2 𝑘Ω 𝑅𝐶 = 4.7 𝑘Ω, 𝑎𝑛𝑑 𝛽 = 75. 𝑈𝑠𝑒 𝑉𝐶𝐶 = 16 𝑉.
Reference:

MODULE 11 PASSIVE FILTERS
Topic Outcomes
1. Describe different types and components of passive filters.

2. Analyze the frequency response of passive filters
3. Discuss methods of measuring frequency response, critical frequency, and bandwidth thru
computations.
Introduction
This section will introduce filters and its capability of passing and rejecting signals with
certain range of frequencies. There are two types of filters (passive and active), but will focus only
on passive filters. A passive type of filter uses various combinations of passive components
(Resistor, Inductor, and Capacitor) that only provide frequency selectivity. The students will learn
that passive filters can be placed in four general categories according to their response
characteristics: low-pass, high-pass, band-pass, and band-stop.
After finishing this module, the students can design their own filters based on the
frequencies requirement. Choosing the proper device, values, and circuit orientation for the filter
will be also part of their learning. The acquired knowledge will help them to choose specific type of
filters for some application. They can naturally identify the filter circuit based on its schematic
diagram. They will learn to examine each category of passive filters.
Filters
In telecommunication and signal processing, it is helpful to separate a specific bandwidth

from the total spectrum. A filter is a circuit that allows certain range of frequencies to pass and
attenuates all the other frequencies. The range of frequencies that are allow to pass through filter
are call passband. Passband should have a minimum attenuation of less than −3dB. The end of
passband is called critical or cutoff frequency (fc ). The critical frequency is specified at the point
where the response drops −3dB from the passband. Transition region and stopband are regions
after passband. There are two types of filters namely passive and active filters. Each type is
distinguishable based on the present of active device. There are four general categories of each type
according to their response; Low-pass filter, High-pass filter, Band-pass filter, and Band-stop filter.

Low-pass filter - allow frequency below the cutoff frequency and reject all frequencies above
cutoff frequency
High-pass filter - allow frequency above the cutoff frequency and reject all frequencies
below cutoff frequency
Band-pass filter - allows frequencies within a band or range of frequencies and rejects all
other outside the band.
Band-stop filter - rejects frequencies within a band or range of frequencies and allows all
other outside the band.
Passive Filter
Passive filters use combination of passive components; RC, RL, and RLC circuit, that only
passes and rejects specific range of frequencies.
Passive Low-Pass Filter
A low-pass filter is a circuit that passes frequency range from dc to fc and attenuates all the
other frequencies. The shaded region in figure 11.1 shows the ideal passband of the low-pass filter.
Notice that the frequencies drops to zero as it reach beyond the passband. The bandwidth of an
ideal low-pass filter is shown in eq. 11.1.
Figure 11.1 Ideal vs actual low-pass filter response
BW = fc 𝐞𝐪. 𝟏𝟏. 𝟏

The most basic low-pass filter is a simple RC circuit consisting single resistor and capacitor.
The output is taken across the capacitor shown in figure 11.2. The circuit has a single pole, and rolls
off at −20dB/decade beyond fc . The RC filter actual response is indicated in figure 11.1 and plotted
on a standard log plot that show details of the curve as the gain drops. The gain drops off slowly
until it reached the critical property, after that the gain drops rapidly.
Figure 11.2 Basic RC Low-pass Filter Circuit
In a basic RC filter, the −20dB/decade roll-off rate for the gain means that the output will be
−20dB or 10% of the input at 10fc . This characteristic allows too much of the unwanted
frequencies beyond the passband.
The critical frequency of a low-pass RC filter is define by the eq. 11.2, when Xc = R;
1
fc = 𝐞𝐪. 𝟏𝟏. 𝟐
2πRC
The output at the critical frequency is 70.7% of the input equivalent to attenuation of −3dB.
Figure 11.3 shows the idealized response of the basic low-pass filter circuit. It shows flat response
to the cutoff frequency and a roll-off at a constant rate after the cutoff frequency which the actual
filter doesn’t have. The addition of circuit in basic filter will produce a steeper region which is more
effective. This is by combining an op-amp with frequency-selective feedback circuits that has a roll
of −40, −60, or more dB/decade, that its roll-off rate.

Figure 11.3 Ideal low-pass filter responses
Another type of low-pass filter is the basic RL circuit shown in figure 11.4. The output is taken
across the resistor. The fc can be computed using eq. 11.3 and XL = R.
Figure 11.4 Basic RL Low-pass Filter Circuit
R
fc = 𝐞𝐪. 𝟏𝟏. 𝟑
2πL
Passive High-Pass Filter
A circuit that rejects all frequencies below critical frequency and passes all frequencies
above fc is called high-pass filter. Just like the low-passed filter, its critical frequency is 70.7% of the
input or −3dB shown in figure 11.5. Ideally, the passband of a high-pass filter is all frequencies
above the critical frequency.

Figure 11.5 Ideal vs actual high-pass filter response
The simple RC high-pass filter consists of single resistor and capacitor showed in figure
11.6. The output is taken across the capacitor. The basic RC circuit has a roll-off rate of
−20dB/decade, and the critical frequency occurs when Xc = R defined by eq. 11.2.
Figure 11.2 Basic RC High-pass Filter Circuit
Figure 11.7 shows the ideal response high-pass filter circuit response. The approximations
show a flat response to the cutoff frequency and a roll-off at a constant rate after the cutoff
frequency. Same as the low-pass RC filter circuit, high-pass basic RC circuit do not have a precise
flat response. The additional of active device will make the output of the filter much steeper.

Figure 11.7 Ideal basic high-pass RC filter response
The RL configuration is shown in figure 11.8. The output is taken across the inductor and its critical
frequency is computed using eq. 11.3.
Figure 11.8 Basic RL Low-pass Filter Circuit
Passive Band-pass Filter
A band-pass filter allows a certain range of frequencies to pass and rejects all frequencies below
and above the passband. The typical band-pass filter response cure is shown in figure 11.9. The
bandwidth (BW) is the difference between the upper critical frequency (fc2 ) and the lower critical
frequency (fcl ); eq. 11.4.

Figure 11.9 Band-pass Passive Filter Circuit Response
BW = fc2 − fc1 𝐞𝐪. 𝟏𝟏. 𝟒
Same on the previous type of passive filters, the critical frequency are the points which the
response is 70% of the input. The centered frequency of the band-pass is called the center
frequency f0 and can be calculated using eq. 11.5.
f0 = √f2 f1 𝐞𝐪. 𝟏𝟏. 𝟓
The simple form of a band-pass filter is a combination of low-pass and high pass filter illustrated in
figure 11.10. If fc1 of the low-pass filter is higher than fc2 , the responses may overlap and all the
frequency beyond the two critical frequencies are elimated.
Figure 11.10 Low-pass and high-pass filters as band-pass filter
The quality factor (Q) of a band-pass filter is the ratio of the center frequency to the bandwidth
stated in eq. 11.6.The value of Q is the selectivity of the filter. The higher the value of Q, the
narrower the bandwidth which means the better selectivity for a certain value of center frequency.

Band-pass filter are also classified as narrow-band or wide band based on the value of Q; narrow-
band (Q < 10) and wideband (Q > 10).
f0
Q=
BW
One type of band-pass filter is a series resonant filter shown in figure 11.11. Output is measured
across the resistor and it has the highest value of the input voltage dropped across at the resonant
frequency. Q and BW is defined by the equation 11.7 and 11.8 respectively.
Figure 11.11 Series Resonant Band-pass Filter Circuit
XL
Q= 𝐞𝐪. 𝟏𝟏. 𝟕
R
f0
BW = 𝐞𝐪. 𝟏𝟏. 𝟖
BW
Another type of band-pass filter used parallel resonant circuit. The output is measured across the
parallel resonant circuit shown in figure 11.12 and it circuit acts as a voltage divider. At resonant,
the impedance of the tank is much greater than the resistance that is why most of the input voltage
is across the tank at resonant frequency.

Figure 11.12 Parallel Resonant Band-pass Filter Circuit
Passive Band-stop Filter
A band-stop filter is an opposite of a band-pass filter when it comes to responses. This type of filter
allows all the frequencies to pass except those lying in a certain range of frequencies. A general
response curve of a band is shown in figure 11.13.
Figure 11.13 Band-Stop Passive Filter Circuit Response
A series resonant circuit can be used in a band-stop configuration, figure 11.14. At resonant
frequency, the impedance is minimum, which will make the output voltage also minimum, and most
of the input voltage is dropped across the resistor. At frequency outside resonance, the impedances
increases, causing more voltage across the output and can be measure across the series resonant
circuit.
Figure 11.14 Series Resonant Band-stop Filter Circuit
Parallel resonant circuit can also be used in a band stop configuration that is shown in figure 11.15.
At resonance, the tank impedance is maximum, thus very little input voltage appears across the
resistor. As the tank impedance decreases above and below resonance, the output voltage
increases. The output voltage is measured across the resistor.

Figure 11.15 Parallel Resonant Band-stop Filter Circuit
Summary
 In an RC low-pass filter, the output voltage is taken across the capacitor and the output lags
the input.
 In an 𝑅𝐿 low-pass filter, the output voltage is taken across the resistor and the output lags
the input.
 In an RC high-pass filter, the output is taken across the resistor and the output leads the
input.
 In an RL high-pass filter, the output is taken across the inductor and the output leads the
input.
 The roll-off rate of a basic RC or RZ filter is -20 dB per decade.
 A band-pass filter passes frequencies between the lower and upper critical frequencies and
rejects all others.
 A band-stop filter rejects frequencies between its lower and upper critical frequencies and
passes all others.
 The bandwidth of a resonant filter is determined by the quality factor (Q) of the circuit and
the resonant frequency.
 Critical frequencies are also called -3 dB frequencies.
 The output voltage is 70.7% of its maximum at the critical frequencies
True or False Quiz
1. The response of a filter can be identified by its passband.

2. A filter pole is the cutoff frequency of a filter.
3. A single-pole filter has one RC circuit.
4. A single-pole filter produces a roll-off of -25 dB/decade.

5. A low-pass filter can pass a dc voltage.
6. A high-pass filter passes any frequency above dc.
7. The critical frequency of a filter depends only on R and C values.
8. The band-pass filter has two critical frequencies.
9. The quality factor of a band-pass filter is the ratio of bandwidth to the center frequency.
10. The higher the Q, the narrower the bandwidth of a band-pass filter.
11. A Chebyshev response has ripples in the passband.
12. Bessel filters are useful in filtering pulse waveforms.
13. The order of a filter is the number of poles it contains.
14. Multiple feedback is used in low-pass filters.
15. A state-variable filter uses differentiators.
References:

MODULE 12 ACTIVE FILTERS
Topic Outcome
1. Describe different types and components of active filters.

2. Differentiate active filters from passive filters.
3. Analyze the frequency response of active filters
4. Measure frequency response, critical frequency, and bandwidth of active filters thru
computations.
Introduction
This module will introduce the difference between active and passive filter. Active filter use active
components (transistor and op-amp) combined with passive devices (𝑅𝐿) that provide voltage gain
and frequency selectivity. The addition of active device/s in a passive filter introduced a roll of
higher than −20𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒. These active filters optimize the roll-off rate and phase response and
also have steeper transition region.
After finishing this section, students can recognize if a circuit is passive or active filter based on the
devices presents in a circuit. They can design their own active filter for specific application. This
also provides a simple approach in analyzing active filters. We can achieve all required properties
of filters without using inductors.
Active Filter
Active filter is a circuit composed of passive elements and one or more active elements. Its main
function is to simulate the action of the passive filters. The active element provides gain without
attenuating the input signal. Lists are some application of active filter.
- Tone Signaling
- Data Acquisition System
- Audio
- Lab Signal Sources
Active Low-pass Filter
A first order, low pass filter (single-pole filter) uses a single resistor and capacitor shown in figure
11.16(a) and has a slope of −20𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒; figure 11.16(b). The circuit critical frequency and
voltage gain is defined by equation 11.9 and 11.10 respectively.

.
Figure 11.16 First-order Low-pass Active Filter Circuit and Response
1
𝑓𝑐 = 𝒆𝒒. 𝟏𝟏. 𝟗
2𝜋𝑅1 𝐶1
𝑅𝑓
𝐴𝑣 = 1 + 𝒆𝒒𝟏𝟏. 𝟏𝟎
𝑅𝐺
The most common configurations for a second-order (two-pole) filter is the Sallen-Key Low-Pass
Filter or also know as voltage-controlled voltage source (VCVS) filter. There are two low-pass RC
circuits (figure 11.17) that provide a roll-off of −40𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.One RC circuit consists of 𝑅 1 and 𝐶1 ,
while the second RC circuit consists of 𝑅2 and 𝐶2 . Sallen-Key low-pass filter unique feature is it does
provide a response that is near the edge of the passband. The critical frequency for the Sallen-Key
filter can be computed using eq. 11.11.
Figure 11.17 Sallen-Key Low-Pass Filter Circuit
𝟏
𝒇𝒄 = 𝒆𝒒𝟏𝟏. 𝟏𝟏
𝟐𝝅 𝑹𝟏 𝑹𝟐 𝑪𝟏𝑪𝟐

Active High-pass Filter
A first order, high-pass active filter is shown in figure 11.18 (a) and its response curve in figure
11.18 (b). The input circuit is a single high-pass RC circuit. The feedback circuit is same as the
active low-pass filter.
Figure 11.18 First-order High-pass Active Filter Circuit and Response
Ideally, a high-pass filter passes all frequencies above without limit but all op-amps consist of
internal RC circuits that limit its performance at high frequencies. There is an upper-frequency on
the high-pass filter’s response makes it a band-band pass filter. In some applications, discrete
transistors are used for the gain element to increase the high-frequency limitation. Figure 11.19
shows the ideal and nonideal response of a high-pass active filter.
Figure 11.19 Ideal vs Nonideal active high-pass filter response

Connecting two RC sections of filter will results in a second-order low-pass active filter or Sallen-
Key High-Pass Filter with cutoff at – 40𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒, shown in figure 11.20. The second-order filter
response drops at a faster rate compared to the first-order.
Figure 11.20 Sallen-Key High-Pass Filter Circuit
Active Band-pass Filter
The easy way to implement a band-pass filter is by cascading a high-pass filter and a low-pass filter
given that each critical frequency are sufficiently separated from each other. Figure 11.21 shows a
cascaded Sallen-Key Butterworth configuration with roll-off rates of −40𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒 each. The
critical frequency of the high-pass filter must be sufficiently lower than that of the low-pass stage.
This filter is generally limited to wide bandwidth applications. The lower critical frequency, higher
critical frequency and center frequency can be using eq. 11.12, 11.13, and 11.14.
Figure 11.21 Active Band-pass Filter Circuit
1
𝑓𝑐1 = 𝒆𝒒. 𝟏𝟏. 𝟏𝟐
2𝜋 𝑅𝐴1 𝑅𝐵1 𝐶𝐴1 𝐶𝐵1

1
𝑓𝑐2 = 𝒆𝒒. 𝟏𝟏. 𝟏𝟑
2𝜋 𝑅𝐴2 𝑅𝐵2 𝐶𝐴2 𝐶𝐵2
𝑓0 = 𝑓𝑐1 𝑓𝑐2 𝒆𝒒. 𝟏𝟏. 𝟏𝟒
Another type of active band-pass filter is the Multiple-Feedback Band-pass filter show in figure
11.22. It has two feedback paths, 𝑅2 and 𝐶1 . 𝑅1 and 𝐶1 provide the low-pass response while 𝑅2 and
𝐶2 provide the high pass The maximum gain, 𝐴0 , occurs at the center frequency. Following are
equations expressing the filter parameters (eq 11. 15-20).
Figure 11.22 Multiple-Feedback Band-pass Filter Circuit
1 (𝑅1 + 𝑅3 )
𝑓0 = 𝒆𝒒 𝟏𝟏. 𝟏𝟓
2𝜋𝐶 𝑅1 𝑅2 𝑅3
𝑓0
𝑄= 𝒆𝒒 𝟏𝟏. 𝟏𝟔
𝐵𝑊
𝑄
𝑅1 = 𝒆𝒒 𝟏𝟏. 𝟏𝟕
2𝜋𝑓0 𝐶𝐴0
𝑄
𝑅2 = 𝒆𝒒 𝟏𝟏. 𝟏𝟖
2𝜋𝑓0 𝐶
𝑄
𝑅3 = 𝒆𝒒 𝟏𝟏. 𝟏𝟗
2𝜋𝑓0 𝐶(2𝑄2 − 𝐴0 )
𝑅2
𝐴0 = 𝒆𝒒 𝟏𝟏. 𝟐𝟎
2𝑅1
Universal active filter or the state-variable filter is another type of band-pass active filter that is
widely used in band-pass application. It is consists of summing amplifier and two op-amp
integrators cascaded two each other, shown in figure 11.23, that form a second-order filter. It can
also provide high and low-pass outputs. The center frequency is set by the RC circuits in both

integrators. As band-pass filter the critical frequencies of the integrators are usually made equal
setting it as the center frequency shown in figure 11.24
Figure 11.23 State-Variable Filter Circuit
Figure 11.24 State-Variable Filter Response Curves
The 𝑄 is set by the feedback resistors 𝑅5 and 𝑅6 according to eq. 11.21.
1 𝑅5
𝑄= +1 𝒆𝒒. 𝟏𝟏. 𝟐𝟏
3 𝑅6
The biquad filter is consists of an integrator, followed by an inverting amplifier, and then another
integrator, as shown in figure 11.25. In a biquad filter, the bandwidth is independent and the 𝑄 is
dependent on the critical frequency opposite to state variable. It can only provide a band-pass and
low-pass outputs.

Figure 11.25 Biquad Filter Circuit
Active Band-stop Filter
The characteristic of band-stop filter is opposite to band-pass filter. One configuration of band-stop
filter is the multiple-feedback shown in figure 11.26. It has the same configuration of band-pass
filter except there is a resistor that has been removed and added.
Figure 11.26 Multiple-Feedback Band-stop Filter Circuit
Another type of active band-stop filter is the State-Variable Band-stop Filter shown in figure 11.27.
The summing amplifier creates a band stop filter. One important application of this filter is
minimizing the 60 Hz “hum” in audio systems by setting the center frequency to 60 Hz.

Figure 11.27 State-Variable Band-stop Filter Circuit
1. Single-pole low-pass active filters have a roll-off 20 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.

2. The Sallen-Key low-pass active filter has two poles and has a roll-off −40/𝑑𝑒𝑐𝑎𝑑𝑒.
3. In active high-pass filter, each additional filter cascaded pole has an additional roll-off of
20 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.
4. The response of an active high-pass filter is limited by the internal op-amp roll-off.
5. A state variable band-pass filter uses two integrators and summing amplifier.
6. Multiple-feedback and state-variable are common types of band-stop filters.
7. Filter response can be measured using discrete point measurement or swept frequency
measurement.
End of Module Test
True or False
1. A low-pass filter allowed the dc voltage to pass.

2. One RC circuit is equivalent to a single pole.
3. Passband is a term that characterized the response of a filter.
4. The band-pass filter characterize filter is consists of two cut-off frequency.
5. The term “active” in active filter the use of active devices in frequency filtering.
6. The higher the roll-off the better the output response of a filter.
7. A Sallen-Key filter is also known as a voltage-control current-source filter.
8. Active high-pass filter allowed frequencies above cut-off frequency to pass without limit.
9. The disadvantage of active-high filters its steep output response.
10. A state-variable filter uses differentiators.
Problem Solving
1. A single-pole high-pass filter has a frequency-selective circuit with 𝑅 = 2.2𝑘𝛺 and 𝐶 =

0.0015µ𝐹.
a. What is the critical frequency?
b. Can you determine the bandwidth from the available information? If so calculate the
𝐵𝑊.

2. Calculate the cutoff frequency of a first-order low-pass filter in the circuit shown in fig.
11.28.
Figure 11.28 First-order Filter
3. For the band-pass filter in figure 11.29, calculate its low and high cut-off frequency.
Figure 11.29 Band-pass Filter Circuit
4. Using a block diagram format, show how to implement the following roll-off rates using
single-pole and two-pole low-pass filters with Butterworth responses.
a. −20 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.
b. −40 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.
c. −60 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.
d. −80 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.
e. −100 𝑑𝐵/𝑑𝑒𝑐𝑎𝑑𝑒.

5. In figure 11.30, how would you
a. Increase the critical frequency?
b. Increase the gain?
Figure 11.30 Active High-pass Filter Network
References:

MODULE 13 Oscillators
Topic Outcomes
1. Describe the operating principles of an oscillator
2. Discuss the principle on which feedback oscillators is based
3. Describe and analyze the operation of different types of oscillators
Introduction
Oscillators are electronic circuits that generate an output signal without the necessity of an
input signal. They are used as signal sources in all sorts of applications. Different types of oscillators
produce various types of outputs including sine waves, square waves, triangular waves, and
sawtooth waves. In this module, several types of basic oscillator circuits using both discrete
transistors and op-amps as the gain element are introduced. Also, a popular integrated circuit, the
555 timer, is discussed in relation to its oscillator applications.
Sinusoidal oscillator operation is based on the principle of positive feedback, where a
portion of the output signal is fed back to the input in a way that causes it to reinforce itself and
thus sustain a continuous output signal. Oscillators are widely used in most communications
systems as well as in digital systems, including computers, to generate required frequencies and
timing signals. Also, oscillators are found in many types of test instruments like those used in the
laboratory.
OSCILLATORS
- Oscillators are electronic circuits that generate an output signal without the necessity of an input
signal.
- It produces a periodic waveform on its output with only the DC supply voltage as an input.
- The output voltage can be either sinusoidal or non-sinusoidal, depending on the type of oscillator.
- Different types of oscillators produce various types of outputs including sine waves, square waves,
triangular waves, and sawtooth waves.
- A basic oscillator is shown in Figure 1.

Figure 1 The basic oscillator concept showing three common types of output wave-forms: sine wave, square wave,
and sawtooth.
- Oscillators can be of 2 types.
Feedback Oscillators
- One type of oscillator is the feedback oscillator, which returns a fraction
of the output signal to the input with no net phase shift, resulting in a
reinforcement of the output signal.
- After oscillations are started, the loop gain is maintained at 1.0 to
maintain oscillations.
- A feedback oscillator consists of an amplifier for gain (either a discrete
transistor or an op-amp) and a positive feedback circuit that produces
phase shift and provides attenuation, as shown in Figure 2.
Relaxation Oscillators
- A second type of oscillator is the relaxation oscillator.
Figure 2 Basic elements of
- Instead of feedback, a relaxation oscillator uses an RC timing circuit a feedback oscillator.
generate a waveform that is generally a square wave or other nonsinusoidal
waveform.
- Typically, a relaxation oscillator uses a Schmitt trigger or other device that changes states to
alternately charge and discharge a capacitor through a resistor.
FEEDBACK OSCILLATORS
- Feedback oscillator operation is based on the principle of positive feedback.
- In this section, we will look at the general conditions required for oscillation to occur.
- Feedback oscillators are widely used to generate sinusoidal waveforms.
Positive Feedback
- In positive feedback, a portion of the output voltage of an amplifier is fed back to the input with no net
phase shift, resulting in a strengthening of the output signal.
- This basic idea is illustrated in Figure 3(a).

Figure 3 Positive feedback produces oscillation.

- As you can see, the in-phase feedback voltage is amplified to produce the output voltage, which in turn
produces the feedback voltage.
- That is, a loop is created in which the signal maintains itself and a continuous sinusoidal output is
produced.
- This phenomenon is called oscillation.
- In some types of amplifiers, the feedback circuit shifts the phase and an inverting amplifier is required to
provide another phase shift so that there is no net phase shift.
- This is illustrated in Figure 3(b).
Conditions for Oscillation

- Two conditions, illustrated in Figure 4, are required for a sustained state of oscillation:
1. The phase shift around the feedback loop must be effectively 0O.
2. The voltage gain, Acl, around the closed feedback loop (loop gain) must equal 1 (unity).
Figure 4. General conditions to sustain oscillation.

- The voltage gain around the closed feedback loop, Acl , is the product of the amplifier gain, Av, and
the attenuation, B , of the feedback circuit.
𝐴𝑐𝑙 = 𝐴𝑣 𝐵
- If a sinusoidal wave is the desired output, a loop gain greater than 1 will rapidly cause the output to
saturate at both peaks of the waveform, producing unacceptable distortion.
- To avoid this, some form of gain control must be used to keep the loop gain at exactly 1 once oscillations have
started.
- For example, if the attenuation of the feedback circuit is 0.01, the amplifier must have a gain of exactly 100 to
overcome this attenuation and not create unacceptable distortion (100 x 0.01=1).
- An amplifier gain of greater than 100 will cause the oscillator to limit both peaks of the waveform.
Start-Up Conditions
- So far, you have seen what it takes for an oscillator to produce a continuous sinusoidal output.
- Now let’s examine the requirements for the oscillation to start when the dc supply voltage is first
turned on.
- As you know, the unity-gain condition must be met for oscillation to be maintained.
- For oscillation to begin, the voltage gain around the positive feedback loop must be greater than 1 so that
the amplitude of the output can build up to a desired level.
- The gain must then decrease to 1 so that the output stays at the desired level and oscillation is
sustained.
- The voltage gain conditions for both starting and sustaining oscillation are illustrated in Figure 5.
Figure 5. When oscillation starts at t0, the condition Acl > 1 causes the sinusoidal output voltage amplitude to build up
to a desired level. Then Acl decreases to 1 and maintains the desired amplitude.
OSCILLATION WITH RC FEEDBACK CIRCUITS

- Three types of feedback oscillators that use RC circuits to produce sinusoidal outputs are the
o Wien-bridge oscillator
o Phase-shift oscillator
o Twin-T oscillator
- Generally, RC feedback oscillators are used for frequencies up to about 1 MHz.
- The Wien-bridge is by far the most widely used type of RC feedback oscillator for this range of
frequencies.
Wien-Bridge Oscillator
- One type of sinusoidal feedback oscillator is the Wien-bridge oscillator.
- A fundamental part of the Wien-bridge oscillator is a lead-lag circuit like that shown in Figure 6(a).
- R1 and C1 together form the lag portion of the circuit; R2 and C2 form the lead portion.
- The operation of this lead-lag circuit is as follows.
o At lower frequencies, the lead circuit takes over due to the high reactance of C2.
o As the frequency increases, XC2 decreases, thus allowing the output voltage to increase.
o At some specified frequency, the response of the lag circuit takes over, and the decreasing
value of XC1 causes the output voltage to decrease.
Figure 6 A lead-lag circuit and its response curve.
- The response curve for the lead-lag circuit shown in Figure 6(b) indicates that the output voltage
peaks at a frequency called the resonant frequency, 𝑓𝑟 .
𝑉𝑜𝑢𝑡
- At this point, the attenuation (
𝑉𝑖𝑛
) of the circuit is 1/3 if 𝑅1 = 𝑅2 and 𝑋𝑐1 = 𝑋𝐶2 as stated by the following
equation
𝑉𝑜𝑢𝑡 1
=
𝑉𝑖𝑛 3
- The formula for the resonant frequency is

1
𝑓𝑟 =
2𝜋𝑅𝐶
- To summarize, the lead-lag circuit in the Wien-bridge oscillator has a resonant frequency, 𝑓𝑟 , at which
the phase shift through the circuit is 0o and the attenuation is 1/3.
- Below 𝑓𝑟 , the lead circuit dominates and the output leads the input.
- Above 𝑓𝑟 , the lag circuit dominates and the output lags the input.
The Basic Circuit

- The lead-lag circuit is used in the positive feedback loop of an op-amp, as shown in Figure 7(a).
- A voltage divider is used in the negative feedback loop.
- The Wien-bridge oscillator circuit can be viewed as a noninverting amplifier configuration with the
input signal fed back from the output through the lead-lag circuit.
- Recall that the voltage divider determines the closed-loop gain of the amplifier.
1 1 𝑅1 + 𝑅2
𝐴𝑐𝑙 = = =
𝐵 𝑅2 /(𝑅1 + 𝑅2 ) 𝑅2
- The circuit is redrawn in Figure 7(b) to show that the op-amp is connected across the bridge circuit.
- One leg of the bridge is the lead-lag circuit, and the other is the voltage divider.
Figure 7 The Wien-bridge oscillator schematic drawn in two different but equivalent ways.
Positive Feedback Conditions for Oscillation

- As you know, for the circuit output to oscillate, the phase shift around the positive feedback loop
must be 0° and the gain around the loop must equal unity (1).
- The 0° phase-shift condition is met when the frequency is 𝑓𝑟 because the phase shift through the lead- lag
circuit is 0° and there is no inversion from the noninverting input of the op-amp to the output.
- This is shown in Figure 8(a).
Figure 8 Conditions for sustained oscillation.
- The unity-gain condition in the feedback loop is met when

Acl = 3
- This offsets the 1/3 attenuation of the lead-lag circuit, thus making the total gain around the positive
feedback loop equal to 1, as shown in Figure 8(b).
- To achieve a closed-loop gain of 3,

𝑅1 = 2𝑅2
Start-Up Conditions
- Initially, the closed-loop gain of the amplifier itself must be more than 3(𝐴𝑐𝑙 > 3) until the output signal
builds up to a desired level.
- Ideally, the gain of the amplifier must then decrease to 3 so that the total gain around the loop is 1 and the
output signal stays at the desired level, thus sustaining oscillation.
- This is illustrated in Figure 9.

Figure 9 Conditions for start-up and sustained oscillations.
- The circuit in Figure 10 illustrates a method for achieving sustained oscillations.

- Notice that the voltage-divider circuit has been modified to include an additional resistor in parallel
with a back-to-back zener diode arrangement.
- When DC power is first applied, both zener diodes appear as opens.
- This places 𝑅3 in series with 𝑅1 thus increasing the closed-loop gain of the amplifier as follows
(𝑅1 = 2𝑅2 )
𝑅1 + 𝑅2 + 𝑅3 3𝑅2 + 𝑅3 𝑅3
𝐴𝑐𝑙 = = = 3+
𝑅2 𝑅2 𝑅2
- Initially, a small positive feedback signal develops from noise.

- The lead-lag circuit permits only a signal with a frequency equal to 𝑓𝑟 to appear in phase on the
noninverting input.
- This feedback signal is amplified and continually strengthened, resulting in a buildup of the output voltage.
- When the output signal reaches the zener breakdown voltage, the zeners conduct and effectively short out
.
- This lowers the amplifier’s closed-loop gain to 3.
- At this point, the total loop gain is 1 and the output signal levels off and the oscillation is sustained.
- A better method to control the gain uses a JFET as a voltage- controlled resistor in a negative feedback
path.
Figure 10 Self-starting Wien-bridge oscillator using back-to-back zener diodes

- This method can produce an excellent sinusoidal waveform that is stable.
- A JFET operating with a small or zero VDS is operating in the ohmic region.
- As the gate voltage increases, the drain-source resistance increases.
- If the JFET is placed in the negative feedback path, automatic gain control can be achieved because of this
voltage-controlled resistance.
- A JFET stabilized Wien bridge is shown in Figure 11.
- The gain of the op-amp is controlled by the components shown in the green box, which include the
JFET.
Figure 11 Self-starting Wien-bridge oscillator using a JFET in the negative feedback loop.
- The JFET’s drain-source resistance depends on the gate voltage.

- With no output signal, the gate is at zero volts, causing the drain-source resistance to be at the
minimum.
- With this condition, the loop gain is greater than 1.
- Oscillations begin and rapidly build to a large output signal.
- Negative output signal forward-bias 𝐷1 causing capacitor 𝐶3 to charge to a negative voltage.
- This voltage increases the drain-source resistance of the JFET and reduces the gain (and hence the
output).
- With the proper selection of components, the gain can be stabilized at the required level.

The Phase-Shift Oscillator
- Figure 12 shows a sinusoidal feedback oscillator called the phase-shift oscillator.
- Each of the three RC circuits in the feedback loop can provide a maximum phase shift approaching 90o.
- Oscillation occurs at the frequency where the total phase shift through the three RC circuits is 180°.
- The inversion of the op-amp itself provides the additional 180° to meet the requirement for oscillation of a
360° (or 0°) phase shift around the feedback loop.
Figure 12 Phase-shift oscillator.

- The attenuation, 𝐵 , of the three-section RC feedback circuit is
1
𝐵=
29
𝑅3
- where 𝐵 =
𝑅𝑓
- To meet the greater-than-unity loop gain requirement, the closed-loop voltage gain of the op-amp must be
greater than 29 (set by 𝑅3 and 𝑅𝑓 ).
- The frequency of oscillation 𝑓𝑟 is given as
1
𝑓𝑟 =
2𝜋√6𝑅𝐶
Where 𝑅1 = 𝑅2 = 𝑅3 = 𝑅 and 𝐶1 = 𝐶2 = 𝐶3 = 𝐶.
The Twin-T Oscillator
- Another type of RC feedback oscillator is called the twin-T because of the two T-type RC filters used in the
feedback loop, as shown in Figure 13(a).

Figure 13 Twin-T oscillator and twin-T filter response.
- One of the twin-T filters has a low-pass response, and the other has a high-pass response.
- The combined parallel filters produce a band-stop response with a center frequency equal to the
desired frequency of oscillation, 𝑓𝑟 as shown in Figure 13(b).
- Oscillation cannot occur at frequencies above or below 𝑓𝑟 because of the negative feedback through the
filters.
- At 𝑓𝑟 , however, there is negligible negative feedback; thus, the positive feedback through the voltage
divider (𝑅1 𝑎𝑛𝑑 𝑅2 ) allows the circuit to oscillate.
OSCILLATORS WITH LC FEEDBACK CIRCUITS
- Although the RC feedback oscillators, particularly the Wien- bridge, are generally suitable for
frequencies up to about 1 MHz, LC feedback elements are normally used in oscillators that require
higher frequencies of oscillation.
- Also, because of the frequency limitation (lower unity-gain frequency) of most op-amps, transistors
(BJT or FET) are often used as the gain element in LC oscillators.
- This section introduces several types of resonant LC feedback oscillators like the Colpitts, Clapp,
Hartley, Armstrong, and crystal-controlled oscillators.
The Colpitts Oscillator
- One basic type of resonant circuit feedback oscillator is the Colpitts shown in Figure 14.
- This type of oscillator uses an LC circuit in the feedback loop to provide the necessary phase shift and to
act as a resonant filter that passes only the desired frequency of oscillation.

Figure 14 A basic Colpitts oscillator with a BJT as the gain element.
- The approximate frequency of oscillation is the resonant frequency of the LC circuit and is established by
the values of 𝐶1 , 𝐶2 and L according to the formula:
1
𝑓𝑟 =
2𝜋√𝐿𝐶𝑇
Where 𝐶𝑇 is the total capacitance.
- Because the capacitors effectively appear in series around the tank circuit, the total capacitance (𝐶𝑇 )
is
𝐶1 𝐶2
𝐶𝑇 =
𝐶1 + 𝐶2

Conditions for Oscillation and Start-Up
- The attenuation, 𝐵, of the resonant feedback circuit in the Colpitts oscillator is basically determined by
the values of 𝐶1 and 𝐶2 .
- Figure 15 shows that the circulating tank current
is through both 𝐶1 and 𝐶2 (they are effectively in
series).
- The voltage developed across C2 is the
oscillator’s output voltage (𝑉𝑜𝑢𝑡 ) and the voltage
developed across 𝐶1 is the feedback
voltage (𝑉𝑓 ) as indicated.
- The expression for the attenuation (B) is
C2
B=
C1
- As you know, a condition for oscillation is
𝐶
𝐴𝑉 𝐵 = 1. Since 𝐵 = 2 , so
𝐶1
𝐴𝑣 = 𝐶1 /𝐶2
Figure 15 The attenuation of the tank circuit is the output
of the tank (𝑽𝒇 ) divided by the input to the tank (𝑽𝒐𝒖𝒕 ). 𝑩 = 𝑽𝒇 /𝑽𝒐𝒖𝒕 = 𝑪𝟐 /𝑪𝟏
- where 𝐴𝑣 is the voltage gain of the amplifier, which is represented by the triangle in Figure 15.
- For the oscillator to be self-starting, 𝐴𝑣 𝐵 must be greater than 1.
- Therefore, the voltage gain must be made slightly greater than 𝐶1 /𝐶2 .
𝐶1
𝐴𝑣 >
𝐶2
Loading of the Feedback Circuit Affects the Frequency of Oscillation

- As indicated in Figure 16, the input impedance of the amplifier acts as a load on the resonant feed-
back circuit and reduces the Q of the circuit.
Figure 17 𝒁𝒊𝒏 of the amplifier loads the feed-back circuit

and lowers its Q, thus lowering the resonant requency.
Figure 16 A basic FET Colpitts oscillator.
13
- The resonant frequency of a parallel resonant circuit depends on the Q, according to the following
formula
1 𝑄2
𝑓𝑟 = √
2𝜋√𝐿𝐶𝑇 𝑄2 + 1
1 Q2
- As a rule of thumb, for a Q > 10 , the frequency is approximately fr =
2π√LCT
√
Q2 +1
.
- When Q < 10, however, 𝑓𝑟 is reduced significantly.

- A FET can be used in place of a BJT, as shown in Figure 17 to minimize the loading effect of the
- transistor’s input impedance.
- Recall that FETs have much higher input impedances than bipolar junction transistors.
- Also, when an external load is connected to the oscillator output, as shown in Figure 18(a), 𝑓𝑟 may decrease
because of a reduction in Q.
- This happens if the load resistance is too small.
- In some cases, one way to eliminate the effects of a load resistance is by transformer coupling, as indicated
in Figure 18(b).
Figure 18 Oscillator loading.
The Clapp Oscillator

- The Clapp oscillator is a variation of the Colpitts.
- The basic difference is an additional capacitor, 𝐶3 in series with the inductor in the resonant feedback
circuit, as shown in Figure 19.
- Since 𝐶3 is in series with 𝐶1 and 𝐶2 around the tank circuit, the total capacitance is
1
𝐶𝑇 =
1 1 1
+ +
𝐶1 𝐶2 𝐶3
- and the approximate frequency of oscillation (𝑄 > 10) is
1
𝑓𝑟 =
2𝜋√𝐿𝐶𝑇
14
- If 𝐶3 is much smaller than 𝐶1 and 𝐶2 then almost entirely controls the resonant frequency
1
(𝑓𝑟 = )
2𝜋√𝐿𝐶3
- Clapp provides a more accurate and stable frequency of oscillation.
Figure 19 A basic Clapp oscillator
The Hartley Oscillator

- The Hartley oscillator is similar to the Colpitts except that the feedback circuit consists of two series
inductors and a parallel capacitor as shown in Figure 20.
Figure 20 A basic Hartley oscillator.

15
- In this circuit, the frequency of oscillation for (Q > 10) is
1
fr =
2π√LT C
- where 𝐿 𝑇 = 𝐿1 + 𝐿2 .
- The inductors act in a role similar to 𝐶1 and 𝐶2 in the Colpitts to determine the attenuation, 𝐵, of the
feedback circuit.
𝐵 = 𝐿1 /𝐿2
- To assure start-up of oscillation, 𝐴𝑣 must be greater than 1/𝐵.
𝐴𝑣 = 𝐿2 /𝐿1
- Loading of the tank circuit has the same effect in the Hartley as in the Colpitts; that is, the Q is decreased
and thus 𝑓𝑟 decreases.
The Armstrong Oscillator

- This type of LC feedback oscillator uses transformer coupling to feed back a portion of the signal voltage, as
shown in Figure 21.
- The transformer secondary coil provides the feedback to keep the oscillation going.
- The Armstrong is less common than the Colpitts, Clapp, and Hartley, mainly because of the
disadvantage of transformer size and cost.
- The frequency of oscillation is set by the inductance of the primary winding (𝐿𝑝𝑟𝑖 ) in parallel with 𝐶1 .
-
1
fr =
2π√Lpri C
Figure 21 A basic Armstrong oscillator.
Crystal-Controlled Oscillators
- The most stable and accurate type of feedback oscillator uses a piezoelectric crystal in the feedback loop
to control the frequency.
16
The Piezoelectric Effect
- Quartz is one type of crystalline substance found in nature that exhibits a property called the
- piezoelectric effect.
- When a changing mechanical stress is applied across the crystal to cause it to vibrate, a voltage develops at
the frequency of mechanical vibration.
- Conversely, when an AC voltage is applied across the crystal, it vibrates at the frequency of the applied
voltage.
- The greatest vibration occurs at the crystal’s natural resonant frequency, which is determined by the
physical dimensions and by the way the crystal is cut.
- Crystals used in electronic applications typically consist of a quartz wafer as shown in Figure 22(a) and (b).
- A schematic symbol for a crystal is shown in Figure 22(c), and an equivalent 𝑅𝐿𝐶 circuit for the crystal
appears in Figure 22(d).
Figure 22 A quartz crystal.
- As you can see, the crystal’s equivalent circuit is a series-parallel 𝑅𝐿𝐶 circuit and can operate in either
series resonance or parallel resonance.
- At the series resonant frequency, the inductive reactance is cancelled by the reactance of 𝐶𝑆 .
- The remaining series resistor, 𝑅𝑆 determines the impedance of the crystal.
- Parallel resonance occurs when the inductive reactance and the reactance of the parallel capacitance,𝐶𝑝 , are
equal.
- The parallel resonant frequency is usually at least 1 kHz higher than the series resonant frequency.
- A great advantage of the crystal is that it exhibits a very high 𝑄(𝑄𝑆 with values of several thousand are
typical).
- An oscillator that uses a crystal as a series resonant tank circuit is shown in Figure 23(a).
- The impedance of the crystal is minimum at the series resonant frequency, thus providing maximum
feedback.
- The crystal tuning capacitor, 𝐶𝑐 is used to “fine tune” the oscillator frequency.
17
Figure 23 Basic crystal oscillator
- A modified Colpitts configuration is shown in Figure 23(b) with a crystal acting as a parallel resonant tank
circuit.
- The impedance of the crystal is maximum at parallel resonance, thus developing the maximum
voltage across the capacitors.
- The voltage across 𝐶1 is fed back to the input.
RELAXATION OSCILLATORS
- The second major category of oscillators is the relaxation oscillator.
- Relaxation oscillators use an RC timing circuit and a device that changes states to generate a periodic
waveform.
- In this section, you will learn about several circuits that are used to produce nonsinusoidal waveforms.
A Triangular-Wave Oscillator
- The op-amp integrator can be used as the basis for a triangular-wave oscillator.
- The basic idea is illustrated in Figure 24(a) where a dual-polarity, switched input is used.
- We use the switch only to introduce the concept; it is not a practical way to implement this circuit.
- When the switch is in position 1, the negative voltage is applied, and the output is a positive-going
ramp.
- When the switch is thrown into position 2, a negative-going ramp is produced.
18
- If the switch is thrown back and forth at fixed intervals, the output is a triangular wave consisting of
alternating positive-going and negative-going ramps, as shown in Figure 24(b).
Figure 24 Basic triangular-wave oscillator.
A Practical Triangular-Wave Oscillator

- One practical implementation of a triangular-wave oscillator utilizes an op-amp comparator with
hysteresis to perform the switching function, as shown in Figure 25.
- The operation is as follows.
o To begin, assume that the output voltage of the comparator is at its maximum negative level.
o This output is connected to the inverting input of the integrator through𝑅1 , producing a
positive-going ramp on the output of the integrator.
o When the ramp voltage reaches the upper trigger point (UTP), the comparator switches to its
maximum positive level.
o This positive level causes the integrator ramp to change to a negative-going direction.
o The ramp continues in this direction until the lower trigger point (LTP) of the comparator is
reached.
o At this point, the comparator output switches back to the maximum negative level and the
cycle repeats.
o This action is illustrated in Figure 26.
Figure 25 A triangular-wave oscillator using two op-amps.
19
Figure 26 Waveforms for the circuit in Figure 25.
- The output amplitude is set by the output swing of the comparator, and the resistors R 2 and R 3 set the
amplitude of the triangular output by establishing the UTP and LTP voltages according to the following
formulas
R3
VUTP = + V_ max ( )
R2
R3
VUTP = − V_ max ( )
R2
- The frequency of both waveforms depends on the 𝑅1 𝐶 time constant as well as the amplitude-setting
resistors, 𝑅2 and 𝑅3 .
- By varying 𝑅1 , the frequency of oscillation can be adjusted without changing the output amplitude.
1 𝑅2
𝑓𝑟 = ( )
4𝑅1 𝐶 𝑅3
A Square-Wave Oscillator
- The basic square-wave oscillator shown in Figure 27 is a type of relaxation oscillator because its operation
is based on the charging and discharging of a capacitor.
- Notice that the op-amp’s inverting input is the capacitor voltage and the noninverting input is a portion of
the output fed back through resistors 𝑅2 and 𝑅3 to provide hysteresis.
- When the circuit is first turned on, the capacitor is uncharged, and thus the inverting input is at 0 V.
- This makes the output a positive maximum, and the capacitor begins to charge toward 𝑉𝑜𝑢𝑡 through 𝑅1 .
- When the capacitor voltage 𝑉𝑐 reaches a value equal to the feedback voltage 𝑉𝑓 on the noninverting input,
the op-amp switches to the maximum negative state.
- At this point, the capacitor begins to discharge from +𝑉𝑓 toward −𝑉𝑓 .
- When the capacitor voltage reaches −𝑉𝑓 the op-amp switches back to the maximum positive state.
20
- This action continues to repeat, as shown in Figure 28, and a square-wave output voltage is obtained.
Figure 27 Waveforms for the square-wave relaxation

oscillator.
Figure 28 A square-wave relaxation oscillator.
THE 555 TIMER AS AN OSCILLATOR
- The 555 timer is an integrated circuit with many applications.
- In this section, you will see how the 555 is configured as an astable or free-running multivibrator, which is
essentially a square-wave oscillator.
- The use of the 555 timer as a voltage-controlled oscillator (VCO) is also discussed.
- The 555 timer consists basically of two comparators, a flip-flop, a discharge transistor, and a resistive
voltage divider, as shown in Figure 29.
Figure 29 Internal diagram of a 555 integrated circuit timer. (IC pin numbers are in parentheses.)
21
Astable Operation
- A 555 timer connected to operate in the astable mode as a free-running relaxation

oscillator (astable multivibrator) is shown in Figure 30.
- Notice that the threshold input (THRESH) is now connected to the trigger input (TRIG).
- The external components 𝑅1 , 𝑅2 and 𝐶𝑒𝑥𝑡 form the timing circuit that sets the frequency
of oscillation. The 0.01µF capacitor connected to the control (CONT) input is strictly for
decoupling and has no
effect on the operation.
Figure 30 The 555 timer connected as an astable multivibrator.
- Initially, when the power is turned on, the capacitor 𝐶𝑒𝑥𝑡 is uncharged and thus the trigger
voltage (pin 2) is at 0 V.

- This causes the output of the lower comparator to be high and the output of the upper
comparator to be low, forcing the output of the flip-flop, and thus the base of 𝑄𝑑 low and
keeping the transistor off.
- Now, 𝐶𝑒𝑥𝑡 begins charging through 𝑅1 , 𝑎𝑛𝑑 𝑅2 as indicated in Figure 31.
- When the capacitor voltage reaches 1/3𝑉𝑐𝑐 , the lower comparator switches to its low
output state, and when the capacitor voltage reaches 2/3𝑉𝑐𝑐 , the upper comparator
switches to its high output state.
- This resets the flip-flop, causes the base of 𝑄𝑑 to go high, and turns on the transistor.
- This sequence creates a discharge path for the capacitor through 𝑅2 and the transistor, as
indicated.
- The capacitor now begins to discharge, causing the upper comparator to go low.
- At the point where the capacitor discharges down to 1/3𝑉𝑐𝑐 , the lower comparator
switches high, setting the flip-flop, which makes the base of 𝑄𝑑 low and turns off the
transistor.
- Another charging cycle begins, and the entire process repeats.
- The result is a rectangular wave output whose duty cycle depends on the values of 𝑅1 and
𝑅2 .

Figure 31 Operation of the 555 timer in the astable mode.
- The frequency of oscillation is given as
1.44
fr =
(R1 + 2R 2 )Cext
- By selectingR1 and R 2 the duty cycle of the output can be adjusted as
tH R1 +R2
- Duty Cycle = (
tH+tL
) 100% = (
R1 +2R2
) 100%
Operation as a Voltage-Controlled Oscillator (VCO)
- A 555 timer can be set up to operate as a VCO by using the same external connections as
for astable operation, with the exception that a variable control voltage is applied to the
CONT input (pin 5), as indicated in Figure 32.
- As shown in Figure 33, the control voltage changes the threshold values of 1/3𝑉𝑐𝑐 and
2/3𝑉𝑐𝑐 for the internal comparators.

- With the control voltage, the upper value is 𝑉𝐶𝑂𝑁𝑇 and the lower value is 1/2𝑉𝐶𝑂𝑁𝑇 .
- When the control voltage is varied, the output frequency also varies.
- An increase in 𝑉𝐶𝑂𝑁𝑇 increases the charging and discharging time of the external capacitor
and causes the frequency to decrease.
- A decrease in 𝑉𝐶𝑂𝑁𝑇 decreases the charging and discharging time of the capacitor and
causes the frequency to increase.
Figure 32 The 555 timer connected as a voltage-controlled oscillator (VCO). Note the
variable control voltage input on pin 5.

Figure 33 The VCO output frequency varies inversely with 𝐕𝐂𝐎𝐍𝐓 because the charging and
discharging time of 𝑪𝒆𝒙𝒕 is directly dependent on the control voltage.
Summary
 Sinusoidal feedback oscillators operate with positive feedback.

 Relaxation oscillators use an RC timing circuit.
 The two conditions for positive feedback are the phase shift around the feedback loop must
be and the voltage gain around the feedback loop must equal 1.
 For initial start-up, the voltage gain around the feedback loop must be greater than 1.
 Sinusoidal RC oscillators include the Wien-bridge, phase-shift, and twin-T.
 Sinusoidal LC oscillators include the Colpitts, Clapp, Hartley, Armstrong, and crystal
controlled.
 The feedback signal in a Colpitts oscillator is derived from a capacitive voltage divider in the
LC circuit.
 The Clapp oscillator is a variation of the Colpitts with a capacitor added in series with the
inductor.
 The feedback signal in a Hartley oscillator is derived from an inductive voltage divider in
the LC circuit.
 The feedback signal in an Armstrong oscillator is derived by transformer coupling.
 Crystal oscillators are the most stable type of feedback oscillator.
 A relaxation oscillator uses an RC timing circuit and a device that changes states to generate
a periodic waveform.

 The frequency in a voltage-controlled oscillator (VCO) can be varied with a dc control
voltage.
 The 555 timer is an integrated circuit that can be used as an oscillator, in addition to many
other applications.
True or False Quiz

1. Two categories of oscillators are feedback and relaxation.
2. A feedback oscillator uses only negative feedback.
3. Positive feedback is never used in an oscillator.
4. The net phase shift around the oscillator feedback loop must be zero.
5. The voltage gain around the closed feedback loop must be greater than 1 to sustain
oscillations.
6. For start-up, the loop gain must be greater than 1.
7. A Wien-bridge oscillator uses an RC circuit in the positive feedback loop.
8. The phase-shift oscillator utilizes RC circuits.
9. The twin-T oscillator contains an LC feedback circuit.
10. Colpitts, Clapp, Hartley, and Armstrong are examples of LC oscillators.
11. The crystal oscillator is based on the photoelectric effect.
12. A relaxation oscillator uses no positive feedback.
13. Most relaxation oscillators produce sinusoidal outputs.
14. VCO stands for variable-capacitance oscillator.
15. The 555 timer can be used as an oscillator.
References
Floyd, T. L. (2012). Electronic Devices: Conventional Current Version (9th ed.).
Jurong, Singapore: Pearson Education South Asia Pte Ltd.

MODULE 14 DAC AND ADC CIRCUITS
Topic Outcome
1. Discuss different type of data converter

2. Implement ladder network and op-amps to DAC and ADC.
Introduction
Many voltages and currents in electronics vary continuously over some range of values. In digital
circuitry the signals are at either one of two levels, representing the binary values of 1 or 0. An
analog–digital converter (ADC) obtains a digital value representing an input analog voltage,
whereas a digital–analog converter (DAC) changes a digital value back into an analog voltage.
Ladder network is primarily used in DAC circuit. The used of operational-amplifier to different
converter is also introduced.
This chapter deals with Digital to Analog Converters in detail. Also the used of resistor ladder
network is one of the key in converting digital signal to analog. The students will learn the different
process to convert analog to digital and digital to analog.
DAC
A Digital-to Analog-Converter or DAC converts a digital input signal into its equivalent analog
output signal. The digital input is represented by a combination of two conditions (binary code).
Figure 13.1 DAC Block Diagram
The block diagram of DAC is shown in figure 14.1. The converter consists of multiple binary inputs
and a single output. In general, the number of binary inputs of a DAC will be a power of two.
Ladder Network Conversion
One way to achieve a digital-to-analog conversion is by the use of networks of resistors called
ladder network. The network accepts binary inputs (typically 0𝑉 𝑜𝑟 𝑉𝑟𝑒𝑓 ) and provides an analog
output proportional to the input. Figure 14.2 shows a ladder network circuit with four input

voltages (representing 4bits of digital data) and a dc voltage output. The output voltage can be
obtained using the eq.14.1.
Figure 14.2 Four Stage Ladder Network Basic Circuit
(𝐷0 ∗ 20 ) + (𝐷1 ∗ 21 ) + (𝐷2 ∗ 22 )+(𝐷3 ∗ 23 )

𝑉𝑜𝑢𝑡 = 𝑉𝑟𝑒𝑓 𝒆𝒒. 𝟏𝟒. 𝟏
24
Figure 14.3 shows an example of ladder network circuit that convert a digital input of 0110 to 6𝑉
analog output voltage.
Figure 14.3 Circuit Converts 0110 Binary Input
The function of the ladder network is to convert the 16 possible binary values from 0000 to 1111
into one of 16 voltage levels in steps of 𝑉𝑟𝑒𝑓 /16. Using more sections of the ladder allows us to have
more binary inputs and a greater quantization for each step. More ladder stages provide greater
voltage resolution. The voltage resolution for 𝑛 ladder network define by the eq. 14.2
𝑉𝑟𝑒𝑓
𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑟𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 = 𝒆𝒒. 𝟏𝟒. 𝟐
2𝑛
The block diagram of a typical DAC using ladder network is show in figure 14.4. It is also referred
as an R-2R ladder. The network is sandwiched between reference current supply and current
switches connected to each digital input. The circuit output current is proportional to the input
binary value. When we connect a resistor to the output current, it will produce an analog voltage.

Figure 14.4 DAC IC using R-2R ladder network
Binary-Weighted Resistor DAC
A weighted resistor DAC produces an analog voltage output that is equal to the digital input by
means of binary weighted resistors in the inverting adder circuit.
A binary weighted resistor ladder DAC is shown in figure 14.5
Figure 14.5 Binary-weighted Resistor D/A Converter
The Binary-weighted Resistor DAC is composed of four major components
1. Switches equivalent to the number of binary input.

2. Weighted resistor ladder network (value of resistance are inversely proportional to the
numerical significance of each binary input equivalent).
3. Reference voltage
4. Summing amplifier that produce an analog signal that proportion to the digital input

Using the Millman’s theorem, we can analyze the behavior of the circuit. Millman’s theorem states
that
“the voltage appearing at any node in a resistive network is equal to the summation of the current
entering the node (assuming the node voltage is zero) divided by the summation of the
conductance connected to the node”.
Therefore we can write the equation for output mathematically using equation 14.3.
𝑉𝑜𝑢𝑡 𝑉𝑟𝑒𝑓 𝑆1 𝑉𝑟𝑒𝑓 𝑆2 𝑉𝑟𝑒𝑓 𝑆3 𝑉𝑟𝑒𝑓 𝑆𝑛

= 0 + 1 + 2 + ⋯ + 𝑛−1
𝑅𝑓 2 𝑅 2 𝑅 2 𝑅 2 𝑅
𝑉𝑟𝑒𝑓 𝑅𝑓 𝑆1 𝑆2 𝑆3 𝑆𝑛
𝑉𝑜𝑢𝑡 = 0
+ 1 + 2 + ⋯ + 𝑛 −1 𝒆𝒒 𝟏𝟒. 𝟑
𝑅 2 2 2 2
The equation represents the output voltage equation of a 𝑛 − 𝑏𝑖𝑡 binary weighted resistor DAC
whose 𝑆1 is the most significant bit and 𝑆𝑛 is the least weighted binary digit. The condition of the
switches is also in binary representation depending if it is connected to the reference voltage or to
the ground.
𝑉𝑟𝑒𝑓 = 1
𝐺𝑟𝑜𝑢𝑛𝑑 = 0
Thus if binary input weighted resistor DAC consists of 4 switches which switch 1 and 2 is ON
(connected to 𝑉𝑟𝑒𝑓 through resistor) and switch 3 and 4 is OFF (connected to the ground), then its
equivalent binary input is
1100
Advantages
- Single resistor is used per binary input representation
Disadvantages
- Resistors for network application have a wide range of values and it is difficult to design
more accurate resistors. When the number of input is large, the resistance of the least
weighted bit is also large which may be comparable to the 𝑍𝑖𝑛 of the op-amp that may lead
to erroneous results.
- The temperature coefficients of all resistors is very hard to match

R-2R Ladder Network
We see that in weighted resistor DAC requires a wide range of resistance value as our binary input
increases. With R-2R ladder network shown in figure 14.6, overcome the disadvantages of a binary
weighted resistor in equivalent to additional resistor for each bit.
Figure 14.6 R-2R Ladder D/A Converter
The switch represents the binary input with 𝑆1 is the most weighted bit and 𝑆4 is the least weighted
bit.
The operation of R-2R Ladder Network used superposition theorem to determine the analog output
equivalent to combinations of binary input.
𝑉𝑜𝑢𝑡 = 𝑉𝑅 2−𝑛 𝑆𝑛 −1 2𝑛 −1 + 𝑆𝑛−2 2𝑛−2 + ⋯ + 𝑆1 2+1 +𝑆0 20
Thus the output of R-2R ladder DAC is proportion to the sum of the weights represented by
switches to the ratio in the ladder network.
Advantages
- Only 2 values resistor are used

- R-2R are available to monolithic chips
- An addition of R-2R network if we want to add digital input
ADC
Dual-Slope Conversion
One of the methods for converting an analog voltage to digital output is the dual-slope method
illustrated in figure 15.8.

Figure 15.8 ADC using Dual Slope Method
The operation will start assuming an analog signal 𝑣𝑎 is negative, assuming that 𝑆2 is closed prior
the conversion cycle, thus the discharging the capacitor 𝐶 and setting 𝑣1 = 0. When we open 𝑆2 and
connecting the integrator input to 𝑆1 to the analog input signal, current 𝐼 = 𝑣𝑎 /𝑅𝐶 will flow through
R in the direction away from the integrator since 𝑣𝑎 is negative. The 𝑣1 rises linearly with the slop
𝐼/𝐶 = 𝑣𝑎 /𝑅𝐶 as indicated in figure 15.9. Simultaneously; the counter is enabled and it counts the
pulses from a fixed-frequency clock. The process of conversion will continue for a fixed duration of
𝑇1 and ends when the counter has accumulated a fixed count 𝑛𝑟𝑒𝑓 (𝑛𝑟𝑒𝑓 = 2𝑁 𝑓𝑜𝑟 𝑎𝑛 𝑁 −
𝑏𝑖𝑡 𝑐𝑜𝑛𝑣𝑒𝑟𝑡𝑒𝑟). At the end of this phase, the counter is reset to zero.
Figure 15.9 Analog-to-digital Conversion using Dual-slope Method Waveform
We can write the equation of 𝑉𝑝 as the peak voltage at the output of integrator using eq.15.3

𝑉𝑝 𝑣𝑎
= 𝒆𝒒. 𝟏𝟓. 𝟑
𝑇1 𝑅𝐶
The conversion will continue at 𝑡 = 𝑇1 by connecting the integrator input through 𝑆1 to the
positive 𝑉𝑟𝑒𝑓 . The current into the integrator reverses direction equal to 𝑉𝑟𝑒𝑓 /𝑅. The voltage 𝑣1 then
will decreases linearly with slope of 𝑉𝑟𝑒𝑓 /𝑅𝐶. Simultaneously the counter is enabled and it counts
the pulses from the fixed-frequency clock. We can denote this new duration of conversion to 𝑇2
having the equation for 𝑉𝑝 defined by eq.15.4.
𝑉𝑝 𝑉𝑟𝑒𝑓
= 𝒆𝒒. 𝟏𝟓. 𝟒
𝑇2 𝑅𝐶
By combining eq. 15.3 and 15.4, 𝑇2 = 𝑇1 (𝑣𝑎 /𝑉𝑟𝑒𝑓 ), we can get equation for 𝑛 (eq. 15.5). Since the
counter reading, 𝑛𝑟𝑒𝑓 , at the end of 𝑇1 is proportional to 𝑇1 and the reading, 𝑛, at the end of 𝑇2 is
proportional to 𝑇2 , we have
𝑣𝑎
𝑛 = 𝑛𝑟𝑒𝑓 𝒆𝒒. 𝟏𝟓. 𝟓
𝑉𝑟𝑒𝑓
As a result, the data in the counter at the end of the conversion process is the digital equivalent
of 𝑣𝑎 .
Ladder-Network Conversion
Another popular method of analog-to-digital conversion uses a ladder network along with counter
and comparator circuits shown in figure 5.10. The block diagram is composed of comparator,
control logic and clock with analog input and provides digital output. A digital counter advances
from a zero count while a ladder network driven by the counter outputs a staircase voltage (shown
in figure 5.11). Notice that the output increases 𝑜𝑛𝑒 𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑖𝑛𝑐𝑟𝑒𝑚𝑒𝑛𝑡/𝑐𝑜𝑢𝑛𝑡 𝑠𝑡𝑒𝑝. A comparator
circuit, receiving both staircase voltage and analog input voltage, provides a signal to stop the count
when the staircase voltage rises above the input voltage. The counter value at that time is the digital
output.
Figure 5.10 Ladder-network Logic Diagram

Figure 5.10 Ladder-network waveform
The amount of voltage change stepped by the staircase signal depends on the number of count bits
used. For example, a 12-stage counter operating a 12-stage ladder network using reference of 10V
steps each count by a voltage of (eq.15.6)
𝑉𝑟𝑒𝑓 10𝑉
= 12 = 2.4𝑚𝑉 𝒆𝒒. 𝟏𝟓. 𝟔
2𝑁 2
Therefore, this results in a conversion resolution of 2.4 mV. The clock rate affects the conversion of
the ladder-network. A clock rate of 1MHz operating at 12-stage counter needs a maximum
conversion time (eq.15.7) of
2𝑁 𝑥 𝜏 = 4096µ𝑠 ≈ 4.1𝑚𝑠 𝒒. 𝟏𝟓. 𝟕
Then the minimum number of conversion that could be carried out for second with respect to
number of conversion is
1
𝑛𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 𝑐𝑜𝑛𝑣𝑒𝑟𝑠𝑖𝑜𝑛𝑠 = ≈ 244 𝑐𝑜𝑛𝑣𝑒𝑟𝑠𝑖𝑜𝑛𝑠/𝑠𝑒𝑐𝑜𝑛𝑑
4.1𝑚𝑠
1. A DAC is a digital-to-analog converter.

2. An ADC is an analog-to-digital converter.
3. Both data converters are significance in digital signal processing application.
4. The ladder-network is composed of multiple resistors.
5. Data converters used op-amp in the process of signal conversion.
End of Module Test
1. For a 5-bit input binary-weighted resistor DAC, calculate the output voltage for input of
10110, if 𝑅 = 3𝑘𝛺 and 𝑅𝑓 = 6𝑘𝛺.
2. For a 5-bit input R-2R Ladder Network DAC, calculate the output voltage for input of 10110,
if 𝑅 = 3𝑘𝛺 and 𝑅𝑓 = 6𝑘𝛺.
3. Compare you answer in problem 1 and 2.

References:
Digital to Analog Converters
https://my.ece.utah.edu/~ccharles/ece3110_2007/Labs/Lab4.pdf
Linear Integrated Circuits Applications: Digital to Analog Converters
https://www.tutorialspoint.com/linear_integrated_circuits_applications/linear_integrated_circuits_appl
ications_digital_to_analog_converters.htm

MODULE 15 LINEAR DIGITAL AND LOGIC IC
Topic Outcome
1. Discuss the concept of Linear and Digital IC

2. Describe the different Linear and Digital IC
3. Analyze the operation of Linear IC
4. Analyze the operation Logic Circuits
Introduction
This section will focus on Linear and Digital IC and its application. Integrated Circuit (IC) in
Electronics is a multiple electronic devices (passive and active components) that are
interconnected to each other on a single chip of semiconductor material. The advantages of IC over
a single electronic component are its size, weight, power consumption, cost, and performance.
There are two types of IC; analog and digital. This module will discuss the different types of analog
and digital IC and their applications.
After completing this section, students will gain knowledge to the different types of linear and
digital IC. They can implement op-amp, timers, VCO, PLL, Logic gates, etc to some circuit for
application such as timing operation, communication transmitters and receivers, etc.
Integrated Circuits (IC)
An integrated circuit is one in which circuit components such as transistors, diodes, resistors,
capacitors etc. are automatically part of a small semiconductor chip. An IC consists of number of
circuit components interconnected into a single small package that has a complete electronic
function. IC is classified based on its mode of operation.
Linear IC
Equivalents of discrete transistor networks, such as amplifiers, filters, frequency multipliers, and
modulators that often require additional external components for satisfactory operation.
Digital IC
Complete functioning logic networks that are equivalents of basic transistor logic circuits.
Comparator Circuit
A comparator is a circuit that compares the applied input signal to one input of an op-amp with a
known reference to the other input. A comparator accepts input of linear voltages and provides a
digital output that indicates when one input is less than or greater than the second. Shown in figure
15.1 is the basic comparator circuit. The output of the comparator circuit is a digital signal that will
stays at high voltage level when the noninverting (−) input is greater than the voltage at the
inverting (+) input and switches to a lower voltage level when the noninverting input voltage goes
below the inverting input voltage.

Figure 15.1 Basic Comparator Circuit using Op-amp
We can examine the operation of a basic comparator using op-amp shown in figure 15.2. Notice
that the reference voltage is connected to the ground (0𝑉) and the sinusoidal signal is applied to
the noninverting input. Because the internal circuit of an op-amp has a high voltage gain, this will
cause the output to switch between two states (output side in figure 15.2). Even 𝑉𝑖 has a value of a
fraction of a millivolt above the grounded reference level, the comparator circuit will amplify the
input voltage to its positive output saturation level and remains there as long as the input is above
𝑉𝑟𝑒𝑓 . When the input drops just below the reference voltage, the output will go lower saturation
level and stay there as long as the input voltage remains below 𝑉𝑟𝑒𝑓 .
Figure 15.2 Operation of op-amp as comparator
The reference voltage may vary based on the desired positive or negative 𝑉𝑟𝑒𝑓 . The reference
voltage may be connected to either positive or negative voltage. The input signal may also apply to
the noninverting input. Figure 15.3 shows a comparator circuit operating with a positive reference
voltage thru voltage divider, connected to the noninverting input and the input voltage is connected
to the inverting input of the op-amp.

Figure 15.3 Comparator with Positive Reference Voltage
Separate IC comparator units are more suitable circuit compared to op-amp as comparator.
Comparator IC are faster in switching, has built-in noise immunity, and outputs is capable of
directly driving variety of loads.
311 Comparator
The 311 voltage comparator is an eight pin single IC comparator that can operate from dual power
supplies of ±15𝑉 as from a single +5𝑉 supply shown n figure 15.4. This comparator can provide a
voltage at one of two distinct levels (suitable for driving a lamp or a relay). The output is taken from
a BJT to allow driving different loads. It has also a balance and strobe inputs that allows the gating
of the output.
Figure15.4 8-pin DIP 311 Comparator IC Pin Configuration
Application:
- zero-crossing detector
- driving a relay

399 Comparator
Figure 15.5 shows 14-pin 399 IC quad comparator containing four independent comparator
circuits. Each comparator has noninverting and inverting input and a single output. All comparators
inside has a supply voltage applied to a pair of pins only.
Figure15.4 8-pin DIP 339 Comparator IC Pin Configuration
The operation is same as the other comparator where one of the input of a single op-amp will be the
voltage reference while the other is connected to the input voltage source. Whenever the input
signal goes above the reference, the output switches to saturation (negative or positive). When the
input switches goes below the reference voltage, the output goes to the other saturation. The
reference level may be also varies, and the other terminal could be also used as the reference while
the other is connected to the input signal.
555 Timers
The 555 timer IC is made of a combination of linear comparators and digital flip-flops as shown in
figure 15.9. It is usually in an eight-pin DIP packaging. A series connection of three resistors sets the
reference voltage levels to the two comparators at 2𝑉𝐶𝐶 /3 and 𝑉𝐶𝐶 /3, thus its output are

responsible for setting or resetting the flip-flop. The output of the flip-flop brought out through an
output amplifier stage.
Figure 15.9 555 timer IC Details
Application:
- Astable Operation
- Monostable Operation
Astable Operation
Astable multivibrator or sometimes called clock circuit is one of the applications of 555 timer IC.
Figure 15.10 shows the circuit configuration of the 555 timer as an astable circuit. The circuit has
consists of external resistor and capacitor for the timing interval of the output signal.

Figure 15.10 555 timer IC as Astable Multivibrator
The operation as the capacitor 𝐶 charges towards 𝑉𝑐𝑐 through external resistors 𝑅𝐴 and 𝑅𝐵 . The
capacitor voltage rises until it goes above 2𝑉𝑐𝑐 /3. This will be the threshold voltage at pin 6 that
drives the 1st comparator to trigger the flip-flop so that the output at pin 3 goes low. At the same
time, the discharge transistor is driven on that will cause the output at pin 7 to discharge the
capacitor through resistor 𝑅𝐵 . The voltage across the capacitor will decrease until it drops 𝑉𝑐𝑐 /3
(below the trigger level).The discharge transistor now is turned off, and the flip-flop is triggered
(the output goes back high), so that the capacitor can again charge through 𝑅𝐴 and 𝑅𝐵 toward 𝑉𝑐𝑐 .
Using the relations eq. 15.6 and 15.7, we can compute the time intervals during which the output is
high and low. Also the period 𝑇 and of the astable circuit frequency 𝑓, is defined by the eq.15.8 and
15.9 respectively.
𝑇𝑕𝑖𝑔 𝑕 ≈ 0.7 𝑅𝐴 + 𝑅𝐵 𝐶 𝒆𝒒. 𝟏𝟓. 𝟔
𝑇𝑙𝑜𝑤 ≈ 0.7𝑅𝐵 𝐶 𝒆𝒒. 𝟏𝟓. 𝟕
𝑇 = 𝑝𝑒𝑟𝑖𝑜𝑑 = 𝑇𝑕𝑖𝑔 𝑕 + 𝑇𝑙𝑜𝑤 𝒆𝒒. 𝟏𝟓. 𝟖
1 1.44
𝑓= ≈ 𝒆𝒒. 𝟏𝟓. 𝟗
𝑇 𝑅𝐴 + 2𝑅𝐵 𝐶
Applying values of 𝑅𝐴 = 7.5𝑘𝛺, 𝑅𝐵 = 7.5𝑘𝛺, 𝐶 = 0.1µ𝐹, 𝑎𝑛𝑑 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 = 5𝑉, we can compute the
values of 𝑇𝑕𝑖𝑔 𝑕 , 𝑇𝑙𝑜𝑤 , 𝑝𝑒𝑟𝑖𝑜𝑑 𝑎𝑛𝑑 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦, and can plot its output wave form. Figure 15.11 shows
the output waveform given the list of parameters.

Figure 15.11 Astable Multivibrator Example Waveform
Monostable Operation
Another application of 555 timer is as monostable multivibrator circuit shown in figure 15.12. The
output at pin 3 goes high for a time period given by the eq. 15.10; once the trigger input goes
negative (it triggers the one-shot).
Figure 15.12 555 timer IC as Monostable Multivibrator
𝑇𝑕𝑖𝑔 𝑕 = 1.1𝑅𝐴 𝐶 𝒆𝒒. 𝟏𝟓. 𝟏𝟎

The resulting waveform for the monostable circuit is shown in figure 15.13. The negative edge
input trigger causes the comparator 2 (see figure 15.9) to trigger the flip-flop resulting the output
(at pin 3) goes high. Capacitor (𝐶) charges toward 𝑉𝑐𝑐 through resistor 𝑅𝐴 , the output remains high
during the charge interval of the capacitor. When the voltage across the Capacitor reaches the
voltage level 2𝑉𝑐𝑐 /3 (threshold), the 1st comparator will trigger the flip-flop resulting for low
output. The discharge transistor also goes low, causing the capacitor to remain at near 0 V until
triggered again.
Figure 15.13 Astable Multivibrator Circuit Waveform
Voltage-controlled Oscillator (VCO)
A type of relaxation oscillator whose frequency can be varied by a dc control voltage; an oscillator
for which the output frequency is dependent on a controlling input voltage.
556 IC
556 IC is an example of VCO contains circuitry that generate both triangular and square wave shape
output signal. The frequency of the 556 is set by an external resistor and capacitor varied by an
applied dc voltage. 556 IC contains current sources, Schmitt trigger, and buffers circuit. Current
source is the one that responsible for the charging and discharging of the external capacitance (𝐶)
at the rate set by the external resistor (𝑅) and the modulating dc input voltage; see figure 15.4 (a).
The Schmitt trigger circuit is act like a switch for the current sources between charging and
discharging of the capacitor. The output triangular voltage (developed across capacitor) and square
wave (produced by the Schmitt trigger) are provided through the buffer amplifiers. 556 IC is an 8-
pin DIP packaging (figure 15.4 b) that can be can be programmed over a 10-to-1 frequency range
and then modulated over a 10-to-1 frequency range by a control voltage 𝑉𝑐 . The center frequency
(𝑓0 ) can be calculate using eq. 15.11,
2 𝑉 + − 𝑉𝑐
𝑓0 = 𝒆𝒒. 𝟏𝟓. 𝟏𝟏
𝑅𝐶 𝑉+
given the following condition;
1. 𝑅1 should be the range 2𝑘𝛺 ≤ 𝑅1 ≤ 20𝑘𝛺

3
2. 𝑉𝑐 should be within the range 4 ≤ 𝑉𝑐 ≤ 𝑉 +
3. 𝑓0 should be below 1𝑀𝐻𝑧
4. 𝑉 + should range below 10𝑉 𝑎𝑛𝑑 24𝑉.

Figure 15.14 556 Block Diagram (a) and Pin Configuration (b)
Phase-locked Loop Circuit
Phase-locked loop (PLL) is a circuit that consists of phase detector, low-pass filter, and VCO, shown
in figure 15.15, used primarily in signal transmission and receiving.
Figure 15.15 Block Diagram of PLL
𝑉𝑖 and 𝑉𝑜 compared by phase comparator that provide an 𝑉𝑒 that represents the phase difference
between two signals. 𝑉𝑒 is now fed to a low pass filter, which provides an output voltage (amplified
if necessary), that can be taken as the output of the PLL circuit and used internally as the voltage to
modulate the VCO’s frequency. The closed-loop operation of the circuit is to maintain the VCO
frequency locked to that of the input signal frequency.
Applications
1. Frequency Demodulation
2. Frequency Synthesis
3. Frequency-shift keyed (FSK) Decoders

Digital IC
Digital ICs deals with digital input and output that use switching action. The simplest digital ICs
carry out just one type of switching action, and they can perform logic actions.
Logic Gates
Logic gate is an elementary building block of a digital circuit. Most logic gates have two inputs and
one output. The input and the output signals of a gate can be in one of the two binary conditions:
low 0 or “off” or high 1 or “on” . The value of output depends on the combination of the inputs.
Logic gates are electronic devices allows an electronic system to make decision based on the inputs.
Boolean Algebra and Truth Table
Logic gates use the principles of a mathematical system called Boolean algebra, a branch of
mathematics that deals with the operations on logical values. Boolean expression is the input-
output information of logic gates can be schemed into truth table to visualize the switching function
of the system.
Truth table shows the behaviour of logic gates. A logic gate truth table shows each possible input
combination to the gate or circuit with the resultant output depending upon the combination of
these input(s).
Three basic logic gates
- NOT
- OR
- AND
Other logic gates
- NOR
- NAND
- XOR
- XNOR
NOT gate
Not gate is the simplest gate also called “inverter that consists only of a single input and single
output. The input of the NOT gate is always the reverse of the output: if the input is high (1), the
output is low (0) and vice versa. Figure 15.16 shows the symbol and truth table of NOT gate.

Figure 15.16 NOT Gate Symbol (a) and Truth Table (b)
OR gate
An OR gate is a multiple input single output that will give a high output if any of the inputs is high.
Figure 15.17 shows the symbol and truth table of OR gate.
Figure 15.17 OR Gate Symbol (a) and Truth Table (b)
NOT gate
Figure 15.18 shows the symbol and truth table of AND gate. An AND gate is a multiple input single
output circuit that will give a high output if all of the input is high.
Figure 15.18 AND Gate Symbol (a) and Truth Table (b)
NOR gate
A NOR (Not OR) gate is a multiple input single output gate that will give an output of high if all the
input is low; see figure 15.9.

Figure 15.19 NOR Gate Symbol (a) and Truth Table (b)
NAND gate
A NAND (Not AND) gate shown in figure 15.20, is a multiple input single output gate that will give
an output low of if all the input is high.
Figure 15.20 NAND Gate Symbol (a) and Truth Table (b)
XOR gate
XOR stands for Exclusive-OR is circuit with multiple input single output gate that will give an output
of high if the number of “1” in the input are odd. Figure 15.21 shows the symbol and truth table of
XOR gate.
Figure 15.21 XOR Gate Symbol (a) and Truth Table (b)

XOR gate
Exclusive-NOR or XNOR is circuit with multiple input single output gate that will give an output of
high if the number of “1” in the input are even; see figure 15.22.
Figure 15.22 XNOR Gate Symbol (a) and Truth Table (b)
Equivalent IC in 7400 series
Lists are the equivalent IC for each logic gate:
- 7400 - Quad 2-input NAND gate

- 7402 - Quad 2-input NOR gate
- 7404 - Hex Inverter
- 7408 - Quad 2-input AND gate
- 7432 - Quad 2-input OR gate
- 7486 - Quad 2-input XOR gate
- 74266 - Quad 2-input XNOR gate
Equivalent Boolean Expression for each Logic Gate
𝑁𝑂𝑇 𝐴 = 𝐴
𝐴 𝑂𝑅 𝐵 = 𝐴 + 𝐵
𝐴 𝐴𝑁𝐷 𝐵 = 𝐴𝐵
𝐴 𝑁𝑂𝑅 𝐵 = 𝐴 + 𝐵
𝐴 𝑁𝐴𝑁𝐷 𝐵 = 𝐴𝐵
𝐴 𝑋𝑂𝑅 𝐵 = 𝐴 ⊕ 𝐵
𝐴 𝑋𝑁𝑂𝑅 𝐵 = 𝐴 ⊕ 𝐵

1. A comparator provides an output of either maximum high or maximum low when one input
goes above or below the other.
2. Timer IC an astable circuit acts as a clock and a monostable circuit acts as a one-shot or timer.
3. A PLL circuit contains a phase detector, a low-pass filter, and a VCO.
4. The inverter output is the complement of the input.
5. The AND gate output is HIGH only when all the inputs are HIGH.
6. The OR gate output is HIGH when any of the inputs is HIGH.
7. The NAND gate output is LOW only when all the inputs are HIGH.
8. The NAND can be viewed as a negative-OR whose output is HIGH when any input is LOW.
9. The NOR gate output is LOW when any of the inputs is HIGH.
10. The NOR can be viewed as a negative-AND whose output is HIGH only when all the inputs
are LOW.
11. The exclusive-OR gate output is HIGH when the inputs are not the same.
12. The exclusive-NOR gate output is LOW when the inputs are not the same.
End of Module Test
True or False
1. An inverter performs a NOT operation.

2. A NOT gate cannot have more than one input.
3. If any input to an OR gate is zero, the output is zero.
4. If all inputs to an AND gate are 1, the output is 0.
5. A NAND gate can be considered as an AND gate followed by a NOT gate.
6. A NOR gate can be considered as an OR gate followed by an inverter.
7. The output of an exclusive-OR is 0 if the inputs are opposite.
Multiple Choice
1. When the input to an inverter is LOW (0), the output is

(a) HIGH or 0 (b) LOW or 0 (c) HIGH or 1 (d) LOW or 1
2. An inverter performs an operation known as
(a) complementation (b) assertion (c) inversion (d) both answers (a) and (c)
3. The output of an AND gate with inputs A, B and C is 0 (LOW) when
(a) A = 0, B = 0, C = 0 (b) A = 0, B = 1, C = 1 (c) both answers (a) and (b)
4. The output of an OR gate with inputs A, B and C is 0 (LOW) when
(a) A = 0, B = 0, C = 0 (b) A = 0, B = 1, C = 1 (c) both answers (a) and (b)
5. A pulse is applied to each input of a 2-input NAND gate. One pulse goes HIGH at t = 0 and
goes back LOW at t = 1 ms. The other pulse goes HIGH at t = 0.8 ms and goes back LOW at t
= 3 ms. The output pulse can be described as follows:
(a) It goes LOW at t = 0 and back HIGH at t = 3 ms.
(b) It goes LOW at t = 0.8 ms and back HIGH at t = 3 ms.
(c) It goes LOW at t = 0.8 ms and back HIGH at t = 1 ms.

(d) It goes LOW at t = 0.8 ms and back LOW at t = 1 ms.
6. A pulse is applied to each input of a 2-input NOR gate. One pulse goes HIGH at t = 0 and
goes back LOW at t = 1 ms. The other pulse goes HIGH at t = 0.8 ms and goes back LOW at
t = 3 ms. The output pulse can be described as follows:
(a) It goes LOW at t = 0 and back HIGH at t = 3 ms.
(b) It goes LOW at t = 0.8 ms and back HIGH at t = 3 ms.
(c) It goes LOW at t = 0.8 ms and back HIGH at t = 1 ms.
(d) It goes HIGH at t = 0.8 ms and back LOW at t = 1 ms.
7. A pulse is applied to each input of an exclusive-OR gate. One pulse goes HIGH at t = 0 and
goes back LOW at t = 1 ms. The other pulse goes HIGH at t = 0.8 ms and goes back LOW at
t = 3 ms. The output pulse can be described as follows:
(a) It goes HIGH at t = 0 and back LOW at t = 3 ms.
(b) It goes HIGH at t = 0 and back LOW at t = 0.8 ms.
(c) It goes HIGH at t = 1 m
(d) both answers (b) and (c)
Problem Solving
1. Sketch the circuit of a 555 timer connected as an astable multivibrator for operation at 350
kHz. Determine the value of capacitor C needed using RA = RB = 7.5 kΩ.
2. Draw the circuit of a one-shot using a 555 timer to provide one time period of 20ms. If RA =
7.5 kΩ, what value of C is needed?
3. Sketch the input and output waveforms for a one-shot using a 555 timer triggered by a 10-
kHz clock for RA = 5.1 kΩ and C = 5 nF.
References:
Floyd, T. L. Digital Fundamentals (8th ed.). Jurong, Singapore: Pearson Education South Asia Pte
Ltd., 2015

MODULE 16 Power Supplies (Voltage Regulators)
Introduction
This module introduces the operation of power supply circuits built using filters, rectifiers,
and then voltage regulators. Starting with an AC voltage, we obtain a steady dc voltage by rectifying
the ac voltage, then filtering to a dc level, and, finally, regulating to obtain a desired fixed dc voltage.
The regulation is usually obtained from an IC voltage regulator unit, which takes a dc voltage and
provides a somewhat lower dc voltage, which remains the same even if the input dc voltage varies
or the output load connected to the dc voltage changes.
Topic Outcome
1. Describe how power supply circuits operate
2. Discuss the operation of RC filters and voltage regulators
3. Discuss the practical IC voltage regulators
Power Supply
A block diagram containing the parts of a typical power supply and the voltage at various
points in the unit is shown in Figure 1 . The ac voltage, typically 120 Vrms, is connected to a
transformer, which steps that ac voltage down to the level for the desired dc output.
A diode rectifier then provides a full-wave rectified voltage, which is initially filtered by a
basic capacitor filter to produce a dc voltage. This resulting dc voltage usually has some ripple or ac
voltage variation. A regulator circuit can use this dc input to provide a dc voltage that not only has
much less ripple voltage, but also remains at the same dc value even if the input dc voltage varies
somewhat or the load connected to the output dc voltage changes. This voltage regulation is usually
obtained using one of a number of popular voltage regulator IC units.
Figure 1 The Basic DC Power Supply

 A transformer changes ac voltages based on the turns ratio between the primary and
secondary
 The rectifier converts the ac input voltage to a pulsating dc voltage
 The filter eliminates the fluctuations in the rectified voltage and produces a relatively
smooth dc voltage.
 The regulator is a circuit that maintains a constant dc voltage for variations in the input line
voltage or in the load
 The load is a circuit or device connected to the output of the power supply and operates
from the power supply voltage and current.
Rectifier
A rectifier is an electronic device that changes alternating current into direct current. This
process is called rectification.
Rectification is the conversion of alternating current (AC) to direct current (DC). A half-
wave rectifier is a circuit that allows only one half-cycle of the AC voltage waveform to be applied to
the load, resulting in one non-alternating polarity across it.
The three main types of rectifier are as follows:
1) Half-wave rectifier: It is the simplest type of rectifier, which is made with just one diode.
2) Full-wave rectifier: This rectifier is essentially made of two half-wave rectifiers, and can be
made with two diodes and an earthed center-tap on the transformer. The center-tap allows
the circuit to be completed because current cannot flow through the other diode.
3) Bridge rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to
achieve full-wave rectification.
Half Wave Rectifier :
Figure 2 Half Wave Rectifier Circuit
In half-wave rectification of a single-phase supply, either the positive or negative half of the
AC wave is passed, while the other half is blocked. Because only one half of the input waveform

reaches the output, mean voltage is lower. Half-wave rectification requires a single diode in
a single-phase supply, or three in a three-phase supply. Rectifiers yield a unidirectional but
pulsating direct current; half-wave rectifiers produce far more ripple than full-wave rectifiers, and
much more filtering is needed to eliminate harmonics of the AC frequency from the output.
The no-load output DC voltage of an ideal half-wave rectifier for a sinusoidal input voltage is:
𝑉𝑝𝑒𝑎𝑘
𝑉𝑟𝑚𝑠 =
2
𝑉𝑝𝑒𝑎𝑘
𝑉𝑑𝑐 =
𝜋
where:
Vdc, Vav – the DC or average output voltage,
Vpeak, the peak value of the phase input voltages,
Vrms, the root-mean-square value of output voltage.
Full Wave Rectifier :
Figure 3 Full Wave Rectifier Circuit
A full-wave rectifier converts the whole of the input waveform to one of constant polarity
(positive or negative) at its output. Full-wave rectification converts both polarities of the input
waveform to pulsating DC (direct current), and yields a higher average output voltage. Two diodes
and a center tapped transformer,
For single-phase AC, if the transformer is center-tapped, then two diodes back-to-back
(cathode-to-cathode or anode-to-anode, depending upon output polarity required) can form a full-

wave rectifier. Twice as many turns are required on the transformer secondary to obtain the same
output voltage than for a bridge rectifier, but the power rating is unchanged.
Center-Tapped Full Wave Rectifier
Figure 4 Center-Tapped Full Wave Rectifier Circuit

A center-tapped rectifier is a type of full-wave rectifier that uses two diodes connected to
the secondary of a center-tapped transformer.
Figure 5 Center-Tapped Full Wave Rectifier Operation
Rectifier efficiency:

Rectifier efficiency (η) is defined as the ratio of DC output power to the input power from
the AC supply. Even with ideal rectifiers with no losses, the efficiency is less than 100% because
some of the output power is AC power rather than DC which manifests as ripple superimposed on
the DC waveform. For a half-wave rectifier efficiency is very poor,
𝑉𝑝𝑒𝑎𝑘 𝐼𝑝𝑒𝑎𝑘
𝑃𝑖𝑛 = ∗
2 2
(the divisors are 2 rather than √2 because no power is delivered on the negative half-cycle)
𝑉𝑝𝑒𝑎𝑘 𝐼𝑝𝑒𝑎𝑘
𝑃𝑜𝑢𝑡 = ∗
𝜋 𝜋
Thus maximum efficiency for a half-wave rectifier is,
𝑃𝑜𝑢𝑡 4
𝜂= = 2 ≈ 40.53%
𝑃𝑖𝑛 𝜋
Similarly, for a full-wave rectifier,
𝑃𝑜𝑢𝑡 8
𝜂= = 2 ≈ 81.06%
𝑃𝑖𝑛 𝜋
Efficiency is reduced by losses in transformer windings and power dissipation in the

rectifier element itself. Efficiency can be improved with the use of smoothing circuits which reduce
the ripple and hence reduce the AC content of the output. Three-phase rectifiers, especially three-
phase full-wave rectifiers, have much greater efficiencies because the ripple is intrinsically smaller.
In some three-phase and multi-phase applications the efficiency is high enough that smoothing
circuitry is unnecessary.
Bridge Rectifier
Figure 5 Bridge Rectifier

The four diodes labelled D1 to D4 are arranged in “series pairs” with only two diodes conducting
current during each half cycle. During the positive half cycle of the supply,
diodes D1 and D2 conduct in series while diodes D3 and D4 are reverse biased and the current
flows through the load as shown below.
The Positive Half-cycle
During the negative half cycle of the supply, diodes D3 and D4 conduct in series, but
diodes D1 and D2switch “OFF” as they are now reverse biased. The current flowing through the
load is the same direction as before.
The Negative Half-cycle
As the current flowing through the load is unidirectional, so the voltage developed across the load is
also unidirectional the same as for the previous two diode full-wave rectifier, therefore the average
DC voltage across the load is 0.637Vmax
Typical Bridge Rectifier

However in reality, during each half cycle the current flows through two diodes instead of
just one so the amplitude of the output voltage is two voltage drops ( 2 x 0.7 = 1.4V ) less than the
input VMAX amplitude. The ripple frequency is now twice the supply frequency (e.g. 100Hz for a
50Hz supply or 120Hz for a 60Hz supply.)
Although we can use four individual power diodes to make a full wave bridge rectifier, pre-
made bridge rectifier components are available “off-the-shelf” in a range of different voltage and
current sizes that can be soldered directly into a PCB circuit board or be connected by spade
connectors.
The image to the right shows a typical single phase bridge rectifier with one corner cut off.
This cut-off corner indicates that the terminal nearest to the corner is the positive or +ve output
terminal or lead with the opposite (diagonal) lead being the negative or -ve output lead. The other
two connecting leads are for the input alternating voltage from a transformer secondary winding.
The Smoothing Capacitor
We saw in the previous section that the single phase half-wave rectifier produces an output
wave every half cycle and that it was not practical to use this type of circuit to produce a steady DC
supply. The full-wave bridge rectifier however, gives us a greater mean DC value (0.637 Vmax) with
less superimposed ripple while the output waveform is twice that of the frequency of the input
supply frequency. We can therefore increase its average DC output level even higher by connecting
a suitable smoothing capacitor across the output of the bridge circuit as shown below.

Full-wave Rectifier with Smoothing Capacitor
The smoothing capacitor converts the full-wave rippled output of the rectifier into a smooth
DC output voltage. Generally for DC power supply circuits the smoothing capacitor is an Aluminium
Electrolytic type that has a capacitance value of 100uF or more with repeated DC voltage pulses
from the rectifier charging up the capacitor to peak voltage.
However, there are two important parameters to consider when choosing a suitable
smoothing capacitor and these are its Working Voltage, which must be higher than the no-load
output value of the rectifier and its Capacitance Value, which determines the amount of ripple that
will appear superimposed on top of the DC voltage.
Too low a capacitance value and the capacitor has little effect on the output waveform. But
if the smoothing capacitor is sufficiently large enough (parallel capacitors can be used) and the load
current is not too large, the output voltage will be almost as smooth as pure DC. As a general rule of
thumb, we are looking to have a ripple voltage of less than 100mV peak to peak.
The maximum ripple voltage present for a Full Wave Rectifier circuit is not only determined
by the value of the smoothing capacitor but by the frequency and load current, and is calculated as:

Bridge Rectifier Ripple Voltage
𝐼𝑙𝑜𝑎𝑑
𝑉𝑟𝑖𝑝𝑝𝑙𝑒 =
𝑓∗𝐶
Where: I is the DC load current in amps, ƒ is the frequency of the ripple or twice the input
frequency in Hertz, and C is the capacitance in Farads.
The main advantages of a full-wave bridge rectifier is that it has a smaller AC ripple value
for a given load and a smaller reservoir or smoothing capacitor than an equivalent half-wave
rectifier. Therefore, the fundamental frequency of the ripple voltage is twice that of the AC supply
frequency (100Hz) where for the half-wave rectifier it is exactly equal to the supply frequency
(50Hz).
The amount of ripple voltage that is superimposed on top of the DC supply voltage by the
diodes can be virtually eliminated by adding a much improved π-filter (pi-filter) to the output
terminals of the bridge rectifier. This type of low-pass filter consists of two smoothing capacitors,
usually of the same value and a choke or inductance across them to introduce a high impedance
path to the alternating ripple component
Filter Circuits
A very popular filter circuit is the capacitor-filter circuit shown in Figure 6. A capacitor is
connected at the rectifier output, and a dc voltage is obtained across the capacitor.
Figure 6 Basic Capacitor Filter
Figure 7(a) shows the output voltage of a full-wave rectifier before the signal is filtered,
whereas Figure 7(b) shows the resulting waveform after the filter capacitor is connected at the
rectifier output. Notice that the filtered waveform is essentially a dc voltage with some ripple (or ac
variation).

Figure 7 Capacitor filter operation: (a) full-wave rectifier voltage; (b) filtered output voltage.
Figure 8 (a) shows a full-wave bridge rectifier and the output waveform obtained from the
circuit when connected to a load ( RL ). If no load were connected across the capacitor, the output
waveform would ideally be a constant dc level equal in value to the peak voltage ( Vm ) from the
rectifier circuit. However, the purpose of obtaining a dc voltage is to provide this voltage for use by
various electronic circuits, which then constitute a load on the supply. Since there will always be a
load on the filter output, we must consider this practical case in our discussion.
Figure 8 Capacitor filter: (a) capacitor filter circuit; (b) output voltage waveform
RC Filter and Its Operation

It is possible to further reduce the amount of ripple across a filter capacitor by using an
additional RC filter section as shown in Figure 9. The purpose of the added RC section is to pass
most of the dc component while attenuating (reducing) as much of the ac component as possible.
Figure 10 shows a full-wave rectifier with capacitor filter followed by an RC filter section. The
operation of the filter circuit can be analyzed using superposition for the dc and ac components of
the signal.
Figure 9 RC Filter Stage
Figure 10 Full-wave rectifier and RC filter circuit
Figure 11(a) shows the dc equivalent circuit to use in analyzing the RC filter circuit of Figure 10.
Since both capacitors are open-circuit for dc operation, the resulting output dc voltage is

′ 𝑅𝐿
𝑉𝑑𝑐 = 𝑉
𝑅 + 𝑅𝐿 𝑑𝑐
Figure 11 (a) DC and (b) ac equivalent circuits of RC filter.
Voltage Regulators
 While filters can reduce the ripple from power supplies to a low value, the most effective
approach is a combination of a capacitor-input filter used with a voltage regulator.
 A voltage regulator is connected to the output of a filtered rectifier and maintains a constant
output voltage (or current) despite changes in the input, the load current, or the temperature
 Most regulators are integrated circuits and have three terminals—an input terminal, an
output terminal, and a reference (or adjust) terminal
 •Three-terminal regulators designed for fixed output voltages require only external
capacitors to complete the regulation portion of the power supply
 Filtering is accomplished by a large-value capacitor between the input voltage and ground.
 An output capacitor (typically ) is connected from the output to ground to improve the
transient response.

Voltage Regulation Circuits
There are two common types of circuitry for voltage regulation:

 Discrete Transistors
 Integrated Circuit
Discrete Transistor Regulators Types
 Series voltage regulator
 Current-limiting circuit
 Shunt voltage regulator
Series Voltage Regulator Circuit

The series element controls the amount of the input voltage that gets to the output. If the
output voltage increases (or decreases), the comparator circuit provides a control signal to cause the
series control element to decrease (or increase) the amount of the output voltage.
Figure 12 Series Regulator Block Diagram
A simple series regulator circuit is shown in Figure 13. Transistor Q1 is the series control
element, and Zener diode DZ provides the reference voltage. The regulating operation can be
described as follows:

Figure 13 Series Regulator Circuit
1. If the output voltage decreases, the increased base-emitter voltage causes transistor Q1 to
conduct more, thereby raising the output voltage—maintaining the output constant.
2. If the output voltage increases, the decreased base-emitter voltage causes transistor Q1 to
conduct less, thereby reducing the output voltage—maintaining the output constant.
Improved Series Regulator

An improved series regulator circuit is shown in Figure 14. Resistors R1 and R2 act as a
sampling circuit, with Zener diode DZ providing a reference voltage, and transistor Q2 then controls
the base current to transistor Q1 to vary the current passed by transistor Q1 to maintain the output
voltage constant.
Figure 14 Improved Series Regulator Circuit
Op-Amp Series Regulator

Another type of series regulator is shown in Figure 15. The op-amp compares the Zener
diode reference voltage with the feedback voltage from sensing resistors R1 and R2. If the output

voltage varies, the conduction of transistor Q1 is controlled to maintain the output voltage constant.
The output voltage will be maintained at a value of
𝑅1
𝑉𝑜 = (1 + )𝑉
𝑅2 𝑍
Figure 15 Improved Series Regulator Circuit
Current-Limiting Circuit
One form of short-circuit or overload protection is current limiting, as shown in Figure 16.
As load current IL increases, the voltage drop across the short-circuit sensing resistor RSC increases.
When the voltage drop across RSC becomes large enough, it will drive Q2 on, diverting current from
the base of transistor Q1, thereby reducing the load current through transistor Q1, preventing any
additional current to load RL. The action of components RSC and Q2 limits the maximum load
current.

Figure 16 Current Limiting Voltage Regulator
Shunt Voltage Regulators
A shunt voltage regulator provides regulation by shunting current away from the load to
regulate the output voltage. Figure 17 shows the block diagram of such a voltage regulator.
The input unregulated voltage provides current to the load. Some of the current is pulled
away by the control element to maintain the regulated output voltage across the load. If the load
voltage tries to change due to a change in the load, the sampling circuit provides a feedback signal
to a comparator, which then provides a control signal to vary the amount of the current shunted
away from the load. As the output voltage tries to get larger, for example, the sampling circuit
provides a feedback signal to the comparator circuit, which then provides a control signal to draw
increased shunt current, providing less load current, thereby keeping the regulated voltage from
rising.
Figure 17 Shunt Voltage Regulator Block Diagram

A basic shunt regulator circuit is shown in Figure 18. Resistor RS drops the unregulated
voltage by an amount that depends on the current supplied to the load RL. The voltage across the
load is set by the Zener diode and transistor base-emitter voltage. If the load resistance decreases, a
reduced drive current to the base of Q1 results, shunting less collector current. The load current is
thus larger, thereby maintaining the regulated voltage across the load. The output voltage to the
load is
𝑉𝐿 = 𝑉𝑍 + 𝑉𝐵𝐸
Figure 18 Transistor Shunt Voltage Regulator
IC Voltage Regulators
Voltage regulators comprise a class of widely used ICs. Regulator IC units contain the
circuitry for reference source, comparator amplifier, control device, and overload protection all in a
single IC. Although the internal construction of the IC is somewhat different from that described for
discrete voltage regulator circuits, the external operation is much the same. IC units provide
regulation of either a fixed positive voltage, a fixed negative voltage, or an adjustably set voltage. A
power supply can be built using a transformer connected to the ac supply line to step the ac voltage
to a desired amplitude, then rectifying that ac voltage, filtering with a capacitor and RC filter, if
desired, and finally regulating the dc voltage using an IC regulator. The regulators can be selected for
operation with load currents from hundreds of milliamperes to tens of amperes, corresponding to
power ratings from milliwatts to tens of watts.

Three-Terminal Voltage Regulators
Figure 19 shows the basic connection of a three-terminal voltage regulator IC to a load. The
fixed voltage regulator has an unregulated dc input voltage Vi applied to one input terminal, a
regulated output dc voltage Vo from a second terminal, and the third terminal connected to ground.
For a selected regulator, IC device specifications list a voltage range over which the input voltage can
vary to maintain a regulated output voltage over a range of load current. The specifications also list
the amount of output voltage change resulting from a change in load current (load regulation) or in
input voltage (line regulation).
Figure 19 Block representation of three-terminal voltage regulator
Fixed-Positive-Voltage Regulators
The series 78 regulators provide fixed regulated voltages from 5 V to 24 V. Figure 20 shows
how one such IC, a 7812, is connected to provide voltage regulation with output from this unit of
+12Vdc. An unregulated input voltage Vi is filtered by capacitor C1 and connected to the IC’s IN
terminal. The IC’s OUT terminal provides a regulated +12 V, which is filtered by capacitor C2 (mostly
for any high-frequency noise). The third IC terminal is connected to ground (GND). Whereas the
input voltage may vary over some permissible voltage range and the output load may vary over
some acceptable range, the output voltage remains constant within specified voltage variation limits.
These limitations are spelled out in the manufacturer’s specification sheets. A table of positive-
voltage regulator ICs is provided in Table 1.

Figure 20 Connection of a 7812 voltage regulator
Table 1 Positive-Voltage Regulator in 7800 Series
Positive-Voltage-Regulator Specifications
The specifications sheet of voltage had some consideration of a few of the more important
parameters.
Output voltage: The specification for the 7812 shows that the output voltage is typically +12
V but could be as low as 11.5 V or as high as 12.5 V.
Output regulation: The output voltage regulation is seen to be typically 4 mV, to a maximum
of 100 mV (at output currents from 0.25 A to 0.75 A). This information specifies that the
output voltage can typically vary only 4 mV from the rated 12 Vdc.
Short-circuit output current: The amount of current is limited to typically 0.35 A if the output
were to be short-circuited (presumably by accident or by another faulty component).

Peak output current: Although the rated maximum current is 1.5 A for this series of IC, the
typical peak output current that might be drawn by a load is 2.2 A. This shows that although
the manufacturer rates the IC as capable of providing 1.5 A, one could draw somewhat more
current (possibly for a short period of time).
Dropout voltage: The dropout voltage, typically 2 V, is the minimum amount of voltage across
the input–output terminals that must be maintained if the IC is to operate as a regulator. If
the input voltage drops too low or the output rises so that at least 2 V is not maintained
across the IC input–output, the IC will no longer provide voltage regulation. One therefore
maintains an input voltage large enough to assure that the dropout voltage is provided.
Fixed-Negative-Voltage Regulators
The series 7900 ICs provide negative-voltage regulators, similar to those providing positive
voltages. A list of negative-voltage regulator ICs is provided in Table 2. As shown, IC regulators are
available for a range of fixed negative voltages, the selected IC providing the rated output voltage as
long as the input voltage is maintained greater than the minimum input value. For example, the 7912
provides an output of -12 V as long as the input to the regulator IC is more negative than -14.6 V.
Table 2 Negative-Voltage Regulator in 7900 Series

Summary
 Voltage regulators keep a constant dc output voltage when the input or load varies within
limits.
 Line regulation is the percentage change in the output voltage for a given change in the
input voltage of a regulator.
 Load regulation is the percentage change in output voltage for a given change in load
current.
 A basic voltage regulator consists of a reference voltage source, an error detector, a
sampling element, and a control device. Protection circuitry is also found in most regulators.
 Two basic categories of voltage regulators are linear and switching.
 Two basic types of linear regulators are series and shunt.
 In a linear series regulator, the control element is a transistor in series with the load.
 In a linear shunt regulator, the control element is a transistor in parallel with the load.
 Three configurations for switching regulators are step-down, step-up, and inverting.
 Switching regulators are more efficient than linear regulators and are particularly useful in
low-voltage, high-current applications.
 Three-terminal linear IC regulators are available for either fixed output or variable output
voltages of positive or negative polarities.
 The 78XX series are three-terminal IC regulators with fixed positive output voltage.
 The 79XX series are three-terminal IC regulators with fixed negative output voltage.
 The LM317 is a three-terminal IC regulator with a positive variable output voltage.
 The LM337 is a three-terminal IC regulator with a negative variable output voltage.
 An external pass transistor increases the current capability of a regulator.
True or False Quiz

1. Line regulation is a measure of how constant the output voltage is for a given change in
the input voltage.
2. Load regulation depends on the amount of power dissipated in the load.
3. Linear and switching are two main categories of voltage regulators.
4. Two types of linear regulator are series and bypass.
5. Three types of switching regulator are step-down, step-up, and inverting.
6. The three terminals of a 78XX series regulator are input, output, and control.

7. An external bypass transistor is sometimes used to increase the current capability of a
regulator.
8. Current limiting is used to protect the external bypass transistor.
9. The purpose of a heat sink is to help the regulator dissipate excessive heat.
10. A variable pulse-width modulator is part of a linear voltage regulator.
References
Floyd, T. L. (2012). Electronic Devices: Conventional Current Version (9th ed.). Jurong,
Singapore: Pearson Education South Asia Pte Ltd.

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MODULES

Asso. Prof. DIVINA GRACIA D. RONQUILLO

MODULE 1 - Introduction to Semiconductors

 Become aware of the general characteristics of three important semiconductor

It is noteworthy that nowadays, systems are incredibly smaller, current speeds of

The Vacuum Tube

Electronic Circuits: Devices and Analysis 1

The Integrated Circuit

The first integrated circuit, a phase-shift oscillator, invented by J. S. Kilby in 1958

Electronic Circuits: Devices and Analysis 2

1. Communication Electronics – this includes AM and FM radio, television and satellite

Semiconductor Materials: GE, Si, and GaAs

Electronic Circuits: Devices and Analysis 3

Electronic Circuits: Devices and Analysis 4

Covalent bonding of GaAs crystal

Electronic Circuits: Devices and Analysis 5

Relative Mobility Factor, μN

A change in temperature of a semiconductor material can increase the number of free

Electronic Circuits: Devices and Analysis 6

Extrinsic Semiconductors: N-Type and P-Type

Electronic Circuits: Devices and Analysis 7

Antimony impurity in an n-type material

Electronic Circuits: Devices and Analysis 8

Effect of donor impurities on the energy band structure

Majority and Minority Carriers

Electronic Circuits: Devices and Analysis 9

Majority and Minority Carriers

Effect of the hole conduction

Electronic Circuits: Devices and Analysis 10

Electronic Circuits: Devices and Analysis 11

The Internal Barrier Potential Vb

Electronic Circuits: Devices and Analysis 12

Important Conclusions and Concepts

End of Module Questions:

Electronic Circuits: Devices and Analysis 13

Electronic Circuits: Devices and Analysis 14

Electronic Circuits: Devices and Analysis 15

Diode and Diode Applications by ALL ABOUT ELECTRONICS

Electronic Circuits: Devices and Analysis 16

 Develop a clear understanding of the basic operation and characteristics of a diode in

A diode has three operating conditions:

a) No(Zero) Bias – no external force is applied.

Electronic Circuits: Devices and Analysis 1

The Effect of Forward Bias on the Depletion Region

Electronic Circuits: Devices and Analysis 2

c) Reverse Bias Condition

A reverse bias condition is established by applying external potential of V volts across

Electronic Circuits: Devices and Analysis 3

Electronic Circuits: Devices and Analysis 4

Summary of Diode Bias

The application of a dc voltage to a circuit containing a semiconductor diode will result in an

Electronic Circuits: Devices and Analysis 5

Defining the dynamic or ac resistance. Determining the ac resistance at a Q-point.

Electronic Circuits: Devices and Analysis 6

where Δ signifies a finite change in the quantity.

Determining the average ac resistance between indicated limits.

A. Ideal Diode Model

(a) forward bias; (b) reverse bias

Electronic Circuits: Devices and Analysis 7

Ideal Diode Model and Characteristics

Ideal versus actual semiconductor characteristics.

B. Practical or Actual Diode (Piecewise Linear Model)

Electronic Circuits: Devices and Analysis 8

Defining the piecewise-linear equivalent circuit using straight-line segments