OPERATING SYSTEM

ASSIGNMENT

TOPIC: UNDERSTANDING THE VARIOUS COMPUTER ARCHITECTURES

INTEL WINDOWS:

The Intel 32/64 Architecture is based on the x86 instruction set, which is a
complex instruction set computer (CISC) architecture. The operating system
interacts with the hardware using system calls,which are software interrupts that
transfer control from the user-mode user-mode application to the kernel-mode
application.

The MMU supports virtual memory, which allows the operating system to allocate
more memory than is physically available by swapping memory pages to disk.
The Intel 32/64 Architecture also supports hardware memory protection, which
allows the operating system to protect memory regions from unauthorized
access.

Intel Memory Management:

The memory management facilities of the IA-32 architecture are divided into two
parts:

Segmentation:
Segmentation provides a mechanism of isolating individual code, data, and stack
modules so that multiple programs (or tasks) can run on the same processor
without interfering with one another. When operating in protected mode, some
form of segmentation must be used.

Paging:
Paging provides a mechanism for implementing a conventional demand-paged,
virtual-memory system where sections of a program’s execution environment are
mapped into physical memory as needed. Paging can also be used to provide
isolation between multiple tasks.
These two mechanisms (segmentation and paging) can be configured to support
simple single program (or single-task) systems, multitasking systems, or multiple-
processor systems that use shared memory.

Overall, the Intel 32/64 Architecture is designed to be flexible and powerful,

providing a wide range of features and capabilities to support modern operating
systems and applications.
ARM Model Architecture

The ARM model architecture system's operating system uses below given set of
instructions

1. Instruction Set Architecture (ISA)

The ISA is the interface between the hardware and software of the system

ARM processors use a RISC-based ISA, which uses a smaller set of instructions
that are executed faster

Example: The ARMv8-A ISA is used in processors like the Qualcomm

Snapdragon 855 and Apple A12 Bionic

2. Processor Core

The processor core is the main processing unit that executes instructions ARM
processors have a pipeline architecture, which means that multiple instructions
can be executed simultaneously

Example: The ARM Cortex-A76 core is used in processors like the Samsung
Exynos 9820 and HiSilicon Kirin 980

3. Memory Management Unit (MMU)

The MMU manages memory access and translation between virtual and physical
addresses
ARM processors use a two-level translation table hierarchy to manage memory
Example: The MMU in ARM processors is used to manage virtual memory in
operating systems like
Android and iOS

4. Cache

The cache is a small amount of memory used to store frequently accessed data
ARM processors use a multi-level cache hierarchy to speed up execution
Example: The L1 cache in the ARM Cortex-A78 core is 64 KB, while the L2
cache is 512 KB

5. System Interface

The system interface connects the processor to other components in the system
ARM processors use various system interfaces, including AMBA, AXI, and AHB
Example: The AMBA (Advanced Microcontroller Bus Architecture) system
interface is used in ARM-based SoCs (system-on-chips)

6. Operating Modes

ARM processors support various operating modes, including user mode, system
mode, and privileged modes

The processor can switch between these modes to handle different tasks and
access different resources Example: Privileged modes are used by the operating
system to manage system resources, while user mode is used by applications to
run code Overall, the ARM model architecture system is designed to be efficient,
flexible, and customizable making it an ideal choice for a wide range of electronic
devices

ORACLE SOLARIS:

Solaris is a Unix operating system originally developed by Sun Microsystems.

Solaris is known for its scalability especially on SPARC systems and for
originating many innovative features such as DTrace, ZFS and Time Slider.

Solaris supports SPARC-based and x-86 based workstation and servers from
Sun and other vendors.

Solaris has a reputation for being well-suited to symmetric multiprocessing,

supporting a large number of CPUs.

Programmed in C.

Its source model is Mixed open source/closed

Solaris Memory Architecture:

Physical memory is divided into fixed-sized pieces. called pages.

The size of the page varies from platform to platform.

The common size is 8 Kbytes.

Each page is associated with a file and offset.

The file and offset identify the backing store for the page.

Solaris Memory Management:

Two basic types of memory management manage the allocation and migration of
physical pages of memory to and from swap space

1.Swapping

2.Demand paging

The VM system uses a global paging model that implements a single global
policy to manage the allocation of memory between the processes.
Swapping:

The swapping algorithm uses user process as the granularity for managing
memory.

If there is a shortage of memory, then all the pages of the least active process
will be swapped out to the swap device, freeing memory for other
processes.

Then the corresponding flag in the process table is set to indicate that this
process has been swapped out.

Demand paging:

The Demand paging model uses a page as the granularity for memory
management.

Pages of memory are allocated on demand.

When memory is first referenced, a page fault occurs and memory is allocated
one page at a time.

The page scanner and the virtual memory page fault mechanism are the core of
the demand paged memory management.