Description of signals in 8051

8051 is available in a 40-pin plastic and DIP package. The pin diagram is shown below.

• 2-pins are dedicated to power supply (40 & 20)

• 2-pins are used for oscillator connection (Crystal Connections)
• 32-pin for digital I/O or for an alternate function.
• 4-pin are used for control signals (𝑅𝑆𝑇, ̅̅̅̅ ̅̅̅̅̅̅̅̅ )
𝐸𝐴 , 𝐴𝐿𝐸, 𝑃𝑆𝐸𝑁

𝑉𝐶𝐶 Power supply of +5V

𝑉𝑆𝑆 𝑜𝑟 𝐺𝑁𝐷 Ground pin. All Voltages are measured with reference to this pin
𝑋𝑇𝐴𝐿1 Input to the Amplifier in Oscillator.
𝑋𝑇𝐴𝐿2 Output of the Amplifier in Oscillator.
The two pins are used to connect the crystal/tank circuit externally.
𝑹𝑺𝑻 Reset input.
8051 resets by holding the RST input high for at least 2 M/C. Power on
reset and Manual reset circuits are connected to this pin.
When microcontroller resets, Program Counter (PC) is cleared (PC=0000H) and
Stack Pointer (SP) is set to 07H.

PC=0000H after reset

SP=07H after reset. So, by default the stack starts from 08H onwards

̅̅̅̅
𝐸𝐴/𝑉𝑃𝑃 External Access/ Programming Voltage
This is a low active input signal. When the pin is grounded, microcontroller
ignores the on-chip ROM and starts execution from external ROM. When input is
high, program execution starts from internal ROM and after that it executes from
external ROM. When external ROM is not present, it is connected to +5V supply.
This pin is connected to 21V during programming of the chip.

̅̅̅̅̅̅̅̅
𝑷𝑺𝑬𝑵 Program Store Enable
This is a low active output signal. This signal goes low when the microcontroller
read an instruction from external ROM. So, this pin is connected to ̅̅̅̅
𝑂𝐸 (Output
Enable) of external ROM and used as read stobe for external ROM..

𝑨𝑳𝑬 Address Latch Enable

This is an active high output signal available during T1. Used to latch the low address
byte available in PORT-0 during external memory access (either RAM or ROM). Used to
demultiplex address data bus by latching the lower byte of address (available during T1)
in an external latch.

IO Ports:
• 32 IO lines are available in 8051.
• The lines are arranged as four 8-bit IO ports.
• Ports are bit as well as byte addressable. Individual pin can be used as IO lines or can be
used as 8-bit port for parallel data transfer.
• Each port line consists of a latch and a driver.
• Due to fixed load or pull up resistor, maximum current a port can deliver (source) is
5mA.
• The maximum input current a port pin can sink (draw) is tens of micro-ampere.
• The sink current is quite more than sourcing current.
• To configure an input lines line as input, its latch must be written with bit 1.
• When used as output line, the data is written to the corresponding latch.
• When used as input lines, status of IO pin is read.
 • When some specific features of processor are used, ports may be used for some
alternate function and at that case that lines can’t be used as io lines
• Port-0 has an open drain output (for io
operations), whereas other ports have internal
pull up resistor.
• So, pull up registers of 10kΩ are connected
externally to the pins as shown in the figure.
• PORT0 and PORT2 are also used to interface
external memory. In such case external pull up
resistors are not required for PORT-0.
• PORT3 is used for control signal generation, serial
communication, timer input and external interrupt purpose.

Port Pin Function Description

RXD is Serial asynchronous communication input

P3.0 10 RXD or
Serial synchronous communication output.
TXD is Serial asynchronous communication output
P3.1 11 TXD or
Serial synchronous communication clock output.
P3.2 12 ̅̅̅̅̅̅̅
𝐼𝑁𝑇0 External Interrupt-0 input
P3.3 13 ̅̅̅̅̅̅̅
𝐼𝑁𝑇1 External Interrupt-1 input
P3.4 14 T0 Timer/Counter 0 external input
P3.5 15 T1 Timer/Counter 1 external input
P3.6 16 ̅̅̅̅̅
𝑊𝑅 WRITE control signal for external Data Memory
P3.7 17 ̅̅̅̅
𝑅𝐷 READ control signal for external Data Memory
• PORT-1 does not have any alternate function.