Lecture 25

Read Only Memory (ROM)

Introduction
• RAM: Random Access Memory
• ROM: Read Only Memory
• Write operation: Storing info into memory
• Read operation: Transferring info out of the memory
• RAM can perform both Write and Read operations
• ROM is a Programmable Logic Device (PLD) that can be written once and
can only be read afterwards
• PLA: Programmable Logic Array
• PAL: Programmable Array Logic
• FPGA: Field Programmable Gate Array
Read-Only Memory (ROM)
• An array of semiconductor devices
• diodes
• transistors
• field effect transistors
• Data can be read but not changed
• (normal operating conditions)
Data is written to the ROM once, and read from the ROM many
times.

A read-only memory (ROM) consists of an array of semiconductor devices that are

interconnected to store a set of binary data.
Once binary data is stored in the ROM, it can be read out whenever desired, but the
data that is stored cannot be changed under normal operating conditions.
ROMs vs. RAMs
• There are some important differences between ROM and
RAM.
• ROMs are “non-volatile”—data is preserved even without power.
On the other hand, RAM contents disappear once power is lost.
• ROMs require special (and slower) techniques for writing, so
they’re considered to be “read-only” devices.
• Some newer types of ROMs do allow for easier writing,
although the speeds still don’t compare with regular RAMs.
• MP3 players, digital cameras and other toys use Compact Flash,
Secure Digital, or Memory Stick cards for non-volatile storage.
• Many devices allow you to upgrade programs stored in “flash
ROM.”
ROM
• You can think of a ROM as a combinational circuit that takes an
address as input, and produces some data as the output.
• A ROM table is basically just a truth table.
• The table shows what data is stored at each ROM address.
• You can generate that data combinationally, using the address as
the input.

Address Data
A 2 A 1A 0 V2V1V0
000 000
001 100
010 110
011 100
100 101
101 000
110 011
111 011
 Types Of ROMs
• Mask ROM
• Connections made by the semiconductor vendor
• Expensive setup cost, Several weeks for delivery. High volume only
• Bipolar or MOS technology

• PROM
• Programmable ROM
• Vaporize (blow) fusible links with PROM programmer using high voltage/current pulses
• Bipolar technology
• One-time programmable

• EPROM
• Erasable Programmable ROM
• Charge trapped on extra “floating gate” of MOS transistors
• Exposure to UV light removes charge. Limited number of erasures (10-100)

• EEPROM (E2ROM)
• Electrically Erasable ROM
• Not RAM (relatively slow charge/discharge)
• limited number of charge/discharge cycles (10,000)

• Flash Memory
• Electronically erasable in blocks
• 100,000 erase cycles
• Simpler and denser than EEPROM
PROM
EPROM
Storing data in the memory requires selecting a given address and applying a
higher voltage to the transistors. This creates an avalanche discharge of
electrons, which have enough energy to pass through the insulating oxide
layer and accumulate on the gate electrode. When the high voltage is
removed, the electrons are trapped on the electrode.[4] Because of the high
insulation value of the silicon oxide surrounding the gate, the stored charge
cannot readily leak away and the data can be retained for decades.
EEPROM
Lecture 26
Introduction
• RAM: Random Access Memory
• ROM: Read Only Memory
• Write operation: Storing info into memory
• Read operation: Transferring info out of the memory
• RAM can perform both Write and Read operations
• ROM is a Programmable Logic Device (PLD) that can be written once and
can only be read afterwards
• PLA: Programmable Logic Array
• PAL: Programmable Array Logic
• FPGA: Field Programmable Gate Array
Flash Memory
Flash memory
Programmable Logic Array (PLA):
Programmable Logic Array (PLA)
• PLA is a programmable logic device that has both
Programmable AND array & Programmable OR array.
Hence, it is the most flexible PLD. The block
diagram of PLA is shown in the following figure.

• The inputs of AND gates are programmable. That means each AND gate has both normal and
complemented inputs of variables. So, based on the requirement, we can program any of those inputs.
So, we can generate only the required product terms by using these AND gates.

• The inputs of OR gates are also programmable. So, we can program any number of required product
terms, since all the outputs of AND gates are applied as inputs to each OR gate. Therefore, the outputs
of PAL will be in the form of sum of products form.
Example
Let us implement the following Boolean functions using
PLA.

The given two functions are in sum of products form. The number of product terms present in the given Boolean
functions A & B are two and three respectively. One product term, Z′X is common in each function.

So, we require four programmable AND gates & two

programmable OR gates for producing those two
functions. The corresponding PLA is shown in the
following figure

The programmable AND gates have the access of both normal

and complemented inputs of variables. In the above figure, the
inputs X, X′, Y, Y′, Z & Z′, are available at the inputs of each
AND gate. So, program only the required literals in order to
generate one product term by each AND gate.

All these product terms are available at the inputs of each

programmable OR gate. But, only program the required product
terms in order to produce the respective Boolean functions by
each OR gate. The symbol ‘X’ is used for programmable
connections.
Programmable Array Logic (PAL):
Example
Let us implement the following Boolean functions using PAL.

The given two functions are in sum of products form. There are two product terms present in each Boolean
function. So, we require four programmable AND gates & two fixed OR gates for producing those two functions.
The corresponding PAL is shown in the following figure.

• The inputs of AND gates are programmable. That

means each AND gate has both normal and
complemented inputs of variables. So, based on the
requirement, we can program any of those inputs. So,
we can generate only the required product terms by
using these AND gates.

• The inputs of OR gates are not of programmable type.

So, the number of inputs to each OR gate will be of
fixed type.

• Hence, apply those required product terms to each OR

gate as inputs. Therefore, the outputs of PAL will be in
the form of sum of products form.
Random Access Memory (RAM):
Dynamic RAM (DRAM)Construction and Operation :
• During a read or write, the wordline goes
high and the transistor connects the
capacitor to the bitline.

• Whatever value is on the bitline ('1' or '0')

gets stored or retrieved from the capacitor.

• The charge stored on each capacitor is too

small to be read directly and is instead
measured by a circuit called a sense
amplifier. The sense amplifier detects the
minute differences in charge and outputs
the corresponding logic level.
• The act of reading from the bitline forces the charge to flow out of the capacitor.
Thus, in DRAM, reads are destructive. To get around this, an operation known as
precharging is done to put the value read from the bitline back into the capacitor.

• Equally problematic is the fact that the capacitors leak charge over time.

• Therefore, to maintain the data stored in memory the capacitors must be

refreshed periodically.
Lecture 27
Introduction
• RAM: Random Access Memory
• ROM: Read Only Memory
• Write operation: Storing info into memory
• Read operation: Transferring info out of the memory
• RAM can perform both Write and Read operations
• ROM is a Programmable Logic Device (PLD) that can be written once and
can only be read afterwards
• PLA: Programmable Logic Array
• PAL: Programmable Array Logic
• FPGA: Field Programmable Gate Array
A4=0

A4=1