Collage of Electrical & Mechanical

Engineering, NUST
DE-43 MTS-B
EE-223 Digital Logic Design

Lab Report: Latches

Submitted by:
NC Sajid Ali
366087
NC Muhammad Farrukh bin Bashir
398565

Submitted to: LE Adnan Shujah

Abstracts
In this lab, we explored the behavior of SR latches, a type of bistable latch circuit, in the context
of logic design. SR latches are a fundamental building block in digital circuits and are used to
store and transmit data. We implemented SR latches using both NAND gates and NOR gates and
observed their behavior under different input conditions. Overall, this lab provided a valuable
opportunity to gain hands-on experience with SR latches and to understand their role in digital
circuit design.

Objectives
The objective of this lab was to gain hands-on experience with SR latches and to understand their
behavior and use in digital circuit design. Specifically, the goals of this lab were to:
 Implement SR latches using NAND gates.
 Implement SR latches using NOR gates.
 Observe the behavior of SR latches under different input conditions
 Explore the role of feedback in the operation of SR latches

Equipment Required
 ICs (integrated circuits)
 Connecting wires
 Bread board
 DLD trainer board
 Power Source

Procedures
Task 01: Designing SR-Latches
An SR latch, also known as a bistable latch, is a type of digital circuit that has two stable states,
"set" and "reset". It is called a latch because it can hold or latch onto one of these states
indefinitely, until the input conditions are changed. SR latches are used in a variety of digital
circuits as a means of storing and transmitting data. They are particularly useful for creating
circuits that need to remember their state even when the input conditions are changing.

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Figure 1 SR latch using NOR GATE Figure 2 SR Latch using NAND GATE

Truth Table
S R Q Q’ R Q Q’
S
0 0 Retained 0 0 Not used
0 1 0 1 0 1 1 0
1 0 1 0 1 0 0 1
1 1 Not used 1 1 Retained
Table 1 SR Latch using NOR Table 2 SR Latch using NAND GATE
GATE

Implementation

Figure 3 SR latch lab implementation

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Task 02: Gated SR latch
A gated SR latch is a type of SR latch that has additional inputs, called "enable" or "gate" inputs,
which control the operation of the latch. The enable inputs allow the latch to be turned on or off,
depending on the level of the enable signal. Gated SR latches are useful in situations where it is
necessary to temporarily disable the operation of an SR latch without changing its state. They
can also be used to create more complex circuits by combining multiple SR latches with different
enable inputs.

Figure 3 Gated SR Latches using NOR gate

Truth Table
Enable S R Q Q’
0 0 0 Latch
0 0 1 Latch
0 1 0 Latch
0 1 1 Latch
1 0 0 Latch
1 0 1 0 1
1 1 0 1 0
1 1 1 Metastable
Table 2 Gated SR Latch using NOR Gate

Implementation

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 Figure 4 Gated SR latch lab implementation

Task 03: D-Latch

A D latch, also known as a data latch, is a type of digital circuit that is used to store and
transmit data. It is similar to an SR latch in that it has two stable states and is able to hold onto
one of these states indefinitely, until the input conditions are changed. However, unlike an SR
latch, which has separate set and reset inputs, a D latch has a single data input (D) that controls
its state.

Figure 4 D-Latch using NOR gate

Truth Table
Enable D Q Q’
0 0 Latch
0 1 Latch
1 0 0 1
1 1 1 1
Table 4 D-Latch using NOR GATE

Implementation

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 Figure 5 D-Latch lab implementation

Result
We successfully implemented SR latches using both NAND gates and NOR gates and verified
their behavior using truth tables and implementation. We observed that the SR latch has two
stable states, "set" and "reset", and that it can hold onto one of these states indefinitely until the
input conditions are changed. We explored the role of feedback in the operation of SR latches
and the importance of proper timing in their design. We were able to apply what we learned to
design and implement functional circuits, and we gained a deeper understanding of the role of
latches in digital logic.

Conclusion
In conclusion, the lab on SR latches was a valuable learning experience that helped us to
understand the behavior and use of these important circuits in digital logic. We were able to
implement latches such as SR latch, gated latch and D-latch using both NAND gates and NOR
gates and observe their behavior under different input conditions. We also explored the role of
feedback in the operation of latches and the importance of proper timing in their design. Through
this lab, we gained hands-on experience with latches and were able to apply our knowledge to
design and implement functional circuits.

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