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BUK662R5-30C

N-channel TrenchMOS intermediate level FET


Rev. 2 — 14 October 2010 Product data sheet

1. Product profile

1.1 General description


Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET)
in a plastic package using advanced TrenchMOS technology. This product has been
designed and qualified to the appropriate AEC Q101 standard for use in high performance
automotive applications.

1.2 Features and benefits


„ AEC Q101 compliant „ Suitable for thermally demanding
„ Suitable for intermediate level gate environments due to 175 °C rating
drive sources

1.3 Applications
„ 12 V Automotive systems „ Start-Stop micro-hybrid applications
„ Electric and electro-hydraulic power „ Transmission control
steering „ Ultra high performance power
„ Motors, lamps and solenoid control switching

1.4 Quick reference data


Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V
voltage
ID drain current VGS = 10 V; Tmb = 25 °C; [1] - - 100 A
see Figure 1
Ptot total power Tmb = 25 °C; see Figure 2 - - 204 W
dissipation
Static characteristics
RDSon drain-source VGS = 10 V; ID = 25 A; - 2.4 2.8 mΩ
on-state Tj = 25 °C; see Figure 11
resistance
NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

Table 1. Quick reference data …continued


Symbol Parameter Conditions Min Typ Max Unit
Avalanche ruggedness
EDS(AL)S non-repetitive ID = 100 A; Vsup ≤ 30 V; - - 501 mJ
drain-source RGS = 50 Ω; VGS = 10 V;
avalanche energy Tj(init) = 25 °C; unclamped
Dynamic characteristics
QGD gate-drain charge ID = 25 A; VDS = 24 V; - 33.3 - nC
VGS = 10 V; see Figure 13;
see Figure 14

[1] Continuous current is limited by package.

2. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 G gate
mb D
2 D drain
3 S source
G
mb D mounting base; connected to
drain mbb076 S
2
1 3

SOT404 (D2PAK)

3. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
BUK662R5-30C D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 2 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 30 V
VGS gate-source voltage DC [1] -16 16 V
Pulsed [2] -20 20 V
ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 [3] - 100 A
Tmb = 100 °C; VGS = 10 V; see Figure 1 [3] - 100 A
IDM peak drain current Tmb = 25 °C; tp ≤ 10 µs; pulsed; - 783 A
see Figure 3
Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 204 W
Tstg storage temperature -55 175 °C
Tj junction temperature -55 175 °C
Source-drain diode
IS source current Tmb = 25 °C [3] - 100 A
ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 783 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source ID = 100 A; Vsup ≤ 30 V; RGS = 50 Ω; - 501 mJ
avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped
EDS(AL)R repetitive drain-source [4][5][6] - - J
avalanche energy

[1] -16V accumulated duration not to exceed 168 hrs.


[2] Accumulated pulse duration not to exceed 5 mins.
[3] Continuous current is limited by package.
[4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[5] Repetitive avalanche rating limited by an average junction temperature of 170 °C.
[6] Refer to application note AN10273 for further information.

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 3 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

003aae559 03na19
200 120
ID
(A) Pder
160 (%)

80
120

(1)

80
40

40

0 0
0 50 100 150 200 0 50 100 150 200
Tmb (°C) Tmb (°C)

Fig 1. Continuous drain current as a function of Fig 2. Normalized total power dissipation as a
mounting base temperature function of mounting base temperature

003aae530
103
ID
Limit RDSon = V DS / ID
(A) tp =10 μ s

102 100 μ s

DC 1 ms
10

10 ms
100 ms
1

10-1
10-1 1 10 102
V DS (V)

Tmb = 25°C; IDM is a single pulse


Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 4 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance see Figure 4 - - 0.74 K/W
from junction to
mounting base

003aae531
1

Zth(j-mb) δ = 0.5
(K/W)
0.2

10−1 0.1
0.05

0.02
tp
P δ=
10−2 T
single shot

tp t
T
10−3
10−6 10−5 10−4 10−3 10−2 10−1 tp (s) 1

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 5 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V
breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V
VGS(th) gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.8 2.3 2.8 V
voltage see Figure 9; see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C; - - 3.3 V
see Figure 10
ID = 2.5 mA; VDS = VGS; Tj = 175 °C; 0.8 - - V
see Figure 10
IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA
VDS = 30 V; VGS = 0 V; Tj = 175 °C - - 500 µA
IGSS gate leakage current VDS = 0 V; VGS = 20 V; Tj = 25 °C - 2 100 nA
VDS = 0 V; VGS = -20 V; Tj = 25 °C - 2 100 nA
RDSon drain-source on-state VGS = 10 V; ID = 25 A; Tj = 25 °C; - 2.4 2.8 mΩ
resistance see Figure 11
VGS = 4.5 V; ID = 25 A; Tj = 25 °C; - 3.6 4.8 mΩ
see Figure 11
VGS = 5 V; ID = 25 A; Tj = 25 °C; - 3.1 3.9 mΩ
see Figure 11
VGS = 10 V; ID = 25 A; Tj = 175 °C; - - 5.3 mΩ
see Figure 12; see Figure 11
Dynamic characteristics
QG(tot) total gate charge ID = 25 A; VDS = 24 V; VGS = 10 V; - 114 - nC
see Figure 13; see Figure 14
ID = 25 A; VDS = 24 V; VGS = 5 V; - 66 - nC
see Figure 13; see Figure 14
QGS gate-source charge ID = 25 A; VDS = 24 V; VGS = 10 V; - 18 - nC
QGD gate-drain charge see Figure 13; see Figure 14 - 33.3 - nC
Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; - 5216 6960 pF
Coss output capacitance Tj = 25 °C; see Figure 15 - 896 1100 pF
Crss reverse transfer - 537 740 pF
capacitance
td(on) turn-on delay time VDS = 25 V; RL = 1 Ω; VGS = 10 V; - 22 - ns
tr rise time RG(ext) = 10 Ω - 59 - ns
td(off) turn-off delay time - 209 - ns
tf fall time - 113 - ns
LD internal drain from upper edge of drain mounting base - 3.5 - nH
inductance to centre of die; Tj = 25 °C
LS internal source from source lead to source bond pad; - 7.5 - nH
inductance Tj = 25 °C

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 6 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

Table 6. Characteristics …continued


Symbol Parameter Conditions Min Typ Max Unit
Source-drain diode
VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; - 0.8 1.2 V
see Figure 16
trr reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; - 50 - ns
Qr recovered charge VDS = 25 V - 73 - nC

003aae532 003aae780
150 240
gfs 10.0 6.0 5.0
ID VGS (V) = 4.5
(S)
(A)
120
180

90

120 4.0

60
3.8

60 3.6
30
3.4

3.2
0 0
0 30 60 90 120 150 0 0.5 1 1.5 2
ID (A) VDS (V)

Tj = 25°C; VDS = 25 V

Fig 5. Forward transconductance as a function of Fig 6. Output characteristics: drain current as a


drain current; typical values function of drain-source voltage; typical values

003aae781 003aae783
200 10
RDSon
ID
(mΩ)
(A)
8
150

100

50
Tj = 175 °C Tj = 25 °C 2

0 0
0 2 4 6 0 5 10 15 20
VGS (V) VGS (V)

Fig 7. Transfer characteristics: drain current as a Fig 8. Drain-source on-state resistance as a function
function of gate-source voltage; typical values of gate-source voltage; typical values

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 7 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

003aad806 003aae542
10-1 4
ID VGS(th)
(A) (V)
10-2
3 max @1mA

min typ max


10-3

2 typ @1mA
-4
10

min @2.5mA
1
10-5

10-6 0
0 1 2 3 4 -60 0 60 120 180
VGS (V) Tj (°C)

Fig 9. Sub-threshold drain current as a function of Fig 10. Gate-source threshold voltage as a function of
gate-source voltage junction temperature

003aae782 03aa27
10 2
RDSon VGS (V) = 3.8 4.0 4.5
(mΩ) a
8
1.5

1
5.0
4
6.0
0.5
2 10.0

0 0
0 60 120 180 240 −60 0 60 120 180
ID (A) Tj (°C)

Fig 11. Drain-source on-state resistance as a function Fig 12. Normalized drain-source on-state resistance
of drain current; typical values factor as a function of junction temperature

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 8 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

003aae537
10
VGS
(V)
VDS 8

ID
6
VGS(pl) VDS = 14 V

VDS = 24 V
VGS(th) 4

VGS
QGS1 QGS2 2

QGS QGD
QG(tot)
0
003aaa508 0 30 60 90 120
QG (nC)

Tj = 25°C and ID = 25 A
Fig 13. Gate charge waveform definitions Fig 14. Gate-source voltage as a function of gate
charge; typical values

003aae538 003aae540
104 150
IS
C (A)
Ciss
(pF)
120

90

103 Coss

Crss 60
Tj = 175 °C

30
Tj = 25 °C

102 0
10−2 10−1 1 10 102 0 0.3 0.6 0.9 1.2
VDS (V) VSD (V)

VGS = 0 V; f = 1 MHz VGS = 0 V


Fig 15. Input, output and reverse transfer capacitances Fig 16. Source (diode forward) current as a function of
as a function of drain-source voltage; typical source-drain (diode forward) voltage; typical
values values

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 9 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

7. Package outline

Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404

E A1

D1 mounting
base

HD

Lp
1 3

b c

e e Q

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)


D
UNIT A A1 b c D1 E e Lp HD Q
max.

mm 4.50 1.40 0.85 0.64 11 1.60 10.30 2.54 2.90 15.80 2.60
4.10 1.27 0.60 0.46 1.20 9.70 2.10 14.80 2.20

OUTLINE REFERENCES EUROPEAN


ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

05-02-11
SOT404
06-03-16

Fig 17. Package outline SOT404 (D2PAK)

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 10 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

8. Revision history
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK662R5-30C v.2 20101014 Product data sheet - BUK662R5-30C v.1
Modifications: • Status changed from objective to product.
BUK662R5-30C v.1 20100923 Objective data sheet - -

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 11 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

9. Legal information

9.1 Data sheet status


Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.

9.2 Definitions Suitability for use in automotive applications — This NXP


Semiconductors product has been qualified for use in automotive
Draft — The document is a draft version only. The content is still under applications. The product is not designed, authorized or warranted to be
internal review and subject to formal approval, which may result in suitable for use in medical, military, aircraft, space or life support equipment,
modifications or additions. NXP Semiconductors does not give any nor in applications where failure or malfunction of an NXP Semiconductors
representations or warranties as to the accuracy or completeness of product can reasonably be expected to result in personal injury, death or
information included herein and shall have no liability for the consequences of severe property or environmental damage. NXP Semiconductors accepts no
use of such information. liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
Short data sheet — A short data sheet is an extract from a full data sheet customer’s own risk.
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and Quick reference data — The Quick reference data is an extract of the
full information. For detailed and full information see the relevant full data product data given in the Limiting values and Characteristics sections of this
sheet, which is available on request via the local NXP Semiconductors sales document, and as such is not complete, exhaustive or legally binding.
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail. Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
Product specification — The information and data provided in a Product representation or warranty that such applications will be suitable for the
data sheet shall define the specification of the product as agreed between specified use without further testing or modification.
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however, Customers are responsible for the design and operation of their applications
shall an agreement be valid in which the NXP Semiconductors product is and products using NXP Semiconductors products, and NXP Semiconductors
deemed to offer functions and qualities beyond those described in the accepts no liability for any assistance with applications or customer product
Product data sheet. design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
9.3 Disclaimers customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
Limited warranty and liability — Information in this document is believed to applications and products.
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or NXP Semiconductors does not accept any liability related to any default,
completeness of such information and shall have no liability for the damage, costs or problem which is based on any weakness or default in the
consequences of use of such information. customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
In no event shall NXP Semiconductors be liable for any indirect, incidental, testing for the customer’s applications and products using NXP
punitive, special or consequential damages (including - without limitation - lost Semiconductors products in order to avoid a default of the applications and
profits, lost savings, business interruption, costs related to the removal or the products or of the application or use by customer’s third party
replacement of any products or rework charges) whether or not such customer(s). NXP does not accept any liability in this respect.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
Notwithstanding any damages that customer might incur for any reason damage to the device. Limiting values are stress ratings only and (proper)
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards operation of the device at these or any other conditions above those given in
customer for the products described herein shall be limited in accordance the Recommended operating conditions section (if present) or the
with the Terms and conditions of commercial sale of NXP Semiconductors. Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
Right to make changes — NXP Semiconductors reserves the right to make the quality and reliability of the device.
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without Terms and conditions of commercial sale — NXP Semiconductors
notice. This document supersedes and replaces all information supplied prior products are sold subject to the general terms and conditions of commercial
to the publication hereof. sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 12 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

agreement is concluded only the terms and conditions of the respective


agreement shall apply. NXP Semiconductors hereby expressly objects to
9.4 Trademarks
applying the customer’s general terms and conditions with regard to the Notice: All referenced brands, product names, service names and trademarks
purchase of NXP Semiconductors products by customer. are the property of their respective owners.

No offer to sell or license — Nothing in this document may be interpreted or Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
construed as an offer to sell products that is open for acceptance or the grant, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
conveyance or implication of any license under any copyrights, patents or ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
other industrial or intellectual property rights. QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior HD Radio and HD Radio logo — are trademarks of iBiquity Digital
authorization from national authorities. Corporation.

10. Contact information


For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

BUK662R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 2 — 14 October 2010 13 of 14


NXP Semiconductors BUK662R5-30C
N-channel TrenchMOS intermediate level FET

11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5
6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
9.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10 Contact information. . . . . . . . . . . . . . . . . . . . . .13

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2010. All rights reserved.


For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 October 2010
Document identifier: BUK662R5-30C

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