(Note:- The paper-setters (or Moderator) are requested to see that the questions set and changes

made are written in a clear and legible hand so that no printing errors occur in printing copies of
question papers)

Serial Marks Co
No. of Allotted
Question to Each
Question
Que-1A Solve

A1 Design 4 bit adder sub-tractor unit and write VERILOG 4 CO3

code for it.
A2 Compare FPGA with CPLD 3 CO1
OR
Que-1B Solve

B1 Design 2 bit multiplier unit and write VERILOG code for 4 CO3
it.
B2 Compare PLA with PAL 3 CO1
Que-2A Solve

A1 Implement following function using PLA- 4 CO3

f(A,B,C)={ 1,3,5,7}
A2 Design 2: 1 multiplexer and write VERILOG code for it. 3 CO2
OR
Que-2B Solve

B1 Implement following function using PAL- 4 CO3

f(A,B,C)={ 2,3,4,6}
B2 Design 2: 4decoder and write VERILOG code for it. 3 CO2
Que-3A Solve

A1 Design EX-OR gate using NAND gates only and write 4 CO2
VERILOG code for it.
A2 What are the different data types used in VERILOG 3 CO3
OR
Que-3B Solve

B1 Design full adder using half adder and some 4 CO2

combinational logic circuits and write VERILOG code
for it.
B2 What are the different operators used in VERILOG? 3 CO3

Signature of Moderator Signature of paper Setter

(Note:- The paper-setters (or Moderator) are requested to see that the questions set and changes
made are written in a clear and legible hand so that no printing errors occur in printing copies of
question papers)

Que-4A Solve

A1 Design latch using gates only and write VERILOG code 4 CO3
for it.
A2 Swap the content of Variable A into Variable B without 3 CO3
temporary variable.
OR
Que-4B Solve

B1 Design full adder using multiplexer and write VERILOG 4 CO3

code for it.
B2 Swap the content of Variable A into Variable B with 3 CO3
temporary variable.
Que-5A Solve

A1 What are the different primitives used in VERILOG 3 CO3

A2 Design Serial in Serial out shift register and write 3 CO3
VERILOG code for it
OR
Que-5B Solve

B1 What do you mean by blocking and not blocking 3 CO3

statements in VERILOG.
B2 Design4 bit binary counter write VERILOG code for it 3 CO3
Que-6A Solve

A1 Detect sequence 1011 using MOORE state machine 3 CO3

write VERILOG code for it
A2 Design simple trafficlight controller and write VERILOG 3 CO3
code for it.
OR
Que-6B Solve

B1 Detect sequence 1011 using MEALY state machine 3 CO3

write VERILOG code for it
B2 Design bus arbiter and write VERILOG code for it 3 CO3

Signature of Moderator Signature of paper Setter