Timer/Counter1 Compare Match A

ATmega48/88/168/328 etc.

TCNT1
Timer/Counter0 and Timer/Counter1 Timer/Counter1 Register
Prescaler
TCNT1H
System Clock
clkI/O
Prescaler 15 14 13 12 11 10 9 8

clkT1
TCNT1L
External Clock TIFR1
T0
7 6 5 4 3 2 1 0 Timer/Counter1 Interrupt Flag Register

ICF1 OCF1B OCF1A TOV1

=
GTCCR
General Timer/Counter Control Register OCR1A
Output Compare Register 1 A TIMSK1
TSM PSRASY PSRSYNC Timer/Counter1 Interrupt Mask Register
OCR1AH
Timer/Counter1
OCIE1
15 14 13 12 11 10 9 8 ICIE1 OCIE1B
A
TOIE1 Compare Match A
Interrupt
OCR1AL
(TIMER1 COMPA)
7 6 5 4 3 2 1 0
SREG
Status Register

I T H S V N Z C

TCCR1A PORTB
Timer/Counter1 Control Register A Alternate Functions

COM1A 1 COM1A0 COM1B1 COM1B0 WGM11 WGM10 7 6 5 4 OC2A OC1B OC1A 0

TCCR1B
Timer/Counter1 Control Register B Compare Output Mode Waveform Generation Mode

ICNC1 ICES1 WGM13 WGM12 CS12 CS11 CS10 COM1A1 COM1A0 non-PWM Mode Mode WGM13 WGM12 WGM11 WGM10
Timer / Counter
TOP
Update of TOV1 Flag
(WGM modes 0, 4, and 12) Mode of Operation OCR1A at Set on

0 0 0 0 0 Normal 0xFFFF Immediate MAX

0 0 Normal Port Operation, OC1A disconnected
1 0 0 0 1 PWM, Phase Correct, 8-bit 0x00FF TOP BOTTOM
0 1 Toggle OC1A on Compare Match 2 0 0 1 0 PWM, Phase Correct, 9-bit 0x01FF TOP BOTTOM
3 0 0 1 1 PWM, Phase Correct, 10-bit 0x03FF TOP BOTTOM
CS12 CS11 CS10 Clock Select 1 0 Clear OC1A on Compare Match
4 0 1 0 0 CTC OCR1A Immediate MAX
1 1 Set OC1A on Compare Match 5 0 1 0 1 Fast PWM, 8-bit 0x00FF BOTTOM TOP
0 0 0 Timer/Counter stopped
6 0 1 1 0 Fast PWM, 9-bit 0x01FF BOTTOM TOP
0 0 1 clkI/O
7 0 1 1 1 Fast PWM, 10-bit 0x03FF BOTTOM TOP
COM1A1 COM1A0 Fast PWM Mode
(WGM modes 5, 6, 7, 14, and 15) 8 1 0 0 0 PWM, Phase and Frequency Correct ICR1 BOTTOM MAX
0 1 0 clkI/O/ 8
9 1 0 0 1 PWM, Phase and Frequency Correct OCR1A BOTTOM BOTTOM
0 0 Normal Port Operation, OC1A disconnected
0 1 1 clkI/O/ 64 10 1 0 1 0 PWM, Phase Correct ICR1 TOP BOTTOM
Mode 14 or 15: Toggle OC1A on Compare Match
0 1
All other modes: Normal Port Operation, OC1A disconnected 11 1 0 1 1 PWM, Phase Correct OCR1A TOP BOTTOM
1 0 0 clkI/O / 256
Clear OC1A on Compare Match, 12 1 1 0 0 CTC ICR1 Immediate MAX
1 0
1 0 1 clkI/O / 1024 set OC1A at BOTTOM (non-inverting mode)
13 1 1 0 1 Reserved
Set OC1A on Compare Match,
External clock source on T1 pin. 1 1
clear OC1A at BOTTOM (inverting mode) 14 1 1 1 0 Fast PWM ICR1 BOTTOM TOP
1 1 0
Clock on falling edge
15 1 1 1 1 Fast PWM OCR1A BOTTOM TOP
External clock source on T1 pin.
1 1 1
Clock on rising edge Phase Correct PWM Mode
COM1A1 COM1A0
(WGM modes 1, 2, 3, 8, 9, 10, and 11)

0 0 Normal Port Operation, OC1A disconnected This work is licensed under the Creative Commons Attribution-ShareAlike License.
To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/
Modes 9 or 11: Toggle OC1A on Compare Match
0 1
All other modes: Normal Port Operation, OC1A disconnected
Clear OC1A on Compare Match when up-counting.
1 0
Set OC1A on Compare Match when down-counting.
ATmega328 Timer-Counter1 Compare Match A
22 February 2010
Set OC1A on Compare Match when up-counting.
1 1 Copyright © 2009-2010 Donald Weiman
Clear OC1A on Compare Match when down-counting.