Intrinsic semiconductor

 At zero K very high field strengths are required to move an electron from the top of the
valence band to the bottom of the conduction band
 ⇒ Thermal excitation is an easier route

P(E) →
Law of mass action: n x p = ni2

E →
at a given temperature.

EF Eg We can’t increase n and p together

Eg/2

So, if we manage to increase n,

we will decrease p and vice versa.

0 0.5 1
Electron-hole formation in Si due to absorption of light
Conductivity in a semiconductor depends on two factors
1. Concentration of electrons and holes. Denoted as n and p and is temperature
dependent.
2. Ability of the electron and holes to travel in the lattice without scattering.

In typical semiconductors, concentration of electrons and holes are small, compared to the atomic con-
centration, so that electron-electron scattering can be ignored. But there is still the interaction between the
electron and lattice. This is defined by a quantity called mobility, denoted by the symbol .

effective mass of the carrier

the time between two scattering events
 To calculate the distance traveled by the electron in this short time

Velocity =

From the thermal velocity and the scattering time it is possible to find the distance traveled between 2
scattering events. This distance is approximately 23 nm. In terms of number of unit cells this works out to
be 43 unit cells (Si lattice constant is 0.53 nm).
 Carrier concentration in semiconductors

Fermi function and for energies much greater than kBT

the number of electrons in the conduction band (n)

3D solid with an uniform potential

law of mass action
 Fermi level in intrinsic semiconductors
Fermi level is defined as the energy level separating the filled states from the empty states at 0 K. It is also the
highest filled energy level in a metal. This definition needs to be modified for a semiconductor since these have
an energy gap between the filled states (valence band) and empty states (conduction band).

Fermi Level is the energy that corresponds to the center of gravity of the conduction electrons and holes
weighted according to their energies. In pure germanium semiconductor, the Fermi level is about halfway in the
forbidden gap.
The exponential terms dominates,
 Extrinsic semiconductor
We usually think of impurities as small amounts of unwanted materials that is because of any processing
problem, but in the case of semiconductors impurities are carefully controlled materials that are added
to your pure semiconductor to change the conductivity. Appropriate word is dopants
We can say that in extrinsic semiconductor is a one, where we add a small amount of dopant in order to
preferentially generate electrons or holes.

 Doping of Si
 V column element (P, As, Sb) → the extra unbonded electron is
practically free
 Energy level near the conduction band
 n- type semiconductor
 III column element (B, Al, Ga, In) → the extra electron for bonding
supplied by a neighboring Si atom → leaves a hole in Si.
 Energy level near the valence band
 p- type semiconductor
 Summary of Charge Carriers

Energy required to remove

the extra electron
 Shallow

Deep

Shallow

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 Ionization energy for extra electron from phosphorous
• P+ ion with extra electron ≅ treated as H atom with one electron

m is the rest mass of the electron,

E=- = -13.6 eV e is the electric charge,
εo is the permittivity of free space

E = 44 meV for P in Si lattice

Ionization energies for dopants in Si & Ge (eV)
Type Element In Si In Ge
P 0.044 0.012
n-type As 0.049 0.013
Sb 0.039 0.010
B 0.005 0.010
Al 0.057 0.010
p-type
Ga 0.065 0.011
In 0.16 0.011
 Electron and Hole Concentrations
• Under thermal equilibrium conditions, the product of
the conduction-electron density and the hole density
is ALWAYS equal to the square of ni:

np = ni
2

N-type material P-type material

n ≈ ND p ≈ NA
ND >>>> ni 2 2 NA >>>> ni
ni ni
p≈ n≈
ND NA
Band diagram, density of states, Fermi-Dirac distribution,
and the carrier concentrations at thermal equilibrium

Intrinsic
semiconductor

n-type
Nd semiconductor

NA p-type
semiconductor
N-type P-type

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Fermi Level in extrinsic semiconductor
Liquid, gas, solid

The penetration depth can be set very precisely by

reducing or increasing the voltage needed to
accelerate the ions.
Compensation doping

Doping process
 Compensation doping
nd
charge
neutrality
ni

Ionization
nd

pa

ni
 ND = 6 x 1016

NA = 3 x 1016
ND – NA >>>> ni Find ???

Majority and minority

NA – ND >>>> ni
Degenerate semiconductors E g’ < E g
Temperature dependence of Intrinsic carrier concentration

ln (ni) ∝ 1/T

Slope = Eg/2KB

200 K
500 K 300 K
Temperature dependence of carrier concentration
Extrinsic semiconductor
Intrinsic semiconductor

S∝T
Extrinsic semiconductor

High

Low
 Intrinsic semiconductor
1/2

The 1/2 enters in above equation because the donor levels are localized and can
accommodate only one electron instead of two like a regular energy state.

The saturation temperature is defined as the

temperature where n = 0.9Nd where Nd is the donor
concentration. This corresponds to 90% ionization.

Slope = Ed/2K

Ts
 1. Above the saturation temperature the donor levels are completely ionized
so that n = Nd.
2. As temperature keeps increasing there comes a temperature when the electrons from
the valence band (intrinsic carriers) becomes comparable in concentration to Nd. This
temperature is called the intrinsic temperature, Ti.
3. Above this temperature the semiconductor behaves as intrinsic. Ti is defined as the
temperature when n = 1.1 Nd.
90% to 110% Nd,

Doping
1. It increases the conductivity by preferentially increasing either
electron or hole concentration.

2. No change the conductivity. electrical devices

526 K-60K,
Mobility and conductivity
Fermi Level in extrinsic semiconductor
 Amorphous semiconductors

Crystalline Si has a mobility of 1350 cm2 V-1s-1 while amorphous Si (de-noted a-Si:H) has a mobility as low as 1 cm2 V-1s-1.
The notation a-Si:H means amorphous Si with hydrogen termination at the surface (to passivate surface dangling bonds).
Amorphous semiconductors and applications in so-large cells, image sensors, TFTs (thin film transistors) where device speed
is not an important criteria but cost is. It is easier to fabricate amorphous materials than high purity and defect free single
crystals and the low cost can compensate for the poorer performance.

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