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Laboratory Report
Laboratory:
Analog Electronic
1
TP-Analog Electronic I3GEE
CONTENT
1. TABLE OF CONTENT
2. OBJECTIVE ...................................................................................................................... 2
3. APPARATUS..................................................................................................................... 2
4. INTRODUCTION ............................................................................................................. 2
5. PROCEDURES ................................................................................................................. 3
6. QUESTIONS ..................................................................................................................... 7
7. CONCLUSION .................................................................................................................. 8
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TP-Analog Electronic I3GEE
2. OBJECTIVE
• To understand the characteristic between output and input of BJT during CE mode
3. APPARATUS
4. INTRODUCTION
Voltage-divider biasing is a popular method for biasing bipolar junction transistors (BJTs). It
involves using a voltage divider network composed of resistors to set the base bias voltage and
establish the desired operating point of the BJT.
1. Voltage Divider Network: The voltage divider network consists of two resistors
connected in series between the BJT's supply voltage (Vcc) and ground. The
connection point between the resistors serves as the base bias voltage (Vbb).
2. Bias Current: To establish the bias current (Ib), the voltage divider should be designed
such that it sets the appropriate voltage at the base terminal. This voltage is
determined by the resistive ratio of the divider network.
3. Operating Point: The bias voltage (Vbb) determines the operating point of the BJT.
By setting the bias voltage appropriately, the transistor can be biased to operate in the
active region where it exhibits the desired amplification characteristics.
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5. PROCEDURES
Step 1: Consider the circuit of Figure 1c using Vcc = 10 volts, R1 = 10kΩ, R2 = 3.3kΩ, Re =
4.7kΩ and Rc = 5.6kΩ. Using the approximation of a lightly loaded “stiff ” voltage-divider,
Determine the ideal end points of the DC load line and the Q point, and record these in Table
2. Circuit Voltages and Beta (β)
• Step 2: Continuing with the component values indicated in step one, compute the theoretical
base, emitter and collector voltages, and record them in Table 3 (Theory).
• Step 3: Build the circuit of Figure 1c using Vcc = 10 volts, R1 = 10kΩ, R2 = 3.3kΩ, Re =
4.7kΩ and Rc = 5.6kΩ. Measure the base, emitter and collector voltages and record them in
the row of Table 3 (Experiment). Compute the deviations between theoretical and experimental
and record these in the first row of Table 4 (%Deviation).
• Step 4: Measure the base and collector currents and record these in the first row of Table 5.
Based on these, compute and record the experimental beta as well.
• Step 5: Swap the transistor with the second transistor and repeat Step 3 and Step 4 using the
second rows of the tables.
• Step 6: Swap the transistor with the third transistor and repeat Step 3 and Step 4 using the
third rows of the tables
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Calculation
• 𝑉𝐵 ; 𝑉𝐶 ; 𝑉𝐸
𝑉𝑇ℎ = 𝐼𝐵 𝑅𝑇ℎ − 𝑉𝐵 = 0
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• 𝑉𝐵 ; 𝑉𝐶 ; 𝑉𝐸
𝑉𝑇ℎ = 𝐼𝐵 𝑅𝑇ℎ − 𝑉𝐵 = 0
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TP-Analog Electronic I3GEE
• 𝑉𝐵 ; 𝑉𝐶 ; 𝑉𝐸
𝑉𝑇ℎ = 𝐼𝐵 𝑅𝑇ℎ − 𝑉𝐵 = 0
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6. QUESTIONS
Question 1: Based on the results of Table 2, is the transistor operating in saturation, cutoff or
in the linear region?
Based on the result of table 2, the transistor is operating in the linear region or active mode.
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Question 2: Based on the results of Table 3 and Table 4, does the circuit achieve a stable
operating point when compared to beta?
Considering the given β (Beta) value of 143,130 and 330 which represents the current gain of
the transistor, we can say that the circuit achieves a stable operating point compared to β.
However, it's important to note that other factors, such as temperature variations and load
conditions, can affect the stability of the operating point in practical applications.
Question 3: What is the required design condition for the voltage-divider bias to achieve high
Q point stability in spite of changes in beta?
The required design condition for achieving high Q point stability in voltage-divider bias
despite changes in beta is to ensure that the biasing resistors are chosen such that the base
current is much smaller than the collector current. This ensures that changes in beta will have
minimal effect on the Q point stability. Additionally, using a bypass capacitor in parallel with
the emitter resistor can also help improve stability by providing negative feedback to
compensate for changes in beta. Finally, selecting transistors with higher beta values can also
improve stability in voltage-divider bias circuits.
Question 4: Using the original circuit, determine a new value for the collector resistance that
will yield collector voltage of approximately half of the power supply value.
To determine the new value for the collector resistance, we can use the formula:Vc = Vcc *
(Rc / (Rc + Re))Where: Vc = collector voltage Vcc = power supply voltageRc = collector
resistanceRe = emitter resistance.We want the collector voltage to be approximately half of the
power supply voltage, so we can rearrange the formula to solve for Rc: Rc = (Vc / Vcc - Vc) *
Re. Let's assume the power supply voltage (Vcc) is 12V and the emitter resistance (Re) is 1kΩ.
Using these values, we can calculate the new collector resistance: Rc = (6V / 12V - 6V) * 1kΩ
= (0.5) * 1kΩ = 500ΩSo, a new value for the collector resistance that will yield a collector
voltage of approximately half of the power supply value is 500Ω.
7. CONCLUSION
The voltage-divider biasing configuration is a common way to bias a BJT transistor for stable
operation. It involves using a resistor network (voltage divider) to establish the base bias
voltage.The DC load line, on the other hand, represents the various possible operating points
of the BJT transistor on a graph. It shows the relationship between collector current (Ic) and
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collector-emitter voltage (Vce) for different biasing conditions. The BJT voltage-divider
biasing configuration, combined with the DC load line, allows us to analyze the operating
point and determine the approximate Q-point (quiescent point) of the transistor. This helps in
understanding the transistor's behavior and design considerations.
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