ANALOG

INTEGRATED CIRCUIT
 Lecture 01
Current Mirrors, Active Load, Biasing
references Review
What is Current Mirror?
◦ Current Mirrors are designed to copy the current flowing through a reference branch to
one or more mirror branch. (fraction/ multiple)
◦ IC→ MOS amp→ Biasing is done using current sources. It is difficult to provide accurate
biasing to this huge amount of transistors. Thus current mirror circuit is used as source.
◦ Advantages: High voltage gain, Biasing stability.
Current Mirrors
◦ Copying current → From a reference source.
→ From a current source which has constant current.
❖Discussion about → Technique to copy a current
→ How to generate a reference current
Types:
1. Basic Current Mirrors
2. Cascaded Current Mirrors
3. Active Current Mirrors
Basic Current Mirror
1 𝑊
𝐼𝐷 = 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )2
2 𝐿
Analog
(𝑊ൗ𝐿)2
Circuit
𝐼𝐷1 = × 𝐼𝑅𝐸𝐹
(𝑊ൗ𝐿)1

𝑊2
𝐼𝐷1 ≈ × 𝐼𝑅𝐸𝐹 (𝐺𝑒𝑛𝑒𝑟𝑎𝑙𝑙𝑦 𝑐ℎ𝑎𝑛𝑛𝑒𝑙 𝑙𝑒𝑛𝑔𝑡ℎ 𝑖𝑠 𝑘𝑒𝑝𝑡 𝑓𝑖𝑥𝑒𝑑)
𝑊1

Scaling/ Mirroring/ Replicating

Reference Sources: Objectives
1. To establish a reference current (IREF).
2. To establish a reference DC voltage (VDD, VBIAS)
N.B: These two are independent of supply and process variations and has a well defied
behavior with temperature.

3. Three forms of temperature independence

a) Proportional to absolute temperature.
b) Constant gm behavior.
c) Temperature independent behavior.
Contd.
4. Design of reference circuit
a) Supply independent biasing.
b) Temperature Independent biasing.
5. What affect constant current and voltage? (Except supply(VDD, VBIAS), Process (gm,
µnCOX, VTH), Temperature variability)
a) Noise
b) Power Dissipation
 Current mirror using current source

(𝑊ൗ𝐿)2
𝐼𝐷1 = × 𝐼𝑅𝐸𝐹
(𝑊ൗ𝐿)1

(𝑊ൗ𝐿)3
𝐼𝐷2 = × 𝐼𝑅𝐸𝐹
(𝑊ൗ𝐿)1
2

1. ID1 and ID2 are copies of IREF

2. Using of current mirror implicitly assumes that a M1 M2 M3
reference current exists.
3. If IREF does not vary with VD. And if channel
length modulation of M2 and M3 is neglected
then ID2 and ID1 remain independent of
supply voltages.
How to generate IREF ?
Current mirror biasing using a resistor
1. A resistor from VDD to the gate of M1 is applied
2. M1 is in saturation region (as M1 is diode
connected)
3. Assume M1 is long channel, i.e. λ=0 Icopy
1 1
4. Resistance offered by M1 is = 𝑔 VDD
𝑚1
𝑉
i.e. IREF=𝑅 +1𝐷𝐷
1 ൗ𝑔𝑚1
(𝑊ൗ )
5. Icopy= (𝑊ൗ𝐿)2 × 𝐼𝑅𝐸𝐹
𝐿 1
M1 M2
𝑉𝐷𝐷 (𝑊ൗ𝐿)2 1ൗ
= × 𝑔𝑚1
𝑅1 +1ൗ𝑔𝑚1 (𝑊ൗ𝐿)1
Contd…
◦ If supply voltage fluctuates, then reference current is sensitive to VDD. Thus, Icopy is
sensitive to supply voltage fluctuations.
Δ𝑉𝐷𝐷
◦ ΔIcopy = 𝑅
(𝑊ൗ )
1 × (𝑊ൗ𝐿)2
1 + ൗ𝑔𝑚1 𝐿 1

◦ How VDD can vary?

◦ AC source ➔ Transformer+ Rectifier + Regulator → DC Source (small ripple)→ DC
Voltage→ VDD variations
𝑊
◦ gm1 = 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )
𝐿

Here, 𝜇𝑛 is electron mobility and dependent on temperature.

VT is Threshold voltage and dependent on temperature.
Contd…
◦ i.e. current mirror circuit is completely temperature and supply dependent
◦ Issue with reference current IREF generation, but current mirroring is working properly.

◦ So, for supply independent biasing. IREF must be derived from Icopy
◦ The idea is to make it independent of VDD, Then IREF can be a replica of Iout
Lecture 02:
Supply Independent Biasing
Lecture-01 Review Questions
1. Why current mirror is used?
2. Advantages of current mirror?
3. Why supply varies in Analog IC?
4. Types of Temperature Independence?
5. What is the benefit of long channel?
6. Easiest way to create a current reference is?
7. What affects constant current and voltages?
8. Transconductance of JFET is proportional to?
9. Base Resistance calculation- Given base voltage and current.
10. Why MOS is used over BJT in Opamp design?
Supply independent biasing
◦ Goal: IREF must be generated from Icopy
◦ Assumptions: M1, M2, M3 and M4 are long channel devices. i.e. λ1, λ2, λ3 and λ4 are zero

We will use two current mirror circuit: (Similar like Push-Pull amp.)
1. Mirror-1 using n-Channel MOS
2. Mirror-2 using p-channel MOS
Mirror-1 (using n-channel MOS)
VDD
◦ ID2= Icopy; ID1= IREF
(𝑊ൗ𝐿)2
◦ ID2 = × 𝐼𝑅𝐸𝐹
(𝑊ൗ𝐿)1

𝑘(𝑊ൗ𝐿)1
= × 𝐼𝑅𝐸𝐹
(𝑊ൗ𝐿)1

= k × 𝐼𝑅𝐸𝐹 Icopy

(𝑊ൗ𝐿)1 (𝑊ൗ𝐿)2 = 𝑘(𝑊ൗ𝐿)1

k= any real
number
Mirror-2 (Using P channel Mos)
VDD

(𝑊ൗ𝐿)4
ID4= × 𝐼𝐷3
(𝑊ൗ𝐿)3
ID4= 1Τ ×I𝐷3
𝑘
(𝑊ൗ𝐿)4 (𝑊ൗ𝐿)3 = 𝑘(𝑊ൗ𝐿)4
ID3= k × ID4

ID4 ID3
Back to Back Mirror-1 and Mirror-2
ID3 = Icopy Current
ID4= IREF Mirror-2
IREF = 1Τ𝑘 × Icopy
Iout
IREF

Current
Mirror-1
Supply Independent Biasing
◦ Assumptions:
1. All MOS are in saturation. 𝑘(𝑊ൗ𝐿)4
2. All MOS are long-channel devices. i.e. λ=0
(𝑊ൗ𝐿)2
3. ID2= Icopy; ID1= IREF; ID2= (𝑊ൗ𝐿)1
× 𝐼𝑟𝑒𝑓 ; ID2= k IREF
= 𝑘(𝑊ൗ𝐿)1
4. Current Mirror 2, ID3 = k ID4
5. M3 and M4 copy current Icopy, thus defining IREF
6. IREF is bootstrapped to Icopy
7. ID3= Icopy, ID4= IREF; Each diode connected device feeds from a current source. I REF = 1Τ𝑘 ×
Icopy
Bootstrap: It refers to a self studying process that is supposed to continue of grow without
external input.
Contd…
◦ 8. If (𝑊Τ𝐿)2 = k (𝑊Τ𝐿)1 and (𝑊Τ𝐿)3 = k (𝑊Τ𝐿)4 , then we have Iout=k × IREF
◦ i.e. Icopy and IREF are relatively independent of VDD, but still a function of process and
temperature issue.
◦ Since the circuit is governed by one equation,
Icopy=k × IREF → it can support any current level.
◦ If we initially force IREF to be 15 μA → the resulting Icopy of k x 15 μA circulates around the
𝑘 × 15 μA
loop (IREF=Icopy/k= =15 μA) Substituting these current levels in the left and Right
𝑘
branches indefinitely.
◦ Problem: No control 😞
Improved Version 01
◦ Problem of Previous Circuit: M4 M3

◦ 1. No control on amount of current flow in previous

figure. There is no control IREF.
◦ 2. Solution: To establish control over the circuit uniquely IREF
defined the currents → we add a resistor.
◦ Assumptions:
+
◦ 1. M1-4 devices are in saturation. M1 M2
1 VGS2
◦ 2. M1-4 are long channel devices λ1-4 = 0 -

RA
Contd…
◦ From the circuit, we have
VGS1= VGS2 + Icopy × RA
1 𝑊
𝐼𝐷 = 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )2
2 𝐿
2𝐼𝐷
VGS = 𝑊 + VT
𝜇𝑛 𝐶𝑜𝑥 𝐿

◦ M1 and M2 form a current mirror and assuming Vt1 = Vt2 = Vt (VSB1=0, Body effect of
M1=0, assuming VSB2 negligible). (If body effect exists, Vt1 ≠ Vt2 )

2𝐼𝑐𝑜𝑝𝑦 2𝐼𝑐𝑜𝑝𝑦
◦ Vt + 𝑊 = Vt + 𝑊 + Icopy × RA
𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1 𝑘 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1
Contd…
2𝐼𝑐𝑜𝑝𝑦 1
◦ 𝑊 (1- ) = Icopy × RA2
𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1 𝑘

2 2
2𝐼𝑐𝑜𝑝𝑦 𝐼𝑐𝑜𝑝𝑦 𝑅𝐴
◦ =
𝑊
𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1 (1− 1 2
𝑘
)

1 2 1 2
◦ Icopy ≈ 𝑅2 𝑊 (1− )
𝐴 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1 𝑘

◦ Thus, Icopy is independent of VDD + Design Control

◦ But, Icopy is dependent on process temperature and RA Value
◦ Body effect of M2 is available
◦ Gain control available😀 but body effect problem😞
 Improved version 02 (Smart Biasing)
Assumptions:
1. M1-4 are in saturation.
2. M1-4 are long channel devices, i.e. λ1-4 = 0
3. (𝑊Τ𝐿)3 = (𝑊Τ𝐿)4
4. (𝑊Τ𝐿)2 = k (𝑊Τ𝐿)1
5. Thus Body effect resolved.
6. Applying KVL to G-S loop of M1 & M2
VGS1= VGS2 + Icopy RA
1 2 1 2
Icopy ≈ 𝑅2 𝑊 (1− )
𝐴 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 )1𝑘

7. Still Icopy is dependent on process, temperature and RA😑

8. No body effect for M1-4 😍
Problem 01

𝐼𝐶
𝑉𝐵𝐸 = 𝑉𝑇 ln( )
𝐼𝑆
Problem 02