Performances Analysis and Optimization Of Micro

Power Ring Oscillator For Energy Scavenging

applications Using the Contour Graph Method
Rahma Aloulou(1,2), Hassene Mnif(1), Mourad Loulou(1),
Frederic Alicalapa(2) J. D. Lan Sun Luk (2)
(1)
University of Sfax- LETI Laboratory. Sfax-Tunisia
(2)
LE2P Lab-University of La Reunion Saint Denis, Reunion (France)
aloulourahma@yahoo.fr,hassene.mnif@ieee.org, frederic.alicalapa@univ-reunion.fr, mourad.loulou@ieee.org,
lanson@univ-reunion.fr

Abstract—This paper mainly focuses on performances
optimization and analysis of micro power ring oscillator
for energy scavenging applications in wireless sensor
networks.
A novel method of optimizing electrical performances
(power, frequency) and geometry (transistors sizing) for
CMOS ring oscillators is presented using the contour
Graph method. The optimized oscillator exhibits a
tuning range from 10 MHz to 100 MHz with good
transient characteristics for a supply range of 0.8V to
1.6V and small size die which is difficult to get from the
conventional oscillator. This frequency range is
provided under low power consumption.
Keywords—performances optimization and analysis,
micro power ring oscillator, energy scavenging, wireless
sensor networks, and contour graph method.
This paper is organized in five sections as follow: in
the second section we will give a review of the
concept and the techniques of basic ambient resources.
In the third section, the ring oscillator architecture will
be described. In the section four, at first, the contour
graph methodology will be defined.
Then, this graphical method will be used to optimize
the ring oscillator parameters where attention was paid
to the low power consumption and the low frequency
range in order to respect the energy harvesting
constraints (power, frequency, chip area). Finally
conclusions will be provided in section five.
II. ENERGY SCAVENGING CONCEPT AND
TECHNIQUES

Energy harvesting or energy scavenging can be

I. I. INTRODUCTION
In the context of wireless sensor networks
application, the important needs into autonomous and
smart sensors, has led to a focused researches on
micropower energy scavenging techniques in order to
supply devices and to be self powered.
In such concept, micro power ring oscillators are
widely used as clock generators and become an
important subpart of these circuits [1].
However, due to the unstable ambient and
environmental conditions, the harvested voltage levels
are not constant. Therefore, in this paper, the designed
circuit offers interesting ability to generate the needed
frequency according to the supply voltages generated
defined as capturing and converting ambient energy to
electrical power in order to supply devices and store
energy in ultra capacitors or batteries for later use [3].
In this context, various techniques of energy
scavenging are explored as alternative supply sources
to circuits. Among the most ambient energies used in
recent micro power system we can cite: solar, radio
frequency (RF), thermal, and vibration energy [4].
Figure1 presents the concept of energy-scavenging
system in wireless sensors network and the basic
environmental energy harvesting sources with their
transducers.
ambient Transducers
Management circuit

from the transducers. In this work, these supply sources

voltages are considered between 0.8 V and 1.6 V, and Light PV cell
the frequency generated from the ring oscillator is Thermal TEG Sensor
designed to be ranged in several tens of MHz (10 MHz Vibrations PZ cell Loads
to 100 MHz) to cover the operating frequencies range EM cell
of energy scavenging application [2]. ES cell
In such applications, the need of low voltage design, RF Rectenna
low power consumption, and low frequency
generation are crucial constraints [2]. Fig. 1 Block diagram of microsystem with energy-
Hence, the designed ring oscillator is fundamentally scavenging techniques for wireless sensors network
constructed by cascading an odd number of inverters
complying with the Barkhausen oscillation condition
of gain and phase shift to meet the custom
performances (power, frequency, area) of the
applications.
 III. CMOS RING OSCILLATOR CIRCUIT
The design of a ring oscillator (Figure 2) requires
connecting odd number of stages of inverters in a
unity gain feedback loop [5].
C C C implemented using an NMOS transistor. For this
N
Fig. 2 Ring Oscillator architecture
The frequency of the oscillation can be given as:
1
(1)
2
Where:
• N is an odd number
• cell is the propagation delay of one inverter
cell.
Since the oscillation frequency is determined by the
number of inverters and the delay in each stage which
is very small for an inverter, typically the achieved
frequencies are several hundred of MHz to GHz in
0.35µm technology.
The need of low frequency design leads to an
increased number of cascade inverters cell which is
not very suitable to the energy harvesting devises
where the small die size is also a critical constraint.
To overcome the constraint of die size and power
dissipation, in the ring oscillators with reduced number
of stages additional capacitor (C) has been included as
presented in figure 2.
This inclusion allows to meet the desired specification
of the circuits and to achieve the output frequency
ranges (10 MHz to 100 MHz).
Thus the delay of each stage of inverters will be
calculated
as:
(2)
Where:
• Vout is the output voltage amplitude,
• Iosc is the control current source
• CT the equivalent input capacitor of the each
inverter (included capacitance (C) and MOS
transistors parasitic).
Then the output frequency can be given as [6]:
(3)
2 to C as expressed in equation (3). Then, the oscillation
To reach the output frequency ranges of energy
harvesting applications, the designed ring oscillator
consist on three stage of inverter where in each stage a
variable capacitor is included as presented in figure 3
[7, 8].
The capacitance value exerts a control of frequency.
Hence, capacity can contribute to adjust the wanted
frequency. The controllable capacitance can be
transistor, the bulk is connected to the ground and the
source and drain are connected to a control voltage
(Vctrl), as shown in the same figure [9]
Fig. 3 Ring Oscillator circuit with controllable
capacitance
Based on the expression of the output frequency, the
generated frequency is governed by the capacitance
value, CT .This dependence can be verified by
simulations of the frequency performances as a
function of additional capacitances values. The circuit
was simulated using 0.35 µm CMOS process.
10
9
10
8
7
10
Frequency (Hz)
6
10
10
5
10
4
10
3
- 14 - 12 - 10
10 10 10
C a pa ci tan ce va l u es ( F)
Fig. 4. Simulated output signal frequency as a
function of capacitances values (C)
Even, in the context of this work, the ring oscillator is
designed to range within several tens of MHz, in
figure 4, considering the lowest voltage limit 0.8 V
(the typical voltage), the output frequency ranges from
2 KHz to 120 MHz and cover the operating
frequencies range of devices in an energy harvesting
application .
Over this frequency range fout is inversely proportional
frequency range is obviously governed by the
capacitance value.
In the context of energy harvesting, also the power which is assumed to be identical for each stages, has
consumption is a crucial issue [10]. Therefore, an impact on the optimal operation point. Figure 5 and
energetic constraint must be also applied to the ring 6 show this influence on isofrequency and isopower
oscillators due to the fact that it is sometimes dissipation graphs respectively.
underplayed or un-optimized. Furthermore, to meet the
low cost, attention should be also given to the chip 10

area. 9 P = 5.46e- 006

= 1.46e- 006
This trade-off is allowed by introducing effective P
IN
IN

design methods such as the contour graph method. 8

Nmos transistor width (µm)

4.46e- 006
P = 2.96e- 006
7 IN

IV. RING OSCILLATOR PERFORMANCE

6
OPTIMIZATION USING CONTOUR GRAPH METHOD P
IN
= 2.46e- 006
3.96e- 006
5
A. Definition of the Contour Graph method
P = 3.46e- 006
The Contour Graph method represents a good 4 IN 4.96e- 006

graphical tool to show the relation and the correlation 3

P =9.59e- 007
between two parameters [2] IN

2 P = 1.96e- 006
This approach generates contour lines which are IN

curves connecting points with the same particular 1

2 4 6 8 10
value for variables. Pm os trans istor width (µm)
Moreover, a contour map is a map illustrated with
these con-tours. The configuration of these isolines Fig. 6 Isofpower behavior as function of inverter
allows map readers to deduct relative gradient of a transistors width
variable and estimate that variable at specific locations
[11].For these reasons, it seems interesting to apply Contours lines of these figures (Figure 5 and 6) show
this method to optimize electrical performances that frequency performance and the power dissipation
(power, frequency) and geometrical performances (die are mainly dependent on Pmos transistors width.
size) of the ring oscillator to select the optimal Due to the unstable environmental condition and the
operating point. voltage level supplied by the transducers to the
devices, we pass to evaluate the effect of this supply
B. Performance Analysis Of micro power Ring voltage variation and the control voltage of the
Oscillator :die size, frequency and power capacitance harvested also by the transducers (Figure
Hence, for the ring oscillator, electrical and 7).
geometrical characteristics can be optimized, to find a 1.6
minimum power dissipation point using this contour 4e+007

graph approach. In order to apply this approach and 1.5

1e+007 8e+007
evaluate the power dissipation and frequency
1.4
behaviors, simulations are performed as a function of 3e+007 6e+007
W/L transistor ratios of inverters. 1.3
9e+007
Vctrl (V)

10
7 .1 5e +00 7 1.2
9
f o u t = 5.8 5e+00 7
1.1 2e+007
8 7e+007
Nmos transistor width (µm)

2.61 e+007
1
7
3.9e +00 7
6
0.9
3 .26e +0 07 5e+007

5 4.55 e+0 07
0.8
1.96 e+007 0.8 1 1.2 1.4 1.6
VDD ( V)
4
Fig. 7 Isofrequency behavior as function of VDD
f out = 8.44e+007
3 and Vctrl
6.5 e+0 07
2 f ou t =5 .2e+00 7
7.79 e+0 07 As conclusions of this graphical method, we can see
1 that these curves indicate that the performances of the
2 4 6 8 10
ring oscillator are dominated by the Pmos transistors
Pm os trans is tor width (µm )
as proved by the vertical lines (figure 5 and 6).
Fig. 5 Isofrequency behavior as function of inverter Therefore, to lead the required specifications of such
width application especially the energy criteria, a power
To go further, once VDD has been fixed to the typical optimization method can firstly consist of sizing of the
value (0.8 V), the W/L transistor ratio of the inverters Pmos transistors. Then, secondly and based on the
energy resources and the voltage supply levels, the ring oscillators in the context of energy scavenging
desired frequency performance can be adjusted using application.
the value of the voltage tune of the controllable Therefore, the Contour Graph method is applied in
capacitance. order to optimize and demonstrate the power
Thus, figure 8 and figure 9 are given to present the dissipation and frequency behavior as function of the
isofrequency areas and the isopower consumption transistor sizes, the voltage range and the values of the
areas as function of these capacitances. included capacitance.
600
x 10
7
From simulations results, the frequency varies from 10
18
MHz to 100 MHz by adjusting the tuning voltage from
16 0.8 Volt to 1.6 Volt with low power consumption
which not exceeds the 29.5 µW.
C apac itanc e v alues ( fF)

14

300
VI. REFERENCE
12
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10 H., Loulou, M. “PSO-based charge pump chip area
4e+07 minimization. In Synthesis, Modeling, Analysis and
6e+07 8
2e+07 Simulation Methods and Applications to Circuit
60 Design (SMACD), 2012 International Conference on
1e+08 6
(pp. 133-136).
4 [2] R. Aloulou, et al. “Contour Graph Approach Of
1.2e+08 Micropower Clock Generator Design For Energy
8e+07
1.6e+08 2 Harvesting Charge Pump Circuits”
30
1.4e+08 Journal of Microelectronics, Electronic Components
0.8 0 .9 1 1 .1 1 .2 and Materials,Volume 45 N°1, March 2015 ISSN
VDD (V) 0352-9045
[3] R. Aloulou, et al. “Improved Circuit Model Of
Fig. 8. Isofrequency areas as function of
Photovoltaic Cell For Energy Harvesting
capacitance values and VDD Application”
-5
600 x 10
2 .5
Mediterranean Electrotechnical Conference
(MELECON), 2014 17th
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5e-06 Hoof,R. Mertens “Micropower energy harvesting”
2
Solid-State Electronics 53 684–693,(2009)
Capac itance values (fF)

300
60
1e-05
30
0 .8 0 .9
VDD (V)
Fig. 9. Isopower consumption areas as function of
capacitance values and VDD
Figures 8 and 9 prove that the frequencies generated
from the ring oscillator cover the operating
frequencies range of energy scavenging application.
Therefore, the graphical approach of contours
represents an efficient and fast methodology to design
a low power and low frequency oscillator with small
size devices in the context of energy harvesting
application where the input voltages are not stable.
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V. CONCLUSION
The need for lower frequencies, higher levels of
integration, low power consumption and low costs is a
challenge for the design and the implementation of