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ATA5723/ATA5724/ATA5728
Introduction
The UHF receiver ATA5723, ATA5724, and ATA5728 are designed specially for automo-
tive application like Remote Keyless Entry as well as Tire Pressure Monitoring System.
These receivers are upgrades of ATA5743 and ATA5760. They have compatible pinning
that allows the development of one layout for applications in three different ISM (industrial
Scientific Medical) frequency bands. The frequency ranges are 312.5MHz to 317.5MHz,
431.5MHz to 436.5MHz and 868MHz to 870MHz. Another benefit of the receiver is the
reuse of the software from Atmel®’s older receiver, the ATA5743. Additional features
include the RSSI output, the pierce crystal oscillator achieving a better oscillation margin,
an improved sensitivity as well as the image rejection.
The purpose of this application note is to give a designer some hints how to start develop-
ing a receiver module with ATA5723/ATA5724/ATA5728.
Figure 1. System Block Diagram for the Receivers Containing the Internal
Frequency Generation and Processing (Synthesizer)
fXTAL
Loop
Filter XTO
fXTO
fVCO f
LC-VCO :2
fIF or :3
fRef
f f
fLO :2 fLO :128
or :4 or :64
fRF
9118C-AUTO-05/15
A reference frequency (fRef) in the receiver is based on the crystal oscillator's frequency (fXTO), the loaded crystal resonance
frequency (fXTAL) respectively. The defined reference frequency is:
f XTO
For ATA5723: f Ref = ----------- Equation 1
3
f XTO
For ATA5724: f Ref = ----------- Equation 2
2
f XTO
For ATA5728: f Ref = ----------- Equation 3
2
f VCO
For ATA5723: f LO = ------------ Equation 5
4
f VCO
For ATA5724: f LO = ------------ Equation 6
4
f VCO
For ATA5728: f LO = ------------ Equation 7
2
The reference frequency (fRef) will be compared with the local oscillator frequency divided by a factor of 64 or 128.
f LO
For ATA5723: f Ref = -------- Equation 8
64
f LO
For ATA5724: f Ref = -------- Equation 9
64
f LO
For ATA5728: f Ref = --------- Equation 10
128
f RF – f IF 3
For ATA5723: f XTAL = ---------------------------------- Equation 11
64
f RF – f IF 2
For ATA5724: f XTAL = ---------------------------------- Equation 12
64
f RF – f IF 2
For ATA5728: f XTAL = ---------------------------------- Equation 13
128
Example:
1. For the 315 MHz receiving frequency (ATA5723) the crystal frequency required can be calculated as follows:
fRF = 315MHz
fIF = 987kHz
315MHz – 987kHz 3
f XTAL = ------------------------------------------------------------ = 14.71935938MHz
64
2. For the 433.92MHz receiving frequency (ATA5724) the crystal frequency required can be calculated as follows:
fRF = 433.92MHz
fIF = 987kHz
433.92MHz – 987kHz 2
f XTAL = -------------------------------------------------------------------- = 13.52915625
64
3. For the 868.3MHz receiving frequency (ATA5728) the crystal frequency required can be calculated as follows:
fRF = 868.3MHz
fIF = 947.8kHz
868.3MHz – 947.8kHz 2
f XTAL = --------------------------------------------------------------------- = 13.55237813MHz
128
Zin
Rs
50Ω Cm
Us Lm Cin Rin
The first important step is to find out the input impedance of the receivers and convert it into an equivalent parallel circuit.
The input impedance of the receiver is listed below:
ATA5723 Zin = 26.97 – j158.7 at 315MHz
ATA5724 Zin = 19.3 – j113.3 at 433.92MHz
ATA5728 Zin = 14.15 – j73.53 at 868.3MHz
The admittance of the receiver (Bin) can be estimated from the impedance Zin.
1
B in = ------- Equation 14
Z in
1
R in = --------------------- Equation 15
Re B in
Thus the reactance of the parallel input capacitance Cin can be given as:
1
X in = --------------------- Equation 16
Im B in
Using equation 17, the quality factor of the matching network (Qm) can be estimated.
R in
Qm = ------- + 1 Equation 17
Rs
The matching capacitance is derived from the reactance of the matching network and can be given as:
1
C m = ----------------- Equation 18
2fX m
X in – X m
L m = ------------------------------------- Equation 19
2f X in + X m
From the equations 18 and 19 the start values of the matching elements for tuning purpose can be calculated:
ATA5723 at 315 MHz would be: Lm = 46.8nH (47nH); Cm = 2.36pF (2.2pF)
ATA5724 at 433.92 MHz would be: Lm = 25.9nH (27nH); Cm = 2.05pF (2pF)
ATA5728 at 868.3 MHz would be: Lm = 8.87nH (8.2nH); Cm = 1.38pF (1.5pF)
Figure 1-2, Figure 1-3 and Figure 1-4 show the input impedances of the receivers during the matching progress.
Note: Smith chart:
- The red curve shows the input impedance without matching elements.
- The green curve illustrates the theoretical receiver input impedance with the determined start values for the
tuning.
- The blue curve shows the measured input impedance after tuning progress.
Rectangular diagram:
- The blue curve illustrates the theoretical receiver input impedance with the determined start values for the
tuning.
- The red curve shows the measured input impedance after tuning progress.
VS C7 C6
IC_ACTIVE
+ 2.2μF 10nF
R7 R3
R2
GND Sensitivity reduction
DATA
D1
POLLING/_ON
1 20
SENS DATA R4
2 19
C14 IC_ACTIVE POLLING/_ON DATA_CLK
3 18
CDEM DGND C12
4 17
AVCC DATA_CLK
5 16 MODE
TEST1 MODE C11
6 15
RSSI DVCC
RSSI 7 14
AGND XTAL2 R5
8 13 Q1
COAX C17 LNAREF XTAL1
9 12
LNA_IN TEST3 Mode
10 11
LNAGND TEST2 C10
L3 R6
ATA5723/24/28
XTAL
DATA_CLK
12 pins/
X1, X2 2 x x x Row connector 800-10-012-10-001 CAB
0.1” pitch
X5 x x x SMB connector R114 426 000 Radiall®
TP1Data,
TP2Polling,
TP3Active, 5 x x x Pin connector - white 240-333
TP4DCLK, Single pin Farnell
TP5RSSI
X3 1 x x x Pin connector - red 240-345
X4 1 x x x Pin connector - black 240-333
ATA5723/24/28-DK
PCB 1 FR4/1.5 mm Wagner
V1.0 NoSAW
Preburst Data
Preburst Data
Start Bit
Preburst length is very important item in the definition of the protocol timing. This value depends on the defined sleep time,
start-up time of the receiver, the number of the bit check and last but not least the start-up time of the microcontroller.
TPreburst ≥ TSleep + TStartup + TBit-check + TStartup_uC Equation 20
The following is an example for the definition of the preburst length. It is assumed that the system has the following
requirements.
● Receiving frequency: 433.92MHz
● Data rate: 1kBps (Manchester)
● Sleep time: 12.71ms
● Number of the bit check: 3
● Start-up time of the microcontroller: 1ms
The maximum time for the bit check (NBit-Check = 3) will be estimated as 3.5/fsig. In case of 1kBps the TBit-Ckeck = 3.5ms.
The startup time for BR_Range0 is 1.827ms (TStartup).
TPreburst ≥ 12.71ms + 1.827ms + 3.5ms + 1ms = 19.037ms
TPreburst ≥ 19.037ms, which a means minimum 20 bits (Manchester) are only necessary for the preburst. For security the
number of preburst bits can be defined as 25 bits.
tee
Dem_out
TLim_min
TLim_max
Figure 5-2 shows an example of a successful bit check with the NBit_Check = 3. The number of bit check means here the
number of Manchester encoded bit. If the bit check is successful the receiver leaves the bit check mode and the data will be
transferred to the pin DATA (receiving mode).
IC_ACTIVE
Bit check
1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit
Dem_out
Data_out (DATA)
TStart-up TBit-check
IC_ACTIVE
Bit check
1/2 Bit
Dem_out
Bit 1
5.1 Calculating the Limit Values Due to the Tolerance on the Transmitted Data Rate
For the calculation, the data rate including tolerance must be converted into periods. Assume the tolerance of the data rate is
x% and the data rate's frequency is fx (the period of the data rate (Tx) is 1/fx).
The frequency range for the data rate is given by:
f x 1 – --------- f x f x 1 + ---------
x x
Equation 25
100 100
1 1 ---------------------------------------
- --- 1
--------------------------------------- - - Equation 26
x f x-
fx 1 – --------
- x
fx 1 + --------
100 100
1 1
T x ----------------------- T x T x ------------------------ Equation 27
1 – --------- x 1 + --------- x
100 100
Figure 5-4. The Required Time Limit Ranges for a Successful Bit Check
1/fSig
tee
Dem_out tx_min
tx_max
txlim_min
txlim_min
Tx Tx 1 -
fx = -----
- t x_min = -----
- ----------------------- Equation 28
2 2 x-
1 + --------
100
Tx 1
t x_max = ------ ----------------------- Equation 29
2 x-
1 – --------100
Tx 1
t xlim_max = 1,25 ------ ----------------------- Equation 31
2 x-
1 – --------100
1 - 1 -
Tx ---------------------- Tx Tx ----------------------- 478.47µs T x 432.9µs
1 – -------- x- 1 + -------- x-
100 100
The possible setting Lim_min = 17 and Lim_max = 39 in the Limit register means:
TLim_min = 17 8.3µs = 141.1µs
TLim_max = (39 – 1) 8.3µs = 315.4µs
The limit setting is also optimal for the perfect Manchester coding:
Lim_min2T = 45 Tlim_min2T = 373.5µs < txlim_min2T
Lim_max2T = 67 Tlim_max2T = 556.1µs > txlim_max2T
1
f CU_DF = ---------------------------------------------------- Equation 34
2 30 k CDEM
Table 6-1. The Recommended CDEM Value of the Related Data Filter’s Cut-off Frequency
Table 8-1. The Recommended Pull-up Resistor (Datasheet Page 32, Table 14-1)
8.2.1 Principle Circuit for Protection against Load Dump and Jump Start
Figure 8-1 type 1 and type 2 give two possibilities for a protecting circuit. In the first circuit type 1, the protection will be
performed by the LC low-pass filter, the protection diode (D1) as well as the voltage regulator. Depending on the needs, the
inductor can be replaced by a resistor. A TVS (Transient Voltage Suppressor) diode is optimal for D1. In some cases a
Zener diode can be used also.
Figure 8-1. Principle Circuit of a Protection against Load Dump and Jump Start
Type 1
12V 12V 5V
5V
Rpup
TP
D1 T5743
AVCC Controller
DVCC
IC1 IC2
Type 2
12V
D2
12V 12V 5V
5V
Rpup
TP
D1 T5743
AVCC Controller
DVCC
IC1 IC2
In the circuit type 2 the pull up resistor is connected directly to the 12V power supply instead of 5V regulated power supply.
A protecting diode D2 must be placed between the power supply line and the pull-up resistor protecting the data out.
Figure 8-2. Principle Application Circuit with a Switch Transistor Controlling the Serial Data Interface of the
Receiver
Microcontroller
Control
module
9. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this
document.
Revision No. History
9118C-AUTO-05/15 Put document in the latest template
Section 2 “Calculating the Required Crystal Frequency” on page 2 updated
9118B-AUTO-09/08 Section 5 “Evaluation of Receivers using ATA5723/24/28-DK and RF Design Kit
Software” on page 12 updated
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