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UMA & Optimus Schematics Document


Sandy Bridge
C
Intel PCH C

2010-10-27
REV : -1
B
DY :None Installed B

UMA:UMA platform installed


OPS:Optimus

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev

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A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 1 of 97
5 4 3 2 1
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Block Diagram
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##OnMainBoard SYSTEM DC/DC CPU DC/DC
RT8208A 48 NCP6131 42~44
INPUTS OUTPUTS INPUTS OUTPUTS

POWER BD
(UMA/Optimus co-lay) DCBATOUT 0D85V_S0 DCBATOUT

SYSTEM DC/DC
VCC_CORE

VRAM TPS51218 45
2GB/1GB/512MB 4 INPUTS OUTPUTS
D

Finger Printer BD 88,89,90,91


Project code : 91.4KZ01.001 DCBATOUT 1D05V_VTT
D

DDR3
PCB P/N : 48.4KZ01.011 SYSTEM DC/DC
TPS51123 41
800MHz Intel CPU Revision : 10250-1
IO BD INPUTS OUTPUTS
(Cardreader+Audio+USB) 5V_AUX_S5
3D3V_AUX_S5
DDRIII 1066/1333/1666 Channel A DCBATOUT 5V_S5
Sandy Bridge DDRIII Slot 0 3D3V_S5
NVIDIA PCIe x 16 1066/1333/166614
LED BD N12P-GE/GV (Discrete only) SYSTEM DC/DC
DDRIII 1066/1333/1666 Channel B DDRIII Slot 1 TPS51218 46
N12M-GE DDRIII: 1066/1333/1666 MHz
1066/1333/166615 INPUTS OUTPUTS
1D5V_S3
4,5,6,7,8,9,10 DCBATOUT
USB 83.84,85,86,87 DDR_VREF_S3

SYSTEM DC/DC
HDMI FDI x 4 x 2 NCP5911 44
C 51 (UMA only) DMI x 4 C
INPUTS OUTPUTS
HDMI DCBATOUT VCC_GFXCORE
LCD
49
LVDS PCIE x 1
GLAN RJ45 VGA
RTL8111E CONN 59 RT8208A 92
RGB CRT
Intel 31
CRT 50
INPUTS OUTPUTS
PCH PCIE x 1/USB2.0 x 1 Mini-Card
DCBATOUT VGA_CORE

Bluetooth USB2.0 x 3 TI CHARGER


63 Cougar Point WLAN 65
BQ24745 40
14 USB 2.0/1.1 ports Mini-Card INPUTS OUTPUTS
CAMERA SATA x 1/USB2.0 x 1
49 ETHERNET (10/100/1000Mb) +DC_IN_S5
WWAN 66 SIM +PBATT DCBATOUT
66
High Definition Audio 26
Finger Print BD Finger Print 64 SATA ports (6) MB SYSTEM DC/DC
USB 2.0 x 3 RT8015B 47
PCIE ports (8) USB x 3
INPUTS OUTPUTS
CardReader LPC I/F
USB 2.0 x 1
I/O BD

B SD/MMC+/MS/ Realtek ACPI 1.1 3D3V_S5 1D8V_S0 B

MS Pro/xD 74 RTS5139 USB 2.0 x 1/SATA x 1 E-SATA/USB SYSTEM DC/DC


57
comb G9091-180T11U 24,93

17,18,19,20,21,22,23,24,25 INPUTS
26 OUTPUTS
AZALIA
SATA x 2 3D3V_S5 1D5V_S5
HDD
56 3D3V_S0 1D8V_VGA_S0

LDO
SPI

ODD 46
LPC Bus

56 RT9026
Internal DMIC Azalia
INPUTS OUTPUTS
CODEC
HP1 Flash ROM LPC debug port 5V_S5 0D75V_S0
Codec_ALC272 71
I/O BD

4MB 60
MIC IN
PCB LAYER
29 L1:Top L5:VCC
L2:GND L6:Signal
KBC SMBus L3:Signal L7:GND
A
NUVOTON L4:Signal L8:Signal
A
<Variant Name>
NPCE795G 27
2CH SPEAKER Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Touch Int. Thermal Block Diagram
G-Sensor Fan Size Document Number Rev
PAD KB

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EMC2103-2-AP 28 A3
79 69 69 2528 LA470 -1
Date: Thursday, December 16, 2010 Sheet 2 of 97
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A B C D E
PCH Strapping Huron River Schematic Checklist Rev.0_7 Processor Strapping Huron River Schematic Checklist Rev.0_7
Name
SPKR
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Schematics Notes
Reboot option at power-up
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ
- 10-kΩ weak pull-up resistor.
Pin Name

CFG[2]
Strap Description

PCI-Express Static
Lane Reversal
Configuration (Default value for each bit is
1 unless specified otherwise)

1:
0:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value

1
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
Disabled - No Physical Display Port attached to
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
4 GNT2#/GPIO53 Mobile: Used as GPIO only
Enabled - An external Display Port device is
0 4
GNT1#/GPIO51 Pull-up resistors are not required on these signals. 0: connectd to the EMBEDDED display Port
If pull-ups are used, they should be tied to the Vcc3_3power rail.
CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
SPI_MOSI function 2 disabled
Straps 11
Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
weak pull-up resistor [CRB has it pulled up
NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion
1
0: PEG Wait for BIOS for training
Disable Danbury:Leave floating (internal pull-down)

NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features. Voltage Rails
HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
Platform design should provide appropriate pull-up or pull-down depending on ACTIVE IN
/GPIO[33]
3 the desired settings. If a jumper option is used to tie this signal to GND as 5V_S0
3D3V_S0
5V
3.3V 3
required by the functional strap, the signal should be pulled low through a weak 1D8V_S0 1.8V
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D5V_S0 1.5V
1D05V_VTT 1.05V
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
strapping functions. VCC_CORE 0.35V to 1.5V
VCC_GFXCORE 0.4 to 1.25V S0
1D8V_VGA_S0 1.8V
3D3V_VGA_S0 3.3V CPU Core Rail
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 1V_VGA_S0 1V Graphics Core Rail

HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
GPIO15 1D5V_S3 1.5V S3
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
suite with confidentiality
Note : This is an un-muxed signal.
BT+ 6V-14.1V AC Brick Mode only
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
3D3V_S5 3.3V
3D3V_AUX_S5 3.3V
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
2 Default = Do not connect (floating) 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
High(1) = Enables the internal VccVRM to have a clean supply for
GPIO27 analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
circuits for analog rails. 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx

USB Table
Pair Device
SMBus ADDRESSES
PCIE Routing 0 Touch Panel / 3G SIM
1 USB Ext. port 1 (HS) I 2 C / SMBus Addresses
HURON RIVER ORB
2 Fingerprint Device Ref Des Address Hex Bus
LANE1 Mini Card2(WWAN)
3 BLUETOOTH EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 Onboard LAN SATA Table 4 Mini Card2 (WWAN) Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA

LANE3 Card Reader 5 CARD READER


SATA EC SMBus 2
6 X SML1_CLK/SML1_DATA
PCH SML1_CLK/SML1_DATA
LANE4 Mini Card1(WLAN) Pair Device eDP
7 X SML1_CLK/SML1_DATA
1 <Variant Name>
1
0 HDD1 8 USB Ext. port 4 / E-SATA /USB CHARGER
LANE5 USB3.0
1 HDD2 9 USB Ext. port 2 PCH SMBus
PCH_SMBDATA/PCH_SMBCLK
Wistron Corporation
SO-DIMMA (SPD) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
LANE6 Intel GBE LAN 2 N/A 10 USB Ext. port 3 SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
Digital Pot PCH_SMBDATA/PCH_SMBCLK
G-Sensor PCH_SMBDATA/PCH_SMBCLK Title
LANE7 Dock 3 N/A 11 Mini Card1 (WLAN) MINI PCH_SMBDATA/PCH_SMBCLK
4 ODD 12 CAMERA PCH_SMBDATA/PCH_SMBCLK Table of Content

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Size Document Number Rev
LANE8 New Card 5 ESATA 13 New Card A3
-1
LA470
Thursday, December 16, 2010
Date: Sheet 3 of 97
5 4 3 2 1
SSID = CPU
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Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

1D05V_VTT
CPU1A
J22 PEG_IRCOMP_R R401 1 2 24D9R2F-L-GP
PEG_ICOMPI
19 DMI_TXN[3:0] SANDY PEG_ICOMPO J21
DMI_TXN0 B27 H22
DMI_RX#0 PEG_RCOMPO
D DMI_TXN1
DMI_TXN2
B25
A25
DMI_RX#1 PEG_RXN[0..15]
D
DMI_RX#2 PEG_RXN[0..15] 83
DMI_TXN3 B24 K33 PEG_RXN15
DMI_RX#3 PEG_RX#0 PEG_RXN14
19 DMI_TXP[3:0] PEG_RX#1 M35
DMI_TXP0 B28 L34 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
B26 DMI_RX1 PEG_RX#3 J35

DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 DMI_RX3 PEG_RX#5 H34
H31 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 DMI_TX#0 PEG_RX#7 G33
DMI_RXN1 E22 G30 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 DMI_TX#2 PEG_RX#9 F35
DMI_RXN3 D21 E34 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 E32
DMI_RXP0 G22 D33 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 DMI_TX1 PEG_RX#13 D31

PCI EXPRESS* - GRAPHICS


DMI_RXP2 F20 B33 PEG_RXN1
DMI_RXP3 DMI_TX2 PEG_RX#14 PEG_RXN0
C21 DMI_TX3 PEG_RX#15 C32
PEG_RXP[0..15]
PEG_RXP[0..15] 83
J33 PEG_RXP15
PEG_RX0 PEG_RXP14
PEG_RX1 L35
K34 PEG_RXP13
19 FDI_TXN[7:0] FDI_TXN0 PEG_RX2 PEG_RXP12
A21 FDI0_TX#0 PEG_RX3 H35
FDI_TXN1 H19 H32 PEG_RXP11
FDI_TXN2 FDI0_TX#1 PEG_RX4 PEG_RXP10
E19 FDI0_TX#2 PEG_RX5 G34
FDI_TXN3 F18 G31 PEG_RXP9

Intel(R) FDI
FDI_TXN4 FDI0_TX#3 PEG_RX6 PEG_RXP8
B21 FDI1_TX#0 PEG_RX7 F33
FDI_TXN5 C20 F30 PEG_RXP7
FDI_TXN6 FDI1_TX#1 PEG_RX8 PEG_RXP6
D18 FDI1_TX#2 PEG_RX9 E35
C FDI_TXN7 E17 FDI1_TX#3 PEG_RX10 E33
F32
PEG_RXP5
PEG_RXP4 C
PEG_RX11 PEG_RXP3
19 FDI_TXP[7:0] PEG_RX12 D34
FDI_TXP0 A22 E31 PEG_RXP2
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 FDI0_TX1 PEG_RX14 C33
FDI_TXP2 E20 B32 PEG_RXP0 PEG_TXN[0..15]
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
G18 FDI0_TX3
FDI_TXP4 B20 M29 PEG_C_TXN15 C401 1 2OPS PEG_TXN15
FDI_TXP5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14 C402 SCD1U10V2KX-5GP PEG_TXN14
C19 FDI1_TX1 PEG_TX#1 M32 1 2OPS
FDI_TXP6 D19 M31 PEG_C_TXN13 C403 1 2OPS SCD1U10V2KX-5GP PEG_TXN13
FDI_TXP7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12 C404 SCD1U10V2KX-5GP PEG_TXN12
F17 FDI1_TX3 PEG_TX#3 L32 1 2OPS
L29 PEG_C_TXN11 C405 1 2OPS SCD1U10V2KX-5GP PEG_TXN11
PEG_TX#4 PEG_C_TXN10 C406 SCD1U10V2KX-5GP PEG_TXN10
19 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#5 K31 1 2OPS
J17 K28 PEG_C_TXN9 C407 1 2OPS SCD1U10V2KX-5GP PEG_TXN9
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
J30 PEG_C_TXN8 C408 1 2OPS SCD1U10V2KX-5GP PEG_TXN8
PEG_TX#7 PEG_C_TXN7 C409 SCD1U10V2KX-5GP PEG_TXN7
19 FDI_INT H20 FDI_INT PEG_TX#8 J28 1 2OPS
H29 PEG_C_TXN6 C410 1 2OPS SCD1U10V2KX-5GP PEG_TXN6
PEG_TX#9 PEG_C_TXN5 C411 SCD1U10V2KX-5GP PEG_TXN5
Note: 19 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#10 G27 1 2OPS
EDP_ICOMPO and EDP_COMPIO should not be left H17 E29 PEG_C_TXN4 C412 1 2OPS SCD1U10V2KX-5GP PEG_TXN4
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
F27 PEG_C_TXN3 C413 1 2OPS SCD1U10V2KX-5GP PEG_TXN3
floating. PEG_TX#12
D28 PEG_C_TXN2 C414 1 2OPS SCD1U10V2KX-5GP PEG_TXN2
PEG_TX#13 PEG_C_TXN1 C415 SCD1U10V2KX-5GP PEG_TXN1
PEG_TX#14 F26 1 2OPS
E25 PEG_C_TXN0 C416 1 2OPS SCD1U10V2KX-5GP PEG_TXN0
R402 1 PEG_TX#15 PEG_TXP[0..15]
1D05V_VTT 2 24D9R2F-L-GP DP_COMP A18 EDP_COMPIO
SCD1U10V2KX-5GP
PEG_TXP[0..15] 83
A17 M28 PEG_C_TXP15 C417 1 2OPS PEG_TXP15
R403 1 eDP_HPD EDP_ICOMPO PEG_TX0 PEG_C_TXP14 C418 SCD1U10V2KX-5GP PEG_TXP14
2 B16 EDP_HPD PEG_TX1 M33 1 2OPS
Signal Routing Guideline: DY 10KR2J-3-GP M30 PEG_C_TXP13 C419 1 2OPS SCD1U10V2KX-5GP PEG_TXP13
PEG_TX2 PEG_C_TXP12 C420 SCD1U10V2KX-5GP PEG_TXP12
EDP_ICOMPO keep W/S=12/15 mils and routing PEG_TX3 L31 1 2OPS
C15 L28 PEG_C_TXP11 C421 1 2OPS SCD1U10V2KX-5GP PEG_TXP11
length less than 500 mils. D15
EDP_AUX PEG_TX4
K30 PEG_C_TXP10 C422 1 2OPS SCD1U10V2KX-5GP PEG_TXP10
B EDP_COMPIO keep W/S=4/15 mils and routing EDP_AUX#
eDP PEG_TX5
PEG_TX6 K27 PEG_C_TXP9 C423 1 2OPS SCD1U10V2KX-5GP PEG_TXP9 B
length less than 500 mils. J29 PEG_C_TXP8 C424 1 2OPS SCD1U10V2KX-5GP PEG_TXP8
PEG_TX7 PEG_C_TXP7 C425 SCD1U10V2KX-5GP PEG_TXP7
C17 EDP_TX0 PEG_TX8 J27 1 2OPS
F16 H28 PEG_C_TXP6 C426 1 2OPS SCD1U10V2KX-5GP PEG_TXP6
EDP_TX1 PEG_TX9 PEG_C_TXP5 C427 SCD1U10V2KX-5GP PEG_TXP5
C16 EDP_TX2 PEG_TX10 G28 1 2OPS
G15 E28 PEG_C_TXP4 C428 1 2OPS SCD1U10V2KX-5GP PEG_TXP4
EDP_TX3 PEG_TX11 PEG_C_TXP3 C429 SCD1U10V2KX-5GP PEG_TXP3
If HPD is disabled while eDP interface is still enabled, PEG_TX12 F28 1 2OPS
connect it to CPU VCCIO via a 10-k ohm pull-up C18 D27 PEG_C_TXP2 C430 1 2OPS SCD1U10V2KX-5GP PEG_TXP2
EDP_TX#0 PEG_TX13 PEG_C_TXP1 C431 SCD1U10V2KX-5GP PEG_TXP1
E16 E26 1 2OPS
resistor on the motherboard. This signal can be left as D16
EDP_TX#1 PEG_TX14
D25 PEG_C_TXP0 C432 1 2OPS SCD1U10V2KX-5GP PEG_TXP0
no connect if entire eDP interface is disabled. EDP_TX#2 PEG_TX15 SCD1U10V2KX-5GP
F15 EDP_TX#3

SANDY
62.10055.421
2ND = 62.10040.771
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)
Size Document Number Rev

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A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 4 of 97
5 4 3 2 Disabling Guidelines: 1
SSID = CPU
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2 OF 9
If motherboard only supports external graphics:
CPU1B
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
SANDY Connect DPLL_REF_SSCLK# on Processor to VCCP
BCLK A28 CLK_EXP_P 20 through 1K +/- 5% resistorpower (~15 mW) may be

MISC

CLOCKS
18 H_SNB_IVB# C26 A27 CLK_EXP_N 20
1D05V_VTT SNB_IVB# BCLK# wasted.
RN502
R501 1 SKTOCC#_R AN34 CLK_DP_P_R 1 4
TPAD14-GP TP501 SKTOCC#
1 2 H_PROCHOT# A16 CLK_DP_P_R CLK_DP_P_R 20 CLK_DP_N_R 2 3 1D05V_VTT
DPLL_REF_SSCLK CLK_DP_N_R
DPLL_REF_SSCLK# A15 CLK_DP_N_R 20
62R2J-GP SRN1KJ-7-GP
D DY D
1

1 H_CATERR# AL33
TPAD14-GP TP502 CATERR#
C502
SC47P50V2JN-3GP SB_0830
2

THERMAL
1R502 2
AN33 R8 4K99R2F-L-GP SM_DRAMRST# 37
22,27 H_PECI PECI SM_DRAMRST#

DDR3
MISC
R513
27,42 H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R506 1 2 140R2F-GP
PROCHOT# SM_RCOMP0 SM_RCOMP_1 R507 1
SM_RCOMP1 A5 2 25D5R2F-GP
56R2J-4-GP A4 SM_RCOMP_2 R508 1 2 200R2F-L-GP
SM_RCOMP2
22,36 H_THERMTRIP# AN32 THERMTRIP#
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.

1R503 2 H_CPUPW RGD_R


PRDY# AP29 XDP_PRDY# 1 TP511 TPAD14-GP
10KR2J-3-GP AP27 XDP_PREQ# 1
PREQ# TP512 TPAD14-GP
AR26 XDP_TCLK 1
TCK TP513 TPAD14-GP

PWR MANAGEMENT
XDP_TMS

JTAG & BPM


TMS AR27 1 TP514 TPAD14-GP
AM34 AP30 XDP_TRST# 1
19 H_PM_SYNC PM_SYNC TRST# TP515 TPAD14-GP
AR28 XDP_TDI 1
TDI TP516 TPAD14-GP
R504 AP26 XDP_TDO 1
TDO TP517 TPAD14-GP 1D05V_VTT
11,22,36,97 H_CPUPW RGD 1 2 H_CPUPW RGD_R AP33 UNCOREPWRGOOD
0R0402-PAD
C AL35 XDP_DBRESET# RN501 C
R505 2 VDDPW RGOOD DBR# XDP_TDO
19,37 PM_DRAM_PW RGD 1 V8 SM_DRAMPWROK 1 8
0R2J-2-GP XDP_TMS
DY XDP_BPM0 XDP_TDI
2 7
BPM#0 AT28 1 TP503 TPAD14-GP 3 6
37 VDDPW RGOOD AR29 XDP_BPM1 1 XDP_TCLK 4 5
BPM#1 TP504 TPAD14-GP
AR30 XDP_BPM2 1
BPM#2 TP505 TPAD14-GP
BUF_CPU_RST# AR33 AT30 XDP_BPM3 1 SRN51J-1-GP
RESET# BPM#3 TP506 TPAD14-GP
AP32 XDP_BPM4 1
BPM#4 TP507 TPAD14-GP
AR31 XDP_BPM5 1 XDP_TRST# R511 1 2 51R2J-2-GP
BPM#5 TP508 TPAD14-GP
AT31 XDP_BPM6 1
BPM#6 TP509 TPAD14-GP
AR32 XDP_BPM7 1
BPM#7 TP510 TPAD14-GP

SANDY
1 VDDPW RGOOD 62.10055.421 SB_0820
TPAD14-GP TP518
2ND = 62.10040.771
3D3V_S0

22,36 XDP_DBRESET# XDP_DBRESET# 1 2


R516 1KR2J-1-GP

1D05V_VTT
B B
1

R512
DY 75R2J-1-GP
2

R510
1 2 BUF_CPU_RST#
11,18,27,31,36,65,66,71,83,97 PLT_RST#

1K5R2F-2-GP
1

R509
750R2F-GP
2

A <Variant Name>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (THERMAL/CLOCK/PM )

www.vinafix.vn
Size Document Number Rev
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 5 of 97
5 4 3 2 1

SSID = CPU
www.rosefix.com CPU1C

SANDY
3 OF 9 CPU1D 4 OF 9

AB6
SANDY AE2
M_A_DQ[63:0] SA_CLK0 M_A_DIM0_CLK_DDR0 14 M_B_DQ[63:0] SB_CLK0 M_B_DIM0_CLK_DDR0 15
14 M_A_DQ[63:0] SA_CLK#0 AA6 M_A_DIM0_CLK_DDR#0 14 15 M_B_DQ[63:0] SB_CLK#0 AD2 M_B_DIM0_CLK_DDR#0 15
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D D5 SA_DQ1 A7 SB_DQ1 D
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 SA_DQ3 C8 SB_DQ3
M_A_DQ4 D6 AA5 M_B_DQ4 A9 AE1
M_A_DQ5 SA_DQ4 SA_CLK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CLK1 M_B_DIM0_CLK_DDR1 15
C6 SA_DQ5 SA_CLK#1 AB5 M_A_DIM0_CLK_DDR#1 14 A8 SB_DQ5 SB_CLK#1 AD1 M_B_DIM0_CLK_DDR#1 15
M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 SA_DQ7 D8 SB_DQ7
M_A_DQ8 F10 M_B_DQ8 G4
M_A_DQ9 SA_DQ8 M_B_DQ9 SB_DQ8
F8 SA_DQ9 F4 SB_DQ9
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ10 SA_CLK2 M_B_DQ11 SB_DQ10 SB_CLK2
G9 SA_DQ11 SA_CLK#2 AA4 G1 SB_DQ11 SB_CLK#2 AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 SA_DQ13 F5 SB_DQ13
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ14 M_B_DQ15 SB_DQ14
G7 SA_DQ15 G2 SB_DQ15
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ16 SA_CLK3 M_B_DQ17 SB_DQ16 SB_CLK3
K5 SA_DQ17 SA_CLK#3 AA3 J8 SB_DQ17 SB_CLK#3 AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 SA_DQ19 K9 SB_DQ19
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ20 M_B_DQ21 SB_DQ20
J4 SA_DQ21 J10 SB_DQ21
M_A_DQ22 J2 AK3 M_B_DQ22 K8 AD3
M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15
K2 SA_DQ23 SA_CS#1 AL3 M_A_DIM0_CS#1 14 K7 SB_DQ23 SB_CS#1 AE3 M_B_DIM0_CS#1 15
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 SA_DQ25 SA_CS#3 AH1 N4 SB_DQ25 SB_CS#3 AE6
M_A_DQ26 N8 M_B_DQ26 N2
M_A_DQ27 SA_DQ26 M_B_DQ27 SB_DQ26
N7 SA_DQ27 N1 SB_DQ27
M_A_DQ28 M10 M_B_DQ28 M4
M_A_DQ29 SA_DQ28 M_B_DQ29 SB_DQ28
M9 SA_DQ29 SA_ODT0 AH3 M_A_DIM0_ODT0 14 N5 SB_DQ29 SB_ODT0 AE4 M_B_DIM0_ODT0 15

DDR SYSTEM MEMORY B


C M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4 C
M_A_DQ31
M_A_DQ32
M7
AG6
SA_DQ30
SA_DQ31 DDR SYSTEM MEMORY A SA_ODT1
SA_ODT2 AG2
AH2
M_A_DIM0_ODT1 14 M_B_DQ31
M_B_DQ32
M1
AM5
SB_DQ30
SB_DQ31
SB_ODT1
SB_ODT2 AD5
AE5
M_B_DIM0_ODT1 15

M_A_DQ33 SA_DQ32 SA_ODT3 M_B_DQ33 SB_DQ32 SB_ODT3


AG5 SA_DQ33 AM6 SB_DQ33
M_A_DQ34 AK6 M_B_DQ34 AR3
M_A_DQ35 SA_DQ34 M_B_DQ35 SB_DQ34
AK5 SA_DQ35 AP3 SB_DQ35
M_A_DQ36 AH5 M_A_DQS#[7:0] 14 M_B_DQ36 AN3 M_B_DQS#[7:0] 15
M_A_DQ37 SA_DQ36 M_A_DQS#0 M_B_DQ37 SB_DQ36 M_B_DQS#0
AH6 SA_DQ37 SA_DQS#0 C4 AN2 SB_DQ37 SB_DQS#0 D7
M_A_DQ38 AJ5 G6 M_A_DQS#1 M_B_DQ38 AN1 F3 M_B_DQS#1
M_A_DQ39 SA_DQ38 SA_DQS#1 M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS#1 M_B_DQS#2
AJ6 SA_DQ39 SA_DQS#2 J3 AP2 SB_DQ39 SB_DQS#2 K6
M_A_DQ40 AJ8 M6 M_A_DQS#3 M_B_DQ40 AP5 N3 M_B_DQS#3
M_A_DQ41 SA_DQ40 SA_DQS#3 M_A_DQS#4 M_B_DQ41 SB_DQ40 SB_DQS#3 M_B_DQS#4
AK8 SA_DQ41 SA_DQS#4 AL6 AN9 SB_DQ41 SB_DQS#4 AN5
M_A_DQ42 AJ9 AM8 M_A_DQS#5 M_B_DQ42 AT5 AP9 M_B_DQS#5
M_A_DQ43 SA_DQ42 SA_DQS#5 M_A_DQS#6 M_B_DQ43 SB_DQ42 SB_DQS#5 M_B_DQS#6
AK9 SA_DQ43 SA_DQS#6 AR12 AT6 SB_DQ43 SB_DQS#6 AK12
M_A_DQ44 AH8 AM15 M_A_DQS#7 M_B_DQ44 AP6 AP15 M_B_DQS#7
M_A_DQ45 SA_DQ44 SA_DQS#7 M_B_DQ45 SB_DQ44 SB_DQS#7
AH9 SA_DQ45 AN8 SB_DQ45
M_A_DQ46 AL9 M_B_DQ46 AR6
M_A_DQ47 SA_DQ46 M_B_DQ47 SB_DQ46
AL8 SA_DQ47 AR5 SB_DQ47
M_A_DQ48 AP11 M_A_DQS[7:0] 14 M_B_DQ48 AR9 M_B_DQS[7:0] 15
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ49 SB_DQ48 M_B_DQS0
AN11 SA_DQ49 SA_DQS0 D4 AJ11 SB_DQ49 SB_DQS0 C7
M_A_DQ50 AL12 F6 M_A_DQS1 M_B_DQ50 AT8 G3 M_B_DQS1
M_A_DQ51 SA_DQ50 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS1 M_B_DQS2
AM12 SA_DQ51 SA_DQS2 K3 AT9 SB_DQ51 SB_DQS2 J6
M_A_DQ52 AM11 N6 M_A_DQS3 M_B_DQ52 AH11 M3 M_B_DQS3
M_A_DQ53 SA_DQ52 SA_DQS3 M_A_DQS4 M_B_DQ53 SB_DQ52 SB_DQS3 M_B_DQS4
AL11 SA_DQ53 SA_DQS4 AL5 AR8 SB_DQ53 SB_DQS4 AN6
M_A_DQ54 AP12 AM9 M_A_DQS5 M_B_DQ54 AJ12 AP8 M_B_DQS5
M_A_DQ55 SA_DQ54 SA_DQS5 M_A_DQS6 M_B_DQ55 SB_DQ54 SB_DQS5 M_B_DQS6
AN12 SA_DQ55 SA_DQS6 AR11 AH12 SB_DQ55 SB_DQS6 AK11
M_A_DQ56 AJ14 AM14 M_A_DQS7 M_B_DQ56 AT11 AP14 M_B_DQS7
M_A_DQ57 SA_DQ56 SA_DQS7 M_B_DQ57 SB_DQ56 SB_DQS7
AH14 SA_DQ57 AN14 SB_DQ57
M_A_DQ58 AL15 M_B_DQ58 AR14
B M_A_DQ59 SA_DQ58 M_B_DQ59 SB_DQ58 B
AK15 SA_DQ59 AT14 SB_DQ59
M_A_DQ60 AL14 M_B_DQ60 AT12
M_A_DQ61 SA_DQ60 M_A_A0 M_A_A[15:0] 14 M_B_DQ61 SB_DQ60 M_B_A0 M_B_A[15:0] 15
AK14 SA_DQ61 SA_MA0 AD10 AN15 SB_DQ61 SB_MA0 AA8
M_A_DQ62 AJ15 W1 M_A_A1 M_B_DQ62 AR15 T7 M_B_A1
M_A_DQ63 SA_DQ62 SA_MA1 M_A_A2 M_B_DQ63 SB_DQ62 SB_MA1 M_B_A2
AH15 SA_DQ63 SA_MA2 W2 AT15 SB_DQ63 SB_MA2 R7
W7 M_A_A3 T6 M_B_A3
SA_MA3 M_A_A4 SB_MA3 M_B_A4
SA_MA4 V3 SB_MA4 T2
V2 M_A_A5 T4 M_B_A5
SA_MA5 M_A_A6 SB_MA5 M_B_A6
SA_MA6 W3 SB_MA6 T3
14 M_A_BS0 AE10 W6 M_A_A7 15 M_B_BS0 AA9 R2 M_B_A7
SA_BS0 SA_MA7 M_A_A8 SB_BS0 SB_MA7 M_B_A8
14 M_A_BS1 AF10 SA_BS1 SA_MA8 V1 15 M_B_BS1 AA7 SB_BS1 SB_MA8 T5
14 M_A_BS2 V6 W5 M_A_A9 15 M_B_BS2 R6 R3 M_B_A9
SA_BS2 SA_MA9 M_A_A10 SB_BS2 SB_MA9 M_B_A10
SA_MA10 AD8 SB_MA10 AB7
V4 M_A_A11 R1 M_B_A11
SA_MA11 M_A_A12 SB_MA11 M_B_A12
SA_MA12 W4 SB_MA12 T1
14 M_A_CAS# AE8 AF8 M_A_A13 15 M_B_CAS# AA10 AB10 M_B_A13
SA_CAS# SA_MA13 M_A_A14 SB_CAS# SB_MA13 M_B_A14
14 M_A_RAS# AD9 SA_RAS# SA_MA14 V5 15 M_B_RAS# AB8 SB_RAS# SB_MA14 R5
14 M_A_W E# AF9 V7 M_A_A15 15 M_B_W E# AB9 R4 M_B_A15
SA_WE# SA_MA15 SB_WE# SB_MA15

SANDY SANDY
62.10055.421 62.10055.421
2ND = 62.10040.771 2ND = 62.10040.771

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 6 of 97
5 4 3 2 1
5 4 3 2 1

SSID = CPU

www.rosefix.com SB_0820

TPAD14-GP
TPAD14-GP

TPAD14-GP
TP715
TP701

TP702
1
1

1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
AK28
AK29
AL26
AL27
AK26
AL29
CPU1E

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
SANDY
5 OF 9

RSVD#L7
RSVD#AG7
RSVD#AE7
RSVD#AK2
RSVD#W8

RSVD#AT26
L7
AG7
AE7
AK2
W8

AT26
CFG6 AL30 AM33
CFG7 CFG6 RSVD#AM33
AM31 AJ27
CFG8 CFG7 RSVD#AJ27
1 AM32
TPAD14-GP TP703 CFG9 CFG8
1 AM30
TPAD14-GP TP704 CFG10 CFG9
1 AM28
TPAD14-GP TP705 CFG11 CFG10
D 1 AM26 D
TPAD14-GP TP706 CFG12 CFG11
1 AN28
TPAD14-GP TP707 CFG13 CFG12
1 AN31 T8
TPAD14-GP TP708 CFG14 CFG13 RSVD#T8
1 AN26 J16
TPAD14-GP TP709 CFG15 CFG14 RSVD#J16
1 AM27 H16
TPAD14-GP TP710 CFG16 CFG15 RSVD#H16
1 AK31 G16
TPAD14-GP TP711 CFG17 CFG16 RSVD#G16
1 AN29
TPAD14-GP TP712 CFG17

AR35
RSVD#AR35
AJ31 AT34
RSVD#AJ31 RSVD#AT34
AH31 AT33
RSVD#AH31 RSVD#AT33
AJ33 AP35
RSVD#AJ33 RSVD#AP35
AH33 AR34
RSVD#AH33 RSVD#AR34

AJ26
M3 - Processor Generated SO-DIMM VREF_DQ RSVD#AJ26

RESERVED
R708 1
DY M_VREF_DQ_DIMM0_C RSVD#B34
B34
M_VREF_DQ_DIMM0 DY 2 0R2J-2-GP B4 A33
R709 1 M_VREF_CA_DIMM0_C RSVD#B4 RSVD#A33
M_VREF_CA_DIMM0 2 0R2J-2-GP D1 A34
RSVD#D1 RSVD#A34
B35
RSVD#B35
C35
RSVD#C35
4
3
F25
RN701 RSVD#F25
F24
RSVD#F24
SRN1KJ-7-GP F23
RSVD#F23
D24 AJ32
RSVD#D24 RSVD#AJ32
G25 AK32
RSVD#G25 RSVD#AK32
G24
1
2

RSVD#G24
E23
RSVD#E23 TP713
D23
RSVD#D23 TPAD14-GP
C30 AH27 1
SB: 20100727_SHR RSVD#C30 RSVD#AH27
A31
RSVD#A31
B30
RSVD#B30
B29
RSVD#B29 CLK_XDP_ITP_P TP716 TPAD14-GP
D30 AN35 1
RSVD#D30 RSVD#AN35 CLK_XDP_ITP_N TP714 TPAD14-GP
20 mils B31 AM35 1
RSVD#B31 RSVD#AM35
A30
RSVD#A30
C C29 C
RSVD#C29
SB_0820
J20
RSVD#J20
B18 AT2
TPAD14-GP TP717 H_VCCP_SEL RSVD#B18 RSVD#AT2
1 A19 AT1
RSVD#A19 RSVD#AT1
AR1
RSVD#AR1
J15
SB_0830 RSVD#J15

SANDY
62.10055.421
2ND = 62.10040.771

CFG2
B B
1

R702 PEG Static Lane Reversal


1KR2J-1-GP
OPS 1: Normal Operation; Lane #
CFG2 definition matches socket pin map definition
2

0:Lane Reversed

CFG4

Display Port Presence Strap


1

R703 CFG4 1: Disabled; No Physical Display Port


1KR2J-1-GP attached to Embedded Display Port
DY
0: Enabled; An external Display Port device is
2

connected to the Embedded Display Port

CFG5

CFG6 PCIE Port Bifurcation Straps


1

R701 R704 CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled


DY DY
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
2

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled


1KR2J-1-GP

1KR2J-1-GP

A A

CFG7

<Variant Name>
1

PEG DEFER TRAINING


R705
DY 1KR2J-1-GP
CFG7
1: PEG Train immediately following xxRESETB de assertion Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0: PEG Wait for BIOS for training Taipei Hsien 221, Taiwan, R.O.C.
2

Title

CPU (RESERVED)
Size Document Number Rev

www.vinafix.vn
A2
LA470 -1
Date: Thursday, December 16, 2010 Sheet 7 of 97
5 4 3 2 1
5 4 3 2 1

SSID = CPU

PROCESSOR CORE POWER


www.rosefix.com VCC_CORE
CPU1F

SANDY
POWER 6 OF 9

1D05V_VTT
53A AG35 VCC
AG34 VCC VCCIO AH13
VCC_CORE

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AG33 VCC VCCIO AH10

C805

C806

C807

C808

C809

C810

C838

C839

C840

C841
D AG32 VCC VCCIO AG10 D

1
AG31 VCC VCCIO AC10
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AG30 VCC VCCIO Y10
C801

C802

C803

C804

C811
AG29 U10

2
VCC VCCIO
1

1
AG28 VCC VCCIO P10
AG27 VCC VCCIO L10
AG26 J14
2

2
VCC VCCIO
AF35 VCC VCCIO J13
AF34 VCC VCCIO J12
AF33 VCC VCCIO J11
AF32 VCC VCCIO H14
AF31 VCC VCCIO H12
AF30 VCC VCCIO H11
AF29 VCC VCCIO G14
AF28 VCC VCCIO G13

PEG AND DDR


SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AF27 VCC VCCIO G12
C815

C817

C818

C819

C820
AF26 VCC VCCIO F14
1

1 AD35 VCC VCCIO F13


AD34 VCC VCCIO F12
AD33 F11
2

VCC VCCIO
AD32 VCC VCCIO E14
AD31 E12 1D05V_VTT
VCC VCCIO
AD30 VCC
AD29 VCC VCCIO E11

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AD28 VCC VCCIO D14

C812

C813

C814

C829

C830

C842

C843

C844

C845
AD27 VCC VCCIO D13

1
AD26 VCC VCCIO D12
AC35 VCC VCCIO D11
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AC34 C14

2
VCC VCCIO
C816

C821

C822

C823

C824

C825

C826

C827
AC33 VCC VCCIO C13
1

1
AC32 VCC VCCIO C12
C AC31 VCC VCCIO C11 C
AC30 B14
2

2 VCC VCCIO
AC29 VCC VCCIO B12
AC28 VCC VCCIO A14
AC27 VCC VCCIO A13
AC26 VCC VCCIO A12
AA35 VCC VCCIO A11
AA34 VCC
AA33 VCC VCCIO J23
AA32 VCC
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

AA31 VCC
C837

C836

C835

C834

C833

C832

C831

C828

AA30 VCC R804 need to close to CPU


1

AA29 VCC
AA28 VCC
AA27 1D05V_VTT
2

VCC
AA26 VCC

CORE SUPPLY
Y35 VCC
Y34 VCC
Y33 SB_0819
VCC
Y32 VCC
Y31 VCC
Y30 H_CPU_SVIDDAT_R R804 1 2 130R2F-1-GP
VCC
Y29 VCC
Y28 VCC
Y27 VCC
Y26 VCC
V35 VCC

SVID
V34 AJ29 H_CPU_SVIDALRT# R803 1 2 43R2J-GP
VCC VIDALERT# VR_SVID_ALERT# 42
V33 AJ30 H_CPU_SVIDCLK_R R805 1 2 0R0402-PAD
VCC VIDSCLK H_CPU_SVIDDAT_R R806 H_CPU_SVIDCLK 42
V32 VCC VIDSOUT AJ28 1 2 0R0402-PAD H_CPU_SVIDDAT 42
V31 VCC
B V30 VCC B
V29 VCC
V28 VCC
V27 VCC
V26 VCC
U35 VCC
U34 VCC
U33 VCC
U32 VCC
U31 VCC
U30 VCC
U29 VCC
U28 VCC
U27 VCC
U26 VCC
R35 VCC_CORE
VCC
R34 VCC
R33 VCC R801, R802 need to close to CPU

1
R32 VCC
R31 R801
VCC 100R2F-L1-GP-U
R30 VCC
R29 VCC
SENSE LINES

R28

2
VCC
R27 VCC VCC_SENSE AJ35 VCCSENSE 42
R26 VCC VSS_SENSE AJ34 VSSSENSE 42
P35 VCC

1
P34 VCC
P33 R802
VCC 100R2F-L1-GP-U
P32 VCC VCCIO_SENSE B10 VCCIO_SENSE 45
P31 VCC VSSIO_SENSE A10 VSSIO_SENSE 45
P30

2
VCC
A P29 VCC A
P28 VCC <Variant Name>
P27 VCC
P26 VCC
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)

www.vinafix.vn
SANDY Size Document Number Rev
Custom
62.10055.421
2ND = 62.10040.771 LA470 -1
Date: Thursday, December 16, 2010 Sheet 8 of 97
5 4 3 2 1
5 4 3 2 1

Close to CPU
SSID = CPU
www.rosefix.comPOWER VCC_GFXCORE

1
VCC_GFXCORE
CPU1G 7 OF 9 R906
100R2F-L1-GP-U
PROCESSOR VAXG: 24A

SENSE
LINES
AT24 AK35 VCC_AXG_SENSE 42

2
VAXG VAXG_SENSE VCC_AXG_SENSE

RC901
AT23 AK34

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
D D

SC33P50V2JN-3GP
VAXG VSSAXG_SENSE VSS_AXG_SENSE 42

C901

C902

C903

C904

C905

C906
AT21 VSS_AXG_SENSE
VAXG SANDY

1
AT20 VAXG
DY AT18 VAXG

1
AT17

2
VAXG R907
AR24 VAXG
AR23 100R2F-L1-GP-U
VAXG
AR21 VAXG
AR20

2
VAXG

VREF
AR18 VAXG
AR17 VAXG
AP24 AL1 +V_SM_VREF_CNT
VAXG SM_VREF +V_SM_VREF_CNT 37
AP23 VAXG
AP21 VAXG
AP20 VAXG
Routing Guideline:

RC902
AP18 Power from DDR_VREF_S3 and +V_SM_VREF_CNT
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC33P50V2JN-3GP
VAXG
C907

C908

C918

C919

C920

C921
AP17 VAXG should have 10 mils trace width.
1

1
AN24 VAXG
DY AN23 VAXG
AN21 1D5V_S0
2

2
VAXG
AN20 VAXG

DDR3 -1.5V RAILS


AN18 VAXG
AN17 VAXG PROCESSOR VDDQ: 10A

GRAPHICS
AM24 VAXG VDDQ AF7
AM23 AF4

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
VAXG VDDQ

C909

C910

C911

C912

C913

C914
AM21 VAXG VDDQ AF1

1
SB_0831 AM20 AC7
VAXG VDDQ
AM18 VAXG VDDQ AC4
AM17 AC1

2
C VAXG VDDQ C
AL24 VAXG VDDQ Y7
AL23 VAXG VDDQ Y4
AL21 VAXG VDDQ Y1
AL20 VAXG VDDQ U7
AL18 VAXG VDDQ U4
AL17 VAXG VDDQ U1
AK24 VAXG VDDQ P7
AK23 VAXG VDDQ P4
AK21 P1 0D85V_S0
VAXG VDDQ
AK20 VAXG
AK18 VAXG PROCESSOR VCCSA: 6A
AK17 VAXG
AJ24

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
VAXG

C916

C915

C917
AJ23 VAXG

1
AJ21 VAXG
AJ20 TC903
VAXG ST330U2VDM-4-GP
AJ18

2
VAXG
AJ17 VAXG DY
AH24

SA RAIL
VAXG
AH23 VAXG
AH21 VAXG VCCSA M27
AH20 VAXG VCCSA M26
AH18 VAXG VCCSA L26
AH17 VAXG VCCSA J26
VCCSA J25
J24 0D85V_S0
VCCSA
VCCSA H26
VCCSA H25

1
1.8V RAIL
B R902 R902 B
need be close to pin H23.
DY 10R2J-2-GP
1D8V_S0
PROCESSOR VCCPLL: 1.2A

2
B6 H23 VCCSA_SENSE
VCCPLL VCCSA_SENSE VCCSA_SENSE 48

MISC
A6
SC1U10V2KX-1GP

SC1U10V2KX-1GP
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

VCCPLL
C925

C923

C922

C924

A2 VCCPLL
1

C22 H_FC_C22
FC_C22 VCCSA_SEL H_FC_C22 48
C24
2

VCCSA_VID1 VCCSA_SEL 48

2
2
SANDY R904 R903
62.10055.421 10KR2J-3-GP 10KR2J-3-GP
2ND = 62.10040.771

1
1
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 9 of 97
5 4 3 2 1
5 4 3 2 1

SSID = CPU
www.rosefix.com
AT35
AT32
CPU1H

VSS
VSS
8 OF 9

VSS
VSS
AJ22
AJ19
CPU1I 9 OF 9

AT29 VSS VSS AJ16 T35 VSS SANDY VSS F22


AT27 VSS VSS AJ13 T34 VSS VSS F19
AT25 VSS VSS AJ10 T33 VSS VSS E30
AT22 VSS VSS AJ7 T32 VSS VSS E27
D AT19 VSS VSS AJ4 T31 VSS VSS E24 D
AT16 VSS VSS AJ3 T30 VSS VSS E21
AT13 VSS SANDY VSS AJ2 T29 VSS VSS E18
AT10 VSS VSS AJ1 T28 VSS VSS E15
AT7 VSS VSS AH35 T27 VSS VSS E13
AT4 VSS VSS AH34 T26 VSS VSS E10
AT3 VSS VSS AH32 P9 VSS VSS E9
AR25 VSS VSS AH30 P8 VSS VSS E8
AR22 VSS VSS AH29 P6 VSS VSS E7
AR19 VSS VSS AH28 P5 VSS VSS E6
AR16 VSS VSS AH26 P3 VSS VSS E5
AR13 VSS VSS AH25 P2 VSS VSS E4
AR10 VSS VSS AH22 N35 VSS VSS E3
AR7 VSS VSS AH19 N34 VSS VSS E2
AR4 VSS VSS AH16 N33 VSS VSS E1
AR2 VSS VSS AH7 N32 VSS VSS D35
AP34 VSS VSS AH4 N31 VSS VSS D32
AP31 VSS VSS AG9 N30 VSS VSS D29
AP28 VSS VSS AG8 N29 VSS VSS D26
AP25 VSS VSS AG4 N28 VSS VSS D20
AP22 VSS VSS AF6 N27 VSS VSS D17
AP19 VSS VSS AF5 N26 VSS VSS C34
AP16 VSS VSS AF3 M34 VSS VSS C31
AP13 VSS VSS AF2 L33 VSS VSS C28
AP10 VSS VSS AE35 L30 VSS VSS C27
AP7 VSS VSS AE34 L27 VSS VSS C25
AP4 VSS VSS AE33 L9 VSS VSS C23
AP1 VSS VSS AE32 L8 VSS VSS C10
AN30 VSS VSS AE31 L6 VSS VSS C1
C AN27 AE30 L5 B22 C
VSS VSS VSS VSS
AN25 AE29 L4 B19
AN22
AN19
VSS
VSS
VSS
VSS VSS
VSS
VSS
AE28
AE27
L3
L2
VSS
VSS
VSS
VSS VSS
VSS
VSS
B17
B15
AN16 VSS VSS AE26 L1 VSS VSS B13
AN13 VSS VSS AE9 K35 VSS VSS B11
AN10 VSS VSS AD7 K32 VSS VSS B9
AN7 VSS VSS AC9 K29 VSS VSS B8
AN4 VSS VSS AC8 K26 VSS VSS B7
AM29 VSS VSS AC6 J34 VSS VSS B5
AM25 VSS VSS AC5 J31 VSS VSS B3
AM22 VSS VSS AC3 H33 VSS VSS B2
AM19 VSS VSS AC2 H30 VSS VSS A35
AM16 VSS VSS AB35 H27 VSS VSS A32
AM13 VSS VSS AB34 H24 VSS VSS A29
AM10 VSS VSS AB33 H21 VSS VSS A26
AM7 VSS VSS AB32 H18 VSS VSS A23
AM4 VSS VSS AB31 H15 VSS VSS A20
AM3 VSS VSS AB30 H13 VSS VSS A3
AM2 VSS VSS AB29 H10 VSS
AM1 VSS VSS AB28 H9 VSS
AL34 VSS VSS AB27 H8 VSS
AL31 VSS VSS AB26 H7 VSS
AL28 VSS VSS Y9 H6 VSS
AL25 VSS VSS Y8 H5 VSS
AL22 VSS VSS Y6 H4 VSS
AL19 VSS VSS Y5 H3 VSS
AL16 VSS VSS Y3 H2 VSS
AL13 VSS VSS Y2 H1 VSS
B B
AL10 VSS VSS W35 G35 VSS
AL7 VSS VSS W34 G32 VSS
AL4 VSS VSS W33 G29 VSS
AL2 VSS VSS W32 G26 VSS
AK33 VSS VSS W31 G23 VSS
AK30 VSS VSS W30 G20 VSS
AK27 VSS VSS W29 G17 VSS
AK25 VSS VSS W28 G11 VSS
AK22 VSS VSS W27 F34 VSS
AK19 VSS VSS W26 F31 VSS
AK16 VSS VSS U9 F29 VSS
AK13 VSS VSS U8
AK10 VSS VSS U6
AK7 VSS VSS U5
AK4 VSS VSS U3
AJ25 VSS VSS U2

SANDY SANDY
62.10055.421 62.10055.421
2ND = 62.10040.771 2ND = 62.10040.771

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 10 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

XDP
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 11 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 12 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 13 of 97
5 4 3 2 1
5 4 3 2 1

DM1
SSID = MEMORY
DDR_VREF_S3

R1405 M_VREF_CA_DIMM0
www.rosefix.com M_A_A[15:0] 6
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
98
97
96
95
92
91
90
86
89
A0
A1
A2
A3
A4
A5
A6
A7
NP1
NP2

RAS#
WE#
CAS#

CS0#
NP1
NP2

110
113
115

114
121
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6

M_A_DIM0_CS#0 6
SA0_DIM0

SA1_DIM0
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
A8 CS1# M_A_DIM0_CS#1 6
M_A_A9 85
0R0402-PAD
M_A_A10 A9 SO-DIMMA SPD Address is 0xA0
107 A10/AP CKE0 73 M_A_DIM0_CKE0 6

1
M_A_A11 84 74 M_A_DIM0_CKE1 6 SO-DIMMA TS Address is 0x30
2

M_A_A12 A11 CKE1 R1401 R1402


83 A12
D M_A_A13 10KR2J-3-GP 10KR2J-3-GP D
119 A13 CK0 101 M_A_DIM0_CLK_DDR0 6
M_A_A14 80 A14 CK0# 103 M_A_DIM0_CLK_DDR#0 6 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A15 78 SO-DIMMA SPD Address is 0xA2

2
A15
1

1
79 102 M_A_DIM0_CLK_DDR1 6
6 M_A_BS2 A16/BA2 CK1
C1423
DY C1425 C1424
CK1#
104 M_A_DIM0_CLK_DDR#1 6 SO-DIMMA TS Address is 0x32
SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP
109
2

2 6 M_A_BS0 BA0
108 11
6 M_A_BS1 BA1 DM0
6 M_A_DQ[63:0] DM1 28
M_A_DQ0 5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 DQ2 DM4 136
M_A_DQ3 17 153
M_A_DQ4 DQ3 DM5
4 DQ4 DM6 170
M_A_DQ5 6 187
M_A_DQ6 DQ5 DM7
16
DDR_VREF_S3 M_A_DQ7 DQ6
18 200 PCH_SMBDATA 15,20,65,66
M_A_DQ8 DQ7 SDA
21 202
M_A_DQ9 23
DQ8
DQ9
SCL PCH_SMBCLK 15,20,65,66 Thermal EVENT
1

M_A_DQ10 33 198 3D3V_S0


DQ10 EVENT# TS#_DIMM0_1 15 3D3V_S0
R1404 M_A_DQ11 35
M_A_DQ12 DQ11
0R0402-PAD 22 199
M_VREF_DQ_DIMM0 M_A_DQ13 DQ12 VDDSPD TS#_DIMM0_1
24 1R1403 2
M_A_DQ14 DQ13 SA0_DIM0 10KR2J-3-GP
34 197
2

DQ14 SA0

1
M_A_DQ15 36 201 SA1_DIM0 C1401 C1402
M_A_DQ16 DQ15 SA1
39
DQ16 DY

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP
M_A_DQ17 41 77

2
M_A_DQ18 DQ17 NC#1
51 122
DQ18 NC#2
1

M_A_DQ19 53 125 1D5V_S3


C1411 C1412 C1413 M_A_DQ20 DQ19 NC#/TEST
40
DY DQ20
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

M_A_DQ21 42 75
2

M_A_DQ22 DQ21 VDD1


50 76
M_A_DQ23 DQ22 VDD2
52 81
C M_A_DQ24 DQ23 VDD3 C
57 DQ24 VDD4 82
M_A_DQ25 1D5V_S3
M_A_DQ26
59
DQ25 VDD5
87 SODIMM A DECOUPLING
67 88
M_A_DQ27 DQ26 VDD6
69 DQ27 VDD7 93
M_A_DQ28 56 94
M_A_DQ29 DQ28 VDD8
58 99
DQ29 VDD9

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
M_A_DQ30

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
68 DQ30 VDD10 100

C1403

C1404

C1405

C1406

C1407

C1408

C1409

C1410
M_A_DQ31 70 105
DQ31 VDD11

1
ST330U2VDM-4-GP
M_A_DQ32 129 106 TC1401
M_A_DQ33 DQ32 VDD12
131 111
M_A_DQ34 141
DQ33 VDD13
112
DY DY DY DY

2
M_A_DQ35 DQ34 VDD14
143 117
M_A_DQ36 DQ35 VDD15
130 DQ36 VDD16 118
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD17
140 124
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 3
DQ41 VSS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
M_A_DQ42 157 8
DQ42 VSS

C1414

C1415

C1416

C1417
M_A_DQ43 159 9
DQ43 VSS

1
M_A_DQ44 146 13
M_A_DQ45 DQ44 VSS
0D75V_S0
Place these caps M_A_DQ46
148
DQ45 VSS
14
158 19

2
close to VTT1 and M_A_DQ47 DQ46 VSS
160 20
M_A_DQ48 DQ47 VSS
VTT2. 163 25
M_A_DQ49 DQ48 VSS
165 26
M_A_DQ50 DQ49 VSS
175 DQ50 VSS 31
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_A_DQ51 177 32
DQ51 VSS
C1419

C1420

C1421

C1422

M_A_DQ52 164 37
DQ52 VSS
1

M_A_DQ53 166 38
C1418 M_A_DQ54 DQ53 VSS
174 43
DY DY DY DQ54 VSS
SC10U6D3V5KX-1GP

M_A_DQ55 176 44
2

B M_A_DQ56 DQ55 VSS B


181 DQ56 VSS 48
M_A_DQ57 183 49
M_A_DQ58 DQ57 VSS
191 54
M_A_DQ59 DQ58 VSS
193 DQ59 VSS 55
M_A_DQ60 180 60
M_A_DQ61 DQ60 VSS
182 61
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
71
M_A_DQS#0 VSS
10 DQS0# VSS 72
M_A_DQS#1 27 127
M_A_DQS#2 DQS1# VSS
45 128
M_A_DQS#3 DQS2# VSS
62 DQS3# VSS 133
M_A_DQS#4 135 134
M_A_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_A_DQS#6 169 139
M_A_DQS#[7:0] 6 DQS6# VSS
M_A_DQS#7 186 144
DQS7# VSS
M_A_DQS[7:0] 6 145
M_A_DQS0 VSS
12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
M_A_DQS3 DQS2 VSS
64 DQS3 VSS 156
M_A_DQS4 137 161
M_A_DQS5 DQS4 VSS
154 DQS5 VSS 162
M_A_DQS6 171 167
M_A_DQS7 DQS6 VSS
188 168
DQS7 VSS
VSS 172
116 173
6 M_A_DIM0_ODT0 ODT0 VSS
120 178
6 M_A_DIM0_ODT1 ODT1 VSS
179
M_VREF_CA_DIMM0 VSS
126 184
M_VREF_DQ_DIMM0 VREF_CA VSS
1 VREF_DQ VSS 185
A A
189
VSS
30 RESET# VSS 190 <Variant Name>
15,37 DDR3_DRAMRST#
VSS 195
196
VSS
0D75V_S0 203
204
VTT1
VTT2
VSS
VSS
205
206 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DDR3-204P-109-GP
62.10017.X51 Title
2nd = 62.10017.R91
3rd = 62.10017.V61 DDR3-SODIMM1

www.vinafix.vn
Size Document Number Rev
Custom
SB_0819 LA470 -1
Date: Thursday, December 16, 2010 Sheet 14 of 97
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY
www.rosefix.com
DM2

M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
M_B_A[15:0] 6 96
M_B_A3 A2
95 110 M_B_RAS# 6
M_B_A4 A3 RAS#
92 113 M_B_WE# 6
M_B_A5 A4 WE#
91 A5 CAS# 115 M_B_CAS# 6
M_B_A6 90
M_B_A7 A6 3D3V_S0
86 114 M_B_DIM0_CS#0 6
M_B_A8 A7 CS0#
89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85 A9
M_B_A10 107 73 M_B_DIM0_CKE0 6
A10/AP CKE0

1
M_B_A11 84 74
D A11 CKE1 M_B_DIM0_CKE1 6 D
M_B_A12 83 R1501
M_B_A13 A12 10KR2J-3-GP
119 A13 CK0 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 80 103 Note:
A14 CK0# M_B_DIM0_CLK_DDR#0 6
M_B_A15 78

2
A15 SO-DIMMB SPD Address is 0xA4
79 102 M_B_DIM0_CLK_DDR1 6
6 M_B_BS2 A16/BA2 CK1 SA1_DIM1
CK1# 104 M_B_DIM0_CLK_DDR#1 6 SO-DIMMB TS Address is 0x34
109
6 M_B_BS0 BA0 SA0_DIM1
108 BA1 DM0 11
6 M_B_BS1
6 M_B_DQ[63:0] DM1 28
M_B_DQ0 5 46 SO-DIMMB is placed farther from
DQ0 DM2

1
M_B_DQ1 7 63
M_B_DQ2 DQ1 DM3 R1502 the Processor than SO-DIMMA
15 136
M_B_DQ3 DQ2 DM4 10KR2J-3-GP
17 DQ3 DM5 153
M_VREF_CA_DIMM0 M_B_DQ4 4 170
M_B_DQ5 DQ4 DM6
6 187

2
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6
18 DQ7 SDA 200 PCH_SMBDATA 14,20,65,66
M_B_DQ8 21 202
DQ8 SCL PCH_SMBCLK 14,20,65,66
M_B_DQ9 23
M_B_DQ10 DQ9 3D3V_S0
33 198 TS#_DIMM0_1 14
M_B_DQ11 DQ10 EVENT#
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24 DQ13

1
M_B_DQ14 34 197 SA0_DIM1
M_B_DQ15 36
DQ14 SA0
201 SA1_DIM1 DY C1501 C1502
DQ15 SA1

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP
M_B_DQ16 39

2
DQ16
1

M_B_DQ17 41 77
C1523 C1524 C1522 M_B_DQ18 DQ17 NC#1
51 122
DY DQ18 NC#2
SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP

M_B_DQ19 53 125 1D5V_S3


2

M_B_DQ20 DQ19 NC#/TEST


40 DQ20
M_B_DQ21 42 75
M_B_DQ22 DQ21 VDD1
50 76
C M_B_DQ23 DQ22 VDD2 C
52 DQ23 VDD3 81
M_B_DQ24 57 82
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 DQ26 VDD6 88
M_B_DQ27 69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
M_B_DQ30 68 100
M_B_DQ31 DQ30 VDD10
70 DQ31 VDD11 105
M_B_DQ32 129 106
M_B_DQ33 DQ32 VDD12
131 DQ33 VDD13 111
M_B_DQ34 141 112
M_B_DQ35 DQ34 VDD14
143 DQ35 VDD15 117
M_B_DQ36 130 118
M_B_DQ37 DQ36 VDD16
132 123
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18 1D5V_S3
142
M_B_DQ40 DQ39
M_B_DQ41
147
DQ40 VSS
2 SODIMM B DECOUPLING
149 3
M_B_DQ42 DQ41 VSS
157 DQ42 VSS 8
M_B_DQ43 159 9
DQ43 VSS

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
M_B_DQ44

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
146 13
DQ44 VSS

C1503

C1504

C1505

C1506

C1507

C1508

C1509

C1510
M_B_DQ45 148 14
DQ45 VSS

1
M_B_DQ46 158 19
M_B_DQ47 DQ46 VSS
160 20
M_B_DQ48 163
DQ47 VSS
25
DY DY DY DY

2
M_B_DQ49 DQ48 VSS
165 DQ49 VSS 26
M_B_DQ50 175 31
M_B_DQ51 DQ50 VSS
177 32
M_B_DQ52 DQ51 VSS
164 37
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ54 DQ53 VSS
174 43
B M_B_DQ55 DQ54 VSS B
Place these caps 176 DQ55 VSS 44

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
M_B_DQ56 181 48
0D75V_S0 close to VTT1 and DQ56 VSS

C1511

C1512

C1513

C1514
M_B_DQ57 183 49
DQ57 VSS

1
M_B_DQ58 191 54
VTT2. M_B_DQ59 DQ58 VSS
193 55
M_B_DQ60 DQ59 VSS
180 60

2
M_B_DQ61 DQ60 VSS
182 61
DQ61 VSS
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C1518

C1519

C1520

C1521

M_B_DQ62 192 65
DQ62 VSS
1

M_B_DQ63 194 66
DQ63 VSS
71
DY DY M_B_DQS#0 10
VSS
72
2

M_B_DQS#1 DQS0# VSS


27 127
M_B_DQS#2 DQS1# VSS
45 DQS2# VSS 128
M_B_DQS#3 62 133
M_B_DQS#4 DQS3# VSS
135 DQS4# VSS 134
M_B_DQS#5 152 138
M_B_DQS#6 DQS5# VSS
169 139
M_B_DQS#7 DQS6# VSS
186 144
DQS7# VSS
145
M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
M_B_DQS#[7:0] 6 29 151
M_B_DQS2 DQS1 VSS
47 DQS2 VSS 155
M_B_DQS3 64 156
M_B_DQS[7:0] 6 DQS3 VSS
M_B_DQS4 137 161
M_B_DQS5 DQS4 VSS
154 162
M_B_DQS6 DQS5 VSS
171 167
M_B_DQS7 DQS6 VSS
188 DQS7 VSS 168
172
VSS
116 173
6 M_B_DIM0_ODT0 ODT0 VSS
120 178
6 M_B_DIM0_ODT1 ODT1 VSS
179
VSS
M_VREF_CA_DIMM0 126 VREF_CA VSS 184
A A
M_VREF_DQ_DIMM0 1 185
VREF_DQ VSS
VSS 189 <Variant Name>
30 RESET# VSS 190
14,37 DDR3_DRAMRST#
195
VSS

0D75V_S0 203
VTT1
VSS
VSS
196
205 Wistron Corporation
204 206 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VTT2 VSS Taipei Hsien 221, Taiwan, R.O.C.

DDR3-204P-108-GP Title
H = 8mm 62.10017.X41
2nd = 62.10017.M51 DDR3-SODIMM2

www.vinafix.vn
3rd = 62.10017.V51 Size Document Number Rev
SB_0819 Custom
LA470 -1
Date: Thursday, December 16, 2010 Sheet 15 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C (Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 16 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

3D3V_S0

RN1701 4 OF 10 SB_0823 3D3V_S0


PCH1D
1 4 L_CTRL_DATA 49 L_BKLT_EN J47 AP43
L_CTRL_CLK L_BKLTEN Cougar SDVO_TVCLKINN
2 3 49 LVDS_VDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45
Point

4
3
SRN2K2J-1-GP 49 L_BKLT_CTRL P45 L_BKLTCTL SDVO_STALLN AM42
AM40 RN1706
LVDS_DDC_CLK_R SDVO_STALLP
49 LVDS_DDC_CLK_R T40 L_DDC_CLK SRN2K2J-1-GP DDI Port B Detect:(SDVO_CTRL_ DATA)
49 LVDS_DDC_DATA_R LVDS_DDC_DATA_R K47 AP39
L_DDC_DATA SDVO_INTN 1: Port B detected
SDVO_INTP AP40
RN1702 L_CTRL_CLK T45 0: Port B not detected

1
2
L_BKLT_EN L_CTRL_DATA L_CTRL_CLK
1 4 P39 L_CTRL_DATA
2 3 LVDS_VDD_EN
LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
SRN100KJ-6-GP TPAD14-GP TP1701 1 LVDS_VBG AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51

1
AE48 LVD_VREFH
R1701 AE47 AT49
2K37R2F-GP LVD_VREFL DDPB_AUXN
DDPB_AUXP AT47
DDPB_HPD AT40 HDMI_PCH_DET 51
Place near PCH 49 LVDSA_CLK# AK39

LVDS
2
LVDSA_CLK# DDBP_DATA2# C1701 SCD1U10V2KX-5GP
49 LVDSA_CLK AK40 LVDSA_CLK DDPB_0N AV42 1 2 HDMI_DATA2_R# 51
AV40 DDBP_DATA2 1 2 C1702 SCD1U10V2KX-5GP HDMI_DATA2_R 51
DDPB_0P DDBP_DATA1# C1703 SCD1U10V2KX-5GP
49 LVDSA_DATA0# AN48 LVDSA_DATA#0 DDPB_1N AV45 1 2 HDMI_DATA1_R# 51
C
49 LVDSA_DATA1# AM47 AV46 DDBP_DATA1 1 2 C1704 SCD1U10V2KX-5GP HDMI_DATA1_R 51
C

Digital Display Interface


LVDSA_DATA#1 DDPB_1P DDBP_DATA0# C1705 SCD1U10V2KX-5GP
49 LVDSA_DATA2# AK47 LVDSA_DATA#2 DDPB_2N AU48 1 2 HDMI_DATA0_R# 51
AJ48 AU47 DDBP_DATA0 1 2 C1706 SCD1U10V2KX-5GP HDMI_DATA0_R 51
LVDSA_DATA#3 DDPB_2P DDBP_CLK# C1707 SCD1U10V2KX-5GP
DDPB_3N AV47 1 2 HDMI_CLK_R# 51
49 LVDSA_DATA0 AN47 AV49 DDBP_CLK 1 2 C1708 SCD1U10V2KX-5GP HDMI_CLK_R 51
LVDSA_DATA0 DDPB_3P
49 LVDSA_DATA1 AM49 LVDSA_DATA1
49 LVDSA_DATA2 AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42

AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38 Impedance:100 ohm
AH47 LVDSB_DATA#1 Impedance:90 ohm
AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
AH43 LVDSB_DATA0 DDPC_1P AY45
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
Close to PCH side AF43 LVDSB_DATA3 DDPC_3N BB47
DDPC_3P BB49

CRT_BLUE
CRT_GREEN 50 CRT_BLUE N48 M43
CRT_RED CRT_BLUE DDPD_CTRLCLK
50 CRT_GREEN P49 CRT_GREEN DDPD_CTRLDATA M36
50 CRT_RED T49 CRT_RED
B B
AT45

CRT
DDPD_AUXN
50 CRT_DDC_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
50 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41
5
6
7
8

RN1705 BB43
SRN150F-1-GP DDPD_0N
50 CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
50 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
BF42
4
3
2
1

DAC_IREF_R DDPD_2N
T43 DAC_IREF DDPD_2P BE42
T42 CRT_IRTN DDPD_3N BJ42
1

DDPD_3P BG42
R1702
1KR2D-1-GP COUGAR-GP-U2-NF
2

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (LVDS/CRT/DDI)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 17 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com PCH1E

Cougar
5 OF 10
RSVD
RSVD
AY7
AV7
+V_NVRAM_VCCQ

1
BG26 TP1 RSVD AU3
BJ26 TP2
Point RSVD BG4 R1808
2K2R2J-2-GP
BH25 TP3
BJ16 TP4 RSVD AT10
BG16 BC8 R1809 R1813

2
TP5 RSVD
D RN1801 AH38 D
INT_PIRQH# TP6 NV_CLE NV_CLE_R
1 10 3D3V_S0 AH37 TP7 RSVD AU2 1 2 1 2 H_SNB_IVB# 5
INT_PIRQB# 2 9 INT_PIRQD# AK43 AT4 1KR2J-1-GP
INT_PIRQF# INT_PIRQE# TP8 RSVD
3 8 AK45 TP9 RSVD AT3 0R2J-2-GP
INT_PIRQA# 4 7 INT_PIRQC# C18 AT1
INT_PIRQG# TP10 RSVD
3D3V_S0 5 6 N30 TP11 RSVD AY3 DMI & FDI Termination Voltage
H3 TP12 RSVD AT5
SRN8K2J-2-GP-U AH12 AV3 Set to Vss when LOW

NVRAM
TP13 RSVD NV_CLE
AM4 TP14 RSVD AV1
AM5 TP15 RSVD BB1 Set to Vcc when HIGH
Y13 TP16 RSVD BA3
K24 TP17 RSVD BB5
L24 TP18 RSVD BB3
AB46 TP19 RSVD BB7
AB45 BE8

RSVD
R1801 TP20 RSVD
2 1 4K7R2J-2-GP PCI_GNT3# BD4
DY RSVD
BF6
RSVD
B21 AV5 NV_ALE 1 TP1806 TPAD14-GP
TP21 RSVD NV_CLE
M20 TP22 DF_TVS AY1
AY16 TP23
A16 swap override Strap/Top-Block BG46 AV10 NV_RCOMP 1 TP1803 TPAD14-GP
TP24 RSVD
Swap Override jumper
RSVD AT8

PCI_GNT#3 Low = A16 swap BE28 AY5


TP25 RSVD
override/Top-Block RN1803 BC30 BA2
DGPU_HOLD_RST# TP26 RSVD
Swap Override enabled 1 4 BE32 TP27
DGPU_PW R_EN# 2 3 BJ32 AT12
C High = Default TP28 RSVD C
BC28 TP29 RSVD BF3
SRN10KJ-5-GP BE30 TP30
BF32
BG32
AV26
TP31
TP32
TP33
USBP0N
USBP0P
C24
A24
USB Table
BB26 TP34 USBP1N C25 USB_PN1 82
AU28 TP35 USBP1P B25 USB_PP1 82 Pair Device
AY30 TP36 USBP2N C26 USB_PN2 64
AU26 TP37 USBP2P A26 USB_PP2 64 0 X
1 2R1802 BBS_BIT1 AY26 K28
DY 1KR2J-1-GP AV28
TP38 USBP3N
H28
USB_PN3
USB_PP3
63
63 1 USB Ext. port 1 (HS)
TP39 USBP3P
1 2R1803 BBS_BIT0 AW30 E28
DY 1KR2J-1-GP BBS_BIT0 21 TP40 USBP4N
D28
USB_PN4
USB_PP4
66
66 2 Fingerprint
3D3V_S0 USBP4P
USBP5N C28 USB_PN5 82
USBP5P A28 USB_PP5 82 3 BLUETOOTH
USBP6N C29
2 USBP6P B29 4 Mini Card2 (WWAN)
BOOT BIOS Strap INT_PIRQA# K40 N28
R1814 INT_PIRQB# PIRQA# USBP7N
K38 M28 5 CARD READER

PCI
PIRQB# USBP7P
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location 8K2R2J-3-GP INT_PIRQC# H38 L30 USB_PN8 57
INT_PIRQD# PIRQC# USBP8N
DY G38 PIRQD# USBP8P K30 USB_PP8 57 6 X
0 0 LPC G30 USB_PN9 82
1

USBP9N
C46 E30 7 X

USB
83 DGPU_HOLD_RST# REQ1#/GPIO50 USBP9P USB_PP9 82
0 1 Reserved TPAD14-GP TP1805 1 DGPU_SELECT# C44 C30 USB_PN10 82
DGPU_PW R_EN# REQ2#/GPIO52 USBP10N
93 DGPU_PW R_EN# E40 REQ3#/GPIO54 USBP10P A30 USB_PP10 82 8 USB Ext. port 4 / E-SATA /USB CHARGER
1 0 Reserved USBP11N L32 USB_PN11 65
BBS_BIT1 D47 K32 USB_PP11 65 9 USB Ext. port 2
TPAD14-GP TP1804 DGPU_PW M_SELECT# GNT1#/GPIO51 USBP11P
1 1 SPI(Default) 1 E42 GNT2#/GPIO53 USBP12N G32 USB_PN12 49
TPAD14-GP TP1801 1 PCI_GNT3# F46 E32 USB_PP12 49 10 USB Ext. port 3
B SB_0809 GNT3#/GPIO55 USBP12P B
USBP13N C32
USBP13P A32 11 Mini Card1 (WLAN)
49 dGPU_LED 1 R1812 2 INT_PIRQE# G42 PIRQE#/GPIO2
TPAD14-GP TP1807 1 0R0402-PAD INT_PIRQF# G40 12 CAMERA
INT_PIRQG# PIRQF#/GPIO3 USB_RBIAS
C42 PIRQG#/GPIO4 USBRBIAS# C33 1 2
49 DBC_EN 1 R1810 2 INT_PIRQH# D44 PIRQH#/GPIO5
R1811 13 X
0R0402-PAD 22D6R2F-L1-GP
USBRBIAS B33
SB_0728 TPAD14-GP TP1802 1 PCI_PME# K10 PME#
PCI_PLTRST# C6 A14 USB_OC#0_1 USB_OC#0_1 61
PLTRST# OC0#/GPIO59 USB_OC#2_3
OC1#/GPIO40 K20
B17 USB_OC#4_5
R1804 OC2#/GPIO41
65,71 CLK_PCI_LPC 1 2 22R2J-2-GP CLK_PCI_LPC_R H49 CLKOUT_PCI0 OC3#/GPIO42 C16 USB_OC#6_7
20 CLK_PCI_FB R1805 1 2 22R2J-2-GP CLK_PCI_FB_R H43 L16 USB_OC#8_9 USB_OC#8_9 57,61
R1806 CLKOUT_PCI1 OC4#/GPIO43
27 CLK_PCI_KBC 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 CLKOUT_PCI2 OC5#/GPIO9 A16 USB_OC#10_11 USB_OC#10_11 61
K42 D14 USB_OC#12_13 USB_OC#12_13 61
CLKOUT_PCI3 OC6#/GPIO10 PCH_GPIO14
H40 CLKOUT_PCI4 OC7#/GPIO14 C14
2

3D3V_S0
DY EC1802 EC1801
DY COUGAR-GP-U2-NF
1

1
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

U1801 OC[3:0]# for Device 29 (Ports 0-7)


B 1 OC[7:4]# for Device 26 (Ports 8-13)
5 VCC
2 PCI_PLTRST#
A
11,27,31,36,65,66,71,83,97 PLT_RST# 4 Y DY
GND 3
1

A <Variant Name> A
74LVC1G08GW -1-GP DY C1802
73.01G08.L04 SC220P50V2KX-3GP
2

R1807 RN1802
Wistron Corporation
1

1 2 USB_OC#2_3 1 10 3D3V_S5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


R1816 0R0402-PAD PCH_GPIO14 2 9 USB_OC#12_13
DY USB_OC#6_7 3 8 USB_OC#8_9 Taipei Hsien 221, Taiwan, R.O.C.
100KR2J-1-GP
1

USB_OC#0_1 4 7 USB_OC#10_11
DY C1801 5 6 USB_OC#4_5 Title
3D3V_S5
2

SC220P50V2KX-3GP
PCH (PCI/USB/NVRAM)
2

SRN10KJ-L3-GP
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 18 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com 4 DMI_RXN[3:0]
4 DMI_RXP[3:0]

4 DMI_TXN[3:0]
4 DMI_TXP[3:0]
PCH1C 3 OF 10
FDI_TXN[7:0] 4
FDI_TXP[7:0] 4

BC24 BJ14
4
4
DMI_RXN0
DMI_RXN1 BE20
DMI0RXN Cougar FDI_RXN0
AY14
FDI_TXN0
FDI_TXN1
4
4
DMI1RXN FDI_RXN1
4 DMI_RXN2 BG18
BG20
DMI2RXN Point FDI_RXN2 BE14
BH13
FDI_TXN2 4
4 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 4
D Signal Routing Guideline: FDI_RXN4 BC12 FDI_TXN4 4 D
DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 4
4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
routing length less than 500 BJ18
DMI1RXP FDI_RXN6
BG9
4 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 4
mils. 4 DMI_RXP3 BJ20 DMI3RXP
DMI_IRCOMP keep W=4 mils and FDI_RXP0 BG14 FDI_TXP0 4
routing length less than 500 4 DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
4 DMI_TXN1 AW20 BF14 FDI_TXP2 4
mils. BB18
DMI1TXN FDI_RXP2
BG13
4 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 4
AV18 BE12

DMI
FDI
4 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 4
FDI_RXP5 BG12 FDI_TXP5 4
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
4 DMI_TXP2 AY18 DMI2TXP
4 DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
R1901 2 49D9R2F-GP DMI_COMP_R
1 BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
FDI_LSYNC1 BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
1 DY 2 R1926 SYS_PW ROK
10KR2J-3-GP A18 DSW ODVREN
DSWVRMEN
1 2 R1904 PW ROK R1910 0R0402-PAD

System Power Management


C 100KR2J-1-GP 1 2 PM_RSMRST# C
SUS_PW R_ACK 2R1903 1 SUSACK# C12 E22 PCH_DPW ROK R1911 2 10KR2J-3-GP
0R0402-PAD SUSACK# DPWROK DY1 RTC_AUX_S5

5,11 XDP_DBRESET#
DY
1R1925 20R2J-2-GP SYS_RESET# K3 B9 PCIE_W AKE# 31,65,66
SYS_RESET# WAKE#

3D3V_S0 1 2 R1905
10KR2J-3-GP P12 N3
11,36,37 SYS_PW ROK SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 27
1R1923 2
R1924 0R0402-PAD 0R2J-2-GP
27,36 S0_PW R_GOOD 1 2 PW ROK DY L22 G8 PM_SUS_STAT# 1 TP1901 TPAD14-GP
R1906 PWROK SUS_STAT#/GPIO61
1 2 R1913 0R0402-PAD
36,45,46,47 RUNPW ROK 1 R1907 2 MEPW0R0402-PAD
ROK L10 APWROK SUSCLK/GPIO62 N14 SUS_CLK 1 2 PCH_SUSCLK_KBC 27
0R2J-2-GP DSWODVREN - On Die DSW VR Enable
DY
5,37 PM_DRAM_PW RGD B13 D10 PM_SLP_S5# 1 HIGH Enabled (DEFAULT)
DRAMPWROK SLP_S5#/GPIO63 TP1902 TPAD14-GP
R1914 0R0402-PAD
PM_RSMRST# C21 H4 SLP_S4#_R 1 2 LOW Disabled
RSMRST# SLP_S4# PM_SLP_S4# 27,46
R1915 0R0402-PAD
27 SUS_PW R_ACK K16 F4 SLP_S3#_R 1 2 PM_SLP_S3# 27,36,37,47,92
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# RTC_AUX_S5

11,27,97 PM_PW RBTN# E20 G10 PM_SLP_A# 1


PWRBTN# SLP_A# TP1903TPAD14-GP R1917 1 2 330KR2J-L1-GP

27 AC_PRESENT H20 G16 PM_SLP_SUS# 1


B ACPRESENT/GPIO31 SLP_SUS# TP1904TPAD14-GP DSW ODVREN R1918 B
1 2 330KR2J-L1-GP
DY
BATLOW # E10 AP14 H_PM_SYNC
BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5

PM_RI# A10 K14 PM_SLP_LAN# 1


RI# SLP_LAN#/GPIO29 TP1905TPAD14-GP

COUGAR-GP-U2-NF

SLP_S3#_R 1 3D3V_S0
TP1906 TPAD14-GP

PM_CLKRUN# R1919 1 2 8K2R2J-3-GP


3D3V_S5

RN1901
8 1 BATLOW # 3D3V_AUX_S5
7 2 PM_RI#
R1909
6 3 AC_PRESENT
5 4 SUS_PW R_ACK 2 1
100KR2J-1-GP
SRN10KJ-6-GP
2

R1916
Q1901 R1912
2 R1921 1 10KR2J-3-GP PCIE_W AKE# 10KR2J-3-GP
4 3 PM_RSMRST# 1 2 RSMRST#_KBC 27
2 R1922 1 10KR2J-3-GP PM_PW RBTN# 1KR2J-1-GP
1

A DY 3V_5V_POK_# 5 2 3V_5V_POK 41 <Variant Name> A


2 R1920 1 10KR2J-3-GP PM_SLP_LAN#
6 1
This signal has an internal pull-up resistor Wistron Corporation
2N7002KDW -GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1st = 84.DM601.03F Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.2N702.A3F
2 R1908 1 10KR2J-3-GP PM_RSMRST# Title

PCH (DM I/FDI/PM)


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 19 of 97
5 4 3 2 1
5 4 3 2 1

3D3V_S5

www.rosefix.com
3D3V_S5
SSID = PCH SMB_CLK 4 1 RN2003

1
SMB_DATA 3 2 SRN2K2J-1-GP
R2004
10KR2J-3-GP SML0_DATA 3 2 RN2004
PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP

2
1 PCIE_RXN1 BG34 Cougar PEG_CLKREQ#_R SML1_CLK 2 3 RN2005
TPAD14-GP TP2004 PCIE_RXP1 PERN1 EC_SW I# SML1_DATA
1 BJ34 PERP1 SMBALERT#/GPIO11 E12 EC_SW I# 27 1 4 SRN2K2J-1-GP

1
TPAD14-GP
TPAD14-GP
TP2005
TP2006
1 PCIE_TXN1_C
PCIE_TXP1_C
AV32 PETN1 Point SMB_CLK R2005 PCIE_CLK_REQ6#
1 AU32 PETP1 W-WAN SMBCLK H14 DY 1 4 RN2006
D TPAD14-GP TP2007 10KR2J-3-GP PCH_GPIO74 2 3 SRN10KJ-5-GP D
BE34 C9 SMB_DATA
65 PCIE_RXN2 PERN2 SMBDATA
65 PCIE_RXP2 BF34

2
C2001 PERP2
65 PCIE_TXN2 1 2 SCD1U10V2KX-5GP PCIE_TXN2_C BB32 PETN2 WLAN
C2002 1 2 SCD1U10V2KX-5GP PCIE_TXP2_C AY32 DRAMRST_CNTRL_PCH 1 R2009 2

SMBUS
65 PCIE_TXP2 PETP2 DRAMRST_CNTRL_PCH 1KR2J-1-GP
SML0ALERT#/GPIO60 A12 DRAMRST_CNTRL_PCH 37
BG36 3D3V_S0 SB_0817
PERN3 SML0_CLK RN2007
BJ36 PERP3 SML0CLK C8
AV34 PETN3 2 3 CRB: 1K
AU34 G12 SML0_DATA 1 4
PETP3 SML0DATA CHKLT: 10K
BF36 SRN2K2J-1-GP
31 PCIE_RXN4 PERN4
31 PCIE_RXP4 BE36 PERP4 2nd = 84.2N702.A3F
C2005 1 2 SCD1U10V2KX-5GP PCIE_TXN4_C AY34 C13 PCH_GPIO74
31 PCIE_TXN4 C2006 1 2 SCD1U10V2KX-5GP PCIE_TXP4_C BB34
PETN4 LAN SML1ALERT#/PCHHOT#/GPIO74
1st = 84.DM601.03F
31 PCIE_TXP4 PETP4 SML1_CLK
E14 2N7002KDW -GP

PCI-E*
SML1CLK/GPIO58 SML1_CLK 27
BG37 PERN5
BH37 M16 SML1_DATA SMB_DATA 6 1
PERP5 SML1DATA/GPIO75 SML1_DATA 27 PCH_SMBDATA 14,15,65,66
AY36 PETN5
BB36 PETP5 5 2

BJ38 PERN6 4 3
BG38

Controller
PERP6 CL_CLK
AU36 PETN6 CL_CLK1 M7 1 Q2001
AV36 TP2001 TPAD14-GP
PETP6

Link
PCH_SMBCLK 14,15,65,66
BG40 T11 CL_DATA 1
PERN7 CL_DATA1 TP2002 TPAD14-GP SMB_CLK
BJ40 PERP7
AY40 PETN7
C BB40 P10 CL_RST# 1 C
PETP7 CL_RST1# TP2003 TPAD14-GP XTAL25_IN 1 DY 2
BE38 R2008 0R2J-2-GP
PERN8
BC38 PERP8
R2008 and C2008 CO-LAY
AW38 PETN8
AY38 C2008
PETP8 XTAL25_IN 2 1
PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ#_R OPS1 2R2003 PEG_CLKREQ#83

2
1 CLK_PCIE_W W AN# Y40 0R2J-2-GP
TPAD14-GP TP2008 CLK_PCIE_W W AN CLKOUT_PCIE0N R2006 X2001 SC12P50V2JN-3GP
1 Y39 CLKOUT_PCIE0P
TPAD14-GP TP2009 AB37 CLK_PCIE_VGA# 83 1M1R2J-GP XTAL-25MHZ-102-GP
CLKOUT_PEG_A_N

CLOCKS
CLK_PCIE_W W AN_REQ# J2 AB38 CLK_PCIE_VGA 83 82.30020.851C2007

1
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P

1
XTAL25_OUT 2nd = 82.30020.7912 1
65 CLK_PCIE_W LAN# AB49 AV22 CLK_EXP_N 5 3rd = 82.30020.A31
WLAN CLK 65 CLK_PCIE_W LAN AB47
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_DMI_N
CLKOUT_DMI_P AU22 CLK_EXP_P 5
SC12P50V2JN-3GP
65 CLK_PCIE_W LAN_REQ# M1 RN2017 SRN0J-6-GP
PCIECLKRQ1#/GPIO18 CLKOUT_DP_N
CLKOUT_DP_N AM12 1 4 CLK_DP_N_R 5
AM13 CLKOUT_DP_P 2 3 CLK_DP_P_R 5
CLKOUT_DP_P 3D3V_S0 3D3V_S0
AA48 CLKOUT_PCIE2N
UMA_DISCRETE#
AA47 CLKOUT_PCIE2P DY UMA: 1 1
BF18 CLK_BUF_EXP_N
CLKIN_DMI_N DIS :0 1

1
PCIE_CLK_RQ2# V10 BE18 CLK_BUF_EXP_P
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P R2012 R2013 SG(PX) : 0 0
UMA Optimus(Muxless) : 1 0

10KR2J-3-GP

10KR2J-3-GP
31 CLK_PCIE_LAN# Y37 BJ30 CLK_BUF_CPYCLK_N RN2008 1 4 SRN10KJ-5-GP
LAN CLK 31 CLK_PCIE_LAN Y36
CLKOUT_PCIE3N CLKIN_GND1_N
BG30 CLK_BUF_CPYCLK_P 2 3

2
CLKOUT_PCIE3P CLKIN_GND1_P UMA_DIS#
B UMA_DIS# 22 B
31 PCIE_CLK_LAN_REQ# A8 DGPU_PRSNT#
PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N
CLKIN_DOT_96N G24

1
SB_0728 E24 CLK_BUF_DOT96_P
CLKIN_DOT_96P R2010 R2011
Y43 CLKOUT_PCIE4N
Y45 DY OPS

10KR2J-3-GP

10KR2J-3-GP
CLKOUT_PCIE4P CLK_BUF_CKSSCD_N XTAL25_IN
CLKIN_SATA_N AK7 1
USB3_PEGB_CLKREQ# L12 AK5 CLK_BUF_CKSSCD_P XTAL25_OUT 1 TP2012 TPAD14-GP

2
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P TP2013 TPAD14-GP
3D3V_S0
V45 K45 CLK_BUF_REF14
RN2018 CLKOUT_PCIE5N REFCLK14IN
V46 CLKOUT_PCIE5P
1 4 PCIE_CLK_RQ2# 3D3V_S5 RN2001
2 3 CLK_PCIE_W LAN_REQ# PCIE_CLK_REQ5# L14 H45 CLK_PCI_FB CLK_PCI_FB 18 1 8CLK_PCIE_W W AN_REQ#
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK
2 7
SRN10KJ-5-GP PL 10K FOR Integrated CLOCK GEN mode. 3 6 PCIE_CLK_LAN_REQ# SB_0728
AB42 V47 XTAL25_IN 4 5 USB3_PEGB_CLKREQ#
CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT RN2009
PCIECLKRQ1# and PCIECLKRQ2# AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
CLK_BUF_REF14 1 10 SRN10KJ-6-GP
support S0 power only PEG_B_CLKRQ# E6 CLK_BUF_CKSSCD_N 2 9 CLK_BUF_EXP_N RN2002
PEG_B_CLKRQ#/GPIO56 90D9R2F-1-GP CLK_BUF_CKSSCD_P CLK_BUF_EXP_P
3 8 1 8 EC_SW I#
Y47 XCLK_RCOMP 1 2 +VCCDIFFCLKN 4 7 CLK_BUF_DOT96_N 2 7 PCIE_CLK_REQ5#
XCLK_RCOMP R2007 CLK_BUF_DOT96_P
V40 CLKOUT_PCIE6N 5 6 3 6 CLK_PCIE_NEW _REQ#
V42 CLKOUT_PCIE6P 4 5 PEG_B_CLKRQ#
SRN10KJ-L3-GP
PCIE_CLK_REQ6# T13 need very close to PCH SRN10KJ-6-GP
PCIECLKRQ6#/GPIO45
V38 K43 JTAG_TCK 1 22R2J-2-GP
2
DY
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 VGA_CLK_27M_NSS 86
V37 R2001
DY
FLEX CLOCKS

CLKOUT_PCIE7P CLK_48_USB30
A CLKOUTFLEX1/GPIO65 F47 1 22R2J-2-GP
2 VGA_CLK_27M_SS 86 <Variant Name> A
CLK_PCIE_NEW _REQ# K12 R2002
PCIECLKRQ7#/GPIO46
H47 LAN_25M 1 22R2J-2-GP
2
DY LAN_XI 31
PCIE_CLK_XDP_N CLKOUTFLEX2/GPIO66 R2015
TPAD14-GP TP2010
1
1 PCIE_CLK_XDP_P
AK14
AK13
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 K49 DGPU_PRSNT# Wistron Corporation
TPAD14-GP TP2011 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
COUGAR-GP-U2-NF
SB_0820 Title

PCH (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 20 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com
RTC_X1
RTC_AUX_S5

RN2104
2
1
3
4
INTVRMEN- Integrated SUS
1.05V VRM Enable

1
C2103 High - Enable internal VRs
1 2 RTC_X2 SRN20KJ-GP-U SC1U6D3V2KX-GP
R2101 10MR2J-L-GP
Low - Enable external VRs

2
D D
X2101 PCH1A 1 OF 10 LPC_AD[0..3]
LPC_AD[0..3] 27,65,71
1 4 RTC_X1 A20 C38 LPC_AD0
RTCX1 Cougar FWH0/LAD0
A38 LPC_AD1
FWH1/LAD1

LPC
RTC_X2 C20 RTCX2 Point FWH2/LAD2 B37 LPC_AD2
1

1
C37 LPC_AD3
C2101 C2102 RTC_RST# FWH3/LAD3
2 3 D20 RTCRST#
SC5D6P50V2CN-1GP D36 LPC_FRAME# 27,65,71
2

2
FWH4/LFRAME#

2
G2101 1M1R2J-GP SRTC_RST# G22
SC5D6P50V2CN-1GP

SRTCRST#

1
C2104 R2104 E36
LDRQ0#

RTC
SC1U6D3V2KX-GP 2 1 SM_INTRUDER# K22 K36 APS_LED_R 68
INTRUDER# LDRQ1#/GPIO23
X-32D768KHZ-34GPU GAP-OPEN

2
RTC_AUX_S5 1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27

1
SHR_V1.4 INTVRMEN SERIRQ
SB_0809 R2105
330KR2F-L-GP AM3 SATA_RXN0_C 56
R2122 2 SATA0RXN
1 33R2J-2-GP HDA_SYNC HDA_BITCLK N34 AM1
29 HDA_CODEC_SYNC R2123 2 1 33R2J-2-GP HDA_SDOUT HDA_BCLK SATA0RXP SATA_TXN0_C C2105 1 2 SCD01U16V2KX-3GP
SATA_RXP0_C 56
HDD1

SATA 6G
29 HDA_CODEC_SDOUT SATA0TXN AP7 SATA_TXN0 56
HDA_SYNC L34 AP5 SATA_TXP0_C C2106 1 2 SATA_TXP0 56
HDA_SYNC SATA0TXP SCD01U16V2KX-3GP
T10 AM10
RN2102
HDA_RST#
29 HDA_SPKR
HDA_RST#
SPKR SATA1RXN
SATA1RXP AM8
SATA_TXN1_C C2112 1
SATA_RXN1_C 66
SATA_RXP1_C 66 SATA
29 HDA_CODEC_RST# 1 4 K34 HDA_RST# SATA1TXN AP11 2 SCD01U16V2KX-3GP SATA_TXN1 66
29 HDA_CODEC_BITCLK 2 3 HDA_BITCLK
SATA1TXP AP10 SATA_TXP1_C C2111 1 2
SCD01U16V2KX-3GP
SATA_TXP1 66 SSD
SRN33J-5-GP-U 29 HDA_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
SATA2RXP AD5
G34 HDA_SDIN1 SATA2TXN AH5
C AH4 C
SATA2TXP
C34 HDA_SDIN2 Move Cap close to Device or Connector.

IHDA
SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
Flash Descriptor Security Overide HDA_SDOUT A36 HDA_SDO
1 R2107 2 1KR2J-1-GP

SATA
27 ME_UNLOCK SATA4RXN Y7 SATA_RXN4_C 56
Low = Default Y5
+3VS_+1.5VS_HDA_IO
HDA_SDOUT High = Enable TPAD14-GP TP2105 1 PCH_GPIO33 C36 HDA_DOCK_EN#/GPIO33
SATA4RXP
SATA4TXN AD3 SATA_TXN4_C C2109 1
SATA_TXP4_C C2110 1
2 SCD01U16V2KX-3GP
SATA_RXP4_C 56
SATA_TXN4 56 ODD
SATA4TXP AD1 2 SCD01U16V2KX-3GP SATA_TXP4 56
N32 HDA_DOCK_RST#/GPIO13
Y3
DY 1 R2102 21KR2J-1-GP HDA_SDOUT SATA5RXN
Y1
SATA_RXN5_C 57

TPAD14-GP TP2101 PCH_JTAG_TCK_BUF


SATA5RXP
SATA5TXN AB3 SATA_TXN5_C C2107 1
SATA_TXP5_C C2108 1
2 SCD01U16V2KX-3GP
SATA_RXP5_C 57
SATA_TXN5 57 ESATA
1 J3 JTAG_TCK SATA5TXP AB1 2 SCD01U16V2KX-3GP SATA_TXP5 57

NO REBOOT STRAP TPAD14-GP TP2102 1 PCH_JTAG_TMS H7 Y11 1D05V_VTT


3D3V_S0 JTAG_TMS SATAICOMPO

JTAG
No Reboot Strap TPAD14-GP TP2103 1 PCH_JTAG_TDI K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
JTAG_TDI SATAICOMPI
DY1 R2106 21KR2J-1-GP HDA_SPKR Low = Default TPAD14-GP TP2104 1 PCH_JTAG_TDO H1 1D05V_VTT
JTAG_TDO
HDA_SPKR High = No Reboot SATA3RCOMPO AB12

AB13 SATA3_COMP R2113 1 2 49D9R2F-GP


SATA3COMPI
R2108
+3VS_+1.5VS_HDA_IO 1 2 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 R2114 1 2 806R2F-GP
27,60 SPI_CLK_R SPI_CLK SATA3RBIAS
R2109 33R2J-2-GP
B B
1 R2103 2 1KR2J-1-GP HDA_SYNC 27,60 SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14 SPI_CS0#
33R2J-2-GP
This signal has a weak internal pull down. T1 SB_0902
SPI_CS1#

SPI
On Die PLL VR is supplied by 1.5V when SATALED# P3 SATA_LED# 68
R2110
sampled high, 1.8 V when sampled low.
27,60 SPI_SI_R 1 2 PCH_SPI_SI V4 SPI_MOSI SATA0GP/GPIO21 V14 SATA_DET#0
Needs to be pulled High for Huron River platform. 33R2J-2-GP
co-operate with R2310 27,60 SPI_SO_R U3 P1 BBS_BIT0 BBS_BIT0 18
SPI_MISO SATA1GP/GPIO19

COUGAR-GP-U2-NF
PLL ODVR VOLTAGE
3D3V_S0
Low = 1.8V (Default)
HDA_SYNC High = 1.5V RN2103
1 8
SATA_LED# 2 7
INT_SERIRQ 3 6
SATA_DET#0 4 5

SRN10KJ-6-GP

SB_0817

A <Variant Name> A
R2125
PCH_GPIO33 1
PCH_JTAG_TCK_BUF
1 R2121 2
2
Wistron Corporation
4K7R2J-2-GP 1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 21 of 97
5 4 3 2 1
5 4 3 2 1

3D3V_S0

R2202 1 www.rosefix.com
2 200KR2F-L-GP SATA_ODD_PRSNT#

20100625 V1.2
Note:
SSID = PCH
For PCH debug with XDP, need to NO STUFF R2218

S_GPIO 1 R2218 2 GPIO0 T7


PCH1F

BMBUSY#/GPIO0 Cougar
6 OF 10

TACH4/GPIO68 C40 SATA_ODD_PW RGT 56


R2205

R2206
INTERNAL GFX

DY

100K
EXTERNAL GFX

10K

DY
3D3V_S0 100R2J-2-GP
EC_SMI# A42 Point B41 UMA_DIS# UMA_DIS# 20
TACH1/GPIO1 TACH5/GPIO69
RN2203
1 4 H_A20GATE DGPU_HPD_INTR# H36 C41 VRAM_SIZE1 3D3V_S0
H_RCIN# TACH2/GPIO6 TACH6/GPIO70
D 2 3 D
27 EC_SCI# EC_SCI# E38 A40 VRAM_SIZE2
TACH3/GPIO7 TACH7/GPIO71

1
SRN10KJ-5-GP
GPIO27 has a weak[20K] internal pull up. ICC_EN# C10 R2205
GPIO8 10KR2J-3-GP
To enable on-die PLL Voltage regurator, DY
PCH_GPIO12 C4
should not place external pull down. LAN_PHY_PWR_CTRL/GPIO12

2
PCH_GPIO15 G2 P4 H_A20GATE 27 GFX_CRB_DET
GPIO15 A20GATE

1
3D3V_S0 AU16 H_PECI_R 1 R2203 2
DY H_PECI 5,27

CPU/MISC
PECI 0R2J-2-GP
56 SATA_ODD_PRSNT# 1 R2213 2 PCH_GPIO16 U2 SATA4GP/GPIO16
R2206
0R0402-PAD P5 100KR2J-1-GP
RCIN# H_RCIN# 27
2

GPIO
R2224 92,93 DGPU_PW ROK DGPU_PW ROK D40 AY11 H_CPUPW RGD 5,11,36,97

2
TACH0/GPIO17 PROCPWRGD
10KR2J-3-GP
49 Color_Engine# 1 R2228 2 PCH_GPIO22 T5 SCLOCK/GPIO22 THRMTRIP# AY10 PCH_THERMTRIP_R R2204 1 2 390R2J-1-GP H_THERMTRIP# 5,36
0R0402-PAD
1

PCH_GPIO27 PCH_TEMP_ALERT# SB_0728 TPAD14-GP TP2202 1 PCH_GPIO24 E8 T14 INIT3_3V# 1 TP2201 TPAD14-GP
GPIO24/MEM_LED INIT3_3V#
2

PCH_GPIO27 E16 PCH_THERMTRIP_R 2 R2222 1 1D05V_VTT


R2223 R2225 GPIO27
DY DY DY
10KR2J-3-GP 10KR2J-3-GP PLL_ODVR_EN P8 GPIO28 56R2J-4-GP
TS_VSS1 AH8
PSW _CLR# K1
1

STP_PCI#/GPIO34
NC_FP_DET# TPAD14-GP TP2204 NC_FP_DET# TS_VSS2 AK11 TS Signal Disable Guideline:
1 K4 GPIO35
3D3V_S0 AH10 TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
TS_VSS3

2
GAP-OPEN
DMI_OVRVLTG V8 should not float on the motherboard. They should
RN2201 SATA2GP/GPIO36
TS_VSS4 AK10 TS_VSS 1 R2219 2
1

C PSW _CLR# 1 8 G2201 FDI_OVRVLTG M5 0R0402-PAD be tied to GND directly. C


DGPU_HPD_INTR# 2 R2220 SATA3GP/GPIO37
7 NC_1 P37
3 6 10KR2J-3-GP MFG_MODE N2

1
EC_SMI# SLOAD/GPIO38
4 5
GFX_CRB_DET M3
2

SRN10KJ-6-GP SDATAOUT0/GPIO39
PCH_GPIO48 V13 BG2
TP2209 SDATAOUT1/GPIO48 NCTF_VSS#BG2
RN2202
MFG_MODE 1 8 1 PCH_TEMP_ALERT# V3 BG48 3D3V_S0
S_GPIO SATA5GP/GPIO49 NCTF_VSS#BG48
2 7
EC_SCI# 3 6 20100705 USB3_PW R_ON D6 BH3
GPIO57 NCTF_VSS#BH3

1
PCH_GPIO22 4 5 FDI TERMINATION VOLTAGE OVERRIDE
TPAD14-GP BH47 R2207
TP2205 NCTF_VSS#BH47 TP2207 10KR2J-3-GP
SRN10KJ-6-GP
PCH_GPIO48 1 2 1 A4 BJ4 1 DY
NCTF_VSS#A4 NCTF_VSS#BJ4
R2227 10KR2J-3-GP TPAD14-GP GPIO37 LOW - Tx, Rx terminated to same voltage

2
3D3V_S5 A44 BJ44 FDI_OVRVLTG (FDI_OVRVLTG) (DC Coupling Model DEFAULT)

A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
RN2205 TPAD14-GP NCTF_VSS#A44 NCTF_VSS#BJ44

1
PCH_GPIO12 1 8 A45 BJ45
TP2206 NCTF_VSS#A45 NCTF_VSS#BJ45

BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
USB3_PW R_ON 2 7 TP2208 R2208

NCTF
3 6 1 A46 BJ46 1 10KR2J-3-GP

NCTF TEST PIN:


TPAD14-GP NCTF_VSS#A46 NCTF_VSS#BJ46 TPAD14-GP
4 5
A5 BJ5

2
SRN10KJ-6-GP NCTF_VSS#A5 NCTF_VSS#BJ5
A6 NCTF_VSS#A6 NCTF_VSS#BJ6 BJ6 DMI TERMINATION VOLTAGE OVERRIDE
B3 NCTF_VSS#B3 NCTF_VSS#C2 C2

PCH_GPIO15 1 R2201 2 B47 C48 3D3V_S0 GPIO36 LOW - Tx, Rx terminated to same voltage
B 1KR2J-1-GP NCTF_VSS#B47 NCTF_VSS#C48 B
(DMI_OVRVLTG) (DC Coupling Model DEFAULT)
SB_0811 BD1 D1
NCTF_VSS#BD1 NCTF_VSS#D1

1
R2221 SHR_V1.5

D1,D49,E1,E49,F1,F49
PCH_GPIO24 1 2 BD49 D49 R2209
10KR2J-3-GP NCTF_VSS#BD49 NCTF_VSS#D49 10KR2J-3-GP
20100625 V1.2 TPAD14-GP TP2210 1 BE1 E1 DY Integrated Clock Enable functionality is achieved
NCTF_VSS#BE1 NCTF_VSS#E1
via soft-strap. The default is integrated clock

2
R2226 TPAD14-GP TP2211 1 BE49 E49 DMI_OVRVLTG
NCTF_VSS#BE49 NCTF_VSS#E49
PLL_ODVR_EN 1 2 enable.

1
10KR2J-3-GP BF1 F1
NCTF_VSS#BF1 NCTF_VSS#F1 R2210
TPAD14-GP TP2212 1 BF49 F49 10KR2J-3-GP
NCTF_VSS#BF49 NCTF_VSS#F49
Integrated Clock Chip Enable

2
COUGAR-GP-U2-NF
ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]

3D3V_S0 R2211 LOW (R2211)- ENABLED


ICC_EN#1 2
1KR2J-1-GP GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
1

R2214 R2216 via soft-strap. The default is integrated clock


2G 1G enable.
10KR2J-3-GP

10KR2J-3-GP

[VRAM_SIZE1:VRAM_SIZE2]
2

LL=512M / HL=1G / LH=2G


A <Variant Name> A
VRAM_SIZE1 PLL ON DIE VR ENABLE
VRAM_SIZE2
NOTE:This signal has a weak internal Wistron Corporation
1

R2215 R2217
pull-up 20K 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT Taipei Hsien 221, Taiwan, R.O.C.
10KR2J-3-GP

10KR2J-3-GP

DISABLED -- LOW (R2212 STUFFED)


Title
2

1G_512M_UMA 2G_512M_UMA PLL_ODVR_EN DY 1 R2212 2 PCH (GPIO/CPU)


1KR2J-1-GP Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 22 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com
6A

3D3V_DAC_S0 3D3V_S0

1D05V_VTT
PCH1G POWER 7 OF 10 (0.1uF/0.01uF x1)
(10uF x1_0603)
1.3A Cougar L2301 R2312
AA23 U48 +VCCA_DAC_1_2 1 2 1 2

SCD01U16V2KX-3GP
AC23
VCCCORE Point VCCADAC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
D D
VCCCORE

1
CRT
C2301

C2302

C2303

C2304
(1uFx3) AD21 C2313 C2314 C2315 HCB1608KF-181-GP C2325 0R2J-2-GP
VCCCORE

1
(10uFx1_0603) AD23 U47

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
VCCCORE VSSADAC

VCC CORE
AF21

2
VCCCORE
AF23

2
VCCCORE 3D3V_S0
AG21 VCCCORE R2304 SB_0826
AG23 VCCCORE +3VS_VCCA_LVDS
0.001A
AG24 VCCCORE VCCALVDS AK36 2 1
AG26 0R0603-PAD
VCCCORE
AG27 VCCCORE VSSALVDS AK37 1 R2303 2
AG29 DY 0R2J-2-GP
VCCCORE
AJ23

LVDS
VCCCORE 1D8V_S0
AJ26 VCCCORE VCCTX_LVDS AM37
AJ27 0.06A R2305
VCCCORE +1.8VS_VCCTX_LVDS
AJ29 AM38 1 2

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
VCCCORE VCCTX_LVDS
AJ31 VCCCORE

C2316

C2317
AP36 0R0805-PAD
VCCTX_LVDS

1
1D05V_VTT R2309 C2318 (0.01uF x2)
AP37 DY 0R2J-2-GP (22uF x1)
3.3V CRT LDO

SC10U6D3V5KX-1GP
VCCTX_LVDS
AN19

2
VCCIO 5V_S0 3D3V_DAC_S0

1
U2301 DY
TPAD14-GP TP2301 1 VCCAPLLEXP BJ22
1D05V_VTT VCCAPLLEXP
(10uF x1) 1 VIN VOUT 5
SB_0830
2.925A(Total current of VCCIO) V33 2

HVCMOS
VCC3_3 3D3V_S0 GND
AN16 VCCIO 3 EN NC#4 4
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP

1
C2305

C2306

C2307

C2308

C2309
(1uF x4) AN17 (0.1uFx1) R2315 DY DY
VCCIO
1

1
V34 3D3V_S0_VCC3_3 1 2 C2311 G9091-330T11U-GP C2312
C VCC3_3 0R0402-PAD C
74.09091.J3F

SC1U10V2KX-1GP

SC1U6D3V2KX-GP
2

2
1
AN21
2nd = 74.09198.G7F
2

2
VCCIO C2319
20100625 V1.2 AN26 SCD1U10V2KX-5GP 1D5V_S0_1D8V_S0

2
VCCIO
1D05V_VTT AN27 AT16
L2302 VCCIO VCCVRM
DY 1D05V_VTT
AP21 VCCIO
1 2 VCCAPLLEXP R2306
IND-1UH-100-GP AP23 AT20 +1.05VS_VCC_DMI 1 2
SC10U6D3V5KX-1GP

VCCIO VCCDMI
C2324

0R0402-PAD

DMI
1

1
AP24 (1uF x1)

VCCIO
VCCIO C2320
DY SC1U6D3V2KX-GP
AP26 AB36
2

2
VCCIO VCCCLKDMI
AT24 1D05V_VTT
VCCIO R2307
+1.05VS_VCC_DMI_CCI
0.02A
0.266A (Totally VCC3_3 current) 1 2
0R0402-PAD
AN33 VCCIO

1
(1uFx1)
3D3V_S0 AN34 AG16 C2321 (10uFx1)
VCCIO VccDFTERM SC1U6D3V2KX-GP

2
NAND / SPI
(0.1uF x1) BH29 VCC3_3 VccDFTERM AG17
1

C2310
0.159A(Totally current of VCCVRM) SCD1U10V2KX-5GP AJ16
2

R2302 VccDFTERM +V_NVRAM_VCCQ 1D8V_S0


1D5V_S0_1D8V_S0 1 2 VCCAFDI_VRM AP16 0.19A R2308
B 0R0603-PAD VCCVRM B
VccDFTERM AJ17 2 1
0R0402-PAD

1
TPAD14-GP TP2302 1 VCCFDIPLL BG6 C2322
VCCAFDIPLL SCD1U10V2KX-5GP (0.1uFx1)

2
1D05V_VTT AP17 VCCIO
FDI

VCCSPI V1

+1.05VS_VCC_DMI AU20 0.02A R2313


VCCDMI VCCSPI
0.042A (Totally current of VCCDMI) 2 1
0R0402-PAD
3D3V_S5
(1uFx1)

1
COUGAR-GP-U2-NF The same BIOS SPI ROM power
C2323
SC1U6D3V2KX-GP

2
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
co-operate with R2103
1D8V_S0 1D5V_S0_1D8V_S0

A 1 2 <Variant Name> A
DY
1D5V_S0 R2311 0R3J-0-U-GP
R2310
1 2 Wistron Corporation
0R0603-PAD 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (POWER1)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 23 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com TPAD14-GP TP2401
R2403
1 VCCACLK AD49
PCH1J

VCCACLK
POWER
Cougar
10 OF 10

VCCIO N26
1D05V_VTT

(1uFx1)

1
0.002A +VCCPDSW
Point VCCIO P26
C2423
3D3V_S5 1 2 T16 VCCDSW3_3
0R0603-PAD P28 SC1U6D3V2KX-GP

2
VCCIO
(0.1uFx1)
TPAD14-GP TP2405 1 DCPSUSBYP V12 T27
DCPSUSBYP VCCIO 3D3V_S5 5V_S5
D
VCCIO T29 D
+V3.3S_VCC_CLKF33 T38 3D3V_S5
VCC3_3

2
0.097A (Totally current of VCCSUS3_3) D2401
VCCSUS3_3 T23
TPAD14-GP TP2404 1 +VCCAPLL_CPY_PCH BH23 (0.1uFx1) CH751H-40PT-GP
VCCAPLLDMI2

1
T24 C2424 2nd = 83.R2004.B8F 83.R0304.A8F
VCCSUS3_3 SCD1U10V2KX-5GP R2408
1D05V_VTT (10uFx1) AL29

1
VCCIO
V23 1 2

USB

2
VCCSUS3_3
TPAD14-GP TP2402 1 +VCCSUS1 AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
DCPSUS VCCSUS3_3

1
P24 C2426
VCCSUS3_3 SCD1U10V2KX-5GP
(0.1uFx1)

2
1
AA19 VCCASW
T26 1D05V_VTT C2425
VCCIO SCD1U10V2KX-5GP
AA21

2
VCCASW
+5VA_PCH_VCC5REFSUS
0.001A
AA24 VCCASW V5REF_SUS M26
3D3V_S0
3D3V_S0 5V_S0

Clock and Miscellaneous


R2401 AA26 VCCASW +VCCA_USBSUS TP2403 TPAD14-GP
1 2 AN23 1
DY (10uFx1) 1D05V_VTT AA27
DCPSUS
VCCASW

2
0R3J-0-U-GP (1uFx1) 1.01A (Total current of VCCASW) AN24 +V3.3A_VCCPSUS
VCCSUS3_3
R2416 L2401
AA29 VCCASW DYC2437
SC1U10V2KX-1GP
D2402
CH751H-40PT-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

2
C2406

C2408
1 2 1 2 +V3.3S_VCC_CLKF33 C2403 C2404 AA31 2nd = 83.R2004.B8F 83.R0304.A8F

SC1U6D3V2KX-GP
VCCASW

1
C2407
1R2F-GP IND-10UH-218-GP C2401 0.001A R2407

1
1

1
68.10050.10Y AC26 P34 +5VS_PCH_VCC5REF 1 2

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
C2402 VCCASW V5REF
2nd = 68.10090.10B (1uFx1)
SC10U6D3V5KX-1GP

2
C SC1U10V2KX-1GP AC27 10R2J-2-GP C
2

2
VCCASW

1
N20 3D3V_S5
VCCSUS3_3 R2410

PCI/GPIO/LPC
AC29 C2427
VCCASW +V3.3A_VCCPSUS SC1U10V2KX-1GP
N22 1 2

2
VCCSUS3_3 0R0603-PAD
AC31 VCCASW
(1uFx1)

1
VCCSUS3_3 P20
AD29 C2428
VCCASW SC1U6D3V2KX-GP
P22

2
VCCSUS3_3
(22uFx2_0603) AD31 VCCASW
1D05V_VTT
0.08A (1uFx1) (1uFx3)
3D3V_S0
(220uFx1) W21 VCCASW VCC3_3 AA16
L2402
1 2 +1.05VS_VCCA_A_DPL W23 W16
IND-10UH-218-GP VCCASW VCC3_3
(0.1uFx2)
1

1
68.10050.10Y W24 VCCASW VCC3_3 T34
1

2nd = 68.10090.10BC2443 C2409 C2430 C2431


SC10U6D3V3MX-GP SC1U6D3V2KX-GP W26 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2

2
VCCASW
DY
2

W29 3D3V_S0
VCCASW
0.08A (1uFx1)
L2403 (220uFx1) W31 AJ2
VCCASW VCC3_3
1 2+1.05VS_VCCA_B_DPL
+1.05VS_VCCA_B_DPL (0.1uFx1)

1
IND-10UH-218-GP W33 VCCASW
1

68.10050.10Y AF13 C2429


VCCIO
1

2nd = 68.10090.10BC2444 C2410 SCD1U10V2KX-5GP

2
SC10U6D3V3MX-GP SC1U6D3V2KX-GP +VCCRTCEXT N16
2

DCPRTC 1D05V_VTT
DY 0.16A (Totally current of VCCVRM AH13
2

VCCIO
1

C2411 (0.1uFx1) 1D5V_S0_1D8V_S0 Y49 AH14


B SCD1U10V2KX-5GP VCCVRM VCCIO B
(1uFx1)
2

1
AF14 C2432 3D3V_S5
+1.05VS_VCCA_A_DPL VCCIO SC1U6D3V2KX-GP U2401 1D5V_S5
BD47

SATA

2
VCCADPLLA 1D05V_VTT
VCCAPLLSATA AK1
+1.05VS_VCCA_B_DPL BF47 R2411 1 5
VCCADPLLB +V1.05S_VCCAPLL_SATA3 VIN VOUT
1 2 2
AF11 1D5V_S0_1D8V_S0
DY (10uFx1) 3
GND
4 C2405
VCCVRM EN NC#4

1
1D05V_VTT 1D05V_VTT +VCCDIFFCLKN +VCCDIFFCLK AF17 0R3J-0-U-GP C2416
R2406 VCCIO
R2404 0.055A (1uFx1) AF33 DY DY

SC10U6D3V5KX-1GP
SC1U10V3ZY-6GP
VCCDIFFCLKN

1
2 1 +VCCDIFFCLK 2 1 AF34 AC16 C2436 G9091-150T11U-GP

2
0R0402-PAD 0R0603-PAD VCCDIFFCLKN VCCIO
(1uFx1) AG34 DY

SC1U10V3ZY-6GP
VCCDIFFCLKN
1

1D05V_VTT DY
0.095A AC17 R2412

2
C2412 C2414 VCCIO
SC1U6D3V2KX-GP SC1U6D3V2KX-GP +V1.05S_SSCVCC AG33 AD17 +V1.05S_VCC_SATA 1 2
2

SCD1U10V2KX-5GP(1uFx1) VCCSSC VCCIO 0R0603-PAD (1uFx1)

1
C2415
1D05V_VTT (0.1uFx1) 2 1 +VCCSST V16 C2435
R2405 DCPSST 1D05V_VTT SC1U6D3V2KX-GP

2
2 1 +V1.05S_SSCVCC +3VS_+1.5VS_HDA_IO
0R0402-PAD TPAD14-GP TP2406 1 DCPSUS T17 T21
DCPSUS VCCASW
1

(1uFx1) V19 DCPSUS 1 2 3D3V_S5


MISC

C2413 R2409 0R3J-0-U-GP


SC1U6D3V2KX-GP 1D05V_VTT V21 1 DY 2 1D5V_S0
2

VCCASW R2415 0R3J-0-U-GP


0.001A
CPU

BJ8 1 2
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

V_PROC_IO +3VS_+1.5VS_HDA_IO 1D5V_S5


C2418

C2419

(0.1uFx2) T19 R2413 DY 0R3J-0-U-GP


VCCASW
1

(4.7uFx1_0603)
A C2417 <Variant Name> A
SC4D7U6D3V3KX-GP 0.01A
2

RTC

A22 P32
HDA

RTC_AUX_S5 VCCRTC VCCSUSHDA


(0.1uFx1)
Wistron Corporation
1
6uA COUGAR-GP-U2-NF C2433 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SCD1U10V2KX-5GP Taipei Hsien 221, Taiwan, R.O.C.
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2
C2420

C2421

C2422

(0.1uFx2)
1

(1uFx1) Title

PCH (POWER2)
2

Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 24 of 97
5 4 3 2 1
5 4 3 2 1

SSID = PCH
www.rosefix.com AY4
AY42
AY46
AY8
B11
PCH1I

VSS
VSS
VSS
VSS
VSS
Cougar
Point
9 OF 10

VSS
VSS
VSS
VSS
VSS
H46
K18
K26
K39
K46
B15 VSS VSS K7
B19 VSS VSS L18
B23 VSS VSS L2
B27 VSS VSS L20
D B31 VSS VSS L26 D
PCH1H 8 OF 10 B35 L28
VSS VSS
H5 VSS B39 VSS VSS L36
Cougar B7 VSS VSS L48
AA17 VSS VSS AK38 F45 VSS VSS M12
AA2 VSS Point VSS AK4 BB12 VSS VSS P16
AA3 VSS VSS AK42 BB16 VSS VSS M18
AA33 VSS VSS AK46 BB20 VSS VSS M22
AA34 VSS VSS AK8 BB22 VSS VSS M24
AB11 VSS VSS AL16 BB24 VSS VSS M30
AB14 VSS VSS AL17 BB28 VSS VSS M32
AB39 VSS VSS AL19 BB30 VSS VSS M34
AB4 VSS VSS AL2 BB38 VSS VSS M38
AB43 VSS VSS AL21 BB4 VSS VSS M4
AB5 VSS VSS AL23 BB46 VSS VSS M42
AB7 VSS VSS AL26 BC14 VSS VSS M46
AC19 VSS VSS AL27 BC18 VSS VSS M8
AC2 VSS VSS AL31 BC2 VSS VSS N18
AC21 VSS VSS AL33 BC22 VSS VSS P30
AC24 VSS VSS AL34 BC26 VSS VSS N47
AC33 VSS VSS AL48 BC32 VSS VSS P11
AC34 VSS VSS AM11 BC34 VSS VSS P18
AC48 VSS VSS AM14 BC36 VSS VSS T33
AD10 VSS VSS AM36 BC40 VSS VSS P40
AD11 VSS VSS AM39 BC42 VSS VSS P43
AD12 VSS VSS AM43 BC48 VSS VSS P47
AD13 VSS VSS AM45 BD46 VSS VSS P7
AD19 VSS VSS AM46 BD5 VSS VSS R2
AD24 VSS VSS AM7 BE22 VSS VSS R48
C AD26 AN2 BE26 T12 C
VSS VSS VSS VSS
AD27 VSS VSS AN29 BE40 VSS VSS T31
AD33 VSS VSS AN3 BF10 VSS VSS T37
AD34 VSS VSS AN31 BF12 VSS VSS T4
AD36 VSS VSS AP12 BF16 VSS VSS W34
AD37 VSS VSS AP19 BF20 VSS VSS T46
AD38 VSS VSS AP28 BF22 VSS VSS T47
AD39 VSS VSS AP30 BF24 VSS VSS T8
AD4 VSS VSS AP32 BF26 VSS VSS V11
AD40 VSS VSS AP38 BF28 VSS VSS V17
AD42 VSS VSS AP4 BD3 VSS VSS V26
AD43 VSS VSS AP42 BF30 VSS VSS V27
AD45 VSS VSS AP46 BF38 VSS VSS V29
AD46 VSS VSS AP8 BF40 VSS VSS V31
AD8 VSS VSS AR2 BF8 VSS VSS V36
AE2 VSS VSS AR48 BG17 VSS VSS V39
AE3 VSS VSS AT11 BG21 VSS VSS V43
AF10 VSS VSS AT13 BG33 VSS VSS V7
AF12 VSS VSS AT18 BG44 VSS VSS W17
AD14 VSS VSS AT22 BG8 VSS VSS W19
AD16 VSS VSS AT26 BH11 VSS VSS W2
AF16 VSS VSS AT28 BH15 VSS VSS W27
AF19 VSS VSS AT30 BH17 VSS VSS W48
AF24 VSS VSS AT32 BH19 VSS VSS Y12
AF26 VSS VSS AT34 H10 VSS VSS Y38
AF27 VSS VSS AT39 BH27 VSS VSS Y4
AF29 VSS VSS AT42 BH31 VSS VSS Y42
AF31 VSS VSS AT46 BH33 VSS VSS Y46
AF38 VSS VSS AT7 BH35 VSS VSS Y8
B B
AF4 VSS VSS AU24 BH39 VSS VSS BG29
AF42 VSS VSS AU30 BH43 VSS VSS N24
AF46 VSS VSS AV16 BH7 VSS VSS AJ3
AF5 VSS VSS AV20 D3 VSS VSS AD47
AF7 VSS VSS AV24 D12 VSS VSS B43
AF8 VSS VSS AV30 D16 VSS VSS BE10
AG19 VSS VSS AV38 D18 VSS VSS BG41
AG2 VSS VSS AV4 D22 VSS VSS G14
AG31 VSS VSS AV43 D24 VSS VSS H16
AG48 VSS VSS AV8 D26 VSS VSS T36
AH11 VSS VSS AW14 D30 VSS VSS BG22
AH3 VSS VSS AW18 D32 VSS VSS BG24
AH36 VSS VSS AW2 D34 VSS VSS C22
AH39 VSS VSS AW22 D38 VSS VSS AP13
AH40 VSS VSS AW26 D42 VSS VSS M14
AH42 VSS VSS AW28 D8 VSS VSS AP3
AH46 VSS VSS AW32 E18 VSS VSS AP1
AH7 VSS VSS AW34 E26 VSS VSS BE16
AJ19 VSS VSS AW36 G18 VSS VSS BC16
AJ21 VSS VSS AW40 G20 VSS VSS BG28
AJ24 VSS VSS AW48 G26 VSS VSS BJ28
AJ33 VSS VSS AV11 G28 VSS
AJ34 VSS VSS AY12 G36 VSS
AK12 VSS VSS AY22 G48 VSS
AK3 VSS VSS AY28 H12 VSS
H18 VSS
COUGAR-GP-U2-NF H22 VSS
H24 VSS
A H26 VSS <Variant Name> A
H30 VSS
H32 VSS
H34
F3
VSS
VSS
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

COUGAR-GP-U2-NF Title

PCH (VSS)
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 25 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 26 of 97
5 4 3 2 1
5 4 3 2 20100707 SB_0809

3D3V_AUX_KBC
1

www.rosefix.com
3D3V_AUX_KBC
SSID = KBC 3D3V_AUX_KBC

1
1
R2718
3D3V_AUX_KBC R2724
G Sensor ID:

100KR2J-1-GP
1
3D3V_S0 64K9R2F-1-GP
SB_0831 BOM Ctrl R2707 High: ST

2
R2702 100KR2F-L1-GP GSENSOR_ID

2
2 10R0603-PAD VBAT
C2703 RC2701 PCB_VER_AD
65W Low:ADI

2
1

1
ADT_TYPE

SC2D2U10V3KX-1GP

SC33P50V2JN-3GP

1
C2702 DY
DY R2726 R2710

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2
C2704 100KR2F-L1-GP

C2705

C2706

C2707

C2708

C2710
RC2702 DY

100KR2J-1-GP
1

1
SC33P50V2JN-3GP

DY C2701 C2709 R2701


DY 65W_90W#

2
SC2D2U10V3KX-1GP 100KR2F-L1-GP SB_0818
SC2D2U10V3KX-1GP
2

2
High: 65W / Low 90W 90W

115

102
19
46
76
88
DY

2
4
U2701A 1 OF 2 C2711 1 2
SC220P50V2KX-3GP

VCC
VCC
VCC
VCC
VCC

AVCC

VDD
SB_0831 R2712 3D3V_AUX_S5
R2735
40 AD_IA AC_IN_KBC 1 2 AC_IN 40
104 7 PLT_RST#_EC
1 2 PLT_RST# 5,11,18,31,36,65,66,71,83,97
VREF LRESET#

D D

1
C2714 1 2 SCD1U10V2KX-5GP 2
DY 97
LCLK
3 LPC_FRAME#_1
CLK_PCI_KBC 18
2 R2730 1 33R2J-2-GP LPC_FRAME# 21,65,71
0R0402-PAD R2704
PCB_VER_AD GPIO90/AD0 LFRAME# LPC_AD3 0R2J-2-GP 10KR2J-3-GP
98 1
ADT_TYPE GPIO91/AD1 LAD3 LPC_AD2
99 128 LPC_AD[0..3] 21,65,71
GPIO92/AD2 LAD2

1
MODEL_ID_AD 100 127 LPC_AD1

2
GPIO93/AD3 LAD1 LPC_AD0_1
126 2 R2729 1 33R2J-2-GP LPC_AD0 R2706
LAD0
49 CAMERA_EN 101 125 INT_SERIRQ 21 100KR2J-1-GP
GPIO94/DA0 SERIRQ
79 GSENSE_TST 105
GPIO95/DA1 GPIO11/CLKRUN#
8 PM_CLKRUN# 19 DY
66 3G_EN 106 9 PANEL_BLEN 49 68 KBC_PWRBTN# 2 1 KBC_PWRBTN_EC#

2
GPIO96/DA2 GPIO65/SMI# ECSCI#_KBC
29
ECSCI#/GPIO54 KBC_GPIO10
124 1 R2777 2 VGA_SW# 68 R2703
GPIO10/LPCPD# ECSWI#_KBC 0R0402-PAD 470R2J-2-GP
19 SUS_PWR_ACK 79
GPIO2 GPIO67/PWUREQ#
123 DY

1
SB_0809 95 121

SC220P50V2KX-3GP
79 GSENSE_X GPIO3/AD6 GPIO85/GA20 H_A20GATE 22

1
2 OF 2

C2717
68 CPU_CURRENT 96 122 H_RCIN# 22 U2701B G2701 R2774
SB_0729 GPIO4/AD5 KBRST#/GPIO86 KCOL[0..15] 69 3D3V_AUX_KBC 3D3V_AUX_S5 100KR2J-1-GP
TPAD14-GP TP2711 1 CHG_USB_DET# 108 GAP-OPEN
KBC_PWRBTN_EC# GPIO5/AD4 KCOL0
93 56 SATA_ODD_DA# 31 53

2
PSL_IN2_GPI6# GPIO56/TA1 KBSOUT0/JENK# KCOL1
79 GSENSE_Y 94 27 BLON_OUT 49 11,19,97 PM_PWRBTN# 117 52 1 R2725 2

2
GPIO7/AD7 GPIO52/PSDAT3/RDY# GPIO20/TA2/IOX_DIN_DIO KBSOUT1/TCK KCOL2 0R0805-PAD
68 DC_BATFULL 114 25 PCIE_RST# 83 82 WIRELESS_SW# 63 51
GPIO16 GPIO50/PSCLK3/TDO GPIO14/TB1 KBSOUT2/TMS KCOL3
38 AD_OFF 6 11 GSENSE_ON# 79 19,36,37,47,92 PM_SLP_S3# 64 50
TPAD14-GP TP2710 NC_KBC_GPIO30 GPIO24 GPIO27/PSDAT2 GPIO1/TB2 KBSOUT3/TDI KCOL4
1 109 10 HDMI_IN# 51 49
GPIO30 GPIO26/PSCLK2 KBSOUT4/JEN0# KCOL5
36,97 S5_ENABLE 14 71 TPDATA 69 68 CHARGE_LED 32 48
GPIO34/CIRRXL GPIO35/PSDAT1 GPIO15/A_PWM KBSOUT5/TDO KCOL6
68 WIRELESS_LED 15
80
GPIO36 GPIO37/PSCLK1
72 TPCLK 69 <------ TP TPAD14-GP TP2703
29
1
KBC_BEEP
LED_Brightness
118
62
GPIO21/B_PWM KBSOUT6/RDY#
47
43 KCOL7
39 BAT_IN# GPIO41 GPIO13/C_PWM KBSOUT7
17 SB_0809 65 42 KCOL8
70 LID_CLOSE# GPIO42/TCK 40 STOP_CHG# GPIO32/D_PWM KBSOUT8
TPAD14-GP TP2702 1CHG_USB_OC# KCOL9
19 RSMRST#_KBC 20
21
GPIO43/TMS GPIO17/SCL1
70
69
BAT_SCL 39,40 <------ BATTERY / CHARGER 81
66
GPIO66/G_PWM KBSOUT9/SDP_VIS#
41
40 KCOL10
19,46 PM_SLP_S4# GPIO44/TDI GPIO22/SDA1 BAT_SDA 39,40 68 KBC_NOVO_BTN# GPIO33/H_PWM KBSOUT10/P80_CLK KCOL11
TPAD14-GP TP2706 1
21 ME_UNLOCK
NC_KBC_GPIO51
23
26
GPIO46/CIRRXM/TRST# GPIO73/SCL2
67
68
SML1_CLK 20 <------PCH / eDP 19 AD_DETECT 22
16
GPIO45/E_PWM KBSOUT11/P80_DAT
39
38 KCOL12
GPIO51 GPIO74/SDA2 SML1_DATA 20 68 PWRLED GPIO40/F_PWM KBSOUT12/GPIO64
AC_IN_KBC 73 119 SB_0809 37 KCOL13 3D3V_AUX_KBC
PSL_IN1_GPI70 GPIO23/SCL3 LAN_PWR_ON 31 KBSOUT13/GPIO63
TPAD14-GP TP2705 1 NC_EC_ENABLE 74 120 GSENSOR_ID 36 KCOL14
RTC_AUX_S5 75
PSL_OUT_GPIO71
VBKUP
GPIO31/SDA3
GPIO47/SCL4
24 PROCHOT_EC ECRST# 85
VCC_POR#
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
35 KCOL15 EC GPIO standard PH/PL SB_0823

1
65 WIFI_RF_EN 82 28 CHG_ON# 40 34 KCOL16 1 TP2708 TPAD14-GP
GPIO75 GPIO53/SDA4 GPIO60/KBSOUT16 KCOL17 TP2709 TPAD14-GP R2714
63 BLUETOOTH_EN 83 33 1
GPO76/SHBM GPIO57/KBSOUT17 3D3V_AUX_KBC 10KR2J-3-GP
19,36 S0_PWR_GOOD 84 65 E51_RxD 113 KROW[0..7] 69
KBC_GPIO81 GPIO77 GPIO87/CIRRXM/SIN_CR KROW0
91 65 E51_TxD 111 54
GPIO81 GPI/O83/SOUT_CR/TRIST# KBSIN0 KROW1
57,61 USB_PWR_EN# 110 55

2
GPO82/IOX_LDSH/TEST# KBSIN1 RN2701
19 AC_PRESENT 112 90 EC_SPI_CS#_C 2 R2736 1 33R2J-2-GP 29 AMP_MUTE# 30 56 KROW2
GPI/O84/IOX_SCLK/XORTR# F_CS0# SPI_CS0#_R 21,60 GPIO55/CLKOUT/IOX_DIN_DIO KBSIN2
KBC_GPIO97 107 92 EC_SPI_CLK_C 2 R2719 1 33R2J-2-GP 19 PCH_SUSCLK_KBC 77 57 KROW3 BAT_SCL 3 2 KBC_NOVO_BTN#
GPIO97 F_SCK SPI_CLK_R 21,60 GPIO0/EXTCLK KBSIN3
86 EC_SPI_DI_C 2 R2737 1 0R2J-2-GP 58 KROW4 BAT_SDA 4 1
F_SDI/F_SDIO1 SPI_SO_R 21,60 KBSIN4
87 EC_SPI_DO_C 2 R2722 1 33R2J-2-GP 59 KROW5
F_SDIO/F_SDIO0 SPI_SI_R 21,60 KBSIN5
KBC_VCORF 44 5,22 H_PECI R2721 1 243R2J-GP PECI 13 60 KROW6
VCORF R2720 EC_VTT12 PECI KBSIN6 KROW7 SRN4K7J-8-GP SB_0823
1D05V_VTT 1 2 61
VTT KBSIN7
1

NOTE: 0R0402-PAD RN2703

1
AGND
C2712 C2716 BAT_IN# 4 1 3D3V_AUX_KBC
Locate resistors R2719 and R2722 close
GND
GND
GND
GND
GND
GND

SC1U10V3ZY-6GP NPCE795GA0DX-GP 3 2
to the NPCE791L.
2

EC_SPI_DI_C

SCD1U16V2KX-3GP
2

1
NPCE795GA0DX-GP 1EC_AGND R2701 and C2716 SRN100KJ-6-GP
18
45
78
89
116
5

103
R2717
Need very close to EC

1
10KR2J-3-GP
NOTE: R2773 RN2705
100KR2J-1-GP S5_ENABLE 8 1 SB_0809
Connect GND and AGND planes via either

2
ECRST# 7 2
R2711 0R resistor or one point layout connection. LID_CLOSE# 6 3 CHG_USB_DET#

2
0R0402-PAD 5 4
20100705
Prevent BIOS data loss solution SRN10KJ-6-GP
2

R2715 SB_0809 3D3V_AUX_S5


DY
20100705 ECRST#

C C
1 2
0R2J-2-GP 3D3V_S0

1
RN2702
R2705 HDMI_IN# 4 1
D2701 10KR2J-3-GP 3D3V_AUX_S5 PCIE_RST# 3 2

1
1 U2702
20 EC_SWI# EC_GPIO47 High Active

E
R2723
C2715 SRN10KJ-5-GP

2
ECSWI#_KBC MMBT3906-4-GP
3 28,36,86 PURE_HW_SHUTDOWN# 2 1 B 1 DY

2
Q2702 GND E51_RxD
3
DY DY1 2

SC1U6D3V2KX-GP
PROCHOT_EC Q2701 PURE_HW_SHUTDOWN# VCC R2708 10KR2J-3-GP
2 G 2

C
10KR2J-3-GP RESET#
BAS16-6-GP D H_PROCHOT#_EC 1 R2733 2 H_PROCHOT# 5,42
1

83.00016.K11 G690L293T73UF-GP
R2732 S 0R0402-PAD 74.00690.I7B
2ND = 83.00016.F11 RN2704
1st = 84.03906.F11
100KR2J-1-GP

2N7002K-2-GP 2nd = 84.C3906.A11 BLUETOOTH_EN 4 1


R2716 DY 1st = 84.2N702.031 3 2
2

1 2 2ND = 84.2N702.J31
0R2J-2-GP SRN10KJ-5-GP
SB_0812
DY
D2704
22 EC_SCI# 1
AD_OFF 2 R2770 1
3 ECSCI#_KBC
1KR2J-1-GP
2

BAS16-6-GP
83.00016.K11
2ND = 83.00016.F11

LILI Multi GPIO setting


3D3V_AUX_KBC

SML1_CLK
RN48 1

SMBC_THERM 3 2
SMBD_THERM 4 1 3D3V_S0 R2727
47KR2F-GP
Q2703 BOM Ctrl
SRN10KJ-5-GP
4 3
2

SMBC_THERM 28,86
5 2 MODEL_ID_AD
1

SML1_DATA 6 1 SMBD_THERM 28,86


R2728

B KBC_GPIO81 1 R2775 2 NUM_LED 68


3D3V_S0
DMN66D0LDW-7-GP
84.DMN66.03F
2ND = 84.27002.A3F
100KR2F-L1-GP
B
2

0R0402-PAD

KBC_GPIO97 1 R2776 2 CAP_LED 68


0R0402-PAD 20100705

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

www.vinafix.vn
Taipei Hsien 221, Taiwan, R.O.C.

Title

KBC Nuvoton NPCE795


Size Document Number Rev
A1
LA470 -1
Date: Thursday, December 16, 2010 Sheet 27 of 97
5 4 3 2 1

SSID = Thermal
www.rosefix.com
Thermal sensor
Close to PCH on top side.
T8
2200p close to smsc2103 chip
H_THERMDA
SA 0905 change to 390p

3 1

1
E
D B C389 D

1
B C183 SC2200P50V2KX-2GP

2
SC390P50V2KX-GP Q9

E
H_THERMDC

2
C
MMBT3904W T1G-GP
Q6
MMBT3904W T1G-GP
CPU backside or inside the socket
CPU TEMP:
2200p close to smsc2103 chip H_THERMDA and H_THERMDC routing 10mil trace width
REMOTE2-
2 and spacing. Locate Capacity near Thermal diode.
E

1
B
C434 C569
SC390P50V2KX-GP SC2200P50V2KX-2GP
2

2
C

DY 4 WIRE PWM Fan Control circuit


Q42 REMOTE2+
MMBT3904W T1G-GP 5V_S0
between CPU, VGA and DIMM on bottom side Close to connector
SA 0905
D2801

2
CH551H-30PT-GP C39

1
SC4D7U6D3V3KX-GP
83.R5003.C8F
2ND = 83.R5003.H8H R2801 R426
3rd = 83.5R003.08F DY 10KR2J-3-GP

0R0603-PAD
2
3D3V_S0

2
1
C C

6
R280
6K8R2J-GP SB_0819
5V_S0_FAN 4
FAN_TACH 3

2
SHDN_SEL 2
3D3V_S0 SHDN --> 2N3904 ON External diode FAN_PW M R427 1 2 FAN_PW M_C 1
0R0402-PAD FAN1
ACES-CON4-4-GP
1

1
EC2801 EC2802 20.F0765.004

5
R260 RN49 2nd = 20.F1808.004

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
68R2-GP 2 3 DY DY
3D3V_S0

2
C388 1 4
U31
2

1 2 2103_VDD SRN10KJ-5-GP
3 4 2103_4 1 TP65 TPAD14-GP
SCD1U10V2KX-4GP VDD GPIO1 2103_5 TP67 TPAD14-GP
GPIO2 5 1 D2802
H_THERMDA 2
H_THERMDC DP1 FAN_TACH 20100707_EMI
1 DN1 TACH 10 1 2
REMOTE2+ 16 11 FAN_PW M
REMOTE2- DP2/DN3 PWM
15 ND2/DP3 CH551H-30PT-GP
14 TRIP_SET R276 1 2 649R2F-GP
TRIP_SET 2ND = 83.5R003.08F
SA 0905
SC 1203 THERM_SYS_SHDN# 7 SYS_SHDN# SHDN_SEL 13 SHDN_SEL T8 = 98
1 THERM_SCI# 1 2 THERM_SCI#_R 6
TP66 R272 0R0402-PAD ALERT# 3rd = 83.R5003.G8F
TRIP_SET: 649 ohm => 87 dgree C
TPAD14-GP 9 12 83.R5003.C8F
27,86 SMBC_THERM SMCLK GND
27,86 SMBD_THERM 8 SMDATA GND 17
AFTP2803 1 FAN_PW M_C
B AFTP2802 FAN_TACH B
1
EMC2103-2-AP-GP AFTP2801 1 5V_S0_FAN

pin6, ALERT# OD
pin7, SYS_SHDN# OD
SB_0825

3D3V_AUX_S5
3D3V_S0
3

1
D2803 R2809
BAT54PT-GP 100KR2J-1-GP
83.00054.T81 DY
2ND = 83.BAT54.D81 Q2802

2
3rd = 83.BAT54.S81 S THERM_SYS_SHDN#
1

R2810
27,36,86 PURE_HW _SHUTDOW N# D 1 DY 2 3D3V_S0
0R2J-2-GP
1

G 1 R2811 2 IMVP_PW RGD 36,42


R2812 0R2J-2-GP
1

DY C2811 2N7002K-2-GP
DY 1st = 84.2N702.031
10KR2J-3-GP

SCD1U10V2KX-5GP

2ND = 84.2N702.J31
2

A <Variant Name> A

SB_0812
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

THERMAL SENSOR SMSC EMC2103


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 28 of 97
5 4 3 2 1
5 4 3 2 1

3D3V_S0

1
R2901
2
www.rosefix.com
C2901
AUD_3VD

C2902 1
G2901
GAP-CLOSE
2
5V_S0

1
R2902
2
AUD_5VA
5V_S0

1
R2903
2
5VA_OP_S0
1D5V_S0
DY
R2911
1D5V_S0_AUD

1
C2904 C2905 1 2
0R0603-PAD C2903 0R0603-PAD

1
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP
0R0603-PAD C2906

1
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SC4D7U10V5ZY-3GP
ALC_AGND 0R3J-0-U-GP

2
SC1U10V2KX-1GP 3D3V_S0

2
R2913

2
1 2
D D
0R3J-0-U-GP
Place next to pin 1
ALC_AGND ALC_AGND

75R2J-1-GP R2904
AUD_PORTA_R 2 1
82 AUD_PORTA_R ALC_AGND MIC1_VREF MIC1_VREF 82
75R2J-1-GP R2905
AUD_PORTA_L 2 1 ACL_VREF
82 AUD_PORTA_L

CBNSC2D2U10V3ZY-1GP
5K1R2F-2-GP R2906 C2908 C2909 Place close 21 HDA_SPKR R2907 1 2 KBC_BEEP_R 1 2 AUD_PC_BEEP

HP_OUT_R_AUD
HP_OUT_L_AUD
AUD_SENSE_PORT_A 2 1 AUD_5VA to Pin 25 10KR2J-3-GP C2907
82 AUD_SENSE_PORT_A

1
SC2D2U10V3ZY-1GP
SCD1U10V2KX-5GP
L_LINE_IN_C ALC_AGND Place close
C2910 C2912 to Pin 27 R2908 1 R2909

SENSEB
2

CPVEE2

2
27 KBC_BEEP

1
R_LINE_IN_C C2911 C2914 10KR2J-3-GP C2913 4K7R2J-2-GP

1
SC10U6D3V3MX-GP
SC100P50V2JN-3GP

2
SCD1U10V2KX-4GP

SC10U6D3V3MX-GP
CBP

2
SCD1U10V2KX-4GP

2
36

35

34

33

32

31

30

29

28

27

26

25
U2901 5V_S0
ALC_AGND ALC_AGND

VREF
SENSE-B

CPVEE

CBP
LOUT1-R/PORT-D-R

HPOUT-R/PORT-I-R

CBN
LOUT1-L/PORT-D-L

HPOUT-L/PORT-I-L

MIC1-VREFO

AVSS1

AVDD1
3D3V_S0

1
DY
R2912
37 24 10KR2J-3-GP
MONO-OUT LINE1-R/PORT-C-R

1
AUD_5VA 38 23 R2930

2
AVDD2 LINE1-L/PORT-C-L 10KR2J-3-GP
39 22 AUD_PORTC_R C2915 1 2 SC4D7U6D3V3KX-GP AUD_PORTC_R_C AUD_PORTC_R_C 82 1451_SD
R2910 LOUT2-L/PORT-A-L MIC1-R/PORT-B-R

2
ALC_AGND 20KR2F-L-GP
2 1JDREF 40 21 AUD_PORTC_L C2916 1 2 SC4D7U6D3V3KX-GP AUD_PORTC_L_C AUD_PORTC_L_C 82
JDREF MIC1-L/PORT-B-L

1
C C

D
41 20 R2915 Q2901
LOUT2-R/PORT-A-R LINE2-VREFO 10KR2J-3-GP DY
ALC_AGND 42 19
AVSS2 MIC2-VREFO

2
43 18
NC#43 ALC272 LINE1-VREFO
44 17
DMIC-CLK3/4 MIC2-R/PORT-F-R 2N7002K-2-GP D2901

G
45
SPDIFO2 MIC2-L/PORT-F-L
16 1st = 84.2N702.031 2 AMP_MUTE# 27
2ND = 84.2N702.J31
AUD_DMIC_CLK 46 15 T1# 3
GPIO0/DMIC-DATA1/2

GPIO1/DMIC-DATA3/4

58 AUD_DMIC_CLK DMIC-CLK1/2 LINE2-R/PORT-E-R


ALC_EAPD 47 14 1 ALC_EAPD
EAPD LINE2-L/PORT-E-L R2914
48 13 AUD_SENSE_PORT 2 1 AUD_SENSE_PORT_C BAW56-5-GP
SDATA-OUT

AUD_SENSE_PORT_C 82
PCBEEP-IN

SPDIFO1 SENSE-A 20KR2F-L-GP 83.00056.Q11


SDATA-IN

DVDD-IO

RESET#

2nd = 83.00056.I11
BITCLK
DVDD

SYNC
DVSS

DVSS

ALC272-GR-GP
1

10

11

12

AUD_3VD
71.AL272.00G
AUD_SDATAIN

AUD_PC_BEEP 1D5V_S0_AUD R2916 42K2R2F-L-GP SCD47U6D3V2KX-GPC2917


SCD47U6D3V2KX-GP C2917 R2917 20KR2F-L-GP
AUD_DMIC_1_2

R_LINE_IN_C1 2R_LINE_IN_R
1 2R_LINE_IN
LIN+ 1 2 AUD_SPK_L+_L
1

SCD47U6D3V2KX-GP C2921 20KR2F-L-GP


C2918 C2919 R2918 42K2R2F-L-GP L_LINE_IN_C 1 2L_LINE_IN_R
1 2L_LINE_IN
1

1
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP L_LINE_IN 1 2 AUD_SPK_L-_L


2

58

C2920 R2919
AUD_DMIC_1_2

SCD1U10V2KX-4GP R2920 42K2R2F-L-GP


2

RIN+ 1 2 AUD_SPK_R+_L
B B
R2921 42K2R2F-L-GP
R_LINE_IN 1 2 AUD_SPK_R-_L

HDA_CODEC_RST# 21
SB_0805
AUD_SDATA_OUT AUD_SYNC

2 1 HDA_SDIN0 21
R2922 22R2J-2-GP 5VA_OP_S0

2 1 HDA_CODEC_BITCLK 21 U2902
0R0402-PAD R2923 SCD1U10V2KX-4GP 1 2C2923 C2925
1

C2922 2 5 BYPASS 1 2
SC10P50V2JN-4GP SC4D7U10V5ZY-3GP VCC BYPASS
1 2C2924 11 14 1451_SD SC4D7U10V5ZY-3GP
VCC SHUTDOWN
2

20KR2F-L-GP ALC_AGND
20100705_AUD SB_0817 C2926 R2924 R_LINE_IN 7 1 AUD_SPK_L-_L AUD_SPK_L-_L 58
RIN- LVO1
1 2RIN+_R 1 2 RIN+ 8 RIN+ LVO2 4 AUD_SPK_L+_L AUD_SPK_L+_L 58
AUD_3VD AUD_3VD SCD47U6D3V2KX-GP L_LINE_IN 15 12 AUD_SPK_R-_L
LIN- RVO1 AUD_SPK_R-_L 58
C2927 LIN+ 16 9 AUD_SPK_R+_L AUD_SPK_R+_L 58
SCD47U6D3V2KX-GP 1 LIN+ RVO2
2LIN+_R 1 2R2925
1

R2926 R2927 20KR2F-L-GP 3


33KR2F-GP 33KR2F-GP ALC_AGND VSS
10
VSS
DY 6 NC#6
13 17
2

NC#13 GND

G1454R41U-GP
1

ALC_AGND
Q2902
1

C2928 C2929 DY
SC100P50V2JN-3GP Q2903
SC33P50V2JN-3GP G
2

A A
DY G
2

21 HDA_CODEC_SYNC D
21 HDA_CODEC_SDOUT D <Variant Name>
S AUD_SYNC
S AUD_SDATA_OUT
2N7002K-2-GP Wistron Corporation
2N7002K-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1st = 84.2N702.031 Taipei Hsien 221, Taiwan, R.O.C.
2ND = 84.2N702.J31 84.2N702.J31
1 R2928 2 2ND = 84.2N702.031
0R2J-2-GP Title
DY
Codec_ALC272

www.vinafix.vn
1 R2929 2
0R2J-2-GP
Size Document Number Rev
Custom
LA470 -1
Date: Thursday, December 16, 2010 Sheet 29 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio AMP
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 30 of 97
5 4 3 2 1
5 4 3 2 1

25MHz XTAL

X2
www.rosefix.com
LAN_XTAL0
3D3V_LAN_S5 1D05V_LAN_S5 1D05V_LAN_S5 3D3V_LAN_S5

3D3V_S0
main pwr if have no ASF

1
LAN_XTAL0
LAN_XTAL1
2 1 LAN_XTAL1 LAN_EESK 1 R3127 2

LAN_EESK
SPEED_100# 59
0R0402-PAD R3136
XTAL-25MHZ-102-GP 1KR2J-1-GP

GPO
82.30020.851 R3123
D 2ND = 82.30020.791 D

2
3rd = 82.30020.A31 1 2 LAN_RSET LAN_ACT_LED# 59 RTL_ISOLATE#

1
R3130 1 2
1M1R2J-GP 2K49R2F-GP R3119
SB_0824 15KR2J-1-GP
1

C3103 1 C3148

48
47
46
45
44
43
42
41
40
39
38
37

2
SC12P50V2JN-3GP SC12P50V2JN-3GP U3101
2

49 3D3V_LAN_VDDSREG 3D3V_LAN_S5

AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD33

LED1/EESK
RSET

GPO/SMBALERT
GND

59 MDI0+ 1 36 1D05V_LAN_REGOUT
R3132 MDIP0 REGOUT High:Link up
DY LAN_XTAL1
59 MDI0- 2 MDIN0 VDDREG 35
0R2J-2-GP Low:Link down
20 LAN_XI 2 1 1D05V_LAN_S5 3 AVDD10 VDDREG 34
59 MDI1+ 4 33 LAN_ENSW REG 1 R3125 2 3D3V_LAN_S5 GPO 1 R3120 2 1KR2J-1-GP
0R2J-2-GP MDIP1 ENSWREG LAN_EEDI
59 MDI1- 5 MDIN1 EEDI/SDA 32
Pin-XTAL2 is External Clock Input 6 31 LAN_EEDO 1 TP3102 R3102 0ohm PAD For Enable Switch Regulator. R3122 10KR2J-3-GP
1D05V_LAN_S5 AVDD10 LED3/EEDO R3103 0ohm Res For Disable Switch Regulator.
Pin. 59 MDI2+ 7 30 LAN_EECS TPAD14-GP LAN_EECS 1 2
MDIP2 EECS/SCL

2
8 29 R3126 10KR2J-3-GP
R3121 is need when using external 59 MDI2- MDIN2 DVDD10 1D05V_LAN_S5
clock source. 1D05V_LAN_S5 9 AVDD10 LANWAKE# 28 PCIE_W AKE# 19,65,66 R3124 LAN_EEDI 1 2
59 MDI3+ 10 27 3D3V_LAN_S5 DY 0R2J-2-GP R3128 10KR2J-3-GP
MDIP3 DVDD33 RTL_ISOLATE# SMB_LAN_DATA 1
59 MDI3- 11 MDIN3 ISOLATE# 26 2
3D3V_LAN_S5 12 25 PLT_RST# 5,11,18,27,36,65,66,71,83,97

1
AVDD33 PERST# The SM DATA with 10K ohm pull GND.

REFCLK_N
REFCLK_P
SMBDATA
CLKREQ#
SMBCLK
DVDD10

EVDD10
C C

HSON
HSOP
HSIN
Make sure PCIE_Wake# & PCIE_CLK_LAN_RQ1#connected to 10K

HSIP

GND
RTL8111E-VB-GR-GP
resistor pull high close to PCH side

13
14
15
16
17
18
19
20
21
22
23
24
1D05V_LAN_S5
SB_0728 R3121 SMB_LAN_DATA 3D3V_LAN_S5
20 PCIE_CLK_LAN_REQ# 2 1LAN_CLKREQ# R3135
20 PCIE_TXP4 0R0402-PAD 1 DY 2
20 PCIE_TXN4
20 CLK_PCIE_LAN 3D3V_S5 0R3J-0-U-GP
20 CLK_PCIE_LAN#
1D05V_LAN_EVDD10 -1 0114 S D

SCD1U10V2KX-4GP

SCD1U16V2ZY-2GP
20 PCIE_RXP4 1 2 PCIE_RXP4_C Q3103

1
C3145 SCD1U10V2KX-4GP C3151

1
C3152 R3133 AO3419L-GP

1
1 2 PCIE_RXN4_C 100KR2J-1-GP C3150

2
20 PCIE_RXN4 C3147 SCD1U10V2KX-4GP

SC1U10V2KX-1GP
2

2
20100705_Standard LAN_PW R_ON_T
SB_0812

D
vendor advice change 1D05V_LAN_S5
Layout Note: Close to U3101 pin C3106 ~ C3112 Q3104
L3102 R3131 2N7002K-1-GP
1D05V_LAN_REGOUT 1 2 1 2 1D05V_LAN_EVDD10
B IND-4D7UH-159-GP 0R0603-PAD B
27 LAN_PW R_ON G
84.2N702.031
1

2nd = 84.2N702.J31

S
1

1
C3146 C3129 C3128
SC4D7U6D3V3KX-GP C3130 C3131 C3132 C3133 C3134 C3138 C3139 C3149
SCD1U10V2KX-4GP
2

SC1U10V2KX-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
L3101 adopt spec.
Layout Note: Close to U3101
C3104 change to 4.7uF X5R pin C3113&C3114
type capacitor
C3113 value modify to 1uF
capacitor
3D3V_LAN_S5 3D3V_LAN_VDDSREG

1 R3134 2
0R0603-PAD
1

C3137
C3135 C3140 C3141 C3142 C3143 C3144 C3136
<Variant Name>
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

A A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

C3122 change to 4.7uF X5R LAN RTL8111E


type capacitor Size Document Number Rev
Layout Note: Close to U3101 pin C3115 ~ C3120 A3
-1

www.vinafix.vn
LA470
Thursday, December 16, 2010
Date: Sheet 31 of 97

5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RTS5159 (CARD READER)


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 32 of 97
5 4 3 2 1
A B C D E

www.rosefix.com
4 4

3
(Blanking) 3

2 2

<Variant Name>

1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 33 of 97
A B C D E
5 4 3 2 1

www.rosefix.com
D D

(Blanking)
C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 34 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 3.0 Controller


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 35 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com 28,42 IMVP_PWRGD

19,27 S0_PWR_GOOD
1 R3614
DY

DY
3
2
0R2J-2-GP

D3603
1

2
SYS_PWROK
Power Sequence
19,45,46,47 RUNPWROK
1
U3608
B
VCC
5
3D3V_S5

BAS16-6-GP 2 DY
19,27,37,47,92 PM_SLP_S3# A
83.00016.K11 Y
4 PWR_1D05V_EN 45
2nd = 83.00016.F11 3
GND
3D3V_S5
R3609
U3603 74LVC1G08GW-1-GP
D 1 2 IMVP_PWRGD_R 1 D
28,42 IMVP_PWRGD B
0R0402-PAD 5
S0_PWR_GOOD_R VCC R3613 2ND = 73.7SZ08.DAH
19,27 S0_PWR_GOOD 1 2 2
0R0402-PAD R3610 A
4 1 2 SYS_PWROK 11,19,37
Y 0R0402-PAD 73.01G08.L04
3
GND
74LVC1G08GW-1-GP

1
73.01G08.L04

1
C3612 DY
C3613
2ND = 73.7SZ08.DAH
DY

SCD01U50V2KX-1GP
2
SCD01U50V2KX-1GP

2
SSID = Reset.Suspend 5V_S0 5V_S5

Run Power 1 S
U3604
D 8
C3607 2 S D 7
S D
RUN_ENABLE
1 DY2 3
G D
6
2nd = 84.00610.C31 4 5
DCBATOUT Q3604 SCD1U25V3KX-GP
NDS0610-NL-GP AO4468-GP
84.04468.037
1 2 Z_12V
R3619 S D 2nd = 84.08882.037
10KR2J-3-GP

K
1

1
1
84.S0610.B31 R3620 R3621 D3602

G
C3606 MMPZ5239BPT-GP 3D3V_S0
330KR2J-L1-GP 3D3V_S5

10KR2J-3-GP
C C
U3607

SCD22U25V3KX-GP
2ND = 83.9R103.F3F

2
2 R3618
1 Z_12V_G3 1 S D 8

A
330KR2J-L1-GP 83.9R103.D3F 2 S D 7

1
3 S D 6
R3617 4 G D 5
100KR2J-1-GP
R3612
AO4468-GP
3D3V_AUX_S5 1 2 Z_12V_D4 84.04468.037

2
2nd = 84.08882.037
10KR2J-3-GP
Q3603 Q3605
G 4 3
19,27,37,47,92 PM_SLP_S3# 1D5V_S0 1D5V_S3
D PM_SLP_S3 5 2 U3605
PM_SLP_S3# 19,27,37,47,92
1 S D 8
S 6 1 2 S D 7
3 S D 6
4 G D 5
2N7002K-2-GP 2N7002KDW-GP
1st = 84.2N702.031 1st = 84.DM601.03F SIR460DP-T1-GE3-GP

1
2ND = 84.2N702.J31 2nd = 84.2N702.A3F 84.00460.037
C3611
SCD01U50V2KX-1GP

2
1D5V_S0
MAX Current 3000 mA
Design Current 2100 mA
Total= 11.39A
3D3V_S5

1 R3608 2 PS_S3CNTRL PS_S3CNTRL 37


B 100KR2J-1-GP B

D
Q3606
2N7002K-2-GP
1st = 84.2N702.031
2ND = 84.2N702.J31

S
19,27,37,47,92 PM_SLP_S3#

1D05V_VTT 2 R3622 1 H_THERMTRIP# 5,22

56R2J-4-GP
E

1 R3601 2 H_PWRGD_R B
5,11,22,97 H_CPUPWRGD 1KR2J-1-GP Q3601
DY
1

CHT2222APT-GP
C

C3602 1st = 84.02222.V11


SCD1U10V2KX-5GP

R3616
2

5,11,18,27,31,65,66,71,83,97 PLT_RST# 2 1
4K7R2J-2-GP
1

A R3632 A
2K2R2J-2-GP
2ND = 83.00016.F11
83.00016.K11
BAS16-6-GP
2

3 <Variant Name>
PURE_HW_SHUTDOWN# 27,28,86

41 3V_5V_EN 1
D3601
Wistron Corporation
200KR2J-L1-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1

2 1 S5_ENABLE 27,97 Taipei Hsien 221, Taiwan, R.O.C.


R3602

2KR2F-3-GP R3603
DY Title

Power Plane Enable


2

Size Document Number Rev

www.vinafix.vn
A2
LA470 -1
Date: Thursday, December 16, 2010 Sheet 36 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com Close to DIMM


S3 Power Reduction Circuit SM_DRAMPWROK

1D5V_S0
0D75V_S0
Close to CPU
2

1
D S3 Power Reduction Circuit Processor VREF_DQ Implementation D
R3707 R3703 R3704
0R2J-2-GP 22R2J-2-GP 220R2J-L2-GP
1 DY 2
DY

2
Q3708
DY

D
S +V_SM_VREF_CNT 9

D
R3708 Q3702

2
M_VREF_DQ_DIMM0 1 2 +V_SM_VREF D Q3701 2N7002K-2-GP
R3705 2N7002K-2-GP
0R0402-PAD 84.2N702.J31
G 100KR2J-1-GP 1st = 84.2N702.031
2ND = 84.2N702.031
2ND = 84.2N702.J31

1
2N7002K-2-GP

S
G

S
1st = 84.2N702.031
2ND = 84.2N702.J31
PS_S3CNTRL
36 PS_S3CNTRL
PM_SLP_S3# 19,27,36,47,92

SB_0816

C C

5 S3 Power Reduction X01 20091111


Q3704

36 PS_S3CNTRL G

0D75V_EN
Close to CPU
D
5V_S5
1.05VTT_PW RGD 45,48
S3 Power Reduction Circuit SM_DRAMPWROK
S
3D3V_S0 1D5V_S3
1

2N7002K-2-GP

2
DY R3714
1

1
100KR2J-1-GP 1st = 84.2N702.031 R3710
R3712 0R2J-2-GP R3706
2ND = 84.2N702.J31 10KR2J-3-GP 1KR2J-1-GP
Q3705 DY
2

1D5V_S0

1
1.5V_RUN_CPU_EN# G
2

2
2ND = 84.03904.P11 R3709
84.03904.L06 D 0D75V_EN_L 2 R3711 1 0D75V_EN 46
DY1 2
0R2J-2-GP
3

R3715 0R0402-PAD
2
DY 11.5V_RUN_CPU_EN 1DY PMBS3904-1-GP
S
S3 Power Reduction Circuit
4K7R2J-2-GP Q3706 1 2 Q3703 SM_DRAMRST#
19,27,36,47,92 PM_SLP_S3#
1

C3704 R3716 5 SM_DRAMRST# S


2

SCD1U10V2KX-5GP 2N7002K-2-GP 0R2J-2-GP


1
C3705 R3718
DY 84.2N702.J31 SCD1U10V2KX-5GP SM_DRAMRST#_D 1
DY DY D 2 DDR3_DRAMRST# 14,15
2

2ND = 84.2N702.031 1KR2J-1-GP


2

1
G
B DY C3702 B
2N7002K-2-GP SC100P50V2JN-3GP

2
Close to CPU 1st = 84.2N702.031
2ND = 84.2N702.J31
S3 Power Reduction Circuit SM_DRAMPWROK DRAMRST_CNTRL_PCH 20
3D3V_S5

3D3V_S5 1D5V_S0
1

C3703
R3713 2 1DRAMRST_CNTRL_PCH
1

200R2F-L-GP
R3702 SCD047U16V2KX-1-GP
U3701 200R2F-L-GP
2

5,19 PM_DRAM_PW RGD 1 IN B VCC 5


2

46 1.05VTT_PW RGD 1 2 0D75V_EN_1 2


R3701 IN A
1
SCD1U10V2KX-5GP

C3701 3 4 VDDPW RGOOD_R 1 R3719 2 VDDPW RGOOD 5


SB_0816 0R0402-PAD GND OUT Y
74VHC1G09DFT2G-GP 130R2F-1-GP
2

OD AND gate required


2

R3721
DY 39R2J-L-GP R3720
DY 0R2J-2-GP
DY
2

SB_0817
A DY <Variant Name>
D

Q3709 For U3701 not OD AND gate


2N7002K-2-GP
84.2N702.J31
R3719 to 64.91005.6DL Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2ND = 84.2N702.031 R3720 to 64.75005.6DL Taipei Hsien 221, Taiwan, R.O.C.
R3702 to DY
Title
G

ADAPTER
Size Document Number Rev

www.vinafix.vn
PS_S3CNTRL A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 37 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

Adaptor in to generate DCBATOUT AD+


1 AFTE14P-GP TP3802
DCIN1 1 AFTE14P-GP TP3803 AD_JK
NP1 PU3801
1 1 S D 8
2 S D 7

K
2 3 S D 6

1
3 PD3801 AD+_2 4 G D 5

1
C 4 PC3801 C
5 PR3803 SCD1U50V3ZY-1-GP P6SBMJ24APT-GP P1403EV8-GP

2
NP2 200KR2F-L-GP 83.P6SBM.AAG 84.P1403.B37

A
2ND = 83.P6SMB.CAG PR3801 PC3802

1
ACES-CON5-14-GP 200KR2F-L-GP SC1U50V5ZY-1-GP
2

20.F1701.005
AD_DETECT 27 PQ3802

2
R2
E
1 AD_OFF#_JK B
2

TP3801 AFTE14P-GP R1
C
1

PR3804

1
PC3803 34K8R2F-1-GP PDTA124EU-1-GP
PQ3801 PR3802
2

C 100KR2J-1-GP
84.00124.K1K
1
SCD1U50V3ZY-1-GP

B R1
27 AD_OFF
E 2ND = 84.00024.01K

2
R2

PDTC124EU-1-GP

84.00124.H1K
2ND = 84.00124.X1K

B B

A JV10-CS A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DCIN_JACK
Size Document Number Rev
LA470
5 4
www.vinafix.vn 3 2
Date: Thursday, December 16, 2010 Sheet
1
38 of 97
-1
5 4 3 2 1

www.rosefix.com
D D

BATTERY CONNECTOR
BT+

1
PC3901 PC3902
SCD1U50V3KX-GP SC2200P50V2KX-2GP
PR3901

2
40 BATT_SENSE 1 2
C 0R0402-PAD C
BAT1
8
1

PRN3901 BT+ 2
1 8
2 7 BATA_SCL_1 3
27,40 BAT_SCL
3 6 BATA_SDA_1 4
27,40 BAT_SDA
27 BAT_IN# 4 5 BAT_IN#_1 5
6
SRN33J-7-GP PL3901 PL3902 PL3903 PC3904 PC3903 7
9

1
MLVS0402M04-GP

MLVS0402M04-GP

MLVS0402M04-GP
1

SC10P50V2JN-4GP
ALP-CON7-22-GP
PC3905 DY DY DY 20.81332.007
K

SC10P50V2JN-4GP
SC470P50V2KX-3GP
83.5R603.D3F

2
PD3901
2ND = 83.5R603.K3F MMPZ5232BPT-GP-U

2
3rd = 83.5R603.Q3F
A

B B

SB_0818
BAT_IN#

BAT_SDA

BAT_SCL
AFTP3901 1 BAT_IN#_1
AFTP3902 1 BATA_SDA_1
AFTP3903 1 BATA_SCL_1
AFTP3904 1 BT+
AFTP3905 1
AFTP3906 1

D3902 D3903 D3901


3

1 2 1 2 1 2

BAV99-8-GP BAV99-8-GP BAV99-8-GP


DY DY DY
3D3V_AUX_KBC

A JV10-CS A

DY ??? Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BATT_CONN
Size Document Number Rev
LA470
5 4
www.vinafix.vn 3 2
Date: Thursday, December 16, 2010 Sheet
1
39 of 97
-1
5 4 3 2 1

AD+

8
7
PU4001
D
D
D
www.rosefix.com
S
S
S
1
2
NEAR
AD+ total power

65w

90w
R1

187k

121k
R2

49.9k

49.9k
AD+ total power

80w
R1

137k
R2

49.9k

DCBATOUT
BT+

6 3

1
5 D G 4 PR4004
PR4002 PU4002
P1403EV8-GP 100KR2J-1-GP AD+_TO_SYS 1 2 1 S D 8
S D
D 84.P1403.B37 D01R3721F-GP-U AD+
2
S D
7 D
3 6

2
4 G D 5
AD+_G_2

K
STOP_CHG# P1403EV8-GP

1
84.P1403.B37 PD4002
20100518 WAYNE connects to KBC
2

PR4003 AD+ SMF18A-GP


PR4001 49K9R2F-L-GP 83.SMF18.AAH
10KR2F-2-GP

A
1
PG4001 PG4002 3D3V_AUX_S5

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
AD+_G_1 PD4001 PR4005
1

2
1SS400GPT-GP BQ24745_VREF 470KR2J-2-GP
83.00400.C1F PR4009
2nd = 83.1S400.B2F 10KR2F-2-GP

2
K

1
R1 PC4018
PR4007 2 1

1
121KR2F-L-GP
1

AD+ BOM Ctrl SCD1U50V3KX-GP STOP_CHG#


27 STOP_CHG#

1
DC_IN_D PQ4001

2
2N7002KDW -GP PC4001 20100707 CHG_AGND

SC1U25V5KX-1GP
CHG_ICREF

2
1st = 84.DM601.03F R2 PC4002 PC4004 DCBATOUT
6

2nd = 84.2N702.A3F 1 2 2 1BQ24745_CSSP 2 1 1 2

1
PR4008 79.10712.L02
PR4006 SCD1U50V3KX-GP PC4003
316KR3F-2-GP 49K9R2F-L-GP DY SCD1U50V3KX-GP SCD1U50V3KX-GP
CHG_AGND

1
BQ24745_ACOK PU4003 CHG_AGND PC4025 PC4006
2

1
SE100U25VM-L1-GP
DY PC4023 PC4005 SCD1U25V2ZY-1GP

ICREF

5
6
7
8
C BQ24745_DCIN 22 28 PU4004 C
DCIN CSSP

D
D
D
D
83.R0203.08F SIS412DN-T1-GE3-GP

2
SC10U25V6KX-1GP

SC10U25V6KX-1GP
BQ24745_ACIN 2 2nd = 83.1R003.I8F
ACIN BQ24745_CSSN PR4012
CSSN 27
3D3V_AUX_S5 11 26 BQ24745_ICOUT 1 2STOP_CHG# PD4003 PC4009
VDDSMB ICOUT 0R0402-PAD K A 1 2

G
S
S
S
25 BQ24745_BST CH520S-30PT-GP SC1U10V3KX-3GP

4
3
2
1
BOOT
1

PR4011 21 BQ24745_VDDP
PR4010 AC_IN BQ24745_ACOK 13 VDDP
1 2 ACOK
1

49K9R2F-L-GP PC4007
1

SCD01U50V2KX-1GP PC4008 24 24745_HIGH_G BT+


GAP-CLOSE-PW R-3-GP UGATE
SC1U10V3KX-3GP 10 PL4001 PR4017
2

27,39 BAT_SCL SCL


1 2
2

23 BQ24745_LX1 PC4017 1 2BT+_R 1 2


PHASE SCD1U50V3KX-GP IND-5D6UH-39-GP
9 68.5R610.10P D01R3721F-GP-U SC_1021
27,39 BAT_SDA SDA 24745_LOW _G
LGATE 20

5
6
7
8
CHG_AGND

D
D
D
D
PG4003 PG4004 PC4022

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
14 19 PC4020 PC4021
CHG_AGND NC#14 PGND
18

2
CSOP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
2

2
G
S
S
S
PR4013 CHG_AGND 17 PC4016 PU4005
BQ24745_IINP CSON SIS412DN-T1-GE3-GP
1 2 8 2 1

4
3
2
1
27 AD_IA 0R0402-PAD SC150P50V2JN-3GP VICM
PC4010 PR4014
1 2 BQ24745_FBO_RC 1 2BQ24745_FBO 74.24745.073 SCD1U50V3KX-GP
B PR4015 4K7R2J-2-GP B

1 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 EAI 16
NC#16
1

BQ24745_EAO 4 EAO
PC4011 PC4012 PR4016 BQ24745_VREF 3
SC220P50V2KX-3GP SC2200P50V2KX-2GP 7K5R2F-1-GP BQ24745_CHG_ON 7 VREF
20100518 WAYNE
2

CE
2 1BQ24745_EAO_RC2 1 12 GND 15 BATT_SENSE
GND

VFB BATT_SENSE 39
1

PC4014 MAX8731A_CSIP
SC1U10V3KX-3GP
1 2 BQ24745RHDR-GP MAX8731A_CSIN
2

29

PC4013

1
SC56P50V2JN-2GP PC4015
2 SCD1U25V2ZY-1GP

PR4018
1 2
CHG_AGND 0R0402-PAD

CHG_AGND
CHG_AGND
BQ24745_VREF
PRN4001 SB_0812
1 8 AC_IN PQ4002
CHG_ON# AC_IN 27
2 7
3 6 S
3D3V_AUX_S5 4 5 BQ24745_CHG_ON
BQ24745_CHG_ON D
A JV10-CS A
SRN100KJ-5-GP DY G CHG_ON#
CHG_ON# 27
1

C4001
SC_1019 SCD1U10V2KX-4GP 2N7002K-2-GP
1st = 84.2N702.031
AC_IN to KBC Wistron Corporation
2

2ND = 84.2N702.J31 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
Charger_BQ24745
Size Document Number Rev
LA470
5 4
www.vinafix.vn 3 2
Date: Thursday, December 16, 2010 Sheet
1
40 of 97
-1
5 4 3 2 1

SSID = PWR.Plane.Regulator_5v3p3v
www.rosefix.com
D
DCBATOUT PWR_5V_DCBATOUT D

3D3V_S5 3D3V_PWR DCBATOUT PWR_3D3V_DCBATOUT PG4104


PG4106 PWR_5V_ENTRIP1 SB_0901 PWR_3D3V_ENTRIP2 SB_0901 1 2
2 1 PG4101

1
1 2 GAP-CLOSE-PWR

1
GAP-CLOSE-PWR PC4105 DY PR4104 PR4103 PG4105
PG4107 GAP-CLOSE-PWR SC18P50V2JN-1-GP 97K6R2F-GP PC4106 DY 97K6R2F-GP 1 2

2
2 1 PG4102 SC18P50V2JN-1-GP

2
1 2 GAP-CLOSE-PWR

2
GAP-CLOSE-PWR PG4122
PG4108 GAP-CLOSE-PWR 1 2
2 1 PG4103
1 2 GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4109 GAP-CLOSE-PWR
2 1

GAP-CLOSE-PWR
PG4110
2 1

GAP-CLOSE-PWR
PG4111
2 1 DCBATOUT
PWR_3D3V_DCBATOUT PWR_5V_DCBATOUT
GAP-CLOSE-PWR PC4101 PC4113

SC4D7U25V5KX-GP

SCD01U50V2KX-1GP
1

1
SB_0901
RC4103

2
1

EC4101 PC4112 PC4110 SB_0901 PC4114 PC4111 EC4102 RC4101


D
D 8
D 7
D 6
D 5

5
6
7
8

1
DY 5V_PWR 5V_S5

D
D
D
D
SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
SB_0831 PU4101 PU4104 D DY PG4112
SCD1U25V2KX-GP
2

16
1 2

SCD1U25V2KX-GP
AON7410-GP AON7410-GP
SC33P50V2JN-3GP

2
PU4103

SC33P50V2JN-3GP
GAP-CLOSE-PWR

VIN
SB_0831 PG4113

G
S
S
S
SCD1U25V3KX-GP
S
S
S
G

1 2
PC4115 PC4118 G S
1
2
3
4

4
3
2
1
C
S G 2 1PWR_3D3V_BOOT1
1 2 PWR_3D3V_BOOT29 22 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2 GAP-CLOSE-PWR C
PR4105 2D2R3J-2-GP VBST2 VBST1 0R3J-0-U-GP PR4106 PG4114
3D3V_PWR SCD1U25V3KX-GP PWR_3D3V_UGATE2 10 21 PWR_5V_UGATE1 5V_PWR 1 2
PL4101 DRVH2 DRVH1 PL4102
1 2 PWR_3D3V_PHASE2 11 20 PWR_5V_PHASE1 1 2 GAP-CLOSE-PWR
IND-3D3UH-116-GP LL2 LL1 IND-3D3UH-116-GP PG4115
SB_0831 RC4104 PWR_3D3V_LGATE2 12 PWR_5V_LGATE1 SB_0831
68.3R31A.10V D 19 68.3R31A.10V 1 2
1

DRVL2 DRVL1
D
D 8
D 7
D 6
D 5

5
6
7
8
DY PTC4101 RC4102 GAP-CLOSE-PWR

1
D
D
D
D
SE220U6D3VM-21-GP
SCD1U10V2KX-4GP

PG4121 PU4102 PWR_3D3V_VOUT2 7 24 PWR_5V_VOUT1 PU4105 PG4117 PC4120 PG4116


2

1
VO2 VO1
PC4119

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
AON7702-GP AON7702-GP DY 1 2
SC33P50V2JN-3GP

SCD1U10V2KX-4GP
PWR_3D3V_FB2 5 2 PWR_5V_FB1 PTC4102

2
VFB2 VFB1

SE220U6D3VM-21-GP
GAP-CLOSE-PWR

SC33P50V2JN-3GP

2
PG4118
2

2
G
S
S
S
1 2 PWR_5V3D3V__EN0 13 23 1 2
1 S
2 S
3 S
4 G

PR4109 DY820KR2F-GP EN0 PGOOD


G S

4
3
2
1
PWR_3D3V_ENTRIP26 PWR_5V_ENTRIP1 GAP-CLOSE-PWR
S G PWR_5V3D3V_VREF TRIP2 TRIP1
1

3 15
VREF GND
Matsuki cap 220uF
1
SCD22U10V2KX-1GP

PC4122

PWR_5V3D3V_TONSEL
4 25
6.3V, ESR=17mohm TONSEL GND
Matsuki cap 220uF
2

14 18 PWR_5V3D3V_ENC 6.3V, ESR=17mohm


SKIPSEL ENC
PWR_5V3D3V_SKIPSEL

2
VREG3

VREG5 PR4113
0R0402-PAD
1

1
TPS51123RGER-GP
8

17

1
PR4112 5V_PWR_2 PR4114

1
PR4111 DY 0R2J-2-GP 3D3V_PWR_2 0R2J-2-GP DY
PG4119
PWR_5V3D3V_VREG3

6K65R2F-GP PR4115
1 2 33KR2F-GP
2

1 2

1 2
PWR_3D3V_FB2_R 3V_5V_EN 36 PWR_5V_FB1_R
PC4124 GAP-CLOSE-PWR-3-GP

2
DYSC18P50V2JN-1-GP PC4128 DY
SC18P50V2JN-1-GP
2

2
1

1
3D3V_S5
B PR4116 PC4125 PR4119 B
1

10KR2F-2-GP PC4126 21K5R2F-GP

1
SC4D7U6D3V5KX-3GP

PC4129 3D3V_PWR_2 3D3V_AUX_S5


SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP

3D3V_PWR_2 2 PR4117 1 PR4110 Close to VFB Pin (pin2)


2

2
100KR2J-1-GP
PR4118 0R2J-2-GP 2 PR4122 1
2
5V_PWR_2 DY 1

2
0R2J-2-GP 0R2J-2-GP
DCBATOUT 3V_5V_POK 19
Close to VFB Pin (pin5)
2 PR4120 DY
PWR_5V3D3V_VREF DY 1
0R2J-2-GP
K

PD4105 3D3V_PWR_2 2 PR4121 1


MMPZ5228BPT-GP
DY 0R2J-2-GP SKIPSEL VREG3 or VREG5 VREF(2V) GND
2 PR4123
1
DY
1 A

0R2J-2-GP Operating OOA Auto Skip Auto Skip


Mode PWM only
DCBATOUT PR4147
3KR2F-GP
PU4106 Vz=5.1V DY
1

PR4125 4 3 3V_5V_EN TONSEL CH1 CH2


20KR2F-L-GP Vz=3.9V
DY 5 2 DCBATOUT_UVP_2 UVP Function GND 200kHz 265kHz
DCBATOUT<7.5V 3/5V disable
2

DCBATOUT_UVP_1 6 1 VREF 245kHz 305kHz


PR4126
1

6K98R2-GP VREG3 300kHz 375kHz


PR4129 2N7002KDW-GP
DY
200KR2F-L-2-GP 84.2N702.A3F VREG5 365kHz 460kHz
2

DY 2nd = 84.DM601.03F
DY SB_0819
2

A A

JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DC/DC 3D3V5V
Size Document Number Rev

www.vinafix.vn
LA470 -1
Date: Thursday, December 16, 2010 Sheet 41 of 97
5 4 3 2 1
5 4 3 2 1

Place close to
1 2 1 VCC_CORE Inductor

www.rosefix.com
2

PR4242 PC4218 1 2
10R2J-2-GP SC3300P50V2KX-1GP PWR_CPUCORE_DOUT 1 2 1 2 PC4222 1 2 PC4223 PR4258 SB_0826
PWR_CPUCORE_TRBST 1 2 1 2 SC100P50V2JN-3GP SC22P50V2JN-4GP NTC-220K-5-GP PR4257
PR4249 165KR2F-L-GP

1
PR4243 PR4244 24D9R2F-L-GP PC4224 PR4256 1 2 1 2
24K9R2F-L-GP PC4219 1K21R2F-2-GP 1 2 1 2 1 2 75KR2J-GP FOR 3PHASE
SC2200P50V2KX-2GP UMA

2
SC3300P50V2KX-1GP PR4250 PR4251 1 2 PC4226 1 2 PR4255 CSP2 43
1KR2F-3-GP 3K01R2F-3-GP PWR_CPUCORE_COMP SC330P50V2KX-3GP 140KR3F-GP

PR4231 PWR_CPUCORE_CSCOMP 1 2 PC4225 1 2 PR4253 CSP3 43


8 VSSSENSE 2 1 SC1200P50V2KX-1GP 147KR3F-1-GP

BOM Ctrl
0R0402-PAD BOM Ctrl
PR4230 PWR_CPUCORE_CSSUM 1 2 PR4252 CSP1 43
2 1 1 2 SB_0826 147KR3F-1-GP

PWR_CPUCORE_FB
8 VCCSENSE
0R0402-PAD PR4212 BOM Ctrl

2
D 2 1 D
PC4216 PR4254 10R2J-2-GP CSN1 43

24K9R2F-L-GP

SCD1U25V2KX-GP
SC1KP50V2KX-1GP 12K4R2F-GP

PWR_CPUCORE_TRBST
PWR_CPUCORE_DOUT
PR4213

PWR_CPUCORE_IOUT
BOM Ctrl

2
PWR_CPUCORE_VSN
PWR_CPUCORE_CSREF 2 1

PWR_CPUCORE_ILIM1
1

1
10R2J-2-GP CSN3 43
Place close to

2
PC4205
PR4245 PR4264

1
VCC_CORE hot spot 8K25R2F-1-GP NTC-100K-11-GP 1 2 SB_0826 PC4203 PR4214
SC1KP50V2KX-1GP 2 1

1
CSN2 43

PR4216
10R2J-2-GP
2

UMA
PG4201
FOR 3PHASE
2

PWR_CPUCORE_VSP
GAP-CLOSE-PWR-3-GP
PR4203
75R2F-2-GP

53

52

51

50

49

48

47

46

45

44

43

42

41

40
1 2 PU4201
1D05V_VTT
FOR 3PHASE

FB

COMP

DROOP

CSCOMP

NC#41

NC#40
GND

DIFFOUT

VSN

TRBST

ILIM

CSSUM

IOUT

CSREF
1 2 H_PROCHOT_R# PR4248
5,27 H_PROCHOT# PR4266 0R2J-2-GP
1D05V_VTT 1 39 PWR_CPUCORE_CSN2
2 1
0R0402-PAD VSP CSN2 CSN2 43
PC4214 UMA
2 1 PWR_CPUCORE_TSN 2 38 PWR_CPUCORE_CSP2
1 2
TSENSE CSP2
1

PC4220 SCD047U25V2KX-GP
75R2J-1-GP

56R2F-1-GP
130R2F-1-GP

PR4234

PR4235

SCD1U25V2KX-GP UMA
PR4233

3 37 CSN3 43 1 2 PR4227
VRHOT# CSN3
PC4215 OPS 0R2J-2-GP
1 2 PR4228
2

H_CPU_SVIDDAT 4 36 PWR_CPUCORE_CSP3 1 2 1 2 PR4225


SDIO CSP3 CSP3 43 CSP2 43
8 H_CPU_SVIDDAT
3D3V_S0 SCD047U25V2KX-GP
6K98R2-GP UMA 6K98R2-GP
8 VR_SVID_ALERT# H_CPU_SVIDCLK 5
SCLK CSN1
35 CSN1 43 2 1 PR4224 5V_PWR
1

8 H_CPU_SVIDCLK 0R2J-2-GP
PC4213 OPS
1 2
PR4236 VR_SVID_ALERT# 6 34 PWR_CPUCORE_CSP1 1 2
ALERT# CSP1 CSP1 43
10KR2F-2-GP
SCD047U25V2KX-GP PR4226
2

1 2 PWR_CPUCORE_RDY 7 33 6K98R2-GP
28,36 IMVP_PWRGD VR_RDY DRON PWR_CPUCORE_DRON 43,44
PR4268
C C
0R0402-PAD PWR_CPUCORE_RDYA
PR4237 8 32
3D3V_S0 1 2 VR_RDYA PWM1/ADDR PWR_CPUCORE_PWM1 43
10KR2F-2-GP

1PR4206 2 PWR_CPUCORE_EN 9 31
48 D85V_PWRGD ENABLE PWM3/VBOOT PWR_CPUCORE_PWM3 43
PC4201 0R0402-PAD

1 2 PWR_CPUCORE_VCC 10 30 PWR_CPUCORE_PWM2 43
VCC PWM2/ISHED

1
10KR2F-2-GP
PR4210

PR4204
SC1U16V3KX-2GP PR4207 BOM Ctrl
5V_PWR 1 2 1 2 PWR_CPUCORE_ROSC
11
ROSC IMAX
29 PWR_CPUCORE_IMAX
2 1 PR4205
2R3J-GP 10KR2F-2-GP SB_0826 10KR2F-2-GP
PR4201 41K2R2F-GP

2
1 2 PWR_CPUCORE_VRMP 12 28
VRMP PWMA/IMAXA

2
PC4202 PWR_CPUCORE_PWMA 44

2
SCD01U50V2KX-1GP
DCBATOUT 1 2 13 27 2 1 PR4211
DIFFOUTA

CSCOMPA
TSENSEA VBOOTA

DROOPA

CSSUMA
25K5R2F-GP
TRBSTA

COMPA

PWR_CPUCORE_VBTA
PR4209 PR4208

IOUTA

CSNA
VSNA

CSPA
VSPA

20 ILIMA
1KR2F-3-GP 10KR2F-2-GP SB_0826
FBA

1
1
SCD1U25V2KX-GP

1PWR_CPUCORE_ILIMA

1 2 5V_PWR For Discrete only,


1PWR_CPUCORE_VSNA 14

1PWR_CPUCORE_VSPA 15

16

17

1PWR_CPUCORE_TRBSTA18

19

21

22

23

24

25

26
2

DY
PC4221

NCP6131S52MNR2G-GP-U PR4246 UMA need to DY

PWR_CPUCORE_IOUTA
PC4211 0R2J-2-GP

PWR_CPUCORE_CSPA
PWR_CPUCORE_COMPA

PWR_CPUCORE_TSNA
PWR_CPUCORE_DOUTA

SC10P50V2JN-4GP
PWR_CPUCORE_FBA

PR4229
1 2 0R2J-2-GP
1

PC4217 1 2
1

PR4247 PR4265 SC1KP50V2KX-1GP PWR_CPUCORE_CSNA 1 2


24K9R2F-L-GP

CSNA 44
1
PR4215

8K25R2F-1-GP NTC-100K-11-GP PC4212


1 2
2

SCD047U25V2KX-GP
1 2
2

PR4238 PR4239 CSPA 44


2

0R0402-PAD 0R0402-PAD PR4260 PC4204 PR4223


TP4202 SCD1U25V2KX-GP 6K98R2-GP
TPAD14-GP 15K8R2F-GP PWR_CPUCORE_CSSUMA 1 2
2

CSPA 44
Place close to SB_0826 PWR_CPUCORE_CSCOMPA 1 2 PC4227 PR4259
B SC1200P50V2KX-1GP B
VCC_GFXCORE hot spot 75KR3F-GP

1 2 PC4228 SB_0826
SC330P50V2KX-3GP
PC4206 PR4217
SC39P50V2JN-1GP 10R2J-2-GP 1 2 1 2
PR4262_R

9 VSS_AXG_SENSE
PR4261
9 VCC_AXG_SENSE 1 2PR4217_R
1 2 75KR2J-GP PR4262
165KR2F-L-GP
1 2
1 2
PR4263
PR4218 NTC-220K-5-GP
1KR2F-3-GP 1 2 PC4207
SC39P50V2JN-1GP Place close to
1 2PR4219_R
1 2 VCC_GFXCORE Inductor
PR4219 PC4208
3K01R2F-3-GP SC2200P50V2KX-2GP

5V_S5
SC_1026

PC4230 1 2 SCD1U10V2KX-5GP

DY
PU4202

PWR_CPUCORE_IOUT 1 5
IN+ VDD
2
VSS
3 4 1 2
IN- OUT CPU_CURRENT 44
DY
SCD1U10V2KX-5GP
1

PR4270
DY
1

PR4269 BU7241G-GP 2KR2F-3-GP


2

A PR4271 A
0R2J-2-GP DY DY
PC4229 47KR2F-GP
2

JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DC/DC CPU CORE1 _NCP6131
Size Document Number Rev
LA470

www.vinafix.vn
-1
Date: Thursday, December 16, 2010 Sheet 42 of 97
5 4 3 2 1
5 4 3 2 1

DCBATOUT
DCBATOUT

www.rosefix.com
DCBATOUT
SB_0903

1
6
5
2
1
PC4303 PC4304 PC4305

D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PU4313

2
IRF6721SPBF-GP-U
84.06721.030

S
D TP4307 D

3
TPAD14-GP 1
VCC_CORE
PW R_VCORE1_HG 1 PR4312 2 VCORE1_HG
PL4301
PC4301 0R0402-PAD
1 2PW R_VCORE1_BT1_R PW R_VCORE1_PH 1 2

2
PR4302 SCD22U25V3KX-GP PW R_VCORE1_LG 1 PR4313 2 VCORE1_LG
2D2R3-1-U-GP 0R0402-PAD L-D36UH-1-GP

7
6
2
1

1
D
D
D
D
PU4312 PTC4303 PTC4304

2
PU4301 IRF6725MTRPBF-GP-U
1

84.06725.030 PG4311 PG4312

2
SE330U2VDM-L-GP

SE330U2VDM-L-GP
PTC4301 PTC4308 PW R_VCORE1_BT1 1 8 PW R_VCORE1_HG

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
SE100U25VM-17-GP SE100U25VM-17-GP BST DRVH PW R_VCORE1_PH
42 PWR_CPUCORE_PWM1 2 7
2

PWM SW

1
G
S
S
42,44 PWR_CPUCORE_DRON 1 2PW R_VCORE1_EN 3 EN GND 6

FLAG
PR4301 49D9R2F-GP 4 5 PW R_VCORE1_LG
5V_PWR

5
4
3
VCC DRVL

9
PC4302 NCP5911MNTBG-GP
SC1U10V2KX-1GP TP4304

2
TPAD14-GP 1 1 TP4303
42
TPAD14-GP CSP142 CSN1

PC4311
C FOR 3PHASE 1 2PW R_VCORE2_BT2_R C

2
OPS
PC4306 1 2 PR4305 SCD22U25V3KX-GP
PW R_VCORE3_BT3_R
5V_PWR PR4306 0R2J-2-GP 2D2R3-1-U-GP
1 2 UMA
1

2
UMA
PR4303 SCD22U25V3KX-GP PU4311
2D2R3-1-U-GP
PU4306 PW R_VCORE2_BT2 1 8 PW R_VCORE2_HG
BST DRVH PW R_VCORE2_PH
42 PWR_CPUCORE_PWM2 2 PWM SW 7
PW R_VCORE3_BT3 1 8 PW R_VCORE3_HG 1 2PW R_VCORE2_EN 3 6
BST DRVH 42,44 PWR_CPUCORE_DRON EN GND

FLAG
2 7 PW R_VCORE3_PH PR4307 49D9R2F-GP 4 5 PW R_VCORE2_LG
42 PWR_CPUCORE_PWM3 PWM SW 5V_PWR VCC DRVL
42,44 PWR_CPUCORE_DRON 1 2PW R_VCORE3_EN 3 EN GND 6 UMA
FLAG

PR4304 49D9R2F-GP 4 5 PW R_VCORE3_LG


5V_PWR VCC DRVL

1
UMA

9
PC4312 NCP5911MNTBG-GP
1

NCP5911MNTBG-GP SC1U10V2KX-1GP
9

2
PC4307 UMA
SC1U10V2KX-1GP
2

DCBATOUT

1
6
5
2
1
PC4313 PC4314 PC4315

D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PU4310

2
IRF6721SPBF-GP-U
B DCBATOUT 84.06721.030 B
UMA

S
4

3
SB_0903
TP4308 VCC_CORE
1

TPAD14-GP 1
6
5
2
1

PC4308 PC4309 PC4310 PW R_VCORE2_HG 1 PR4310 2 VCORE2_HG


D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

PU4307 0R0402-PAD PL4303


2

IRF6721SPBF-GP-U PW R_VCORE2_PH 1 2
84.06721.030 L-D36UH-1-GP
PW R_VCORE2_LG 1 PR4311
2 VCORE2_LG UMA

7
6
2
1
0R0402-PAD

D
D
D
D
PU4309 PG4316
G

1
IRF6725MTRPBF-GP-U PTC4306
4

2
TP4309 VCC_CORE 84.06725.030 UMA

GAP-CLOSE-PWR-3-GP
TPAD14-GP 1

2
SE330U2VDM-L-GP
PW R_VCORE3_HG
1 PR4309 2 VCORE3_HG PL4302 UMA

G
S
S
0R0402-PAD PG4315

1
PW R_VCORE3_PH 1 2

5
4
3

GAP-CLOSE-PWR-3-GP
L-D36UH-1-GP
7
6
2
1

1
D
D
D
D

PU4308 PG4313 PG4314 PTC4305 PTC4310 PTC4307 TP4306


2

IRF6725MTRPBF-GP-U TPAD14-GP 1 1 TP4302


GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

84.06725.030 TPAD14-GP
2

2
SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

CSN2 42
42 CSP2 bom LA47
A A
1

1
G
S
S
5
4
3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PW R_VCORE3_LG1 PR4308 2 VCORE3_LG Taipei Hsien 221, Taiwan, R.O.C.
0R0402-PAD
TP4305 1 1 TP4301 Title
TPAD14-GP TPAD14-GP
DC/DC CPU CORE2 _NCP6131
42 CSP3 42 CSN3 Size Document Number Rev
LA470

www.vinafix.vn
-1
Date: Thursday, December 16, 2010 Sheet 43 of 97
5 4 3 2 1
5 4 3 2 1

DCBATOUT

1
PG4401
2
www.rosefix.com
DCBATOUT_VCC_GFXCORE

GAP-CLOSE-PW R-3-GP
PG4402
1 2

D GAP-CLOSE-PW R-3-GP D
PG4403
1 2

GAP-CLOSE-PW R-3-GP
PG4404
1 2

GAP-CLOSE-PW R-3-GP
PG4405
1 2 DCBATOUT_VCC_GFXCORE

SB_0902
GAP-CLOSE-PW R-3-GP
PG4406
1 2
SB_0903
GAP-CLOSE-PW R-3-GP

1
RC4402

6
5
2
1
PC4401 PC4402 PC4403 DY

D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PU4401

2
SC33P50V2JN-3GP
IRF6721SPBF-GP-U
84.06721.030

S
4

3
TP4403 1 VCC_GFXCORE
TPAD14-GP
VREG_SW A_HG 1 PR4403 2 SW A_HG
PL4401
C 0R0402-PAD C
VREG_SW A 1 2 SB_0902

VREG_SW A_LG 1 PR4404 2 SW A_LG


0R0402-PAD L-D36UH-1-GP

7
6
2
1

1
PTC4402 PTC4403 RC4401

D
D
D
D
PU4403 DY
IRF6725MTRPBF-GP-U

2
2

ST330U2VDM-4-GP

SC33P50V2JN-3GP
GAP-CLOSE-PWR-3-GP
84.06725.030

GAP-CLOSE-PWR-3-GP

ST330U2VDM-4-GP
PG4407

PG4408
G
S
S

1
5
4
3
TP4402 1 1 TP4401
TPAD14-GP TPAD14-GP

PC4404
1 2 VREG_GFX_BOOT_1
1

42 CSPA 42 CSNA
PR4401 SCD22U25V3KX-GP
2D2R3-1-U-GP

PU4405
B B
VREG_GFX_BOOT 1 8 VREG_SW A_HG
BST DRVH VREG_SW A
42 PWR_CPUCORE_PWMA 2 PWM SW 7
42,43 PWR_CPUCORE_DRON 1 2VREG_GFX_EN 3 EN GND 6
FLAG

PR4402 0R0402-PAD 4 5 VREG_SW A_LG


5V_PWR VCC DRVL
1

PC4405 NCP5911MNTBG-GP
SC1U10V2KX-1GP
2

JV10-CS
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DC/DC CPU CORE3 _NCP6131
Size Document Number Rev
LA470

www.vinafix.vn
-1
Date: Thursday, December 16, 2010 Sheet 44 of 97
5 4 3 2 1
5 4 3 2 1

DCBATOUT

1
PG4501
2
www.rosefix.com
PW R_1D05V_DCBATOUT

GAP-CLOSE-PW R-3-GP
PG4502
1 2

GAP-CLOSE-PW R-3-GP
D PG4503 D
1 2

GAP-CLOSE-PW R-3-GP
PG4504
1 2

GAP-CLOSE-PW R-3-GP PW R_1D05V_DCBATOUT


1

PTC4501
SE100U25VM-17-GP
2

1
PC4504 EC4501

SC4D7U25V5KX-GP

SCD1U25V2KX-GP
PU4502

TPS51218 for 1D05V

2
5
6
7
8
SIR172DP-T1-GE3-GP

D
D
D
D
3D3V_S0

G
S
S
S
PR4512 Id=14.3A
1 2
Qg=9.2~14nC

4
3
2
1
10KR2J-3-GP Rdson=11~14mohm Mag. 0.56uH 10*10*4
Iomax=16A
37,48 1.05VTT_PW RGD PU4501 DCR=1.6~1.8mohm OCP>24A
PR4501 PR4505 PC4503 Idc=25A, Isat=40A
105KR2F-1-GP 1 11 2D2R3J-2-GP SCD1U25V3KX-GP 1D05V_VTT
C PGOOD GND C
1 2 PW R_1D05V_TRIP 2 10 PW R_1D05V_BOOT 1 2PW R_1D05V_BOOT_R
2 1
PW R_1D05V_EN TRIP VBST PW R_1D05V_UGATE PL4501
19,36,46,47 RUNPW ROK 1 2 3 EN DRVH 9
PR4502 PW R_1D05V_VFB 4 8 PW R_1D05V_PHASE 1 2
PW R_1D05V_CCM VFB SW
0R0402-PAD 5 CCM V5IN 7 5V_S5

1
6 PW R_1D05V_LGATE IND-D56UH-27-GP
DRVL
1

PR4506

1
PR4504 PC4501 10R2F-L-GP PTC4502 PTC4503 PC4509

5
6
7
8
470KR2F-GP TPS51218DSCR-GP-U1
36 PW R_1D05V_EN

D
D
D
D
SC1U10V2KX-1GP

SCD1U25V3KX-GP
PU4503

2
SIR460DP-T1-GE3-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
2

2
VTT_SENSE_L
1
SC1KP50V2KX-1GP

PC4505

1
S
S
S
PR4507

G
2

10KR2F-2-GP

4
3
2
1

2
Id=26.5A
PW R_1D05V_VFB
Qg=40.6~61nC,
Rdson=2.6~3.2mohm

1
PR4508
20K5R2F-GP

2
VSS_SENSE_L

1
PR4509
B
10R2F-L-GP B

2
VTT_SENSE_L 1
PR4510 DY0R2J-2-GP
2 VCCIO_SENSE 8

1
PC4510
DY SC1000P50V3JN-GP-U

2
VSS_SENSE_L 1
PR4511 DY0R2J-2-GP
2 VSSIO_SENSE 8

Vout=0.704V*(R1+R2)/R2

A A
JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TPS51218_1D05V

www.vinafix.vn
Size Document Number Rev
-1
Date: Thursday, December 16, 2010 Sheet 45 of 97
5 4 3 2 1
5 4 3 2 1

DCBATOUT

1
PG4602
2
PW R_1D5V_DCBATOUT
PG4601
2

GAP-CLOSE-PW R-3-GP
www.rosefix.com PW R_1D5V_DCBATOUT

1
GAP-CLOSE-PW R-3-GP PC4605
PG4603
TPS51218 for 1D5V

SC4D7U25V5KX-GP
1 2 PU4602

2
5
6
7
8
SIR172DP-T1-GE3-GP

D
D
D
D
D GAP-CLOSE-PW R-3-GP 3D3V_S0
D
PG4604
PR4607
1 2
1 2
GAP-CLOSE-PW R-3-GP

G
S
S
S
10KR2J-3-GP Id=14.3A
Qg=9.2~14nC

4
3
2
1
19,36,45,47 RUNPW ROK
Rdson=11~14mohm Iomax=16A
Mag. 0.56uH 10*10*4 OCP>24A
1

TC9701 TC9702 EC4601 PR4601 PU4601


82KR2F-1-GP PR4606 PC4604 DCR=1.6~1.8mohm
Idc=25A, Isat=40A 1D5V_S3
SCD1U25V2KX-GP

2D2R3J-2-GP SCD1U25V3KX-GP
SE47U25VM-11-GP

SE47U25VM-11-GP

1 11
2

PW R_1D5V_TRIP PGOOD GND PW R_1D5V_BOOT1


1 2 2 TRIP VBST 10 2PW R_1D5V_BOOT_R 2 1
1 2 PW R_1D5V_EN 3 9 PW R_1D5V_UGATE PL4601
19,27 PM_SLP_S4# EN DRVH
PR4602 PW R_1D5V_VFB 4 8 PW R_1D5V_PHASE 1 2
PW R_1D5V_CCM VFB SW
0R0402-PAD 5 CCM V5IN 7 5V_S5
6 PW R_1D5V_LGATE IND-D56UH-27-GP
DRVL

1
SC1KP50V2KX-1GP
PC4603 PC4610 PTC4602 PTC4603

SC1U16V3KX-5GP
PR4605 PC4601

5
6
7
8
470KR2F-GP TPS51218DSCR-GP-U1 PR4608

2
D
D
D
D
SC1U10V2KX-1GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
PU4603 10KR2F-2-GP

SIR460DP-T1-GE3-GP
2

2
PW R_1D5V_VFB

S
S
S
G
4
3
2
1

1
PR4609
8K45R2F-2-GP
C C

2
Id=26.5A
Qg=40.6~61nC,
Rdson=2.6~3.2mohm

Vout=0.704V*(R1+R2)/R2

B B

RT9026 for 0D75V_S3

5V_S5 1D5V_S3
Iomax=1.2A
OCP>1.8A
1

PC4612 PC4614 PC4615


SC10U6D3V3MX-GP SCD1U10V2KX-5GP
SC1U10V2KX-1GP
2

0D75V_PW R 0D75V_S0

PG4621
PR4610 PU4604 1 2
0R2J-2-GP
10 VIN VDDQSNS 1 GAP-CLOSE-PW R-3-GP
1 2 PW R_0D75V_S5 9 2 PG4622
19,27 PM_SLP_S4# S5 VLDOIN
8 GND VTT 3 1 2
1 PR4611
2 PW R_0D75V_S3 7 4
37 0D75V_EN 0R2J-2-GP DDR_VREF_S3 S3 PGND
DDR_VREF_S3 6 VTTREF VTTSNS 5 GAP-CLOSE-PW R-3-GP
GND
1

A PC4613 PC4616 PC4617 A


CADIZ-CP
PC4611 RT9026PFP-GP SC10U6D3V3MX-GP SC10U6D3V3MX-GP
11
SC1U10V2KX-1GP

SCD1U10V2KX-5GP
2

DY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51128_1D5V & RT9026PFP-GP_0D75V


Size Document Number Rev

www.vinafix.vn
-1
Date: Thursday, December 16, 2010 Sheet 46 of 97

5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

3D3V_S5

2
PR4701
10KR2F-2-GP
DY RT8015B for 1D8V_S0

1
19,36,45,46 RUNPW ROK 1 2 PW R_1D8V_GD
PR4708
0R0402-PAD

Mag.7*7*3 Iomax=3A
3D3V_S5
PU4701 DCR=28~30mohm, Irating=6A
RT8015BGQW -GP Isat=13.5A
C 1D8V_S0 C
6 PVDD PGND 5
PL4701 PG4701
7 4 PW R_1D8V_LX 2 1 1D8V_PW R 1 2
VDD LX#4 IND-3D3UH-57GP
1

PC4701 PC4702 8 3 GAP-CLOSE-PW R-3-GP


PGOOD LX#3

1
PC4709 PC4707 PC4708
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

PW R_1D8V_FB 9 2 PR4707 PG4702


2

FB GND

SC100P50V2JN-3GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
20KR2F-L-GP 1 2

2
PW R_1D8V_COMP 10 1 PW R_1D8V_RT

GND
COMP SHDN/RT
GAP-CLOSE-PW R-3-GP

2
1
PR4703 PW R_1D8V_FB PG4703

11
1 2

820KR2F-GP
20100707_PWR 20100705_PWR

1
GAP-CLOSE-PW R-3-GP

2
PR4706
PR4702
PC4703 16KR2F-GP
1 2PW R_1D8V_COMP_R
1 2

2
SC1500P50V2KX-2GP14KR2F-GP
PC4704

1 2

SC47P50V2JN-3GP
Vo=0.8*(1+(R1/R2))

B S D B

PQ4701
AO7401-GP
G

1 2 PW R_1D8V_RUN_EN
19,27,36,37,92 PM_SLP_S3# PR4709
0R0402-PAD
PC4710
1

SCD1U10V2KX-5GP
DY
2

A A
JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PWM_1D8V_RT8015B

www.vinafix.vn
Size Document Number Rev
LA470 -1
Date: Thursday, December 16, 2010 Sheet 47 of 97
5 4 3 2 1
5 4 3 2 1

DCBATOUT

1
1

PG4802
2
PW R_VCCSA_DCBATOUT
PG4801
2

GAP-CLOSE-PW R-3-GP
www.rosefix.com
GAP-CLOSE-PW R-3-GP
1
PG4803
2 RT8208A for VCCSA
D GAP-CLOSE-PW R-3-GP PW R_VCCSA_DCBATOUT
D

1
PC4803 PC4804 PC4805 PC4806

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
SCD1U25V3KX-GP
5V_S5

2
1
1
PC4801
PR4802

SC1U10V2KX-1GP
PR4801
2
Freq=300KHz D

5
6
7
8
2D2R3J-2-GP 1 2

D
D
D
D
S-HR_20100614 V1.1 249KR2F-GP PU4802
2

SIS412DN-T1-GE3-GP
for CRB board
1

G
S
S
S
PC4802
G S Iomax=6A
SC1U10V2KX-1GP

3D3V_S5 Mag. 1.5uH 7*7*3

4
3
2
1
DCR=14~15mohm OCP>9A
2

PR4803 PC4807
2

PU4801 0R3J-0-U-GP SCD1U25V3KX-GP Idc=9A, Isat=18A VCCSA=0.8V/0.9V


PR4814
100KR2J-1-GP PW R_VCCSA_TON 16 13 PW R_VCCSA_BOOT 1 2 PW R_VCCSA_BOOT_R 1 2 VCCSA_PW R 0D85V_S0
TON BOOT VCCSA_PW R PG4804
9 VDDP PL4801
C 12 PW R_VCCSA_HG 1 2 C
1

PWR_VCCSA_VDD UGATE PW R_VCCSA_PH


2 VDD PHASE 11 1 2
8 PW R_VCCSA_LG IND-1D5UH-53-GP GAP-CLOSE-PW R-3-GP
LGATE PG4805
1 2 PW R_VCCSA_GD 4 7 PW R_VCCSA_G0 1 PR4804 2 1 2
PGOOD G0 VCCSA_SEL 9

1
42 D85V_PW RGD PR4815 PW R_VCCSA_CS 10 3 PW R_VCCSA_FB 0R2J-2-GP PC4808
CS FB PW R_VCCSA_G1 PTC4801
0R0402-PAD G1 14 1 2 H_FC_C22 9 GAP-CLOSE-PW R-3-GP

SE390U2D5VM-7GP

SCD1U25V3KX-GP
PW R_VCCSA_D1 PR4807 PG4806
5 D

2
D1
1

5
6
7
8
PW R_VCCSA_EN 15 6 PW R_VCCSA_D0 0R2J-2-GP 1 2
EM/DEM D0

D
D
D
D
PR4805
13K3R2F-L1-GP 17 1 PU4803
GND VOUT VCCSA_PW R GAP-CLOSE-PW R-3-GP
SIS412DN-T1-GE3-GP PG4807
1 2
2

20100705_PWR RT8208BGQW -GP

G
S
S
S
GAP-CLOSE-PW R-3-GP
Matsuki cap 390uF PG4808
G S

4
3
2
1
1 2
2.5V, ESR=10mohm
GAP-CLOSE-PW R-3-GP
PG4809
37,45 1.05VTT_PW RGD 1 2 1 2
PR4806
0R0402-PAD Id=12.5A GAP-CLOSE-PW R-3-GP
PR4809 PG4810
Qg=15.4~23nC
1

PW R_VCCSA_FB_R DY 1 2 VCCSA_PW R 1 2
DY Rdson=14.5~17.5mohm 0R2J-2-GP
GAP-CLOSE-PW R-3-GP
2

1
PC4809 PR4810
PR4808

1
SC1U6D3V2KX-GP PC4810 1 2
10KR2F-2-GP VCCSA_SENSE 9
0R2J-2-GP
DY

SC18P50V2JN-1-GP
2
B B

2
Vout=0.75*(1+R1/R2)
PW R_VCCSA_FB

VCCSA_SEL VCCSA_PWR

1
L 0.9V
PR4811 PR4812 PR4813
49K9R2F-L-GP 76K8R2F-GP 143KR2F-L-1-GP

H 0.8V DY

2
PWR_VCCSA_D1

PWR_VCCSA_D0
A A
JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RT8208B_VCCSA

www.vinafix.vn
Size Document Number Rev
LA470 -1
Date: Thursday, December 16, 2010 Sheet 48 of 97
5 4 3 2 1
SSID = VIDEO

LVDS CONNECTOR
www.rosefix.com LVDSA_DATA2
LVDSA_DATA2#
LVDSA_DATA1
LVDSA_DATA1#
17
17
17
17
CAMERA POWER

DCBATOUT_LCD
LVDS1 SB_0810
LVDSA_DATA0 17
48 LVDSA_DATA0# 17
LVDSA_CLK 17
41 50 LVDSA_CLK# 17
1

2
3 3D3V_CAMERA_S0
4 Layout 40 mil 3D3V_S0
5 BLON_OUT_C 3D3V_S0
42 6 LCD_BRIGHTNESS 2 1 L_BKLT_CTRL U4902
R4912
7 DBC_EN_C 33R2J-2-GP R4902 1
8 3D3V_CAMERA_S0 TP4901 TPAD14-GP 1 2 3D3V_S0_CAMERA 1 5
OUT IN

2
1
9 USB_CAMERA# 1 2 2
USB_PN12 18 GND
10 USB_CAMERA 1 R4908 2 0R0603-PAD 3 4 CAMERA_EN 27
USB_PP12 18 0R0603-PAD NC#3 EN
11 R4909 0R0603-PAD SRN2K2J-1-GP

1
12 RN9404 C4912

1
43 13 SB_0819 G5240B1T1U-GP C4911

SC4D7U6D3V3KX-GP
14 For Camera GND 74.05240.A7F

3
4

SC4D7U6D3V3KX-GP
15 2nd = 74.07534.A7F

2
16 LVDS_DDC_CLK_R 17
17 LVDS_DDC_DATA_R 17
18
19
44 20
21
22 LCD_CBL_DET#_C 1 TP4902TPAD14-GP
23 LVDSA_CLK
24 LVDSA_CLK#
25 LCD_DET_G 1 TP4903TPAD14-GP
26 LVDSA_DATA2 For EMI request
45 27 LVDSA_DATA2# Close to LVDS connector
28
29 LVDSA_DATA1 LCD_BRIGHTNESS
30 LVDSA_DATA1# LCD_TST_C
31
32 LVDSA_DATA0
33 LVDSA_DATA0# 1 TP4904TPAD14-GP LVDSA_CLK#
46 34 LVDS_DDC_DATA_R LVDSA_CLK
35 LVDS_DDC_CLK_R R4907 DY

1
36 LCD_TST_C 1 20R2J-2-GP Color_Engine# 21 EC4904 EC4905 EC4901 EC4902
37 3D3V_S0_LCD 1 2 DY DY
3D3V_S0 LCDVDD DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
38 R4913 0R0603-PAD

2
39
DY

SC33P50V2JN-3GP

SC33P50V2JN-3GP
40 LCDVDD_R 1 2
47 51 R4914 0R0603-PAD
1

C4901 C4902
49 SSID = VIDEO
SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
2

FOX-CON40-2R-GP-U
R4903
20.F1289.040
2nd = 20.F1093.040 27 BLON_OUT 1 2 BLON_OUT_C

1KR2J-1-GP

2
SB_0819

1
R4911
DCBATOUT_LCD DCBATOUT C4910

100KR2J-1-GP

SC100P50V2JN-3GP
2
F4901

1
2 1
1

POLYSW -1D1A24V-GP-U LCDVDD


C4904 C4905 2nd = 69.50007.A41 3D3V_S0
Main:69.50007.A41
SCD1U50V3KX-GP
SC1KP50V2KX-1GP
2

U4901
Second:69.50007.A31
LVDS_VDD_EN
Layout 40 mil
1 EN IN#5 5
2 GND
3 OUT IN#4 4

1
C4907
R4904

SC4D7U6D3V3KX-GP
R4910 C4909 C4908 G5285T11U-GP

SC4D7U6D3V3KX-GP
2
DY 1 74.05285.07F

100KR2J-1-GP
3D3V_S0

2
DY 2nd = 74.09724.09F

SCD1U16V2KX-3GP
2

2
2
10KR2J-3-GP
DBC_EN_C 2 R4901 1
33R2J-2-GP
DBC_EN 18 Panel BL brightness/Power En/BL En
DY
1

R4906
R4905
10KR2J-3-GP
1 2 0R0402-PAD PANEL_BLEN 27
DY 17 L_BKLT_EN L_BKLT_CTRL
2

17 L_BKLT_CTRL LVDS_VDD_EN
17 LVDS_VDD_EN

<Variant Name>
SC100P50V2JN-3GP

20100706
1

R9401 C9401
100KR2J-1-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


2

Title

LCD Connector
Size Document Number Rev
A3
LA470 -1

www.vinafix.vn Date: Thursday, December 16, 2010 Sheet 49 of 97


5 4 3 2 1

5V_CRT_S0
www.rosefix.com 9
CRT1

VCC_CRT NC#4
NC#11
4
11 R5003
CRT DDCDATA & DDCCLK level shift
Pull High 5V Design on CRT Board
5V_CRT_S0
CRT_DDCDATA_CON 12 3D3V_S0_DDC 1 2 3D3V_S0 5V_S0
DDCDATA_ID1
1

C5012 CRT_DDCCLK_CON 15 DDCCLK_ID3 10KR2J-3-GP


GND 5

1
SCD01U16V2KX-3GP

D CRT_R 1 6 500mA D
2

CRT_G CRT_RED GND F5001 D5001


2 CRT_GREEN GND 7
CRT_B 3 8 FUSE-1D1A6V-4GP-U 83.R5003.C8F
CRT_BLUE GND 3D3V_S0 CH551H-30PT-GP
GND 10 69.50007.691 2ND = 83.5R003.08F
CRT_VSYNC_CON 14 16 2nd = 69.50007.771

2
VSYNC GND
CRT_HSYNC_CON 13 HSYNC GND 17 3rd = 83.R5003.G8F
5V_CRT_DDC

2
1

3
4
D-SUB-15-66-GP RN5002
20.20882.015 SRN2K2J-1-GP RN5003
3D3V_S0_DDC SRN10KJ-5-GP

Q5001

3
4

2
1
4 3 CRT_DDCDATA_CON
17 CRT_DDC_DATA
5 2

6 1

C C
CRT Hsync & Vsync level shift 17 CRT_DDC_CLK
2N7002KDW-GP
1st = 84.DM601.03F
5V_S0 CRT_DDCCLK_CON
2nd = 84.2N702.A3F

1
C5007
SCD1U10V2KX-5GP

2
U5001

1 1OE# VCC 8
17 CRT_HSYNC 2 7 R5002
CRT_VSYNC_CON 2 1A 2OE#
1CRT_VSYNC1_2 3 2Y 1Y 6 CRT_HSYNC1_21 2CRT_HSYNC_CON
10R2J-2-GP R5001 4 5 10R2J-2-GP CRT_VSYNC 17
GND 2A
CRT_DDCDATA_CON
74AHCT2G125DP-GP

1
B 2nd = 73.7W125.007 C5008 CRT_HSYNC_CON B

1
SC100P50V2JN-3GP
C5009 CRT_VSYNC_CON

1
SC18P50V2JN-1-GP
CRT_DDCCLK_CON
C5010

2
CRT RGB DY

1
SC18P50V2JN-1-GP
L5001

2
CRT_R C5011
17 CRT_RED 1 2
DY

SC100P50V2JN-3GP
FCM1608CF-220T05-GP

2
68.00245.011 2nd = 68.00230.021 DY
L5002
CRT_G
17 CRT_GREEN 1 2
FCM1608CF-220T05-GP DY
68.00245.011 2nd = 68.00230.021
L5003
1 2 CRT_B
17 CRT_BLUE
SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

FCM1608CF-220T05-GP <Variant Name>


68.00245.011 2nd = 68.00230.021
8
7
6
5

1
C5004

C5005

C5006

C5001 C5002 C5003


DY DY DY Wistron Corporation
SC8P250V2CC-GP

SC8P250V2CC-GP

SC8P250V2CC-GP

A RN5001 A
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SRN150F-1-GP Taipei Hsien 221, Taiwan, R.O.C.
1
2
3
4

Title

CRT Connector
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 50 of 97
5 4 3 2 1
5 4 3 2 1

SSID = VIDEO
www.rosefix.com
HDMI CONNECTOR
SB_0819
HDMI CONN
HDMI1
20

1 HDMI_DATA2_R_C

D HDMI Passive Level Shifter 2


3
4
HDMI_DATA2_R_C#
HDMI_DATA1_R_C
D

5
6 HDMI_DATA1_R_C#
Close to HDMI Connector 7 HDMI_DATA0_R_C
8
RN5103 20100705 9 HDMI_DATA0_R_C#
SRN0J-6-GP
1 4 HDMI_CLK_R_C# 10 HDMI_CLK_R_C
17 HDMI_CLK_R# HDMI_CLK_R_C
17 HDMI_CLK_R 2 3 11
RN5104 12 HDMI_CLK_R_C#
SRN0J-6-GP
1 4 HDMI_DATA0_R_C# 13
17 HDMI_DATA0_R# HDMI_DATA0_R_C 5V_S0
17 HDMI_DATA0_R 2 3 14
RN5108 15 DDC_CLK_HDMI
SRN0J-6-GP
1 4 HDMI_DATA1_R_C# 16 DDC_DATA_HDMI
17 HDMI_DATA1_R# HDMI_DATA1_R_C F5101
17 HDMI_DATA1_R 2 3 17
RN5107 18 5V_HDMI 2 1
SRN0J-6-GP
1 4 HDMI_DATA2_R_C# 19 HPD_HDMI_CON
17 HDMI_DATA2_R# HDMI_DATA2_R_C
17 HDMI_DATA2_R 2 3

1
21 C5101 FUSE-1D1A6V-4GP-U
69.50007.691

SCD1U10V2KX-5GP
SKT-HDMI21-GP 2nd = 69.50007.771

2
22.10296.491 R5105 1 20R2J-2-GP
DY

8
7
6
5

5
6
7
8
RN5101 RN5102
SRN680-U-GP SRN680-U-GP

HDMI_DATA2_R_C 1 2 HDMI_DATA2_R_C#

1
2
3
4

4
3
2
1
C R5107 180R2F-1-GP C
HDMI_DATA1_R_C 1 2 HDMI_DATA1_R_C#
R5108 180R2F-1-GP
HDMI_PLL_GND HDMI_DATA0_R_C 1 2 HDMI_DATA0_R_C#
R5109 180R2F-1-GP
HDMI_CLK_R_C 1 2 HDMI_CLK_R_C#
R5110 180R2F-1-GP

D Q5103 AFTP5109 1 DDC_CLK_HDMI


2N7002K-2-GP SC_1011 AFTP5110 1 DDC_DATA_HDMI
1st = 84.2N702.031 AFTP5111 1 5V_HDMI
AFTP5112 1 HPD_HDMI_CON
2ND = 84.2N702.J31
3D3V_S0 SB_0825
G

5V_S0
1

R5104
DY 100KR2J-1-GP

1
D5101
2

HDMI DDC Passive Level Shifter CH461FPT-GP-U

3
B B

3D3V_S0

2
2
R5112 R5111
910R2F-1-GP 910R2F-1-GP

1
1
3D3V_S0 Q5104
1 6 DDC_DATA_HDMI
17 PCH_HDMI_DATA
2 5
1

3D3V_S0
R5101 3 4
1MR2J-1-GP
G
1

DMN66D0LDW -7-GP
DY R5102 Q5102 84.DMN66.03F DDC_CLK_HDMI
2

20KR2J-L2-GP 2nd = 84.27002.A3F


17 HDMI_PCH_DET S D HPD_HDMI_CON
17 PCH_HDMI_CLK
2

HDMI_OE# 1 R5103 2 HDMI_IN# 27


0R0402-PAD
D

Q5101 2N7002K-1-GP R5106


A <Variant Name> A
2N7002K-2-GP 84.2N702.031 100KR2J-1-GP
1st = 84.2N702.031 2nd = 84.2N702.J31
Wistron Corporation
2

2ND = 84.2N702.J31
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
G

Title
HPD_HDMI_CON
HDMI Level Shifter/Connector
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 51 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

eDP
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 52 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

S-VIDEO
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 53 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

(Blanking)

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 54 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
SSID = User.Interface

D
ITP Connector D

H_CPURST# use pull-up Resistor close


ITP connector 500 mil ( max ),
others place near CPU side.

C C

CPU ITP Connector


TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 55 of 97
5 4 3 2 1
SSID = SATA
www.rosefix.com
SATA HDD Connector

HDD1
24
NP2
22
21 SATA_TXP0 21
SB_0802 21 SATA_TXN0 20
19
21 SATA_RXN0_C C5602 1 2 SCD01U16V2KX-3GP SATA_RXN0 18
21 SATA_RXP0_C C5603 1 2 SCD01U16V2KX-3GP SATA_RXP0 17
16

3D3V_S0 1 2 3D3V_S0_HDD 15
R5608 0R0603-PAD 14
13
12
11
10
5V_S0 R5607 1 2 5V_S0_HDD 9
0R0805-PAD 8
7

1
C5605 C5606 RC5602 6
DY 5
4

SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
2

2
3

SC33P50V2JN-3GP
DY DY DY 2

1
C5604 C5601 RC5601 1
NP1
SB_0831 23

2
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP

SC33P50V2JN-3GP
SKT-SATA22P-33-GP-U1
62.10065.551
SB_0831

SB_0825

SATA Zero Power ODD

ODD Connector 22 SATA_ODD_PW RGT

SATA_RX- and SATA_RX+ Trace G547F1P81U-GP


ODD1 Length match within 20 mil 5V_S0
8 Mars: 4 EN/EN# OC# 5
NP1 R5606 3 6 ODD_PW R_5V 100 mil
Exchange ODD and ESATA differential pair each other. ODD_PW R_5V_IN IN#3 OUT#6
S1 1 2 2 IN#2 OUT#7 7
0R0805-PAD 1 8
GND OUT#8

1
S2 SATA_TXP4 21

1
S3 SATA_TXN4 21 TC5604
S4 U5601 TC5603

SC10U10V5ZY-1GP
2
S5 SATA_RX4-_C C5607 1 2SCD01U16V2KX-3GP SATA_RXN4_C 21 74.00547.C79

SC10U10V5ZY-1GP
2
S6 SATA_RX4+_C C5608 1 2SCD01U16V2KX-3GP SATA_RXP4_C 21
S7 2ND =
P1
P2 ODD_PW R_5V
SATA_ODD_PRSNT# 22 Current limit
P3
P4 SATA_ODD_DA#_C R5605 2 1
Active High
SATA_ODD_DA# 27
P5 0R0402-PAD
P6
typ =>2A
1

NP2
9 R5604

SKT-SATA7P-6P-31-GP
DY 10KR2J-3-GP
62.10065.D91
2

2nd = 62.10065.D11
3rd = 62.10065.D71
3D3V_S0
<Variant Name>
RN5601
SATA_ODD_PW RGT 4 1
SB_0819 SATA_ODD_DA# 3 2
Wistron Corporation
SRN10KJ-5-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SUPPORT ZERO SATA ODD
HDD/ODD

www.vinafix.vn
Size Document Number Rev
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 56 of 97
5 4 3 2 1

USB Power
5V_S5
27,61 USB_PW R_EN#
www.rosefix.com
at least 80 mil
Support 2A

4
3
2
UP7534BRA8-15-GP

EN#
VIN
VIN
OC#
VOUT#6
VOUT#7
5
6
7
5V_USB0_S3
USB_OC#8_9 18,61
at least 80 mil
SB_0818
ESATA1
5V_USB0_S3

1 GND VOUT#8 8

1
USB_PP8_C U3 U1
D+ VBUS

1
R5703 C5703 C5704 USB_PN8_C U2 D-
1

C5702 U5701 TC5701

100KR2J-1-GP
U4
74.07534.079
DY DY GND
S1 DY
DY

SCD1U10V2KX-4GP
D D

SC1U10V3ZY-6GP
2

2
GND

1
SE220U6D3VM-21-GP
21 SATA_TXP5 SATA_TXP5 S2 S4 RC5701
2nd = 74.02181.A79
2

2
SATA_TXN5 A+ GND SC33P50V2JN-3GP
S3 S7
SCD1U10V2KX-4GP

21 SATA_TXN5 A- GND
12

2
GND
GND 13
C5705 1 SCD01U16V2KX-3GP
2 SATA_RXP5 S6 14 SB_0831
21 SATA_RXP5_C B+ GND
21 SATA_RXN5_C C5701 1 SCD01U16V2KX-3GP
2 SATA_RXN5 S5 15
B- GND

SKT-USB15-GP TPAD14-GP
22.10321.X11 1 TP5704

SB_0819

TPAD14-GP
TP5701
TPAD14-GP 1 5V_USB0_S3
TP5702
TPAD14-GP 1 USB_PN8_C
5V_USB0_S3 TP5703 1 USB_PP8_C
18 USB_PP8 USB_PP8_C
D5701
1 4
2

3
DY
C C

FILTER-130-GP USB_PP8_C 2 3 USB_PN8_C


TR5701
PRTR5V0U2X-GP
1

18 USB_PN8 USB_PN8_C

SB_0830

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

E-SATA
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 57 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com 3D3V_S0

MIC1
6
L5801
SBY100505T-601Y-N-GP 4
D 1 2 AUD_DMIC_CLK_L 3 D
29 AUD_DMIC_CLK
2
29 AUD_DMIC_1_2

1
C5801 C5802 1
For EMI request:

SC1KP50V2JN-2GP

SC1KP50V2JN-2GP
Change C5801,C5802 to varister 69.80024.001 5

1
C5803 HR-CON4-GP
20.F1686.004

2
SC1KP50V2KX-1GP
2nd = 20.F1621.004

AFTP5801 1 AUD_DMIC_CLK_L
AFTP5802 1 AUD_DMIC_1_2

AFTP5803 1 AUD_SPK_R+_L
AFTP5804 1 AUD_SPK_R-_L
AFTP5805 1 AUD_SPK_L+_L
AFTP5806 1 AUD_SPK_L-_L

INTERNAL STEREO SPEAKERS


C
Port G C

29 AUD_SPK_L-_L

29 AUD_SPK_L+_L
SPK1
6
Place these EMI components
close to speaker connector. 4
1

EC5801 EC5802 3
2
SC470P50V2JN-GP

SC470P50V2JN-GP
2

Only needed if speaker 1


connector is physically far from
5
audio codec. When in doubt, it's
always a good idea to have HR-CON4-GP
population option. 20.F1686.004
2nd = 20.F1621.004

29 AUD_SPK_R-_L

29 AUD_SPK_R+_L
1

EC5803 EC5804
SC470P50V2JN-GP

SC470P50V2JN-GP

B B
2

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MIC/SPEAKER/AUDIO JACK
Size Document Number Rev

www.vinafix.vn
A2
LA470 -1
Date: Thursday, December 16, 2010 Sheet 58 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

LAN Connector
SB_0819

3D3V_LAN_S5
RJ45
R5901 330R2J-3-GP 14 16
31 LAN_ACT_LED# 1 2 12
YELLOW
11
RJ45_8 8
RJ45_7 7
RJ45_6 6
RJ45_5 5
RJ45_4 4
RJ45_3 3
RJ45_2 2

330R2J-3-GP RJ45_1 1
1 2 10
C FOR CO-LAY GIGA Lan Transformer 31 SPEED_100#
GREEN C
9
13 15

RJ45-8P-16-GP-U
22.10019.061
XF5901 0630: ME change

1CT:1CT RJ45_7
31 MDI3+ 2 23

XRF_TDC 1 24 MCT2
MCT2
3 22 RJ45_8 MCT1
31 MDI3- 20100705
SCD01U16V2KX-3GP MCT4
MCT3
1

C5903 1CT:1CT RJ45_4


31 MDI2+ 5 20

8
7
6
5
4 21 MCT1
2

RN5902
6 19 RJ45_5 SRN75J-1-GP
31 MDI2-
C5901value modify to 0.01uF ~
0.4uF capacitor 1CT:1CT
8 17 RJ45_3
31 MDI1+

1
2
3
4
MCT_R
7 18 MCT4

2
C5904
9 16 RJ45_6 SC1KP2KV6KX-GP
31 MDI1-

1
B 1CT:1CT RJ45_1 B
31 MDI0+ 11 14

10 15 MCT3

12 13 RJ45_2
31 MDI0-

XFORM-24P-19-GP
68.IH601.301
2ND = 68.89246.301
1st
68.IH601.301(Taimag) for 1000
68.HH035.301(Taimag) for 10/100
2nd
68.2413S.30A(Lankom) for 1000
68.H6441.301(Lankom) for 10/100

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RJ45 / Transformer
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 59 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
SSID = Flash.ROM

SPI FLASH ROM (4M byte) for PCH 3D3V_SPI

3D3V_SPI

D D

1
C6002
C6001

8
7
6
5

SC10U6D3V5KX-1GP
2

2
RN6001
DY

SCD1U10V2KX-5GP
SRN4K7J-10-GP 3D3V_SPI

2 R6010 1 3D3V_S5

1
2
3
4
0R0402-PAD
SPI_HOLD_0#

3D3V_SPI the same page 23 VCCSPI power


U6001

21,27 SPI_CS0#_R 1 CS# VCC 8


21,27 SPI_SO_R 1 2 SPI_SO 2 7
R6001 33R2J-2-GP SPI_W P# SO NC#7
3 WP# SCK 6 SPI_CLK_R 21,27
4 GND SI 5 SPI_SI_R 21,27

1
DY

1
EC6002 MX25L3206EM2I-12G-GP
SC4D7P50V2CN-1GP 1st = 72.25320.C01 EC6003 DY DY EC6001

2
2ND = 72.25Q32.A01

SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2

2
C C

B B

3D3V_AUX_S5

RTC_AUX_S5 Q6001
SSID = RBATT 2
+RTC_VCC 4
RTC1

1 RTC_PW R 1 R6002
2 1
2

1KR2J-1-GP
C6003 CH715FPT-GP 2
SC1U6D3V2KX-GP TPAD14-GP TP6001 1 3
1

83.R0304.B81
A
2nd = 83.00040.E81 <Variant Name> A
Width=20mils 5

ACES-CON3-4-GP-U Wistron Corporation


20.F1267.003 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TPAD14-GP TP6002 1 +RTC_VCC
Title

Flash/RTC
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 60 of 97
5 4 3 2 1
5 4 3 2 1

SSID = USB
www.rosefix.com
IO Board USB Power
Support 2A
5V_S5 5V_USB1_S3
U6101
at least 80 mil
D at least 80 mil 1 GND VOUT#8 8 D
2 VIN VOUT#7 7
3 VIN VOUT#6 6
27,57 USB_PW R_EN# 4 EN# OC# 5

1
C6101
DY

SCD1U10V2KX-5GP
UP7534BRA8-15-GP

2
1st = 74.00547.A79
2nd = 74.02181.A79
USB_OC#0_1 18

C C

B B

Sub-USB Board Power 5V_USB3_S3


5V_S5
U6103
at least 80 mil
at least 80 mil 1 GND VOUT#8 8
2 VIN VOUT#7 7
3 VIN VOUT#6 6
27,57 USB_PW R_EN# 4 EN# OC# 5 USB_OC#10_11 18
1

C6105
DY
SCD1U10V2KX-5GP

UP7534BRA8-15-GP
2

1st = 74.00547.A79
2nd = 74.02181.A79

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Power SW
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 61 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 3.0 Port


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 62 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
SSID = User.Interface
Bluetooth Module conn.
D D

Bluetooth Module

3D3V_BT_S0 20100706 3D3V_S0


U6301

1 5 3D3V_BT_IN 1 2
C
OUT IN R6301 0R0603-PAD
2 GND
C
3 NC#3 EN 4

1
BLUETOOTH_EN 27 C6302
EC6302

SCD1U16V2KX-3GP
G5240B1T1U-GP
DY

2
SC4D7U6D3V3KX-GP
74.05240.A7F
2nd = 74.07534.A7F

BT1
7

EC6302 put near 1 3D3V_BT_S0


BLUE1 / all USB 2
put one choke 3 USB_PN3 18
near connector 4 USB_PP3 18
5 BT_LED 1
by EMI request 6 TP6301
B TPAD14-GP B
8

ACES-CON6-1-GP-U1
20.F0772.006
TPAD14-GP TP6309 1 BLUETOOTH_EN 2nd = 20.F1804.006
TPAD14-GP TP6311 1 3D3V_BT_S0
TPAD14-GP TP6312 1 USB_PP3
TPAD14-GP TP6313 1 USB_PN3

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Bluetooth
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 63 of 97
5 4 3 2 1
5 4 3 2 1

5V_S0
www.rosefix.com
3.3V FP LDO
3V_FP_S0
U6401

1 VIN VOUT 5
D 2 D
GND
3 EN/EN# NC#4 4
1

1
DY DY
C6403 RT9198-33PU5R-GP C6402
SC1U10V2KX-1GP

SC1U6D3V2KX-GP
DY
2

2
Finger Printer Connector

3D3V_S0 SB_0819
SB_0729
R6403
1 2 3V_FP_S0

1
0R2J-2-GP
C6401 FP1
C SCD1U10V2KX-4GP 7 C

2
1

2
3
18 USB_PP2 1 R6401 2 0R0603-PAD Biometric_USBPP 4
18 USB_PN2 1 R6402 2 0R0603-PAD Biometric_USBPN 5
1 6
AFTP40 8

2
R6404 PTWO-CON6-12-GP
0R2J-2-GP 20.K0382.006
2nd = 20.K0320.006

1
AFTP42 1 3V_FP_S0
AFTP43 1 Biometric_USBPN
B AFTP44 1 Biometric_USBPP B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 64 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
SSID = Wireless

D D

Mini Card Connector(802.11a/b/g/n)


1D5V_S0 3D3V_S0
20100706

2
R6513 R6512
0R0402-PAD 0R0402-PAD

1
W LAN1
53
R6511 NP1
19,31,66 PCIE_W AKE# 1 2 1 2 +3V_MINI_W LAN
DY 0R2J-2-GP R6504~R6509 close to Debug connector
3 4
5 6
7 8 LPC_AD0_C 1 2R6505
20 CLK_PCIE_W LAN_REQ#
9 10 LPC_AD1_C 0R2J-2-GP
1
DY 2R6504
LPC_AD0 21,27,71
C 11 12 LPC_AD2_C 0R2J-2-GP
1
DY 2R6507
LPC_AD1 21,27,71 C
20 CLK_PCIE_W LAN#
13 14 LPC_AD3_C 0R2J-2-GP
1
DY 2R6506
LPC_AD2 21,27,71
20 CLK_PCIE_W LAN
15 16 LPC_FRAME#_C 0R2J-2-GP
1
DY 2R6509
LPC_AD3 21,27,71
0R2J-2-GP DY LPC_FRAME#21,27,71

27 E51_RXD R6501 1 2 0R0402-PAD E51_RXD_R 17 18


27 E51_TXD R6502 1 2 0R0402-PAD E51_TXD_R 19 20 W IFI_RF_EN 27
21 22 PLT_RST#_W LAN 1 2
0R2J-2-GP R6510 PLT_RST# 5,11,18,27,31,36,66,71,83,97
20 PCIE_RXN2 23 24 3D3V_S0
20 PCIE_RXP2 25 26
27 28
29 30 PCH_SMBCLK
PCH_SMBCLK 14,15,20,66
20 PCIE_TXN2 31 32 PCH_SMBDATA
PCH_SMBDATA 14,15,20,66
20 PCIE_TXP2 33 34
35 36 USB_PN11 18
20100705_Standard 37 38 USB_PP11 18
+3V_MINI_W LAN 39 40
41 42
43 44 W LAN_LED# 1 TP6501 TPAD14-GP
45 46 CLK_PCI_LPC_C 2 1
47 48 +1D5V_MINI_W LAN R6508 CLK_PCI_LPC 18,71
49 50 0R2J-2-GP
5V_S5 1 R6503 2 +5V_MINI_DEBUG 51 52
0R3J-0-U-GP
54
NP2 DY
PTW O-CONN52A-4-GP-U
20.F1286.052
+3V_MINI_W LAN 2nd = 62.10043.841
B B
1

C6502 C6503 C6504 -1_1027


SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2

+1D5V_MINI_W LAN
5V_S5
1

C6501 C6505 C6506 C6507


SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)/ITP CONN
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 65 of 97
5 4 3 2 1
5 4 3 2 1

SSID = Wireless

Place near MINI Card CONN


www.rosefix.com
Mini Card Connector(WWAN)
1D5V_S0 3D3V_S0

SB_0810 SB_0819

2
+3V_MINI_W W AN
D R6607 R6606 D
W W AN1 0R0402-PAD 0R0402-PAD
53
NP1

SC33P50V2JN-3GP

SC33P50V2JN-3GP

1
1

1
C6603

C6604
C6618 C6619 1 R6604 2 1 2 +3V_MINI_W W AN
C6601 C6602 DY 19,31,65 PCIE_W AKE#
DY 0R2J-2-GP
UIM_PW R
3 4
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
2

2
SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP
5 6
7 8 UIM_PW R
9 10 UIM_DATA
11 12 UIM_CLK
13 14 UIM_RESET
15 16 UIM_VPP

17 18
Place near Pin 24 19 20
+1D5V_MINI_W W AN C6611 21 22 PLT_RST#_W AN1 R6605 3G_EN
2
27
+3V_MINI_W W AN PLT_RST# 5,11,18,27,31,36,65,71,83,97
21 SATA_RXP1_C 1 2SCD01U16V2KX-3GP SATA_RXP1 23 24 0R2J-2-GP
3D3V_S0
1 2SCD01U16V2KX-3GP SATA_RXN1 25 26
SC33P50V2JN-3GP

21 SATA_RXN1_C
27 28
1

1
C6607

C6612 29 30 PCH_SMBCLK
PCH_SMBCLK 14,15,20,65
C6606 C6608 21 SATA_TXN1 31 32 PCH_SMBDATA
SCD1U16V2KX-3GP PCH_SMBDATA 14,15,20,65
21 SATA_TXP1 33 34
2

2
SCD047U16V2KX-1-GP

35 36 USB_P4- 1 R6603 2 0R3J-0-U-GP USB_PN4 18


37 38 USB_P4+ 1 R6601 2 0R3J-0-U-GP USB_PP4 18
+3V_MINI_W W AN 39 40
41 42 3G_LED# 1 TP6602 TPAD14-GP
43 44
C 45 46 C
+1D5V_MINI_W W AN 47 48 +1D5V_MINI_W W AN
49 50
51 52
SC33P50V2JN-3GP

NP2
1

C6610

54
C6609
PTW O-CONN52A-4-GP-U
2

2
SCD047U16V2KX-1-GP

20.F1286.052
2nd = 62.10043.841

SB_0819

UIM_PW R SIM_PW R

1 2
B R6610 0R0603-PAD B

1
C6613
SIM_PW R SCD1U10V2KX-4GP

1
2
2 1 C6615
SC4D7U10V5ZY-3GP

2
C6616
SC4D7U6D3V3KX-GP
SIM1
C1 VCC
UIM_VPP C6 VPP
GND 7
UIM_RESET C2 8
UIM_CLK RST GND
C3 CLK GND 9
UIM_DATA C7 C5
I/O GND
NP1 NP1
1

NP2 NP2
C6617
SC100P50V2JN-3GP CARDBUS6P-3-GP-U
2

20.I0084.001

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN Connector
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 66 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

(Blanking)

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 67 of 97
5 4 3 2 1
5 4 3 2 1

SSID = User.Interface

www.rosefix.com Power button LED


POWER LED
3D3V_S5

5V_S5
1

1
R6817

R6818

DY
2

2
0R2J-2-GP

0R2J-2-GP
3D3V_S5_LED

Q6801 LED1
3 PWR_LED#_Q K A PWR_LED#_R 1 2 3D3V_S5_LED
1 R1 R6801 22R2J-2-GP
27 PWRLED R6820
2 LED-W-56-GP WHITE
D R2 83.00191.J70 1 2 D
3D3V_S0 3D3V_S0_LED
0R2J-2-GP
DTC143ZUB-GP R6819
84.00143.G1K 5V_S0 1 2
2nd = 84.00143.D1K 0R2J-2-GP
CHARGER LED DY
Q6802 LED2
3 DC_BATFULL#_Q K A DC_BATFULL#_R 1 2 3D3V_S5_LED
1 R1 R6802 22R2J-2-GP
27 DC_BATFULL LED-W-56-GP
2
R2 83.00191.J70 WHITE
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
WIRELESS_LED
Q6804 LED3
R6807
3 WIRELESS_LED#_Q K A WIRELESS_LED#_R 1 2 3D3V_S0_LED
1 2 W_LED 1 R1 R6804 22R2J-2-GP
27 WIRELESS_LED LED-W-56-GP
2
R2 83.00191.J70 WHITE
Q6807 0R0402-PAD
NUM_LED_R_1 DTC143ZUB-GP
3
NUM_LED 1 R1 20100705 84.00143.G1K
2 2nd = 84.00143.D1K
R2
DTC143ZUB-GP
TP LED
DY
84.00143.G1K Q6805 LED4
2nd = 84.00143.D1K 3 TP_LED#_Q K A TP_LED#_R 1 2 3D3V_S0_LED
TPAD14-GP TP6801 1TP_LED 1 R1 R6805 200R2J-L1-GP
2 LED-W-56-GP
Q6808 R2 DY
83.00191.J70 WHITE
3 CAP_LED_R_1 DY
CAP_LED R1 DTC143ZUB-GP
1
2 84.00143.G1K
R2 2nd = 84.00143.D1K
DTC143ZUB-GP
VGA LED
C 84.00143.G1K Q6806 LED5 C
2nd = 84.00143.D1K 3 dGPU_LED#_Q K A dGPU_LED#_R 1 2 3D3V_S0_LED
1 R1 R6806 39R2J-L-GP
27 dGPU_LED LED-G-200-GP
2 OPS
R2 83.00191.I70 GREEN
Q6809
APS_LED_1 DTC143ZUB-GP
3
APS_LED_R 1 R1 84.00143.G1K OPSSB_0819
2 2nd = 84.00143.D1K
R2
DTC143ZUB-GP
LED Bord CONN. OPS
84.00143.G1K
2nd = 84.00143.D1K
5V_S0 3D3V_S0
CHARGER LED ORG
ORG

1
Q6803 LED6
R6816 R6815 3 CHARGE_LED#_Q K A CHARGE_LED#_R 1 2 3D3V_S5_LED
0R2J-2-GP 0R2J-2-GP 1 R1 R6803 39R2J-L-GP
27 NUM_LED 27 CHARGE_LED LED-O-16-GP-U
27 CAP_LED DY MAX Current: 80 mA 2
R2 83.00190.Z70
2

2
21 APS_LED_R
LEDB1 DTC143ZUB-GP
10 84.00143.G1K
LED_BD_PWR 8
SC_0928 7
NUM_LED_R_1 1 2 NUM_LED_R 6
CAP_LED_R_1 R6813 1 2 0R2J-2-GP CAP_LED_R 5
APS_LED_1 R6812 1 2 0R2J-2-GP APS_LED 4
R6810 1 2 0R2J-2-GP SATA_LED#_R 3
21 SATA_LED# R6814 1 0R2J-2-GP 2
TPAD14-GP TP6803
1
1

1
EC6805 EC6806 EC6807 EC6808 EC6809 9
DY
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SCD1U16V2KX-3GP ACES-CON8-19-GP
2

20.K0320.008
B B

AFTP6801 1 3D3V_S0
AFTP6802 1 NUM_LED_R
AFTP6803 1 CAP_LED_R
AFTP6804 1 APS_LED
AFTP6805 1 SATA_LED#_R
AFTP6809 1 LED_BD_PWR
AFTP41
3D3V_S0
1

SW2
1 OPS
2

3
R6809
100KR2J-1-GP Power button LED(White)
2

4 VGA_SW# 27
5
6
1

7 DY
8 C6801 1
NP1 SCD1U10V2KX-4GP AFTP16
2

NP2

R6822
SW-SLIDE61-GP-U
1

62.40018.351 3D3V_S5 1 2 PWR_BD_LED


OPS AFTP6806 1 KBC_NOVO_BTN#_R G6801 0R2J-2-GP
PWRLED R6821
AFTP6807 1
GAP-OPEN PWRBTN1 5V_S5 1 2
7 0R2J-2-GP
2

1 DY
AFTP6808 1 PWR_BD_LED
A KBC_PWRBTN#_R A
27 KBC_PWRBTN# 1 R6808 2 2
27 KBC_NOVO_BTN# 1 R6811 100R2J-2-GP
2 KBC_NOVO_BTN#_R 3
100R2J-2-GP PWRLED 4
27 PWRLED
5
1

EC6801 EC6802 EC6803 PWR_BD_LED 6


8
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

bom LA47
2

EC6804 PTWO-CON6-12-GP
20.K0382.006
Wistron Corporation
SC1KP50V2KX-1GP

2nd = 20.K0320.006
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Power Button


Size Document Number Rev

www.vinafix.vn
A2
LA470 -1
Date: Thursday, December 16, 2010 Sheet 68 of 97
5 4 3 2 1
5 4 3 2 1

SSID = KBC
www.rosefix.com SSID = Touch.Pad

5V_S0
5V_S0
SA 0914
D SB_0819 D

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C6901 C6902
Internal KeyBoard Connector

1
2
DY

2
KROW [0..7] 27 RN6901

2
R6903
SRN10KJ-5-GP
0R0603-PAD
KCOL[0..15] 27
KB1 TPAD1

4
3

1
25 7
5V_S0_TP 1
1 KCOL15 1 RN6902
AFTP65 27 TPCLK TPCLK 1 4 TP_CLK 2
2 KCOL10 1 27 TPDATA TPDATA 2 3 TP_DATA 3
3 KCOL11 1 AFTP70 TP_L 4
4 KCOL14 1 AFTP69 SB 1015 Swap data and clk SRN33J-5-GP-U TP_R 5
5 KCOL13 1 AFTP68 6
6 KCOL12 1 AFTP66 8
7 KCOL3 1 AFTP63
8 KCOL6 1 AFTP59 PTW O-CON6-12-GP
9 KCOL8 1 AFTP57
10 KCOL7 1 AFTP58
KCOL4 AFTP56 2nd = 20.K0320.006
11 1
12 KCOL2 1 AFTP55 SB_0805
13 KROW 0 1 AFTP61 SB_0819
14 KCOL1 1 AFTP53 AFTP72 1 TP_DATA
15 KCOL5 1 AFTP60
16 KROW 3 1 AFTP54 AFTP73 1 TP_CLK
17 KROW 2 1 AFTP52 TP_DATA SB_0819
18 KCOL0 1 AFTP49 AFTP74 1 TP_R TPAD2
C 19 KROW 5 1 AFTP62 TP_CLK 7 C
20 KROW 4 1 AFTP50 AFTP75 1 TP_L 1
21 KCOL9 1 AFTP48
22 KROW 6 1 AFTP67 C6903 C6904 TP_R 2

2
SC100P50V2JN-3GP

SC100P50V2JN-3GP
23 KROW 7 1 AFTP47 TP_L 3
24 KROW 1 1 AFTP46 AFTP6901 1 5V_S0_TP 4
AFTP51 AFTP6902 1 TP_SW _L 5

1
26 AFTP6903 1 TP_SW _R DY DY 6
8
ACES-CON24-7-GP
20.K0320.024 PTW O-CON6-12-GP
2nd = 20.K0391.024 SB_0825
2nd = 20.K0320.006

1 AFTP71 TP_SW _L TP_SW _R

5
TPS1 TPS2
1 2 2 1 TP_L 1 2 2 1 TP_R

R6902 R6901
100R2J-2-GP 100R2J-2-GP
20100705 3 4 3 4

6
B SW -TACT4-14-GP SW -TACT4-14-GP B

62.40009.D71 62.40009.D71

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 69 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

3D3V_AUX_S5

1
R7004
0R0402-PAD

2
C 3D3V_LID C

1
C7002
SCD1U10V2KX-5GP

2
HALL1
1 VDD

VSS 2

27 LID_CLOSE# LID_CLOSE# 1 R7002 2 LID_CLOSE#_1 3


100R2J-2-GP OUTPUT
1

C7001 EM-6781-T30-GP
DY SCD047U16V2KX-1-GP 74.06781.07B
2

2nd = 74.09132.B7B

B AFTP7001 1 3D3V_LID B
AFTP7002 1 LID_CLOSE#_1

SB_0825

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 70 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

3D3V_S0

DB1
1
21,27,65 LPC_AD0 2
21,27,65 LPC_AD1 3
21,27,65 LPC_AD2 4
21,27,65 LPC_AD3 5
21,27,65 LPC_FRAME# 6
5,11,18,27,31,36,65,66,83,97 PLT_RST# 7
8
18,65 CLK_PCI_LPC 9
10
11
12
C C
MLX-CON10-7-GP
20.D0183.110
DY

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 71 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 72 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 73 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader CONN


Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 74 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

New Card
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 75 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 76 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B (Blanking) B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 77 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 78 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D
G-Sensor D

3D3V_S5

VCC3M_Q34 R7901 1 2 10R3F-GP VCC3_ACC

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
C
E
Q7901

1
PDTA114EE-3-GP-U
C7901 C7902

R2

R1

2
B
GSENSE_ON#
27 GSENSE_ON# ANALOG_AGND

1
DY TPAD14-GP
R7902 GSENSE_Z_R R7905 1 2 56KR2J-L1-GP GSENSE_Z 1 TP7901
100KR2J-1-GP DY

1
2

C7903 C7906
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

14

15

2
C U7901 DY DY C

VDD

RES
GSENSE_TST 2 ANALOG_AGND
27 GSENSE_TST ST
3 GND VOUTZ 8
GSENSE_Y_R R7906 1 2 56KR2J-L1-GP GSENSE_Y GSENSE_Y 27
5 GND VOUTY 10
1

1
6 GND
R7903 7 12 C7904 C7907
100KR2J-1-GP R7904 GND VOUTX SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
0R0402-PAD-1-GP 1 NC#1
11
2

NC#11 ANALOG_AGND
4 NC#4
NC#13 13
ANALOG_AGND GSENSE_X_R R7907 1 2 56KR2J-L1-GP GSENSE_X GSENSE_X 27
9 NC#9 NC#16 16

1
C7905 C7908
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
LIS34ALTR-GP

ANALOG_AGND

STMicro LIS34AL: 74.00034.0BZ


ADXL335 : 74.00335.0BZ

B
ADXL322 B

LIS244AL No Accel Layout Comment :


(1) Place C483, C484, Q46, R528, R530,
LIS34AL
C479, C476, R509, R508 close to U55.
R530 NO_ASM ASM (2) Avoid routing under DCDC switching area.

R509 ASM ASM

All other ASM NO_ASM

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G-Sensor
Size Document Number Rev

www.vinafix.vn
Custom
LA470 -1
Date: Thursday, December 16, 2010 Sheet 79 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

(Blanking)
C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 80 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

(Blanking)
C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 81 of 97
5 4 3 2 1
5 4 3 2 1

IO Board CONN 80 pin


www.rosefix.com D5702
1

DY
4
5V_USB1_S3

USB1
USB_PP1_C 2 3 USB_PN1_C
D Mars: D
PRTR5V0U2X-GP
Exchange ODD and ESATA differential pair each other.
18 USB_PP1 USB_PP1_C
USB Board CONN.

3
5V_USB3_S3

5V_USB1_S3
at least 80 mil

ST220U6D3VDM-15GP
FILTER-130-GP
TR5702 TC8201

1
USB3
1

4
EC8201
USB PORT

1
USB_PN1_C

SCD1U16V2KX-3GP
18 USB_PN1

2
C6103 TC6102
SC1U10V2KX-1GP SE220U6D3VM-21-GP USB3

2
SB_0819 7
SB_0830 USB1 1

1 VBUS 2
SB_0818 USB_PN1_C 2 USB_PN10_C 3
USB_PP1_C D- USB_PP10_C
3 D+ 4
4 GND 5
5 CHASSIS#5 6
6 CHASSIS#6
C 7 8 C
CHASSIS#7
8 CHASSIS#8 ACES-CON6-1-GP-U1
20.F0772.006
SKT-USB8-62-GP-U 2nd = 20.F1804.006
22.10321.X71

SB_0803
5V_USB3_S3

D8201
1 4
AFTP8201 1 5V_USB3_S3
I/O Board CONN. DY AFTP8202
AFTP8203
1
1
USB_PN10_C
USB_PP10_C

USB_PP10_C 2 3 USB_PN10_C

PRTR5V0U2X-GP
SB_0819
AFTP8204 1 AUD_PORTA_R
AFTP8205 1 AUD_PORTA_L IO1
AFTP8206 1 AUD_PORTC_R_C 32
AFTP8207 1 AUD_PORTC_L_C 30
AFTP8208 1 MIC1_VREF 29 AUD_PORTA_R 29
28 AUD_PORTA_L 29
B USB_PP10_C B
27 AUD_PORTC_R_C 29 18 USB_PP10
AFTP8209 1 AUD_SENSE_PORT_C 26 AUD_PORTC_L_C 29
AFTP8210 1 AUD_SENSE_PORT_A 25 MIC1_VREF 29

3
24
23
AFTP8211 1 W IRELESS_SW # 22 AUD_SENSE_PORT_C 29
21 AUD_SENSE_PORT_A 29
20
AFTP8212 1 USB_PP9 19 W IRELESS_SW # 27
AFTP8213 1 USB_PN9 18 FILTER-130-GP
17 ALC_AGND TR8201
USB_PP9 18
AFTP8214 1 USB_PP5 16 USB_PN9 18

4
AFTP8215 1 USB_PN5 15
14 USB_PP5 18 18 USB_PN10 USB_PN10_C
AFTP8216 1 USB_PW R_EN# 13 USB_PN5 18
AFTP8217 1 USB_OC#12_13 12
11 USB_PW R_EN# 27,57
10 USB_OC#12_13 27
9 3D3V_S0 5V_S5 SB_0830
AFTP8219 1 3D3V_S0 8
7
AFTP8220 1 5V_S5 6
5
4
3
2
SB_0825 1
A 31 <Variant Name> A
1

ACES-CON30-9-GP-U
20.K0510.030
EC8202 Wistron Corporation
2

SCD1U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 82 of 97
5 4 3 2 1
A B C D E

www.rosefix.com 1D05V_VGA_S0

SC10U6D3V3MX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
X7R X7R

1
C8333 C8334 C8335 C8336 C8337 C8338

2
OPS OPS OPS OPS OPS OPS 1.05V +/- 3%
Missed 1x 22uF.
VGA1A 1 OF 16 2,200mA
4
4 PEG_TXP[0..15] PEG_RXP[0..15] 4
PCI_EXPRESS
AK16
(See NV DG) 4

PEX_IOVDD
4 PEG_TXN[0..15] PEG_RXN[0..15] 4 AK17
PEX_IOVDD
AK21
PEX_IOVDD
AK24
3D3V_VGA_S0 PEX_IOVDD
PEX_IOVDD
AK27 X7R, Under GPU. 1D05V_VGA_S0

AG11
PEX_IOVDDQ

1
10KR2J-3-GP

10KR2J-3-GP
3D3V_VGA_S0 AG12
R8303 PEX_IOVDDQ
DY AG13

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V3MX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
R8302 PEX_IOVDDQ VGA1K 11 OF 16
AG15
PEX_IOVDDQ
OPS PEX_IOVDDQ
AG16 X7R X7R

1
AG17 AA9 Y1

2
PEX_IOVDDQ C8344 C8339 C8340 C8341 C8342 C8343 NC#AA9 NC#Y1
AG18 Missed 1x 22uF. AB9 Y2

G
PEX_IOVDDQ NC#AB9 NC#Y2
AG22 W9 Y3

2
Q8301 PEX_IOVDDQ NC#W9 NC#Y3
PEX_IOVDDQ
AG23 OPS OPS OPS OPS OPS OPS Y9
NC#Y9 NC#AB3
AB3
R8301 1 DY 2 VGA_RST# AM16 AG24 AB2
27 PCIE_RST# PEX_RST# PEX_IOVDDQ NC#AB2
0R2J-2-GP AB1
VGA_PEG_CLKREQ# NC#AB1
20 PEG_CLKREQ# D S AR13 AG25 AC4

2
PEX_CLKREQ# PEX_IOVDDQ NC#AC4
AG26 AC1
PEX_IOVDDQ R8310 NC#AC1
AJ14 AC2
PEX_IOVDDQ 10KR2J-3-GP NC#AC2
AJ15 AC3
PEX_IOVDDQ NC#AC3
PEX_IOVDDQ
AJ19 OPS NC#AE3
AE3
2N7002K-1-GP AJ21 AA7 AE2

1
PEX_IOVDDQ NC#AA7 NC#AE2
84.2N702.031 AJ22 U6
OPS R8305 PEX_IOVDDQ
PEX_IOVDDQ
AJ24 X7R, Under GPU. AA6
NC#AA6
NC#U6
NC#W6
W6
20100621 NV suggestion 200R2F-L-GP AJ25 Y6
PEX_IOVDDQ NC#Y6
2nd = 84.2N702.J31 1 OPS 2PEX_TSTCLK_OUT AJ17 AJ27
PEX_TSTCLK_OUT# PEX_TSTCLK_OUT PEX_IOVDDQ
AJ18
PEX_TSTCLK_OUT# PEX_IOVDDQ
AK18
AK20
3.3V +/- 5% AF1
PEX_IOVDDQ NC#AF1
20 CLK_PCIE_VGA AR16
AR17
PEX_REFCLK PEX_IOVDDQ
AK23
AK26
240mA
20 CLK_PCIE_VGA# PEX_REFCLK# PEX_IOVDDQ
PEG_RXP0 SCD1U10V2KX-5GP C8301 PEG_C_RXP0 PEX_IOVDDQ
AL16 (See NV DG)
OPS
2 1 AL17
PEX_TX0
PEG_RXN0 SCD1U10V2KX-5GP OPS
2 1 C8302 PEG_C_RXN0 AM17
PEX_TX0#
PEX_SVDD_3V3 R8319 R8318 NC#W3
W3
PEG_TXP0 AP17 2 R8319 1 3D3V_VGA_S0 W1
PEX_RX0 NC#W1
PEG_TXN0 AN17
PEX_RX0# OPS 0R2J-2-GP NC#W2
W2
N12P-GE Sutff DY NC#Y5
Y5
PEG_RXP1 SCD1U10V2KX-5GP OPS
2 1 C8303 PEG_C_RXP1 AM18 AG19 2 R8318 1 1D05V_VGA_S0
PEG_RXN1 SCD1U10V2KX-5GP C8304 PEG_C_RXN1 PEX_TX1 PEX_SVDD_3V3 0R2J-2-GP
OPS
2 1 AM19
PEX_TX1# NC#F7
F7 DY
N12M Sutff DY

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
PEG_TXP1 AN19 V4
PEG_TXN1 PEX_RX1 NC#V4
AP19 X7R W4

1
PEX_RX1# NC#W4
SB_0729 NC#AE1
AE1
PEG_RXP2 SCD1U10V2KX-5GP OPS
2 1 C8305 PEG_C_RXP2 AL19 A2 C8345 C8346
PEG_RXN2 SCD1U10V2KX-5GP C8306 PEG_C_RXN2 PEX_TX2 NC#A2
OPS
2 1 AK19 A7
3.3V +/- 5%

2
PEX_TX2# NC#A7 N12P-GE-A1-GP
NC#AA4
AA4 OPS OPS
3 3
PEG_TXP2
PEG_TXN2
AR19
AR20
PEX_RX2 NC#AB4
AB4
AB7
120mA OPS
PEX_RX2# NC#AB7
PEG_RXP3 SCD1U10V2KX-5GP C8308 PEG_C_RXP3 NC#AC5
AC5 (See NV DG)
OPS
2 1 AL20
PEX_TX3 NC#AD6
AD6
PEG_RXN3 SCD1U10V2KX-5GP OPS
2 1 C8307 PEG_C_RXN3 AM20 AF6
PEX_TX3# NC#AF6 3D3V_VGA_S0
AG6
PEG_TXP3 AP20
PEX_RX3
NC#AG6
NC#AJ5
AJ5 X7R, Under GPU.
PEG_TXN3 AN20 AK15 VGA1J 10 OF 16
PEX_RX3# NC#AK15
AL7
PEG_RXP4 SCD1U10V2KX-5GP C8309 PEG_C_RXP4 NC#AL7
OPS
2 1 AM21
PEX_TX4 NC#B7
B7 P9
NC#P9 NC#N1
N1
PEG_RXN4 SCD1U10V2KX-5GP OPS
2 1 C8310 PEG_C_RXN4 AM22 C7 STRAP4 R9 P4
PEX_TX4# NC#C7 NC#R9 NC#P4
D5 T9 P1

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
PEG_TXP4 NC#D5 NC#T9 NC#P1
AN22 D6 U9 P2

SC1U10V2KX-1GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
PEG_TXN4 PEX_RX4 NC#D6 STRAP3 NC#U9 NC#P2
AP22
PEX_RX4# NC#D7
D7 X7R X7R X7R NC#P3
P3

1
NC#E5
E5 VGA:N12P-GV_N12M-GS NC#T3
T3
PEG_RXP5 SCD1U10V2KX-5GP OPS
2 1 C8311 PEG_C_RXP5 AL22 E7 NV_PGOOD1 2 C8350 C8347 C8348 C8349 C8351 T2
PEG_RXN5 SCD1U10V2KX-5GP C8312 PEG_C_RXN5 PEX_TX5 NC#E7 R8312 NC#T2
OPS
2 1 AK22 F4 T1

2
PEX_TX5# NC#F4 NC#T1

2
G5 10KR2F-2-GP OPS OPS OPS OPS OPS U4
PEG_TXP5 NC#G5 R8311 NC#U4
AR22
PEX_RX5 NC#H32
H32 VGA:N12P-GV_N12M-GS NC#U1
U1
PEG_TXN5 AR23 P6 MULTI_STRAP_REF2_GND1 2 10KR2J-3-GP U2
PEX_RX5# NC#P6 R8313 NC#U2
NC#U7
U7 OPS U5
NC#U5 NC#U3
U3
PEG_RXP6 SCD1U10V2KX-5GP OPS
2 1 C8313 PEG_C_RXP6 AL23 V6 40K2R2F-GP R6

1
PEG_RXN6 SCD1U10V2KX-5GP C8314 PEG_C_RXN6 PEX_TX6 NC#V6 NC#R6
OPS
2 1 AM23 Y4 20100702_NV T5 T6
PEX_TX6# NC#Y4 NC#T5 NC#T6
N6
PEG_TXP6 NC#N6
AP23 J10
PEG_TXN6 AN23
PEX_RX6
PEX_RX6#
VDD33
VDD33
J11 X7R, Under GPU.
J12 N5
PEG_RXP7 SCD1U10V2KX-5GP C8316 PEG_C_RXP7 VDD33 NC#N5
OPS
2 1 AM24
PEX_TX7 VDD33
J13
PEG_RXN7 SCD1U10V2KX-5GP OPS
2 1 C8315 PEG_C_RXN7 AM25 J9
PEX_TX7# VDD33
PEG_TXP7 AN25 LA46: Test point
PEG_TXN7 PEX_RX7 LKN3: connect to VGA core PWR IC
AP25
PEX_RX7#
P5
PEG_RXP8 SCD1U10V2KX-5GP C8318 PEG_C_RXP8 NC#P5
OPS
2 1 AL25
PEX_TX8 NC#N3
N3
PEG_RXN8 SCD1U10V2KX-5GP OPS
2 1 C8317 PEG_C_RXN8 AK25 L3
PEX_TX8# VGA_CORE NC#L3
N2
PEG_TXP8 NC#N2
AR25
PEX_RX8 DY
PEG_TXN8 AR26 R8308 1 2 0R2J-2-GP
PEX_RX8#
PEG_RXP9 SCD1U10V2KX-5GP OPS
2 1 C8320 PEG_C_RXP9 AL26 D35 R4
PEG_RXN9 SCD1U10V2KX-5GP C8319 PEG_C_RXN9 PEX_TX9 VDD_SENSE#D35 VGACORE_VDD_SENSE 92 NC#R4
OPS
2 1 AM26
PEX_TX9# VDD_SENSE#P7
P7
VGACORE_VDD_SENSE 92 NC#T4
T4
AD20 N4
PEG_TXP9 VDD_SENSE#AD20 VGACORE_VDD_SENSE 92 NC#N4
AP26 AD19
PEG_TXN9 PEX_RX9 GND_SENSE#AD19 VGACORE_GND_SENSE 92
AN26 R7
PEX_RX9# GND_SENSE#R7 VGACORE_GND_SENSE 92
PEG_RXP10 SCD1U10V2KX-5GP OPS
2 1 C8321 PEG_C_RXP10 AM27
GND_SENSE#E35
E35
VGACORE_GND_SENSE 92 1.05V +/- 3% N12P-GE-A1-GP
OPS

1
PEX_TX10
PEG_RXN10 SCD1U10V2KX-5GP OPS
2 1 C8322 PEG_C_RXN10 AM28
PEX_TX10#
DY
120mA
PEG_TXP10
PEG_TXN10
AN28
PEX_RX10
R8309 (See NV DG)
AP28 0R2J-2-GP
2 PEX_RX10# 1D05V_VGA_S0 2

2
PEG_RXP11 SCD1U10V2KX-5GP OPS
2 1 C8323 PEG_C_RXP11 AL28
PEX_TX11 L8301
PEG_RXN11 SCD1U10V2KX-5GP OPS
2 1 C8324 PEG_C_RXN11 AK28
PEX_TX11# VCC1R05VIDEO_PEX_PLLVDD 2
AG14 1
PEG_TXP11 PEX_PLLVDD
AR28

SC1U10V2KX-1GP
SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
PEG_TXN11 PEX_RX11 BLM11A121S-GP
AR29
PEX_RX11# CHIP BEAD BLM18AG121SN1D
X7R

1
PEG_RXP12 SCD1U10V2KX-5GP OPS
2 1 C8325 PEG_C_RXP12 AK29 OPS
PEG_RXN12 SCD1U10V2KX-5GP C8326 PEG_C_RXN12 PEX_TX12 C8352 C8353 C8354
OPS
2 1 AL29
PEX_TX12# 3D3V_VGA_S0

2
PEG_TXP12 AP29 OPS OPS OPS
PEG_TXN12 PEX_RX12
AN29
PEX_RX12#
PEG_RXP13 SCD1U10V2KX-5GP OPS
2 1 C8328 PEG_C_RXP13 AM29
PEG_RXN13 SCD1U10V2KX-5GP C8327 PEG_C_RXN13 PEX_TX13
OPS
2 1 AM30
PEX_TX13#

1
PEG_TXP13 AN31 VGA STRAP3:DY
PEG_TXN13 PEX_RX13 R8314 R8316
AP31
PEX_RX13# X7R, Under GPU. 45K3R2F-L-GP 34K8R2F-1-GP
PEG_RXP14 SCD1U10V2KX-5GP OPS
2 1 C8330 PEG_C_RXP14 AM31 VGA STRAP4:DY

2
PEG_RXN14 SCD1U10V2KX-5GP C8329 PEG_C_RXN14 PEX_TX14 STRAP3
OPS
2 1 AM32
PEX_TX14# STRAP4
PEG_TXP14 AR31 AG20
PEG_TXN14 PEX_RX14 NC#AG20 R8304
AR32
PEX_RX14#

1
AG21 PEX_TERMP
1 2 2K49R2F-GP
PEG_RXP15 SCD1U10V2KX-5GP C8332 PEG_C_RXP15 PEX_TERMP R8315 R8317
OPS
2 1 AN32
PEX_TX15 OPS
PEG_RXN15 SCD1U10V2KX-5GP OPS
2 1 C8331 PEG_C_RXN15 AP32 5K1R2F-2-GP 20KR2F-L-GP
PEX_TX15#
VGA STRAP3:N12P-GV_N12M-GS VGA STRAP4:Ctrl
PEG_TXP15 AR34 R8306

2
PEG_TXN15 PEX_RX15
AP34 AP35 TESTMODE1 2 10KR2J-3-GP
PEX_RX15# TESTMODE
OPS
N12P-GE-A1-GP
71.0N12P.B0U
OPS
20100702_NV

dGPU reset
R8307 1 DY 2 VGA_RST#
5,11,18,27,31,36,65,66,71,97 PLT_RST#
0R2J-2-GP

1 1
SB_0826
OPS
U8301 3D3V_S0
18 DGPU_HOLD_RST# 1
B
5
PLT_RST# VCC
2
A VGA_RST#
4
Y
3
GND
74LVC1G08GW-1-GP
55.4KZ01.M01G
73.01G08.L04
2ND = 73.7SZ08.DAH
Wistron Corporation
20100621 NV suggestion 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
N12P-GE(1/6): PEG I/F
Size Document Number Rev
D -1
LA470
Date: Thursday, December 16, 2010 Sheet 83 of 97
A B C D E

www.vinafix.vn
A B C D E

www.rosefix.com VGA1G
LVDS Interface
IFPAB
7 OF 16
IFPCDE_PLLVDD_PWR

IFPC_RSET_AK7
AJ9

AK7
VGA1H

IFPC_PLLVDD

IFPC_RSET
IFPC
8 OF 16

AN3

SCD1U10V2KX-5GP

1
IFPC_AUX_I2CW_SDA#
1.05V +/- 3% X7R AP2

1
R8402 IFPC_AUX_I2CW_SCL
AL8
IFPA_TXD0# C8402 1KR2F-3-GP
220mA IFPA_TXD0
AM8
DY AR2

2
IFPC_L3#
(See NV DG) DY AP1

2
IFPC_L3
1D05V_VGA_S0 AM9
IFPA_TXD1# IFPC_IOVDD_PWR
AM10 AM4
IFPA_TXD1 IFPC_L2#
L8401 AM3
IFPC_L2
4 4
1 2 IFPAB_PLLVDD AK9 AL10 AM5
IFPAB_PLLVDD IFPA_TXD2# IFPC_L1#
DY IFPA_TXD2
AK10
IFPC_L1
AL5
BLM11A121S-GP 1 2 IFPAB_RSET AJ11 AJ8

SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
CHIP BEAD BLM18AG121SN1D 1KR2F-3-GP IFPAB_RSET IFPC_IOVDD
AM6

1
R8401 IFPC_L0#
DY AL11 AM7
1

1
IFPA_TXD3# IFPC_L0
AK11
X7R, Under GPU.

1
C8401 C8403 R8411 IFPA_TXD3
DG requires X7R for
10KR2J-3-GP
2

1uF and 4.7uF as well. DY 2 DY OPS AM12 R8410

2
IFPA_TXC# 10KR2J-3-GP
AM11 K2
IFPA_TXC GPIO1
3.3V +/- 5% Missed 1x 0.1uF OPS

2
N12P-GE-A1-GP
220mA AP8 71.0N12P.B0U
IFPB_TXD4#
(See NV DG) IFPB_TXD4
AN8 OPS

1D8V_VGA_S0 180ohm@100MHz ESR=0.15 AG9 AN10

1
L8402
2 IFPAB_IOVDD AG10
IFPA_IOVDD

IFPB_IOVDD
IFPB_TXD5#
IFPB_TXD5
AP10
HDMI Interface
BLM18PG181SN1D-GP AR10
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP

IFPB_TXD6#
DY Missed 1x 0.1uF AR11
SC1U6D3V2KX-GP

1
IFPB_TXD6
DG requires X7R for X7R
1

1uF and 4.7uF as well. C8404 C8405 C8406 R8408 AP11


10KR2J-3-GP IFPB_TXD7#
AN11
2

IFPB_TXD7
DY DY DY 2 OPS
AN13
IFPB_TXC#
AP13
IFPB_TXC VGA1E 5 OF 16
IFPCDE_PLLVDD_PWR IFPD

AC6
X7R, Under GPU. IFPD_PLLVDD
K1 IFPD_RSET AB6
GPIO0 IFPD_RSET
X7R IFPD_AUX_I2CX_SDA#
AN4
AP4

2
C8407 IFPD_AUX_I2CX_SCL
3 3
R8405

SCD1U10V2KX-5GP
N12P-GE-A1-GP DY 1KR2F-3-GP AR4

2
IFPD_L3#
71.0N12P.B0U DY AR5
OPS Under GPU. IFPD_L3

1
AP5
IFPD_L2#
AN5
IFPD_L2
IFPD_IOVDD_PWR AN7
IFPD_L1#
AP7
IFPD_L1
AK8
IFPD_IOVDD
AR7
1.05V +/- 3% IFPD_L0#
1.05V +/- 3% IFPD_L0
AR8
285mA

1
285mA
(See NV DG)
(See NV DG) 1D05V_VGA_S0
R8412
10KR2J-3-GP GPIO19
L7
1D05V_VGA_S0 IFPD_IOVDD_PWR
OPS

2
IFPC_IOVDD_PWR
N12P-GE-A1-GP
220ohm@100MHz ESR=0.05 71.0N12P.B0U
220ohm@100MHz ESR=0.05 L8404
OPS
L8403
1 2
1 2
MPZ1608S221AT-GP
MPZ1608S221AT-GP DY
SC1U10V2KX-1GP

SC1U10V2KX-1GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

DY
X7R X7R X7R X7R
1

C8408 C8409 C8410 C8411 C8412 C8413 C8414 C8415


2

DY DY DY DY DY DY DY DY

VGA1I 9 OF 16
IFPEF
X7R, Under GPU.
2 X7R, Under GPU. 2

AD4
IFPCDE_PLLVDD_PWR IFPE_AUX_I2CY_SDA#
AE4
IFPE_AUX_I2CY_SCL

AE5
3.3V +/- 5% 1.05V +/- 3% AJ6
IFPE_L3#
AE6
IFPEF_PLLVDD IFPE_L3
440mA (220mA each, max 2 links) 285mA IFPF_REST_AL1 AL1 AF5

SCD1U10V2KX-5GP
IFPEF_RSET IFPE_L2#
(See NV DG) (See NV DG) IFPE_L2
AF4
3D3V_VGA_S0 1D05V_VGA_S0 X7R

1
IFPCDE_PLLVDD_PWR IFPE_IOVDD_PWR AG4

1
C8416 IFPE_L1#
220ohm@100MHz ESR=0.05 IFPE_L1
AH4
300ohm@100MHz ESR=0.25

2
L8406
DY R8406 AH5
L8405 IFPE_L0#
1 2 1KR2F-3-GP AH6
1 2 Under GPU. DY
IFPE_L0

2
MPZ1608S221AT-GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

MPZ1608S331A-GP DY L1
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP

IFPE_IOVDD_PWR GPIO15
DY X7R X7R
1

1
1

DG requires X7R for C8419 C8420 C8421 C8422


C8417 C8418 R8409
2

1uF and 4.7uF as well. 10KR2J-3-GP DY DY DY DY AE7 AF2


2

IFPE_IOVDD IFPF_AUX_I2CZ_SDA#
DY DY OPS AF3
2

IFPF_AUX_I2CZ_SCL
AD7
IFPF_IOVDD
AH3
IFPF_L3#
AH2
IFPF_L3
1

AH1
IFPF_L2#
AJ1
X7R, Under GPU. R8407 IFPF_L2
10KR2J-3-GP AJ2
IFPF_L1#
OPS AJ3
2

IFPF_L1
AL3
IFPF_L0#
AL2
IFPF_L0
1 1

K6
GPIO21

N12P-GE-A1-GP
71.0N12P.B0U
<Core Design>
OPS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
N12P-Q1/Q3 (2/6): DIGITAL OUT
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 84 of 97
A B C D E
A B C D E

www.rosefix.com
88,89 FBA_D[63..0]

FBA_D0 L32
VGA1B
FBA
2 OF 16

AA27
EDP 10A
DC tolerance +/- 75mV
AC tolerance +/- 50mV < 100MHz
1D5V_VGA_S0

90,91 FBB_D[63..0] FBB_D0


FBB_D1
FBB_D2
B13
D13
A13
VGA1C

FBB_D0
FBB_D1
FBB
3 OF 16

FBVDDQ
FBVDDQ
N27
P27
R27
1D5V_VGA_S0

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V3KX-2GP

SC1U6D3V3KX-2GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
FBA_D1 FBA_D0 FBVDDQ FBB_D3 FBB_D2 FBVDDQ
N33 AA29 A14 T27
FBA_D2 FBA_D1 FBVDDQ FBB_D4 FBB_D3 FBVDDQ
L33
FBA_D2 FBVDDQ
AA31 X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R C16
FBB_D4 FBVDDQ
U27

1
FBA_D3 N34 AB27 FBB_D5 B16 U29
FBA_D4 FBA_D3 FBVDDQ C8501 C8502 C8503 C8504 C8505 C8506 C8507 C8512 C8508 C8509 C8510 C8511 FBB_D6 FBB_D5 FBVDDQ
N35 AB29 A17 V27
FBA_D5 FBA_D4 FBVDDQ FBB_D7 FBB_D6 FBVDDQ
P35 AC27 OPS OPS OPS D16 V29

2
FBA_D6 FBA_D5 FBVDDQ FBB_D8 FBB_D7 FBVDDQ
P33
FBA_D6 FBVDDQ
AD27 OPS OPS OPS OPS OPS OPS OPS OPS OPS C13
FBB_D8 FBVDDQ
V34
FBA_D7 P34 AE27 FBB_D9 B11 W27
FBA_D8 FBA_D7 FBVDDQ FBB_D10 FBB_D9 FBVDDQ
K35 AJ28 C11 Y27
FBA_D9 FBA_D8 FBVDDQ FBB_D11 FBB_D10 FBVDDQ
K33 B18 A11
FBA_D10 FBA_D9 FBVDDQ FBB_D12 FBB_D11
K34 E21 C10
FBA_D11 FBA_D10 FBVDDQ FBB_D13 FBB_D12
H33 G17 C8
FBA_D12 FBA_D11 FBVDDQ FBB_D14 FBB_D13
G34 G18 B8
4 FBA_D13 FBA_D12 FBVDDQ FBB_D15 FBB_D14 4
G33 G22 A8
FBA_D14 E34
FBA_D13
FBA_D14
FBVDDQ
FBVDDQ
G8 X7R, Under GPU. X7R, Near GPU. FBB_D16 E8
FBB_D15
FBB_D16
FBA_D15 E33 G9 FBB_D17 F8
FBA_D16 FBA_D15 FBVDDQ FBB_D18 FBB_D17
G31 H29 F10
FBA_D17 FBA_D16 FBVDDQ FBB_D19 FBB_D18
F30 J14 F9
FBA_D18 FBA_D17 FBVDDQ FBB_D20 FBB_D19
G30 J15 F12
FBA_D19 FBA_D18 FBVDDQ FBB_D21 FBB_D20
G32 J16 D8
FBA_D20 FBA_D19 FBVDDQ FBB_D22 FBB_D21
K30 J17 D11
FBA_D21 FBA_D20 FBVDDQ FBB_D23 FBB_D22
K32 J20 E11
FBA_D22 FBA_D21 FBVDDQ FBB_D24 FBB_D23
H30 J21 D12
FBA_D23 FBA_D22 FBVDDQ FBB_D25 FBB_D24
K31 J22 E13
FBA_D24 FBA_D23 FBVDDQ FBB_D26 FBB_D25
L31 J23 F13
FBA_D25 FBA_D24 FBVDDQ FBB_D27 FBB_D26
L30 J24 F14
FBA_D26 FBA_D25 FBVDDQ FBB_D28 FBB_D27
M32 J29 F15
FBA_D27 FBA_D26 FBVDDQ FBB_D29 FBB_D28
N30 E16
FBA_D28 FBA_D27 FBB_D30 FBB_D29
M30 F16
FBA_D29 FBA_D28 FBB_D31 FBB_D30
P31 F17
FBA_D30 FBA_D29 FBB_D32 FBB_D31
R32 D29
FBA_D31 FBA_D30 FBB_D33 FBB_D32
R30 F27
FBA_D32 FBA_D31 FBB_D34 FBB_D33
AG30 F28
FBA_D33 FBA_D32 FBB_D35 FBB_D34
AG32 E28
FBA_D34 FBA_D33 FBB_D36 FBB_D35
AH31 D26
FBA_D35 FBA_D34 FBB_D37 FBB_D36
AF31 F25
FBA_D36 FBA_D35 FBB_D38 FBB_D37
AF30 D24
FBA_D37 FBA_D36 FBB_D39 FBB_D38
AE30 E25
FBA_D38 FBA_D37 FBB_D40 FBB_D39
AC32 E32
FBA_D39 FBA_D38 FBB_D41 FBB_D40
AD30 F32
FBA_D40 FBA_D39 FBB_D42 FBB_D41
AN33 D33
FBA_D41 FBA_D40 FBB_D43 FBB_D42
AL31 E31
FBA_D42 FBA_D41 FBB_D44 FBB_D43
AM33 C33
FBA_D43 FBA_D42 FBB_D45 FBB_D44
AL33 F29
FBA_D44 FBA_D43 FBB_D46 FBB_D45
AK30 D30
FBA_D45 FBA_D44 FBB_D47 FBB_D46
AK32 E29
FBA_D46 FBA_D45 FBB_D48 FBB_D47
AJ30 B29
FBA_D47 FBA_D46 FBB_D49 FBB_D48
AH30 C31
FBA_D48 FBA_D47 FBB_D50 FBB_D49
AH33
FBA_D48
C29
FBB_D50 20100702_Change to Mode E
FBA_D49 AH35 FBB_D51 B31
FBA_D50 FBA_D49 FBB_D52 FBB_D51
AH34
FBA_D50 20100702_Change to Mode E C32
FBB_D52 FBB_CMD0
F18
FBB_CMD0 90
FBA_D51 AH32 FBB_D53 B32 E19 FBB_CMD1 1 TP8506 TPAD14-GP
FBA_D52 FBA_D51 FBB_D54 FBB_D53 FBB_CMD1
AJ33 U30 B35 D18
FBA_D53 FBA_D52 FBA_CMD0 FBA_CMD0 88 FBB_D54 FBB_CMD2 FBB_CMD2 90
AL35 V30 FBA_CMD1 1 TP8504 TPAD14-GP FBB_D55 B34 C17
FBA_D54 FBA_D53 FBA_CMD1 FBB_D56 FBB_D55 FBB_CMD3 FBB_CMD3 90
AM34 U31 A29 F19
FBA_D55 FBA_D54 FBA_CMD2 FBA_CMD2 88 FBB_D57 FBB_D56 FBB_CMD4 FBB_CMD4 90,91
AM35 V32 B28 C19
FBA_D56 FBA_D55 FBA_CMD3 FBA_CMD3 88 FBB_D58 FBB_D57 FBB_CMD5 FBB_CMD5 90,91
AF33 T35 A28 B17
FBA_D57 FBA_D56 FBA_CMD4 FBA_CMD4 88,89 FBB_D59 FBB_D58 FBB_CMD6 FBB_CMD6 90,91
AE32 U33 C28 E20
FBA_D58 FBA_D57 FBA_CMD5 FBA_CMD5 88,89 FBB_D60 FBB_D59 FBB_CMD7 FBB_CMD7 90,91
AF34 W32 C26 B19
FBA_D59 FBA_D58 FBA_CMD6 FBA_CMD6 88,89 FBB_D61 FBB_D60 FBB_CMD8 FBB_CMD8 90,91
AE35 W33 D25 D20
FBA_D60 FBA_D59 FBA_CMD7 FBA_CMD7 88,89 FBB_D62 FBB_D61 FBB_CMD9 FBB_CMD9 90,91
AE34 W31 B25 A19
FBA_D61 FBA_D60 FBA_CMD8 FBA_CMD8 88,89 FBB_D63 FBB_D62 FBB_CMD10 FBB_CMD10 90,91
AE33 W34 A25 D19
FBA_D62 FBA_D61 FBA_CMD9 FBA_CMD9 88,89 FBB_D63 FBB_CMD11 FBB_CMD11 90,91
AB32 U34 C20
FBA_D63 FBA_D62 FBA_CMD10 FBA_CMD10 88,89 FBB_CMD12 FBB_CMD12 90
AC35 U35 F20
FBA_D63 FBA_CMD11 FBA_CMD11 88,89 FBB_CMD13 FBB_CMD13 90,91
U32 A16 B20
FBA_CMD12 FBA_CMD12 88 90 FBB_DQM0 FBB_DQM0 FBB_CMD14 FBB_CMD14 91
T34 D10 G21
FBA_CMD13 FBA_CMD13 88,89 90 FBB_DQM1 FBB_DQM1 FBB_CMD15 FBB_CMD15 90,91
P32 T33 F11 F22
88 FBA_DQM0 FBA_DQM0 FBA_CMD14 FBA_CMD14 89 90 FBB_DQM2 FBB_DQM2 FBB_CMD16 FBB_CMD16 91 TP8505
H34 W30 D15 F24 FBB_CMD17 1 TPAD14-GP
88 FBA_DQM1 FBA_DQM1 FBA_CMD15 FBA_CMD15 88,89 90 FBB_DQM3 FBB_DQM3 FBB_CMD17
J30 AB30 D27 F23
88 FBA_DQM2 FBA_DQM2 FBA_CMD16 FBA_CMD16 89 TP8503 91 FBB_DQM4 FBB_DQM4 FBB_CMD18 FBB_CMD18 91
P30 AA30 FBA_CMD17 1 TPAD14-GP D34 C25
88 FBA_DQM3 FBA_DQM3 FBA_CMD17 91 FBB_DQM5 FBB_DQM5 FBB_CMD19 FBB_CMD19 91
AF32 AB31 A34 C23
3 89 FBA_DQM4 FBA_DQM4 FBA_CMD18 FBA_CMD18 89 91 FBB_DQM6 FBB_DQM6 FBB_CMD20 FBB_CMD20 90,91 3
AL32 AA32 D28 F21
89 FBA_DQM5 FBA_DQM5 FBA_CMD19 FBA_CMD19 89 91 FBB_DQM7 FBB_DQM7 FBB_CMD21 FBB_CMD21 90,91
AL34 AB33 E22
89 FBA_DQM6 FBA_DQM6 FBA_CMD20 FBA_CMD20 88,89 FBB_CMD22 FBB_CMD22 90,91
AF35 Y32 D21
89 FBA_DQM7 FBA_DQM7 FBA_CMD21 FBA_CMD21 88,89 FBB_CMD23 FBB_CMD23 90,91
Y33 C14 A23
FBA_CMD22 FBA_CMD22 88,89 90 FBB_DQS_WP0 FBB_DQS_WP0 FBB_CMD24 FBB_CMD24 90,91
AB34 A10 D22
FBA_CMD23 FBA_CMD23 88,89 90 FBB_DQS_WP1 FBB_DQS_WP1 FBB_CMD25 FBB_CMD25 90,91
L34 AB35 E10 B23
88 FBA_DQS_WP0 FBA_DQS_WP0 FBA_CMD24 FBA_CMD24 88,89 90 FBB_DQS_WP2 FBB_DQS_WP2 FBB_CMD26 FBB_CMD26 90,91
H35 Y35 D14 C22
88 FBA_DQS_WP1 FBA_DQS_WP1 FBA_CMD25 FBA_CMD25 88,89 90 FBB_DQS_WP3 FBB_DQS_WP3 FBB_CMD27 FBB_CMD27 90,91
J32 W35 E26 B22
88 FBA_DQS_WP2 FBA_DQS_WP2 FBA_CMD26 FBA_CMD26 88,89 91 FBB_DQS_WP4 FBB_DQS_WP4 FBB_CMD28 FBB_CMD28 90,91
N31 Y34 D32 A22
88 FBA_DQS_WP3 FBA_DQS_WP3 FBA_CMD27 FBA_CMD27 88,89 91 FBB_DQS_WP5 FBB_DQS_WP5 FBB_CMD29 FBB_CMD29 90,91
AE31 Y31 A32 A20
89 FBA_DQS_WP4 FBA_DQS_WP4 FBA_CMD28 FBA_CMD28 88,89 91 FBB_DQS_WP6 FBB_DQS_WP6 FBB_CMD30 FBB_CMD30 90,91TP8502
AJ32 Y30 B26 G20 FBB_CMD31 1 TPAD14-GP
89 FBA_DQS_WP5 FBA_DQS_WP5 FBA_CMD29 FBA_CMD29 88,89 91 FBB_DQS_WP7 FBB_DQS_WP7 FBB_CMD31
AJ34 W29
89 FBA_DQS_WP6 FBA_DQS_WP6 FBA_CMD30 FBA_CMD30 88,89TP8501
AC33 Y29 FBA_CMD31 1 TPAD14-GP
89 FBA_DQS_WP7 FBA_DQS_WP7 FBA_CMD31
B14
90 FBB_DQS_RN0 FBB_DQS_RN0
T32 B10
FBA_CLK0 FBA_CLK0 88 90 FBB_DQS_RN1 FBB_DQS_RN1
L35 T31 D9 E17
88 FBA_DQS_RN0 FBA_DQS_RN0 FBA_CLK0# -FBA_CLK0 88 90 FBB_DQS_RN2 FBB_DQS_RN2 FBB_CLK0 FBB_CLK0 90
G35 AC31 E14 D17
88 FBA_DQS_RN1 FBA_DQS_RN1 FBA_CLK1 FBA_CLK1 89 90 FBB_DQS_RN3 FBB_DQS_RN3 FBB_CLK0# -FBB_CLK0 90
H31 AC30 F26 D23
88 FBA_DQS_RN2 FBA_DQS_RN2 FBA_CLK1# -FBA_CLK1 89 91 FBB_DQS_RN4 FBB_DQS_RN4 FBB_CLK1 FBB_CLK1 91
N32 D31 E23
88 FBA_DQS_RN3 FBA_DQS_RN3 91 FBB_DQS_RN5 FBB_DQS_RN5 FBB_CLK1# -FBB_CLK1 91
AD32 A31
89 FBA_DQS_RN4 FBA_DQS_RN4 91 FBB_DQS_RN6 FBB_DQS_RN6
AJ31 A26 1D5V_VGA_S0
89 FBA_DQS_RN5 FBA_DQS_RN5 91 FBB_DQS_RN7 FBB_DQS_RN7
AJ35 1D5V_VGA_S0
89 FBA_DQS_RN6 FBA_DQS_RN6
AC34
89 FBA_DQS_RN7 FBA_DQS_RN7
P29 G14 G19 R8520 1 DY 2
FBA_WCK0 FBB_WCK0 FBB_DEBUG0 R8521 1
R29 G15 G16 DY 2 60D4R2F-GP
FBA_WCK0# R8518 1 FBB_WCK0# FBB_DEBUG1 10KR2J-3-GP
L29
FBA_WCK1 FBA_DEBUG0
T30 DY 2
1.05V +/- 3% G11
FBB_WCK1
M29 T29 R8519 1 DY 2 60D4R2F-GP G12
FBA_WCK1# FBA_DEBUG1 10KR2J-3-GP FBB_WCK1#
AG29
AH29
FBA_WCK2 200mA G27
G28
FBB_WCK2
FBA_WCK2# FBB_WCK2#
AD29
AE29
FBA_WCK3 (See NV DG) G24
G25
FBB_WCK3
FBA_WCK3# FBB_WCK3#
1D05V_VGA_S0

L8501

FB_DLLAVDD
AG27 FB_PLLVDD_16mil 1 ( ( 2 1D5V_VGA_S0
AF27
FB_PLLAVDD BLM18KG300TN1D-GP

SC10U6D3V3MX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V3KX-1GP

CHIP BEAD BLM18KG300TN1D MURATA


X7R X7R OPS R8501 OPS
1

FB_DLLAVDD
J19 1 FB_CAL_PD_VDDQ
K27 FB_CAL_PD_VDDQ 1 2
J18 C8513 C8514 C8515 C8516
FB_PLLAVDD FB_CAL_PU_GND
OPS OPS OPS OPS L27
2

FB_CAL_PU_GND 40D2R2F-GP
M27 FB_CAL_TERM_GND
FB_CAL_TERM_GND
J27
NC#J27
N12P-GE-A1-GP
71.0N12P.B0U
N12P-GE-A1-GP OPS
71.0N12P.B0U
X7R, Under GPU.

1
OPS

60D4R2F-GP

40D2R2F-GP
R8502
R8503

2
2
OPS OPS 2

FBA_CLK1 FBA_CLK0

SB_0802 FBB_CLK1 FBB_CLK0


1

SB_0802
R8504 R8505

1
162R2F-GP 162R2F-GP FBA_CMD3 FBB_CMD3
VGA:Ctrl VGA:Ctrl FBA_CMD16 FBB_CMD16 R8506 R8507
FBA_CMD20 FBB_CMD20 162R2F-GP 162R2F-GP
2

FBA_CMD0 FBB_CMD0 VGA:Ctrl VGA:Ctrl


-FBA_CLK1 -FBA_CLK0 FBA_CMD19 FBB_CMD19

2
-FBB_CLK1 -FBB_CLK0
1

1
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
FBCLK Termination place on VRAM side FBCLK Termination place on VRAM side
R8508 R8509 R8510 R8511 R8512 R8513 R8514 R8515 R8516 R8517
OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS
2

FBCLK
Termination R8504~R8507
Sutff 162 ohm
N12P 64.16205.6DL
Stuff 243 ohm 20100702_Change to Mode E
N12M-GE only 64.24305.6DL

1 1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

www.vinafix.vn
Title
N12P-Q1/Q3 (3/6): VRAM I/F
Size Document Number Rev
A1 -1
LA470
Date: Thursday, December 16, 2010 Sheet 85 of 97
A B C D E
A B C D E

3.3V +/- 5%

www.rosefix.com
120mA
(See NV DG) 1.05V +/- 3%
300ohm@100MHz ESR=0.25ohm 3D3V_VGA_S0 150mA
L8602 (See NV DG)
1D05V_VGA_S0 PLLVDD_PWR
3D3V_VGA_S0_DACA_VDD_16MIL 1 2

MMZ1608S301CTAH0-GP

SC1U10V2KX-1GP
SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
L8601

1
DY

10KR2J-3-GP
X7R 1 ( ( 2

1
R8629 C8601 C8602 C8603 BLM18KG300TN1D-GP

SC10U6D3V3MX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
3D3V_VGA_S0
OPS DY DY DY CHIP BEAD BLM18KG300TN1D MURATA

2
OPS X7R X7R X7R X7R

1
Missed 3x 0.1uF C8604 C8605 C8606 C8607 C8608
OPS OPS OPS

2
OPS OPS

3
4
VGA1N 14 OF 16
RN8601 XTAL_PLL
SRN2K2J-1-GP
4 X7R, Under GPU. OPS AE9
PLLVDD
4
AD9
VGA1D 4 OF 16 VID_PLLVDD
AF9

2
1
DACA SP_PLLVDD
AJ12 G1 VGA_CRT_DDCCLK 1 TP8609 TPAD14-GP
DACA_VDD I2CA_SCL
I2CA_SDA
G4 VGA_CRT_DDCDATA1 TP8610 TPAD14-GP X7R, Under GPU.
DACA_VREF_AK12 AK12
DACA_VREF
R8602
DACA_RSET_AK13 AK13 AM13 VGA_CRT_HSYNC 1 TP8611 TPAD14-GP
DACA_RSET DACA_HSYNC VGA_CRT_VSYNC TP8612 TPAD14-GP VIDEO_CLK_XTAL_SS N12P_XTAL_OUTBUFF
AL13 1 20 VGA_CLK_27M_SS 2 1 D2 D1
DACA_VSYNC XTAL_SSIN XTAL_OUTBUFF
DY
VGA_CRT_RED TP8613 TPAD14-GP 0R2J-2-GP
AM15 1 B1 B2
DACA_RED XTAL_IN XTAL_OUT
1

1
1

1
DY DY DY AM14 VGA_CRT_GREEN 1 TP8614 TPAD14-GP N12P-GE-A1-GP
DACA_GREEN

1
C8609 R8601 R8603 71.0N12P.B0U R8605
SCD1U10V2KX-4GP 10KR2J-3-GP 124R2F-U-GP AL14 VGA_CRT_BLUE 1 TP8615 TPAD14-GP 10KR2J-3-GP
OPS
2

DACA_BLUE R8604 OPS


Should be placed near GFX
2

10KR2J-3-GP 20PF 5% 50V +/-0.25PF 0402

2
RN8602 OPS DY

2
VGA_CRT_BLUE 1 8 R8606 1 2 1MR2J-1-GP 27MHZ_OUT
N12P-GE-A1-GP VGA_CRT_GREEN 2 7

1
71.0N12P.B0U VGA_CRT_RED 3 6
4 5
OPS R8607
SRN75J-1-GP 100R2J-2-GP
R8608
OPS X8601 OPS

2
2 1 27MHZ_IN 1 2 27MHZ_OUT_R
20 VGA_CLK_27M_NSS
DY
20100621 NV suggestion XTAL-27MHZ-65-GP-U

1
0R2J-2-GP
OPS
C8610 1st = 82.30034.501 C8611
SC15P50V2JN-2-GP SC15P50V2JN-2-GP

2
OPS OPS

Should be placed near GFX


HARMORY 27MHz
20100705 3D3V_VGA_S0
12P 30PPM
HSX530G
3
4

RN8605
SRN4K7J-8-GP
OPS
Q8601 OPS
2
1

SMBC_Therm_NV 1 6 SMBC_Therm 27,28


2 5 3D3V_VGA_S0
SMBD_Therm 27,28
3 4

DMN66D0LDW-7-GP VGA1F 6 OF 16
3 DACB RN8604 3
SMBD_Therm_NV 84.DMN66.03F
2ND = 84.27002.A3F DACB_VDD_AG7 AG7 G3 I2CB_SCL_G3 4 1
DACB_VDD I2CB_SCL I2CB_SDA_G2
G2 3 2
I2CB_SDA
AK6
DACB_VREF

1
10KR2J-3-GP
SRN2K2J-1-GP
AH7 AM1
DACB_RSET DACB_HSYNC OPS
AM2
R8616 DACB_VSYNC
OPS

2
AK4
DACB_RED
AL4
DACB_GREEN

3D3V_VGA_S0 3D3V_VGA_S0 AJ4


DACB_BLUE

20100705
3D3V_VGA_S0
OPS N12P-GE-A1-GP
210KR2J-3-GP
1

3
4

Q8602 71.0N12P.B0U
RN8606 R2813
2 13V_VGA_S0_R G
OPS
SRN2K2J-1-GP
0R2J-2-GP
OPS D PURE_HW_SHUTDOWN# 27,28,36
VGA1L 12 OF 16 R8611
2
1

MISC1 OPS -VIDEO_THERM_OVERT S


B4 E2 SMBC_Therm_NV
THERMDN I2CS_SCL
I2CS_SDA
E1 SMBD_Therm_NV
2N7002K-2-GP I2CA=>CRT, I2CC=>LVDS.
E3 GPU_LVDS_CLK 1st = 84.2N702.031
I2CC_SCL GPU_LVDS_DATA
I2CC_SDA
E4 2ND = 84.2N702.J31
OPS
B5
THERMDP OPS
RN8603
1 4
2 3

TP8601
K3 VGA_LBKLT_CTL
SRN10KJ-5-GP
1 TP8606 TPAD14-GP
TABLE
TPAD14-GP GPIO2 VGA_LCDVDD_EN TP8607 TPAD14-GP
H3 1
GPIO3
GPIO4
H2
H1
VGA_BLEN
PWRCNTL_0
1 TP8608
PWRCNTL_0
TPAD14-GP
92
VIDEO MEMORY
GPIO5 PWRCNTL_1
DY H4 PWRCNTL_1 92
1

R8619 GPIO6 PWRCNTL_2 TP8602 TPAD14-GP


H5 1
10KR2J-3-GP GPIO7 N12P_GPIO8_H6 G8601
H6 1 2 GAP-CLOSE-PWR-3-GP -VIDEO_THERM_OVERT
GPIO8 N12P_GPIO9_J7 G8602
1 2 N12P_GPIO_JTAG_TCK AP14 J7 1 2 GAP-CLOSE-PWR-3-GP -VIDEO_THERM_ALERT
TPAD14-GP
TPAD14-GP
TP8603
TP8604
1
1
N12P_JTAG_TMS
N12P_JTAG_TDI
AR14
AN14
JTAG_TCK
JTAG_TMS
GPIO9
GPIO10
K4
K5
HYNIX SAMSUNG HYNIX Samsung 3D3V_VGA_S0
TPAD14-GP TP8605 N12P_JTAG_TDO JTAG_TDI GPIO11 N12P_GPIO12_H7
1 AN16 H7
1 2 N12P_GPIO_JTAG_TRST AP16
JTAG_TDO
JTAG_TRST#
GPIO12
GPIO13
J4
J6
128Mx16 128Mx16 64Mx16 64Mx16
GPIO14
R8620
10KR2J-3-GP
GPIO16
L2 -VIDEO_THERM_OVERT 2
10KR2J-3-GP
R8621 OPS
1 3D3V_VGA_S0 0110 0111 0010 0011
OPS GPIO17
L4

1
M4 SB_0729 R8622
GPIO18
L5
-VIDEO_THERM_ALERT 1
10KR2J-3-GP
2
OPS
900MHz 72.52G63.A0U 72.42164.D0U 72.51G63.H0U 72.41164.I0U VGA STRAP0:Stuff R8630
VGA STRAP1:DY
R8632
R8634
45K3R2F-L-GP
2 GPIO20 45K3R2F-L-GP 34K8R2F-1-GP 2
VGA STRAP2:DY
L6
3D3V_VGA_S0
800MHz 72.52G63.00U 72.42164.C0U 72.51G63.C0U 72.41164.H0U

2
GPIO22 STRAP0
M6
GPIO23 STRAP1
M7

N12P-GE-A1-GP
GPIO24
ROM_SI 34.8Kohm 45.3Kohm 15Kohm 20Kohm
STRAP2

1
71.0N12P.B0U
210KR2J-3-GP

210KR2J-3-GP

PD
1

OPS
10KR2J-3-GP

VGA CORE:DY VGA CORE:N12P_GE R8631 R8633 R8635

R8623 R8627 64.34825.6DL 64.45325.6DL 64.15025.6DL 64.20025.6DL VGA STRAP0:DY 2KR2J-1-GP 34K8R2F-1-GP 30KR2F-GP
VGA STRAP2:Ctrl

2
DY VGA STRAP1:Stuff
2

R8638 R8636
PWRCNTL_0
PWRCNTL_1
210KR2J-3-GP

210KR2J-3-GP
1

VGA CORE:Stuff
VGA CORE:N12P-GV_N12M-GS
P-State PWRCNTL_0 PWRCNTL_1 VGA_CORE_PWR
P8 & P12 0 0 0.85V R8639 R8637

ES 1 0 0.90V
P0(Hot) 0 1 0.95V 3D3V_VGA_S0
LOGIC TABLE N12P-GE N12P-GV N12M-GE
P0(Cold) 1 1 1.00V
NVIDIA DEV ID: DEV ID: DEV ID:
VGA ROM_SI:DY
0xDF5 0x0DF7(ES) 0xA7A
P-State N12P-GE N12P-GV N12M-GS
1

VGA ROM_SO:N12P-GV_N12M-GS
0101 1010
2KR2F-3-GP

15KR2F-GP
10KR2F-2-GP

VGA1M 13 OF 16
NVVDD Boot MISC2 R8624 R8625 R8626
Voltage 0.95V 0.85V 0.85V J26
J25
NC#J26 ROM_CS#
C3 VGA ROM_SCLK:Stuff
R8632 DY DY 35Kohm
64.34825.6DL
2

NC#J25 ROM_SI_D3
D3
R8636 Stuff DY DY
ROM_SI
ROM_SO
C4
D4
ROM_SO_C4
ROM_SLK_D4
STRAP1 35Kohm 35Kohm
R8637 DY Stuff Stuff
ROM_SCLK
R8633 64.34825.6DL 64.34825.6DL DY
1

VGA ROM_SLCK:DY
15KR2F-GP

15KR2F-GP
10KR2F-2-GP

R8638 DY DY DY
R8639 Stuff Stuff Stuff
3D3V_VGA_S0
STRAP0
W5
W7
STRAP0
STRAP1
R8627 R8617 R8618
3D3V_VGA_S0
R8634 DY 45Kohm 15Kohm
STRAP1
V7 STRAP2
STRAP2 64.45325.6DL 64.15025.6DL
2

STRAP2
VGA ROM_SO:N12P-GE
30Kohm
1

VGA ROM_SI:Ctrl
R8628
F6 I2CH_SCL_F6 R8614 1 2 2K2R2J-2-GP
R8635 64.30025.6DL DY DY
10KR2J-3-GP I2CH_SCL
OPS
OPS G6 I2CH_SDA_G6 R8615 1 2 2K2R2J-2-GP
2

I2CH_SDA
OPS
CEC_AB5 AB5
CEC
A5
NC#A5
1 1
A4
BUFRST#
C5
STRAP_REF0_GND_N9 NC#C5
N9
STRAP_REF1_GND_M9 MULTI_STRAP_REF0_GND
M9
MULTI_STRAP_REF1_GND
AK14
GND
K9
GND
1

1
40K2R2F-GP

40K2R2F-GP

N12P-GE-A1-GP
71.0N12P.B0U
OPS
2

R8613
R8612 OPS
OPS
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

www.vinafix.vn
Title
N12P-Q1/Q3 (4/6): GPIO
Size Document Number Rev
A1 -1
LA470
Date: Thursday, December 16, 2010 Sheet 86 of 97
A B C D E
A B C D E

www.rosefix.com AA11
AA12
AA13
AA14
AA15
AA16
AA17
VGA1O

GND
GND
GND
GND
GND
GND
GND
GND
15 OF 16

GND
GND
GND
GND
GND
GND
GND
E15
E18
E24
E27
E30
E6
E9
AA18 F2
GND GND
AA19 F31
GND GND
AA2 F34
GND GND
AA20 F5
GND GND
AA21 J2
GND GND
4 VGA_CORE AA22 J31 4
GND GND
AA23 J34
GND GND
VGA_CORE AA24 J5
GND GND
AA25 L9
GND GND
AA34 M11
Under GPU VGA1P 16 OF 16 AA5
GND GND
M13
NVVDD GND GND
AB12 M15
GND GND
AB11 P21 AB14 M17
VDD VDD GND GND
AB13 P23 AB16 M19

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP
VDD VDD GND GND
AB15 P25 AB18 M2
VDD VDD GND GND
X7R X7R X7R X7R X7R X7R X7R X7R AB17 R11 AB20 M21

1
VDD VDD GND GND
AB19 R12 AB22 M23
C8701 C8702 C8703 C8704 C8705 C8706 C8707 C8708 VDD VDD GND GND
AB21 R13 AB24 M25
VDD VDD GND GND
AB23 R14 AC9 M31

2
VDD VDD GND GND
AB25 R15 AD11 M34
VDD VDD GND GND
OPS OPS OPS OPS OPS OPS OPS OPS AC11
VDD VDD
R16 AD13
GND GND
M5
AC12 R17 AD15 N11
VDD VDD GND GND
AC13 R18 AD17 N12
VDD VDD GND GND
AC14 R19 AD2 N13
VDD VDD GND GND
AC15 R20 AD21 N14
VDD VDD GND GND
AC16 R21 AD23 N15
VDD VDD GND GND
AC17 R22 AD25 N16
VDD VDD GND GND
AC18 R23 AD31 N17
Under GPU AC19
VDD VDD
R24 AD34
GND GND
N18
VDD VDD GND GND
AC20 R25 AD5 N19
VDD VDD GND GND
AC21 T12 AE11 N20
VDD VDD GND GND
AC22 T14 AE12 N21

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U6D3V3KX-1GP
SCD022U25V2KX-GP

SCD022U25V2KX-GP

SCD022U25V2KX-GP

SCD22U10V3KX-2GP

SCD22U10V3KX-2GP

SCD22U10V3KX-2GP
SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP
VDD VDD GND GND
AC23 T16 AE13 N22
VDD VDD GND GND
X7R X7R X7R X7R X7R X7R X7R X7R X7R AC24 T18 AE14 N23

1
VDD VDD GND GND
AC25 T20 AE15 N24
C8709 C8710 C8711 C8712 C8713 C8714 C8715 C8716 C8717 C8718 C8719 C8720 VDD VDD GND GND
AD12 T22 AE16 N25
VDD VDD GND GND
AD14 T24 AE17 P12

2
VDD VDD GND GND
OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS AD16
VDD VDD
V11 AE18
GND GND
P14
AD18 V13 AE19 P16
VDD VDD GND GND
AD22 V15 AE20 P18
VDD VDD GND GND
AD24 V17 AE21 P20
VDD VDD GND GND
L11 V19 AE22 P22
VDD VDD GND GND
L12 V21 AE23 P24
VDD VDD GND GND
L13 V23 AE24 R2
VDD VDD GND GND
L14 V25 AE25 R31
NEAR GPU L15
VDD VDD
W11 AG2
GND GND
R34
VDD VDD GND GND
3 L16 W12 AG31 R5 3
VDD VDD GND GND
L17 W13 AG34 T11
VDD VDD GND GND
L18 W14 AG5 T13

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC47U6D3V5MX-1-GP
SC4D7U6D3V3KX-GP
VDD VDD GND GND
L19 W15 AK2 T15
VDD VDD GND GND
L20 W16 AK31 T17

1
VDD VDD GND GND
L21 W17 AK34 T19
C8721 C8722 C8723 C8724 C8725 VDD VDD GND GND
L22 W18 AK5 T21
VDD VDD GND GND
L23 W19 AL12 T23

2
VDD VDD GND GND
OPS OPS OPS OPS OPS L24
VDD VDD
W20 AL15
GND GND
T25
L25 W21 AL18 U11
VDD VDD GND GND
M12 W22 AL21 U12
VDD VDD GND GND
M14 W23 AL24 U13
VDD VDD GND GND
M16 W24 AL27 U14
VDD VDD GND GND
M18 W25 AL30 U15
VDD VDD GND GND
M20 Y12 AL6 U16
VDD VDD GND GND
M22 Y14 AL9 U17
VDD VDD GND GND
M24 Y16 AN2 U18
VDD VDD GND GND
P11 Y18 AN34 U19
VDD VDD GND GND
P13 Y20 AP12 U20
VDD VDD GND GND
P15 Y22 AP15 U21
VDD VDD GND GND
P17 Y24 AP18 U22
VDD VDD GND GND
P19 AP21 U23
VDD GND GND
AP24 U24
N12P-GE-A1-GP GND GND
AP27 U25
GND GND
71.0N12P.B0U AP3
GND GND
V12
AP30 V14
OPS GND GND
AP33 V16
GND GND
AP6 V18
GND GND
AP9 V2
GND GND
B12 V20
GND GND
B15 V22
GND GND
B21 V24
GND GND
B24 V31
GND GND
B27 V5
GND GND
B3 V9
GND GND
B30 Y11
GND GND
B33 Y13
GND GND
B6 Y15
GND GND
B9 Y17
GND GND
C2 Y19
GND GND
C34 Y21
2 GND GND 2
E12 Y23
GND GND
Y25
GND
N12P-GE-A1-GP
71.0N12P.B0U
OPS

1 1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
N12P-Q1/Q3 (5/6): POWER
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 87 of 97
A B C D E
A B C D E

1D5V_VGA_S0

www.rosefix.com K8
K2
N1
R9
B2
D9
VRAM1

VDD
VDD
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
E3
F7
F2
F8
H3
H8
FBA_D11
FBA_D13
FBA_D9
FBA_D12
FBA_D8
FBA_D15
FBA_D[63..0] 85,89
1D5V_VGA_S0

K8
K2
N1
R9
B2
D9
G7
VRAM2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
E3
F7
F2
F8
H3
H8
G2
FBA_D23
FBA_D22
FBA_D21
FBA_D20
FBA_D16
FBA_D17
FBA_D18
FBA_D[63..0] 85,89

G7 G2 FBA_D10 R1 H7 FBA_D19
VDD DQL6 FBA_D14 VDD DQL7
R1 H7 N9
VDD DQL7 VDD FBA_D26
N9 D7
VDD FBA_D3 DQU0 FBA_D25
D7 A8 C3
DQU0 FBA_D5 VDDQ DQU1 FBA_D31
A8 C3 A1 C8
VDDQ DQU1 FBA_D0 VDDQ DQU2 FBA_D28
4 A1 C8 C1 C2 4
VDDQ DQU2 FBA_D6 VDDQ DQU3 FBA_D29
C1 C2 C9 A7
VDDQ DQU3 FBA_D2 VDDQ DQU4 FBA_D27
C9 A7 D2 A2
VDDQ DQU4 FBA_D7 VDDQ DQU5 FBA_D30
D2 A2 E9 B8
VDDQ DQU5 FBA_D1 VDDQ DQU6 FBA_D24
E9 B8 F1 A3
VDDQ DQU6 FBA_D4 VDDQ DQU7
F1 A3 H9
VDDQ DQU7 VDDQ
H9 H2 C7 FBA_DQS_WP3 85
VDDQ VDDQ DQSU
H2 C7 FBA_DQS_WP0 85 B7 FBA_DQS_RN3 85
VDDQ DQSU FBA_VREF_0 DQSU#
B7 FBA_DQS_RN0 85 H1
FBA_VREF_0 DQSU# VREFDQ
H1 M8 F3 FBA_DQS_WP2 85
VREFDQ VRAM_CH_A_ZQ_2 VREFCA DQSL
M8 F3 FBA_DQS_WP1 85 L8 G3 FBA_DQS_RN2 85
VRAM_CH_A_ZQ_1 VREFCA DQSL ZQ DQSL#
SB_0802 L8 G3 FBA_DQS_RN1 85 SB_0802

1
ZQ DQSL#
K1 FBA_CMD0 85
1

ODT
K1 FBA_CMD0 85 85,89 FBA_CMD7 N3
ODT R8802 A0
85,89 FBA_CMD7 N3 85,89 FBA_CMD10 P7
R8801 A0 243R2F-2-GP A1
85,89 FBA_CMD10 P7 85,89 FBA_CMD24 P3 L2 FBA_CMD2 85
243R2F-2-GP A1 A2 CS#
85,89 FBA_CMD24 P3 L2 FBA_CMD2 85 OPS 85,89 FBA_CMD6 N2 T2 FBA_CMD20 85,89

2
A2 CS# A3 RESET#
OPS 85,89 FBA_CMD6 N2 T2 FBA_CMD20 85,89 85,89 FBA_CMD22 P8
2

A3 RESET# A4
85,89 FBA_CMD22 P8 85,89 FBA_CMD26 P2
A4 A5
85,89 FBA_CMD26 P2 85,89 FBA_CMD5 R8 T7
A5 A6 NC#T7
85,89 FBA_CMD5 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,89 FBA_CMD21 R2
A7 NC#L9
L9 20100702_Change to Mode E
85,89 FBA_CMD21 R2 L9 85,89 FBA_CMD8 T8 L1
A7 NC#L9 A8 NC#L1
85,89 FBA_CMD8 T8 L1 85,89 FBA_CMD4 R3 J9
A8 NC#L1 A9 NC#J9
85,89 FBA_CMD4 R3 J9 85,89 FBA_CMD25 L7 J1
A9 NC#J9 A10/AP NC#J1
85,89 FBA_CMD25 L7 J1 85,89 FBA_CMD23 R7
A10/AP NC#J1 A11
85,89 FBA_CMD23 R7 85,89 FBA_CMD9 N7
A11 A12/BC#
85,89 FBA_CMD9 N7 85 FBA_CMD12 T3 J8
A12/BC# A13 VSS
85 FBA_CMD12 T3 J8 85,89 FBA_CMD30 M7 M1
A13 VSS A15 VSS
85,89 FBA_CMD30 M7 M1 M9
A15 VSS 1D5V_VGA_S0 VSS
M9 J2
VSS VSS
J2 85,89 FBA_CMD29 M2 P9
VSS BA0 VSS
85,89 FBA_CMD29 M2 P9 85,89 FBA_CMD13 N8 G8

1
BA0 VSS BA1 VSS
85,89 FBA_CMD13 N8
BA1 VSS
G8 SB_0802 85,89 FBA_CMD27 M3
BA2 VSS
B3
85,89 FBA_CMD27 M3 B3 R8803 T1
BA2 VSS 1K33R2F-GP VSS
T1 A9
VSS VSS
VSS
A9 OPS 85 FBA_CLK0 J7
CK VSS
T9
J7 T9 K7 E1

2
85 FBA_CLK0 CK VSS 85 -FBA_CLK0 CK# VSS
85 -FBA_CLK0 K7 E1 P1
CK# VSS FBA_VREF_0 VSS
P1 85 FBA_CMD3 K9
VSS CKE
85 FBA_CMD3 K9 G1

1
CKE VSSQ
G1 F9

1
VSSQ R8804 C8802 VSSQ
3 F9 85 FBA_DQM3 D3 E8 3
VSSQ 1K33R2F-GP SCD01U50V2KX-1GP DMU VSSQ
85 FBA_DQM0 D3 E8 85 FBA_DQM2 E7 E2
DMU VSSQ DML VSSQ
E7 E2 OPS OPS D8

2
85 FBA_DQM1 DML VSSQ VSSQ
D8 D1

2
VSSQ VSSQ
D1 85,89 FBA_CMD28 L3 B9
VSSQ WE# VSSQ
85,89 FBA_CMD28 L3 B9 85,89 FBA_CMD15 K3 B1
WE# VSSQ CAS# VSSQ
85,89 FBA_CMD15 K3 B1 85,89 FBA_CMD11 J3 G9
CAS# VSSQ RAS# VSSQ
85,89 FBA_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
20100702_Change to Mode E H5TQ1G63BFR-12C-GP OPS
OPS

FB CMD mapping Mode D-N12x

SB_0802

1D5V_VGA_S0 DG requires 4x0.1uF and 8x1.0uF per


VRAM chip
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

FOR VRAM1
1

1D5V_VGA_S0
C8801 C8803 C8804 C8805 C8806 C8807 C8808
OPS OPS OPS OPS OPS OPS OPS
2

1D5V_VGA_S0
1

2 CLOSE TO THE MEMORY C8809 2


SC10U6D3V3MX-GP
2

OPS
CLOSE TO THE MEMORY
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
1

C8810 C8811 C8812 C8813 C8814 C8815 C8816


FOR VRAM2 OPS OPS OPS OPS OPS OPS OPS
2

1 1

VIDEO FRAME BUFFER PORT A


<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM CHANNEL-A
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 88 of 97
A B C D E
A B C D E

www.rosefix.com
1D5V_VGA_S0
1D5V_VGA_S0
4 VRAM3 4
FBA_D[63..0] 85,88 VRAM4
FBA_D35 FBA_D[63..0] 85,88
K8 E3
VDD DQL0 FBA_D38 FBA_D44
K2 F7 K8 E3
VDD DQL1 FBA_D33 VDD DQL0 FBA_D43
N1 F2 K2 F7
VDD DQL2 FBA_D34 VDD DQL1 FBA_D47
R9 F8 N1 F2
VDD DQL3 FBA_D32 VDD DQL2 FBA_D45
B2 H3 R9 F8
VDD DQL4 FBA_D37 VDD DQL3 FBA_D42
D9 H8 B2 H3
VDD DQL5 FBA_D36 VDD DQL4 FBA_D40
G7 G2 D9 H8
VDD DQL6 FBA_D39 VDD DQL5 FBA_D46
R1 H7 G7 G2
VDD DQL7 VDD DQL6 FBA_D41
N9 R1 H7
VDD FBA_D49 VDD DQL7
D7 N9
DQU0 FBA_D54 VDD FBA_D56
A8 C3 D7
VDDQ DQU1 FBA_D48 DQU0 FBA_D62
A1 C8 A8 C3
VDDQ DQU2 FBA_D55 VDDQ DQU1 FBA_D61
C1 C2 A1 C8
VDDQ DQU3 FBA_D51 VDDQ DQU2 FBA_D60
C9 A7 C1 C2
VDDQ DQU4 FBA_D53 VDDQ DQU3 FBA_D57
D2 A2 C9 A7
VDDQ DQU5 FBA_D50 VDDQ DQU4 FBA_D59
E9 B8 D2 A2
VDDQ DQU6 FBA_D52 VDDQ DQU5 FBA_D58
F1 A3 E9 B8
VDDQ DQU7 VDDQ DQU6 FBA_D63
H9 F1 A3
VDDQ VDDQ DQU7
H2 C7 FBA_DQS_WP6 85 H9
VDDQ DQSU VDDQ
B7 FBA_DQS_RN6 85 H2 C7 FBA_DQS_WP7 85
FBA_VREF_1 DQSU# VDDQ DQSU
H1 B7 FBA_DQS_RN7 85
VREFDQ FBA_VREF_1 DQSU#
M8 F3 FBA_DQS_WP4 85 H1
VRAM_CH_A_ZQ_3 VREFCA DQSL VREFDQ
L8 G3 FBA_DQS_RN4 85 M8 F3 FBA_DQS_WP5 85
ZQ DQSL# VRAM_CH_A_ZQ_4 VREFCA DQSL
L8 G3 FBA_DQS_RN5 85
ZQ DQSL#
K1 FBA_CMD19 85
1

ODT
SB_0802 85,88 FBA_CMD9 N3 SB_0802 K1 FBA_CMD19 85

1
A0 ODT
85,88 FBA_CMD24 P7 85,88 FBA_CMD9 N3
R8901 A1 A0
85,88 FBA_CMD10 P3 L2 FBA_CMD18 85 85,88 FBA_CMD24 P7
243R2F-2-GP 85,88 FBA_CMD13 A2 CS# R8904 A1
N2 T2 FBA_CMD20 85,88 85,88 FBA_CMD10 P3 L2 FBA_CMD18 85
A3 RESET# 243R2F-2-GP A2 CS#
OPS 85,88 FBA_CMD26 P8 85,88 FBA_CMD13 N2 T2 FBA_CMD20 85,88
2

A4 A3 RESET#
85,88 FBA_CMD22 P2 OPS 85,88 FBA_CMD26 P8

2
A5 A4
85,88 FBA_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,88 FBA_CMD22 P2
A5
85,88 FBA_CMD5 R2
A7 NC#L9
L9 85,88 FBA_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E
85,88 FBA_CMD8 T8 L1 85,88 FBA_CMD5 R2 L9
A8 NC#L1 A7 NC#L9
85,88 FBA_CMD23 R3 J9 85,88 FBA_CMD8 T8 L1
A9 NC#J9 A8 NC#L1
85,88 FBA_CMD28 L7 J1 85,88 FBA_CMD23 R3 J9
A10/AP NC#J1 A9 NC#J9
85,88 FBA_CMD4 R7 85,88 FBA_CMD28 L7 J1
A11 A10/AP NC#J1
85,88 FBA_CMD7 N7 85,88 FBA_CMD4 R7
A12/BC# A11
85 FBA_CMD14 T3 J8 85,88 FBA_CMD7 N7
A13 VSS A12/BC#
3 85,88 FBA_CMD27 M7 M1 85 FBA_CMD14 T3 J8 3
A15 VSS A13 VSS
M9 85,88 FBA_CMD27 M7 M1
VSS A15 VSS
J2 M9
1D5V_VGA_S0 VSS VSS
85,88 FBA_CMD29 M2 P9 J2
BA0 VSS VSS
85,88 FBA_CMD6 N8 G8 85,88 FBA_CMD29 M2 P9
BA1 VSS BA0 VSS
SB_0802 85,88 FBA_CMD30 M3 B3 85,88 FBA_CMD6 N8 G8
1

BA2 VSS BA1 VSS


T1 85,88 FBA_CMD30 M3 B3
R8902 VSS BA2 VSS
A9 T1
1K33R2F-GP VSS VSS
85 FBA_CLK1 J7 T9 A9
CK VSS VSS
OPS 85 -FBA_CLK1 K7
CK# VSS
E1 85 FBA_CLK1 J7
CK VSS
T9
P1 K7 E1
2

VSS 85 -FBA_CLK1 CK# VSS


85 FBA_CMD16 K9 P1
FBA_VREF_1 CKE VSS
G1 85 FBA_CMD16 K9
VSSQ CKE
F9 G1
1

VSSQ VSSQ
D3 E8 F9
85 FBA_DQM6 FB CMD mapping Mode D-N12x
1

R8903 C8902 DMU VSSQ VSSQ


85 FBA_DQM4 E7 E2 85 FBA_DQM7 D3 E8
1K33R2F-GP SCD01U50V2KX-1GP DML VSSQ DMU VSSQ
D8 85 FBA_DQM5 E7 E2
VSSQ DML VSSQ
OPS OPS D1 D8
2

VSSQ VSSQ
85,88 FBA_CMD25 L3 B9 D1
2

WE# VSSQ VSSQ


85,88 FBA_CMD15 K3 B1 85,88 FBA_CMD25 L3 B9
CAS# VSSQ WE# VSSQ
85,88 FBA_CMD11 J3 G9 85,88 FBA_CMD15 K3 B1
RAS# VSSQ CAS# VSSQ
85,88 FBA_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
OPS 20100702_Change to Mode E H5TQ1G63BFR-12C-GP
OPS

2 2

SB_0802

1D5V_VGA_S0
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

FOR VRAM3
1

1D5V_VGA_S0
C8901 C8903 C8904 C8905 C8906 C8907 C8908
OPS OPS OPS OPS OPS OPS OPS
2

SC10U6D3V3MX-GP

1D5V_VGA_S0
1

1
CLOSE TO THE MEMORY C8909
1
OPS
2

VIDEO FRAME BUFFER PORT A


SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

CLOSE TO THE MEMORY


SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
1

C8910 C8911 C8912 C8913 C8914 C8915 C8916 <Core Design>


FOR VRAM4 OPS OPS OPS OPS OPS OPS OPS
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM CHANNEL-A
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 89 of 97
A B C D E
A B C D E

1D5V_VGA_S0
VRAM6

www.rosefix.com
1D5V_VGA_S0 FBB_D[63..0] 85,91
VRAM5
FBB_D[63..0] 85,91 FBB_D21
K8 E3
FBB_D6 VDD DQL0 FBB_D18
K8 E3 K2 F7
VDD DQL0 FBB_D1 VDD DQL1 FBB_D17
K2 F7 N1 F2
VDD DQL1 FBB_D4 VDD DQL2 FBB_D22
N1 F2 R9 F8
VDD DQL2 FBB_D3 VDD DQL3 FBB_D16
R9 F8 B2 H3
VDD DQL3 FBB_D5 VDD DQL4 FBB_D20
B2 H3 D9 H8
VDD DQL4 FBB_D2 VDD DQL5 FBB_D19
D9 H8 G7 G2
VDD DQL5 FBB_D7 VDD DQL6 FBB_D23
G7 G2 R1 H7
VDD DQL6 FBB_D0 VDD DQL7
R1 H7 N9
VDD DQL7 VDD FBB_D25
N9 D7
VDD FBB_D13 DQU0 FBB_D24
D7 A8 C3
DQU0 FBB_D11 VDDQ DQU1 FBB_D31
A8 C3 A1 C8
VDDQ DQU1 FBB_D14 VDDQ DQU2 FBB_D28
A1 C8 C1 C2
VDDQ DQU2 FBB_D10 VDDQ DQU3 FBB_D29
C1 C2 C9 A7
VDDQ DQU3 FBB_D12 VDDQ DQU4 FBB_D27
C9 A7 D2 A2
VDDQ DQU4 FBB_D8 VDDQ DQU5 FBB_D30
D2 A2 E9 B8
VDDQ DQU5 FBB_D15 VDDQ DQU6 FBB_D26
4 E9 B8 F1 A3 4
VDDQ DQU6 FBB_D9 VDDQ DQU7
F1 A3 H9
VDDQ DQU7 VDDQ
H9 H2 C7 FBB_DQS_WP3 85
VDDQ VDDQ DQSU
H2 C7 FBB_DQS_WP1 85 B7 FBB_DQS_RN3 85
VDDQ DQSU FBB_VREF_0 DQSU#
B7 FBB_DQS_RN1 85 H1
FBB_VREF_0 DQSU# VREFDQ
H1 M8 F3 FBB_DQS_WP2 85
VREFDQ VRAM_CH_C_ZQ_2 VREFCA DQSL
SB_0802 M8
VREFCA DQSL
F3 FBB_DQS_WP0 85 L8
ZQ DQSL#
G3 FBB_DQS_RN2 85
VRAM_CH_C_ZQ_1 L8 G3
ZQ DQSL# FBB_DQS_RN0 85
K1 FBB_CMD0 85
1

1
ODT
ODT
K1 FBB_CMD0 85 SB_0802 85,91 FBB_CMD7 N3
A0
85,91 FBB_CMD7 N3 85,91 FBB_CMD10 P7
R9001 A0 R9002 A1
85,91 FBB_CMD10 P7 85,91 FBB_CMD24 P3 L2 FBB_CMD2 85
243R2F-2-GP A1 243R2F-2-GP A2 CS#
85,91 FBB_CMD24 P3 L2 FBB_CMD2 85 85,91 FBB_CMD6 N2 T2 FBB_CMD20 85,91
A2 CS# A3 RESET#
OPS 85,91 FBB_CMD6 N2 T2 FBB_CMD20 85,91 OPS 85,91 FBB_CMD22 P8
2

2
A3 RESET# A4
85,91 FBB_CMD22 P8 85,91 FBB_CMD26 P2
A4 A5
85,91 FBB_CMD26 P2 85,91 FBB_CMD5 R8 T7
A5 A6 NC#T7
85,91 FBB_CMD5 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,91 FBB_CMD21 R2
A7 NC#L9
L9
85,91 FBB_CMD21 R2 L9 85,91 FBB_CMD8 T8 L1
A7 NC#L9 A8 NC#L1
85,91 FBB_CMD8 T8 L1 85,91 FBB_CMD4 R3 J9
A8 NC#L1 A9 NC#J9
85,91 FBB_CMD4 R3 J9 85,91 FBB_CMD25 L7 J1
A9 NC#J9 A10/AP NC#J1
85,91 FBB_CMD25 L7 J1 85,91 FBB_CMD23 R7
A10/AP NC#J1 A11
85,91 FBB_CMD23 R7 85,91 FBB_CMD9 N7
A11 A12/BC#
85,91 FBB_CMD9 N7 85 FBB_CMD12 T3 J8
A12/BC# A13 VSS
85 FBB_CMD12 T3 J8 85,91 FBB_CMD30 M7 M1
A13 VSS A15 VSS
85,91 FBB_CMD30 M7 M1 M9
A15 VSS VSS
M9 J2
VSS VSS
J2 85,91 FBB_CMD29 M2 P9
VSS BA0 VSS
85,91 FBB_CMD29 M2 P9 85,91 FBB_CMD13 N8 G8
BA0 VSS 1D5V_VGA_S0 BA1 VSS
85,91 FBB_CMD13 N8 G8 85,91 FBB_CMD27 M3 B3
BA1 VSS BA2 VSS
85,91 FBB_CMD27 M3 B3 T1
BA2 VSS VSS
T1 A9

1
VSS VSS
VSS
A9 SB_0802 85 FBB_CLK0 J7
CK VSS
T9
J7 T9 R9003 K7 E1
85 FBB_CLK0 CK VSS 1K33R2F-GP 85 -FBB_CLK0 CK# VSS
85 -FBB_CLK0 K7 E1 P1
CK# VSS VSS
VSS
P1 OPS 85 FBB_CMD3 K9
CKE
85 FBB_CMD3 K9 G1

2
CKE VSSQ
G1 F9
VSSQ FBB_VREF_0 VSSQ
F9 85 FBB_DQM3 D3 E8
VSSQ DMU VSSQ
85 FBB_DQM1 D3 E8 85 FBB_DQM2 E7 E2

1
DMU VSSQ DML VSSQ
85 FBB_DQM0 E7 E2 D8

1
DML VSSQ R9004 C9002 VSSQ
D8 D1
VSSQ 1K33R2F-GP SCD01U50V2KX-1GP VSSQ
3 D1 85,91 FBB_CMD28 L3 B9 3
VSSQ WE# VSSQ
85,91 FBB_CMD28 L3 B9 OPS OPS 85,91 FBB_CMD15 K3 B1

2
WE# VSSQ CAS# VSSQ
85,91 FBB_CMD15 K3 B1 85,91 FBB_CMD11 J3 G9
2
CAS# VSSQ RAS# VSSQ
85,91 FBB_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
20100702_Change to Mode E H5TQ1G63BFR-12C-GP OPS
OPS

SB_0802

DG requires 4x0.1uF and 8x1.0uF per


1D5V_VGA_S0
VRAM chip
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

FOR VRAM5 1D5V_VGA_S0


1

C9001 C9003 C9004 C9005 C9006 C9007 C9008


OPS OPS OPS OPS OPS OPS OPS
2

SC10U6D3V3MX-GP
1

1D5V_VGA_S0
C9009
CLOSE TO THE MEMORY OPS
2

CLOSE TO THE MEMORY


SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2 2
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
1

C9010 C9011 C9012 C9013 C9014 C9015 C9016


FOR VRAM6 OPS OPS OPS OPS OPS OPS OPS
2

1 1

VIDEO FRAME BUFFER PORT C


<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM CHANNEL-C
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 90 of 97
A B C D E
A B C D E

www.rosefix.com 1D5V_VGA_S0

K8
K2
N1
R9
B2
D9
VRAM7

VDD
VDD
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
E3
F7
F2
F8
H3
H8
FBB_D35
FBB_D37
FBB_D34
FBB_D39
FBB_D36
FBB_D38
FBB_D[63..0] 85,90
1D5V_VGA_S0

K8
K2
N1
R9
VRAM8

VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
E3
F7
F2
F8
FBB_D60
FBB_D58
FBB_D62
FBB_D57
FBB_D[63..0] 85,90

G7 G2 FBB_D32 B2 H3 FBB_D63
VDD DQL6 FBB_D33 VDD DQL4 FBB_D56
R1 H7 D9 H8
VDD DQL7 VDD DQL5 FBB_D61
N9 G7 G2
VDD FBB_D51 VDD DQL6 FBB_D59
D7 R1 H7
DQU0 FBB_D53 VDD DQL7
A8 C3 N9
VDDQ DQU1 FBB_D48 VDD FBB_D40
4 A1 C8 D7 4
VDDQ DQU2 FBB_D54 DQU0 FBB_D44
C1 C2 A8 C3
VDDQ DQU3 FBB_D49 VDDQ DQU1 FBB_D41
C9 A7 A1 C8
VDDQ DQU4 FBB_D55 VDDQ DQU2 FBB_D45
D2 A2 C1 C2
VDDQ DQU5 FBB_D50 VDDQ DQU3 FBB_D42
E9 B8 C9 A7
VDDQ DQU6 FBB_D52 VDDQ DQU4 FBB_D46
F1 A3 D2 A2
VDDQ DQU7 VDDQ DQU5 FBB_D43
H9 E9 B8
VDDQ VDDQ DQU6 FBB_D47
H2 C7 FBB_DQS_WP6 85 F1 A3
VDDQ DQSU VDDQ DQU7
B7 FBB_DQS_RN6 85 H9
FBB_VREF_1 DQSU# VDDQ
H1 H2 C7 FBB_DQS_WP5 85
VREFDQ VDDQ DQSU
M8 F3 FBB_DQS_WP4 85 B7 FBB_DQS_RN5 85
VRAM_CH_C_ZQ_3 VREFCA DQSL FBB_VREF_1 DQSU#
SB_0802 L8
ZQ DQSL#
G3 FBB_DQS_RN4 85 H1
VREFDQ
SB_0802 M8 F3 FBB_DQS_WP7 85
1

VRAM_CH_C_ZQ_4 VREFCA DQSL


K1 FBB_CMD19 85 L8 G3 FBB_DQS_RN7 85
ODT ZQ DQSL#
85,90 FBB_CMD9 N3

1
R9101 A0
85,90 FBB_CMD24 P7 K1 FBB_CMD19 85
243R2F-2-GP A1 ODT
85,90 FBB_CMD10 P3 L2 FBB_CMD18 85 85,90 FBB_CMD9 N3
A2 CS# R9104 A0
OPS 85,90 FBB_CMD13 N2 T2 FBB_CMD20 85,90 85,90 FBB_CMD24 P7
2

A3 RESET# 243R2F-2-GP A1
85,90 FBB_CMD26 P8 85,90 FBB_CMD10 P3 L2 FBB_CMD18 85
A4 A2 CS#
85,90 FBB_CMD22 P2 OPS 85,90 FBB_CMD13 N2 T2 FBB_CMD20 85,90

2
A5 A3 RESET#
85,90 FBB_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,90 FBB_CMD26 P8
A4
85,90 FBB_CMD5 R2 L9 85,90 FBB_CMD22 P2
A7 NC#L9 A5
85,90 FBB_CMD8 T8
A8 NC#L1
L1 85,90 FBB_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E
85,90 FBB_CMD23 R3 J9 85,90 FBB_CMD5 R2 L9
A9 NC#J9 A7 NC#L9
85,90 FBB_CMD28 L7 J1 85,90 FBB_CMD8 T8 L1
A10/AP NC#J1 A8 NC#L1
85,90 FBB_CMD4 R7 85,90 FBB_CMD23 R3 J9
A11 A9 NC#J9
85,90 FBB_CMD7 N7 85,90 FBB_CMD28 L7 J1
A12/BC# A10/AP NC#J1
85 FBB_CMD14 T3 J8 85,90 FBB_CMD4 R7
A13 VSS A11
85,90 FBB_CMD27 M7 M1 85,90 FBB_CMD7 N7
A15 VSS A12/BC#
M9 85 FBB_CMD14 T3 J8
VSS A13 VSS
J2 85,90 FBB_CMD27 M7 M1
VSS A15 VSS
85,90 FBB_CMD29 M2 P9 M9
BA0 VSS VSS
85,90 FBB_CMD6 N8 G8 1D5V_VGA_S0 J2
BA1 VSS VSS
85,90 FBB_CMD30 M3 B3 85,90 FBB_CMD29 M2 P9
BA2 VSS BA0 VSS
T1 85,90 FBB_CMD6 N8 G8
VSS BA1 VSS
A9 85,90 FBB_CMD30 M3 B3
VSS BA2 VSS
85 FBB_CLK1 J7 T9 T1
CK VSS VSS
K7 E1 A9

SC10U6D3V3MX-GP
85 -FBB_CLK1 CK# VSS VSS
P1 85 FBB_CLK1 J7 T9
VSS CK VSS
85 FBB_CMD16 K9 85 -FBB_CLK1 K7 E1

1
CKE CK# VSS
G1 P1
1D5V_VGA_S0 VSSQ C9109 VSS
3 F9 85 FBB_CMD16 K9 3
VSSQ CKE
D3 E8 OPS G1

2
85 FBB_DQM6 DMU VSSQ VSSQ
85 FBB_DQM4 E7 E2 F9
1

DML VSSQ VSSQ


D8 D3 E8
SB_0802 R9102 VSSQ
VSSQ
D1 CLOSE TO THE MEMORY 85
85
FBB_DQM5
FBB_DQM7 E7
DMU
DML
VSSQ
VSSQ
E2
1K33R2F-GP 85,90 FBB_CMD25 L3 B9 D8
WE# VSSQ VSSQ
OPS 85,90 FBB_CMD15 K3
CAS# VSSQ
B1
VSSQ
D1
85,90 FBB_CMD11 J3 G9 85,90 FBB_CMD25 L3 B9
2

RAS# VSSQ WE# VSSQ


85,90 FBB_CMD15 K3 B1
FBB_VREF_1 CAS# VSSQ
85,90 FBB_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
1

OPS
1

R9103 C9102 20100702_Change to Mode E H5TQ1G63BFR-12C-GP


1K33R2F-GP SCD01U50V2KX-1GP OPS
OPS OPS
2
2

2 2

SB_0802

1D5V_VGA_S0
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

FOR VRAM7
1

C9107 C9108
C9101 C9103 C9104 C9105 C9106 OPS OPS
2

OPS OPS OPS OPS OPS


2

1D5V_VGA_S0
CLOSE TO THE MEMORY
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 1
1

C9110 C9111 C9112 C9113 C9114 C9115 C9116


FOR VRAM8 OPS OPS OPS OPS OPS OPS OPS VIDEO FRAME BUFFER PORT C
2

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM CHANNEL-C
Size Document Number Rev

www.vinafix.vn
A2 -1
LA470
Date: Thursday, December 16, 2010 Sheet 91 of 97
A B C D E
10 9 8 7 6 5 4 3 2 1

J
www.rosefix.com
SSID = PWR.Plane.Regulator_GFX

DCBATOUT
J

1
PC9204 PC9215 PC9213 PC9214 PC9202 PC9205 PC9203

6
5
2
1

6
5
2
1
D
D
D
D

D
D
D
D

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
SCD1U25V3KX-GP
PU9202 PU9203
5V_S5

2
VGA:N12P-GE

VGA:N12P-GE

VGA:N12P-GE
IRF6721SPBF-GP-U IRF6721SPBF-GP-U OPS OPS OPS OPS
84.06721.030 84.06721.030
OPS VGA:N12P-GE
Vout=0.75V*(R1+R2)/R2

S
I I

3
PC9201
PWR_VGA_CORE_TON PR9202 1 2249KR2F-GP Design Current = 32A

ST470U2VDM-5-GP-U1

ST470U2VDM-5-GP-U1
OPS TP9206 1
SC1U10V2KX-1GP
TPAD14-GP 45<OCP<50A
2
OPS

ST330U2VDM-4-GP
PU9201 PR9205
OPS PC9206 OPS TP9205 1 VGA_CORE
16 13 PWR_VGA_CORE_BOOT 1 2PWR_VGA_CORE_BOOT_C 1 2 TPAD14-GP
TON BOOT PL9201
2 PR9201 1 9 2D2R3J-2-GP SCD1U25V3KX-GP
VDDP PWR_VGA_CORE_UGATE VGA_CORE_UGATE
OPS 10R2F-L-GP UGATE
12 1 PR9218 2
PWR_VGA_CORE_VDD 2 11 PWR_VGA_CORE_PHASE 0R0402-PAD 1 2
VDD PHASE PWR_VGA_CORE_LGATE VGA_CORE_LGATE
8 1 PR9219 2 IND-D36UH-34-GP PG9205
LGATE 0R0402-PAD
8209A_PGOOD_VGA
OPS
4 7 PTC9204

SCD1U10V2KX-4GP
PWRCNTL_0 86

GAP-CLOSE-PWR-3-GP
1

1
PWR_VGA_CORE_CS PGOOD G0 PWR_VGA_CORE_FB PTC9202 PTC9203
1 2 10 3 OPS OPS

1
PR9204 6K2R2F-GP CS FB
14 PWRCNTL_1 86 OPS

7
6
2
1

7
6
2
1
G1 PWR_VGA_CORE_D1 Modify to PCMC135T-R36MF
OPS
1

5 2 2

2
D1

D
D
D
D

D
D
D
D
H 8209A_EN/DEM_VGA PWR_VGA_CORE_D0 H

PC9208
15 6 PU9204 PU9205

2
PC9207 EM/DEM D0 IRF6725MTRPBF-GP-U IRF6725MTRPBF-GP-U

3
SC1U10V2KX-1GP 20100702_PWR PWR_VGA_CORE_VOUT PWR_VGA_CORE_VOUT SB_0826
2

OPS 17
GND VOUT
1 84.06725.030 84.06725.030
OPS VGA:N12P-GE

1
10R2J-2-GP
PR9203
G
S
S

G
S
S
RT8208AGQW-GP
OPS VGA:N12P-GE

5
4
3

5
4
3
OPS
RT8208A:74.08208.073

2
TP9203 1 1 TP9201 TP9204 1 1 TP9202 1 2
TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP 83 VGACORE_VDD_SENSE PR9211
0R0402-PAD
PC9209 PC9210

1
G PR9208 G

SC10P50V2JN-4GP

SC10P50V2JN-4GP
10KR2F-2-GP DY
DY

2
2
OPS OPS
PR9206 1 2 1KR2J-1-GP
3D3V_VGA_S0 RT8208A PWR_VGA_CORE_FB
PD9201 P-State PWR_VGA_CORE_D1 PWR_VGA_CORE_D0 VGA_CORE_PWR
2 1 8209A_EN/DEM_VGA
19,27,36,37,47 PM_SLP_S3#
DY P8 & P12 L L 0.85V
1

1
CH551H-30PT-GP PC9211
DY SCD1U10V2KX-4GP ES L H 0.90V PR9209 PR9210 PR9213
150KR2F-L-GP 75KR2F-GP 75KR2F-GP
2

F P0(Hot) H L 0.95V OPS OPS OPS F

2
PWR_VGA_CORE_D1
P0(Cold) H H 1.00V

PWR_VGA_CORE_D0

1GND_SENSE_1
3D3V_VGA_S0

Frequency setting
1

PR9212 1 2
10KR2J-3-GP 470K -->165KHz PR9216 VGACORE_GND_SENSE 83
OPS
200K -->323KHz 0R0402-PAD
PR9207
2

10R2J-2-GP
E 8209A_PGOOD_VGA 1 PR9214 2 DGPU_PWROK 22,93 100K -->500KHz OPS
E
0R0402-PAD

2
DY
1

PC9212
SC100P50V2JN-3GP
2

OPS

D D

C C

B B

JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title
DC/DC_VGA CORE_RT8208A
Size Document Number Rev
LA47

www.vinafix.vn
-1
Date: Thursday, December 16, 2010 Sheet 92 of 97
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1

www.rosefix.com
+3VS to 3.3V_DELAY Transfer

1
DY
R9301
2
1D5V_S3
1D5V_VGA_S0
1D5V_VGA_S0
1.05V to 1.05V_VGA_S0 Transfer
check layout

0R2J-2-GP U9301 1D05V_VTT 1D05V_VGA_S0


DMP2130L-7-GP 3D3V_VGA_S0
AO4468, SO-8 8 D S 1
Q9302 7 D S 2
S Id=11.6A, Qg=9~12nC 6 D S 3 U9302 3.6A
3D3V_S0

1
D Rdson=17.4~22m ohm 5 D G 4 C9302 TC9301 8 D S 1

1
D D

D
84.02130.031 C9301 OPS OPS 7 D S 2

SCD1U16V2KX-3GP
2ND = 84.03413.A31 OPS AO4494L-GP 6 D S 3

2
SE330U2VDM-L-GP
R9302 OPS 84.04494.037 5 D G 4

2
G
100KR2J-1-GP 2nd = 84.04168.037

SC10U6D3V3MX-GP
OPS AO4468-GP
OPS 84.04468.037
2

3.3V_ALW_1 2nd = 84.08882.037


OPS
RUN_ENABLE

1
RUNON_R_1

4
R9304 Q9303
100R2J-2-GP R9303
2N7002KDW-GP RUNON_R
OPS S D 2 1
Q9301

2
OPS NDS0610-NL-GP 20KR2F-L-GP
1

1
1st = 84.DM601.03F 84.S0610.B31 OPS

G
2nd = 84.2N702.A3F 2ND = 84.00610.C31 C9303
OPS SCD1U25V3KX-GP

2
3.3V_RUN_VGA_1 1 R9305 2 DIS_EN_1D5_RUN_R OPS
330KR2J-L1-GP

1
R9308 OPS
R9306 R9307
1 2 100KR2J-1-GP 330KR2J-L1-GP
3D3V_S0
OPS OPS
1

20KR2F-L-GP C9308
DGPU_PWR_EN

2
OPS OPS
SCD1U16V2KX-3GP

Q9305
2

G DIS_EN_1D5_RUN
18 DGPU_PWR_EN#
D

D
S OPS
Q9304
2N7002K-2-GP 2N7002K-2-GP
R9310 1st = 84.2N702.031
1st = 84.2N702.031 1 2 DGPU_PWROK_R
22,92 DGPU_PWROK
C 2ND = 84.2N702.J31 0R2J-2-GP 2ND = 84.2N702.J31 C
OPS
OPS

S
1
C9304
SCD1U10V2KX-4GP

2
DY

20100707

+3VS to 1.8V Transfer

I=300mA R9309
U9303 DGPU_PWROK_TO1D8V 1 2 DGPU_PWROK 22,92
0R2J-2-GP
1 3D3V_VGA_S0 DY
1

VIN
2 1D8V_VGA_S0
GND C9307
3
EN
2

4 SCD1U10V2KX-4GP
2

NC#4 C9305 C9306


VOUT
5 DY
SC1U10V2ZY-GP

SC1U10V2ZY-GP
1

G9091-180T11U-GP DY DY
74.09091.G3F 1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it
B
DY B
should be the latest ramp up rail.

A A

JV10-CS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DISCRETE VGA POWER

www.vinafix.vn
Size Document Number Rev
LA470 -1
Date: Thursday, December 16, 2010 Sheet 93 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LVDS_Switch
Size Document Number Rev

www.vinafix.vn
A2
LA470 -1
Date: Thursday, December 16, 2010 Sheet 94 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

(Blanking)

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT_Switch
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 95 of 97
5 4 3 2 1
5 4 3 2 1

www.rosefix.com
D D

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TOUCH PANEL
Size Document Number Rev

www.vinafix.vn
A4
LA470 -1
Date: Thursday, December 16, 2010 Sheet 96 of 97
5 4 3 2 1
5 4 3 2 1

H1
HOLE276R178-GP
CPU Plate
H2
www.rosefix.com
HOLE276R178-GP
H3
HOLE276R178-GP
H4
VGA Std-Off
STF237R128H42-1-GP
H5
STF237R128H42-1-GP Check test point
3D3V_S0 1 AFTP1

3D3V_AUX_S5 1 AFTP7

1
1

1
D 3D3V_S5 1 AFTP8 D

5V_S5 1 AFTP9
ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.N11
34.4GD01.001 34.4GD01.001 1 AFTP10
11,19,27 PM_PW RBTN#
5,11,22,36 H_CPUPW RGD 1 AFTP11

1 AFTP12
27,36 S5_ENABLE
1 AFTP13

H7 H9 H10 H11
Structure boss 5,11,18,27,31,36,65,66,71,83 PLT_RST#

HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP H8 H12 H13 H15


HOLE256R115-GP HOLE256R115-GP HOLE256R115-GP HOLE256R115-GP
放放Dimm Door打
Test Point放 打打打打打打
1

1
ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D11 ZZ.00PAD.D11 ZZ.00PAD.D11 ZZ.00PAD.D11

C C

MiniPCI Std-Off 1D05V_VTT 1D8V_S0 1D5V_S0 3D3V_S0 5V_S0 AD+


2

2
H14 R9701 R9702 R9703 R9704 R9705
STF256R89H178-GP 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP 100R2J-2-GP
DY DY DY DY DY

1
EC9702 EC9703 EC9704
1

1
1

1D8V_RUNPWR

1D5V_RUNPWR

3D3V_RUNPWR

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
VTT_RUNPWR

5V_RUNPWR
DY

34.4B417.001
DY DY DY DY DY
Q9701 Q9702 Q9703 Q9704 Q9705
D

D
2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP

PS_S3CNTRL G PS_S3CNTRL G PS_S3CNTRL G PS_S3CNTRL G PS_S3CNTRL G


16,31,33,40,42 PS_S3CNTRL
S

S
DCBATOUT
B B
VCC_CORE VCC_GFXCORE 0D75V_S0 0D85V_S0
2

1
EC9705
R9706 R9707 R9708 R9709
100R2J-2-GP 100R2J-2-GP 100R2J-2-GP

SCD1U25V2KX-GP
22R2J-2-GP
For Discharge

2
DY DY DY DY
1

0D75V_RUNPWR 1

1D05V_RUNPWR 1
CORE_RUNPWR

GFX_RUNPWR

3D3V_S5 1D5V_S3

2
DY DY DY DY

1
Q9706 Q9707 Q9708 Q9709 R9711
D

2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP R9710 100R2J-2-GP


100KR2J-1-GP DY
DY

1
PS_S3CNTRL G PS_S3CNTRL G PS_S3CNTRL G PS_S3CNTRL G

3D3V_RUNPWR
S

PM_SLP_S4

A <Variant Name> A

DY DY
Q9710 Q9711
Wistron Corporation
D

D
2N7002A-7-GP 2N7002A-7-GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
16,31,33,40,42 PM_SLP_S4# G G
Title

UNUSED PARTS/EMI Capacitors


S

S
Size Document Number Rev

www.vinafix.vn
A3
LA470 -1
Date: Thursday, December 16, 2010 Sheet 97 of 97
5 4 3 2 1

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