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Dushyant Pohane
Dushyant Pohane
22BCY10191
the effective address if the addressing mode of the instruction is (i) 400(ii) 301 (iii) 701
Ans1 :- (iv)200 (v) 600
Explanation:
Given: An instruction is stored at location 300 with its address field at location 301. The
address field at location 301. The address field has the value 400. A processor register r1
contains the number 200.
To find: Evaluate the effective address if the addressing mode of the instruction is (i)
direct (ii) immediate (iii) relative (iv)register indirect (v) index with r1 as the index register
Solution:
Location _ Contents
Direct addressing means that the address field contains the address of memory location
the instruction is supposed to work with (where an operand "resides").
Immediate addressing means that the address field contains the operand itself.
Relative addressing means that the address field contains offset to be added to the program
counter to address a memory location of the operand.
Register indirect addressing means that the address of an operand is in the register. The
address field in this case contains just another operand.
Ans 3:- The description given in the assignment can be represented like this:
Location _ Contents
Direct addressing means that the address field contains the address of memory location the instruction is
supposed to work with (where an operand "resides").
Immediate addressing means that the address field contains the operand itself.
Relative addressing means that the address field contains offset to be added to the program counter to
address a memory location of the operand.
Register indirect addressing means that the address of an operand is in the register. The address field in
this case contains just another operand.
There are several possible indexed addressing modes but in this case (tehre is an address field) it is co
called "indexed absolute" addressing.
In indexed absolute addressing the effective address is calculated by taking the contnts of the address field
and adding the contents of the index register.
• If we have 32–bit instructions allowed, then there are 256 2–address instructions only allowed (two
addresses will take 24–bits, leaving 8–bits for the opcode).
• Observing the 8–bit opcode, assume the bit pattern 00000000 (0) to the bit pattern 11111001 (249) are
utilized for the 250 2–address instructions.
• Then there are only 6–bit patterns left out for 1–one address instructions.
• Though, each one of these could use the remaining 12–bits attained from possessing only one operand,
thus we have 6 * 212 1–address instructions.
For 98 instructions, you need log2(98) = ~6.6 bits for opcode. Let's round it up to 7 bits. Since there are 10
Ans 6:-
addressing modes, you'd need log2(10) = ~3.3 bits for addressing mode. Let's round it up to 4 bits. So, opcode
bits = 7 and mode bits = 4.