Fusion Engineering and Design 169 (2021) 112491

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Fusion Engineering and Design

journal homepage: www.elsevier.com/locate/fusengdes

Development of a novel power module based on pulse step modulation

Ma Shaoxiang, Zhu Bangyou, Guan Shengyuan, Wang Aoxiang, Zhang Ming*, Zhang Hongqi,
Yu Kexun, Pan Yuan
International Joint Research Laboratory of Magnetic Confinement Fusion and Plasma Physics, State Key Laboratory of Advanced Electromagnetic Engineering and
Technology, School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, 430074, China

A R T I C L E I N F O A B S T R A C T

Keywords: The high voltage power supply (HVPS) based on pulse step modulation (PSM) has been widely used in various
HVPS fusion auxiliary heating systems due to its many distinctive merits, but voltage overshoot remains too high to be
PSM solved heretofore. An improved type switch power supply (SPS) module is designed in this paper to reduce the
SPS module
voltage overshoot with no increase of rise time of the PSM HVPS. A novel bus voltage control method is adopted
Voltage overshoot
in this paper to realize almost no voltage overshoot, while an auxiliary control and protection system based on
Voltage control
DSP is designed. After detailed analysis of the proposed module, a real module was manufactured with rated
output of 750 V/25A to verify the performance of the proposed method. Experiment results indicate that
overshoot voltage of the module is suppressed to less than 1%, in addition, the module could response to control
signal within 1.2 μs to achieve fast dynamic adjustment and can be turned off within 3 μs when it fails. The
proposed module can greatly improve the performance of PSM HVPS and provide power for accelerating and
heating system of the China Fusion Experimental Rector (CFETR).

1. Introduction
Since the high voltage power supply (HVPS) based on pulse step
modulation (PSM) technology was first proposed in 1983 [1], it is
widely used in various fusion auxiliary heating systems due to its many
distinctive merits, such as high accuracy, small ripple, high efficiency,
and short switch-off time. In fusion auxiliary heating systems, such as
the electron cyclotron resonance heating (ECRH) system, neutral beam
injection (NBI) system, and lower hybrid current drive system, with a
relatively high voltage (tens to hundreds of kV), the gyrotron, ion source
and klystron can produce microwave or high energy particles to heat
plasma [2,3]. These components are sensitive to voltage overshoot and
short-circuit energy. The excessive voltage may cause damage to the
devices, thus the overshoot voltage and fault response time of HVPS
should be limited strictly.
The detailed engineering design of the China Fusion Experimental
Rector (CFETR) started in 2017, in which negative-ion NBI system used
to heat and drive the plasma current in Tokamak, thus an HVPS with
good performance is essential [3].
A PSM HVPS is composed by several identical switch power supply
(SPS) modules in series [1,4]. With specific modulation methods, the
modules output a controlled high DC voltage. Because the bus capacitor
voltage equal to the peak value of AC side after rectification is higher
than the steady output voltage, (this is analyzed in next section) spike
appears in the rising edge of the output voltage waveform when short
rise time is needed. In order to reduce voltage overshoot with short rise
time, many research works on the control strategy of HVPS have been
done, such as the feedforward and feedback control [5,6], but no
satisfactory method for addressing this issue is currently available. Take
the 100 kV/60 A PSM HVPS on J-TEXT tokamak as an example [7], the
former output waveform of the 45 kV HVPS and waveform with
applying feedforward control are shown in Fig. 1, where both voltage
rise time set to 1 ms. Results shows that the effect of suppressing the
overshoot voltage is not ideal according to Table 1, from the former 8.3
% to 2.4 %, and the voltage fluctuation is large in the first few tens of ms.
The specifications of SPS modules closely affect the performance of
whole HVPS [8,9]. The overshoot voltage generated by each module is
superimposed and contribute to the overall voltage overshoot of the
HVPS. The article analyzes the causes of the module voltage overshoot
and presents a novel approach aimed at suppressing the voltage over­
shoot fundamentally. To verify the scenario, this article analyzes and
designs the module according to the former electrical parameters [10].
The performance requirements of the SPS module are shown in Table 1.
In Section 2, the causes of voltage overshoot are analyzed, the bus

* Corresponding author.
E-mail address: zhangming@hust.edu.cn (M. Zhang).

https://doi.org/10.1016/j.fusengdes.2021.112491
Received 29 November 2020; Received in revised form 7 February 2021; Accepted 5 March 2021
Available online 17 March 2021
0920-3796/© 2021 Published by Elsevier B.V.
S. Ma et al. Fusion Engineering and Design 169 (2021) 112491

voltage control method and control system are detailed. In Section 3, the
design detail of module is described. Finally, test and analysis of the
manufactured module have been carried out. Results prove that the
module performs well and can completely meet the design re­
quirements, which provides references to design of HVPSs used in
CFTER and other items.

2. Design of main structure of SPS module

To manage the overshoot and fault shutdown time under require­

ment, the former topology should be improved. Therefore, this section
analyzes the inherent demerits of the former module, finally a new to­
pology is proposed (single modulation, SM).

2.1. Analysis of SPS module

As shown in Fig. 2, the three-phase full-wave rectifier circuit topol­

ogy was adopted in the former module, which is the main scenario of the
current PSM HVPS due to its simple structure and low ripple at DC side.
The relationship between output voltage and capacitor voltage is shown
in Eq. (1).
√̅̅̅
UCmax = 2Ul ≈ 791V
⎛ ⎞
∫ 23π √̅̅̅
⎜ 1 ⎟ RL
URL = ⎝
π /3
×
π
2 U1 sinθdθ − ΔUs ⎠ ×
RL + Rr (1)
3

3wL0
ΔUs = Iload
π
Ul = 560 V: AC side line voltage.
Fig. 1. The output waveforms of the 45 kV HVPS a. the former; b. after ΔUS: Commutation voltage drop caused by the leakage inductance of
applying feedforward control. transformer.
L0: The equivalent leakage inductance on the secondary side of the
transformer.
Table 1 Rr: The internal resistance of module.
Requirements of the SPS module. RL: The resistance of load.
Specifications Values The bus capacitor voltage is normally charged to UCmax before the
Output capacity Continuous module is turned on. When the module is turned on with load, the output
Input voltage 560 V voltage will gradually drop to a stable value from the initial capacitor
Input frequency 50 Hz voltage UCmax. Eq. (1) indicates that two reasons cause voltage over­
Output voltage 750 V shoot: one is that the bus capacitor voltage without load is peak value of
Output overshoot <2%
Output ripple < ±1 %
incoming line voltage, which is higher than output voltage with load
Output current 25 A decided by six pulse waves rectification. The other one is the share of
Fault shutdown time < 5 μs leakage inductance of transformer and the internal resistance of module.
Output mode SM and PWM (5 kHz) According to the theoretical calculation in Eq. (1) and experimental
results, the spike appears in the rising edge of the voltage waveform and
reaches about 10.7 %.

Fig. 2. The circuit structure of the former module.

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S. Ma et al.
Fig. 3. The proposed structure of SPS module.
Fig. 4. The operation diagram of SPS module.
2.2. Design of SPS module and the bus control method
To reduce the overshoot, a new topology is proposed as Fig. 3. The
soft-start resistor placed in the charging circuit of the bus capacitor aims
to limit the charging current of the bus capacitor. By turning on and off
S2 frequently, bus capacitor is charged and discharged so its voltage
Fig. 5. Control and protection logic diagram of the module.
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Fusion Engineering and Design 169 (2021) 112491
rises and drops frequently to maintain in a certain threshold around the
output voltage with load. Therefore, the output voltage overshoot is
greatly suppressed when the module is turned on.
The operation diagram of module is shown in Fig. 4. There are three
stages, t0-t1: soft-start stage, t1-t2: bus voltage hold stage, t2-t3: module
output stage.
In t0-t1, the module starts to work and the bus capacitors are charged
via the soft-start resistor with S2 on, and S1 and S3 off. When the bus
voltage reaches the upper threshold in t1 which is around the output
voltage, it’s in bus voltage hold stage, where the bus voltage is sampled
into the DSP in real-time, and the S2 is turned off when the bus voltage
reaches the upper threshold and it will decrease due to the RC. S2 re­
mains off until the bus voltage reaches the lower threshold, then the
cycle is repeated. In t2-t3, S2 as well as S1 and S3 are turned on imme­
diately when the module receives the trigger signal, and the value of bus
voltage threshold is automatically updated during this stage to solve the
impact of the sudden changing of the load characteristics on module
performance. The module enters the bus hold stage again after it is
turned off with S1 and S3 off, and it needs to be discharged after
experiment.
As shown in Fig. 5, the control and protection system of module are
realized mainly through the control board based on DSP, the control
signals are sent via remote optical fiber, and the module status can be
monitored by external PC.
S. Ma et al. Fusion Engineering and Design 169 (2021) 112491

Fig. 6. The complex frequency domain equivalent circuit.

Fig. 7. The load voltage at different filter capacitance value.
To cutoff the output when faults especially short-circuit fault occur in
less than 5 μs, this article designs three levels short-circuit protection. capacitor, decided as 35 A.
The first one is generated by pure hardware system outside SPS module,
which can respond and break output in 1 μs. The second one is generated
by hardware system inside SPS module, which will turn off IGBTs when 3.2. The bus capacitor
detects overcurrent. The third one is achieved by sampling the real-time
output current and voltage into DSP to monitor the short-circuit fault Before S1 turns on, the voltage of bus capacitor stabilizes in the
and adjust the overcurrent protection threshold smoothly. Besides, the threshold range. When it turns on, it is the step response process under
fuse and contactor are arranged to improve the reliability. second-order system for the load. According to the complex frequency
domain model in the Fig. 6. According to the superposition principle of
3. Design of key components of SPS module circuit, three power sources can be divided to form the output voltage U
as Eq. (5) under the circuit theory.
The SPS module is designed to reduce the voltage overshoot with no 1
//
increase of rise time of the PSM HVPS, and response fast enough when Ud SC
ZL
IL
any fault especially short-circuit fault occurs. The details of design are as U=
s
× //
1
− 1
s
follows. SC
ZL + sL1 + Rs
( // )
1
3.1. The soft-start resistor sL1 × ZL (5)
sC UC ZL //(sL1 + Rs )
× // + × //
1 s 1
To limit the inrush current of transformers and the charging current ZL + sL1 + Rs ZL (sL1 + Rs ) +
sC sC
of capacitances, the series resistance needs to be connected and
bypassed by switch S3 during module output stage. As shown in Fig. 6, URL = U ×
RL
according to the analysis [11], the soft-start stage is equivalent to the sL + RL
RLC circuit, the transfer function is established as Eq. (2) according to ZL: RL+sL.
Kirchhoff’s voltage law (KVL). First the circuit should be critically The load voltage waveforms with capacitance 1 m F, 2 m F, 4 m F, 6
damped or overdamped as Eq. (3) or it will cause overshoot of the output m F are simulated according to Eq. (5) and the results are shown in
voltage according to the control theory, which usually is decided after Fig. 7. Considering the ripple and volume, the bus capacitance is
bus capacitor. Second, the peak current increases with decreasing of determined as 4 m F.
capacitance while charging time falling down to deprave dynamics. Eq.
(4) shows the trade-off of charging current peak and charging time.
Calculated from the current peak limitation with values bellow, Rsoft 3.3. IGBT, RCD and freewheeling diode
≥11.8 Ω Concerned with bus capacitor bellow, Rsoft is implemented with
20 Ω high energy absorbing resistor, which absorbs up to 30 kJ energy in Take the margin into consideration, the S2 and S3 are implemented
1 ms and has the advantages of non-inductance and small volume. with a 1700 V/150 A IGBT half bridge module. Since the voltage peak of
S3 is clamped up to about 600 V (20 R *30 A) due to its soft start resistor,
Uc (S)
1
it only needs to design the RCD snubber circuit for S1 and S2 to absorb
= (L1 C ) (2)
Ud (S) Rsoft
the turn-off overvoltage caused by the leakage inductance of trans­
S2 + S + L11C
L1 former and the stray inductance introduced by transmission line, elec­
trical connections and devices in the circuit.
( )2
Rsoft 4 1 ( 2 )
Δ= − ≥0 (3) 1
L1 Ihybrid max2 = C2 U2peak − (UCmax − UC )2 (6)
L1 L1 C 2 2
Ud 1 1 2 1 ( 2 )
≤ Rsoft ≤ (4) LS I = C1 U1peak − UC2 (7)
Ithreshold 5C 2 load 2
L1: The equivalent DC side inductance, calculated as about 0.64 mH. Ihybrid: The sum of the capacitor current and load current, which is up
Ud: The equivalent DC side voltage, calculated as about 790 V. to about 30 A according to the experimental results.
Ithreshold: The threshold of peak current decided by tolerance of U2peak: The maximum voltage that S2 can tolerate.

4
S. Ma et al.
Fig. 8. The 3D model of SPS module layout.
Fig. 9. The photograph SPS module.
Fig. 10. Simulation result of heat emission.
LS: The stray inductance as above.
C1, C2: the snubber capacitors of S1 and S2.
The smaller the snubber capacitors C1 and C2, the smaller the peak
short-circuit current, but the larger overvoltage across S1, finally, the
snubber capacitors C1 and C2 take values of 0.068 μF/2500 V and 2.2 μF/
2000 V respectively, the other rated parameters of RCD circuit are 100
Ω/200 W and 1700 V/100 A. According to the paraments above, the
peak short-circuit current is simulated to be 100 A, so S1 is implemented
with a 1700 V/225 A IGBT with its anti-parallel diode. Finally, a 3D
model and a practical SPS module are designed and shown as Figs. 8 and
9.
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Fusion Engineering and Design 169 (2021) 112491
Fig. 11. The operation waveform of SPS module.
Fig. 12. The output waveforms of SPS module.
a. single-pulse output; b. multi-pulse output.
4. Test and analysis on SPS module
Since heat emission are vital for reliability of power supply especially
when tends of series SPS modules, the heat sources of thermal behavior
are described as Eq. (8) under the worst condition. The first part is heat
power of off-state, the second is on-state, the third is switching loss.
According to the test data, Ileak is about 2.5A, on time is 6.2 ms of cycle
1.9 s, considering the max switching frequency of switches: 5 kHz, Ptotal
is about 731 W.
( )
Ptotal = Ileak (off )Vdc + IL Vce (on) + f Eon + Eoff (8)
Ptotal: The total heat source.
S. Ma et al.
Table 2
The performance parameters of SPS module.
Results
Types
Voltage overshoot
Voltage ripple
Turn-on delay
Turn-off delay
Fault shutdown time
Fig. 13. The transient waveforms of SPS module.
a. turn-on process; b. turn-off process.
To manage the heat emission, a basement of finned heat exchanger
and four fans are carefully designed and implemented, the simulation
and test result shows the max temperature is about 55 ℃ as Fig. 10.
With the designs above, a module was manufactured with rated
output of 750 V/25 A. A test platform of the module was established, all
control signals of module are isolated by the optical fibers.The soft start
stage and bus voltage hold stage test result is shown in Fig. 11, since the
Vthreshold set to 750 V, the bus voltage is controlled within Vthreshold − 2 V
and Vthreshold + 2 V, and the switching frequency of S2 is less than 10 Hz,
which is very low.
In order to verify the effect of bus voltage control strategy on the
voltage overshoot. The single pulse and continuous pulse output of
module are compared to the former module. As shown in Fig. 12, it can
be seen that the effect of suppressing the overshoot voltage is obvious,
from the former 10.7 % to 0.7 %, and the voltage threshold can be
Fig. 14. The short-circuit waveform of SPS module.
Fusion Engineering and Design 169 (2021) 112491
Former module Proposed module
10.7 % 0.7 %
0.4 % 0.5 %
2.7 μs 1.2 μs
4 μs 1.2 μs
10 μs 3 μs
automatically adjusted to limit the overshoot when load changes. The
comparison of performance parameters with previous modules are
summarized in Table 2 with its performance improved greatly in all
parameters.
We also checked the response time of SPS module, as shown in
Fig. 13, the turn-on and turn-off delay of module are both about 1.2 μs.
The fast response speed enables the fast dynamic response and high
frequency modulation of the module.
A short-circuit test was performed to verify the performance of the
protection with the overcurrent protection threshold set to 35 A. In
Fig. 14, the output current rises to the maximum value 60A in 3 μs and
then drop to 0 slowly due to the dummy load with large inductance
characteristics, which means that the SPS module is turned off in 3 μs
when the short circuit fault occurs. The result is consistent with the
analysis result above. This in turn realizes the lower energy transferred
to the load and reduces the possibility of damages.
5. Conclusions
Highly demanded SPS module adds the difficulty to design and build
its control system. In this paper, a novel bus voltage control method is
proposed to suppress the voltage overshoot of module, the theoretical
analysis and experimental verification are carried out. And this paper
also describes the detailed design of the SPS module, highlighting its
peculiar merit.
The module output reaches almost no voltage overshoot, and the
voltage threshold is automatically updated when load changes to remain
small overshoot. The module dynamic response delay is extremely short.
Which can achieve high frequency modulation of the module, and
especially, SPS module can be shut off in 3 μs when short-circuit fault
occurs. the new module meets all requirements of the HVPS of NBI
system on CFTER. It can also significantly improve the voltage quality of
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S. Ma et al.
PSM HVPS and simplify its control system.
Declaration of Competing Interest
The authors declare that they have no known competing financial
interests or personal relationships that could have appeared to influence
the work reported in this paper.
Acknowledgments
The authors would like to thank the HVPS group as well as the other
members of the J-TEXT team for their assistance with module testing.
This work was supported by the National Key R&D Program of China
under Grant No. 2017YFE0300104 and by the National Natural Science
Foundation of China (Nos. 51707073 and 51821005).
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