80×86 -

Instruction Set Different Addressing Modes

Types of Instruction ( supported by 80×86 ) :

A Register Addressing
* Data
Transfer Instructions
E MOV AX ,
BX

A Arithmetic Instructions
* Immediate Addressing
* Logical Instructions
Branch Control Instructions address)
• and Program EI :
Mov AX
,
1420h ( luzon is data and not

different format will

Addressing
a and
gain instruction will have A Direct
different
have addressing capabilities AX , [ zzuon ] ( 2540N is offset )
Eg
•

,
: Mov

* Register Indirec t Addressing

]
E MOVIwtmA Intel processors E Mov AX [ BX ]
, ( offset
is stored in X)
have
this course

operand format
Addressing
format : MOV destination ,
source two P Base -

plus -

Index
- -

Eu operand operand E Mov AX , [ B. ✗ + SI

]
be
8 bit ,

( can

Register relative addressing displacement 16 bit )

be
present in

zf
Operands
'

can registers

Wiaddress
tham ,
,
added
② memory Mov AX Contents of resin
E ,
the
to get
,
10 in order
③ can be
specified as part of instruction
* Base relative -

plus -
indexed addressing

E Mov AX , [ BXTSI -110 ]

Addressing Modes

*
A Scaled Indexed Addressing
The
processor
executes an instruction -

it
performs
the specified function on data -

Instruction format ( used for 8086 ⑧ 80286 ) ( 16 bit instruction

format)
* called operands
-

Data -

the instruction
P Mas be a
part of .

* May reside in on e of the internal registers of hemp

* May be stored at an address in memory .

""
① Ry ;
If data is present in resist alone .

Dire (pgisn
issara
( Register
④ Addressing If data
is part of instruction itself destination)
Immediate word
]
:
is
18 bit data with 8
bit

( working
" ,
"" • " "" " " "

③ " "" " ^^ " "

" → ( 16 bit data ) °

affiant)
④ Register Indirect Addressing Storing
:
address in
register
memory
Combination of two registers addressing
③ Base -

plus -
index Addressing : for address modes * 16 bit instruction format doesn't mean size of instruction
is 16 bits .

to rake in

⑥ Register relative addressing : Add offset

region to get
address → It is meant for 16 bit mode of operation .

combination
① indexed addressing using is 16 bit elata
relative plus whatever data we
: → a re
Base of registers
-

offset to
" " immediate
what kind of address 's modes we a re
going
use a re

?
→ .

⑧ Scaled Indexed Addressing to be 16 bit addressing mode

going
( only in 32 bit
up ) bit
→ It is essentially for 16 up .

That's why it is called 16 bit instruction format

Instruction formats

a t instructions not
for 's point
* we are looking , programmer

of but a re
looking them he
up sees it
( 2 operand format )
view we way
.

MOV destination ,
source

works ? * REG (Register ) :

these 3 sits inform the
I now Mov I Purpose) bit

what is going
to be
instruction the content of source into destination
Up register
AI
: MOV
copies .

used .
?⃝
?⃝
 in 16 @ 32 bit mode of operation
)
,
a re
$ ( tells it → when you
MOD +
RIM -

Addressing Modes It
32 bit
you should only use 16 @ address is mode .

used when we do immediate

Byte ] ② y :
they operation
a re
* → If a re in 16 @ 32 bit mode of
you
address is by given
value and it is stored
32 @ 10 bit address is mode
AX [" " %) here 04 like when to in and try to use ,

:
Mov we
gone
eg
,
.

rewired
prefix is
.

this
example , trey
need to be stored .
te n
⇐
offset @ 32 bit
displacement @
that I'm in 16 mode
→ It says ,

nodes too
but I support 32 @ 16 sit addrsig .

Byte 3 → Lower displacement

-

E MOV AX lo[ BX ] lower

Disp to
* size override
Register
-

,
,

Dis p
-

00
Higher
→ In 16 bit mode
, supposed to use 16 bit registers

means
which bit resist say that
→
If want to use
32 , in

for 32 bit mode

refisnsize.by# ⑨ rice ve rs a .

do 32 bit
16 bit mode can
80386 ⑧ 80486 → So , in , you

( Ex 3L bit ADD ⑨ Multiplication )

@ operations .

work like 8086

→ 80286
* 16 -
bit mode of operation First two bytes a re over
-

ridding prefix :

p zz
-
bit mode of operation →
they
h ave some
* need not be used always
modes
addressing
8086 A 1st modifies size of address
supported
in
not

④ 80286 ( 6 bit ) bit address is mode 67h

operating system
] prefix
16-bit mode - 3 2
'
→
Ex :
Dos (Disk
→ 32 bit ro d e - $6 67h
d-
- -

16 bit data , 16 bits addressing

16 bit mode of operation ,
mode
* 2nd modifies size of resister
bit
) 32 of
mode
( upto XP supports resist 86h
]
→ mode bit
prefix
32
→ 16 bit
windows
-
-

operation → 32 -
16 - 66h

So, if you work with DOS

, you
a re in 16 bit mode
has
of operation * one of the operands
to be a
register .

bit it understands
* when 80386 is in 16 mode w= l 16 bit resist
If
,
p ,

16 bit instruction format .

w=o 8 bit resin
If ,

32 bit it undertook format

* When 80386 is in mode , * If 32 bit Instruction ,

42 bit register
32 bit instruction format .

32 -
bit instruction format

0 0 M - o -

¥ Byte

l6b
d
as
| high
Nodisp . 8 bit displaced
gyitqgpe.at
16 bit displawt
i.
bing.p.de
souuaso
" also
res
•
.

-
]→
by
indicate
RM

8 bits @ zzbits
as
16 bits
[ byte)
n
-

hereto be present format in u

0 -

optional format in

* Address Address override :

size @
→ the are%Ñdressig modes exclusive to 32 bit up
④ exdvsie to 16 bit Mp ( Not both) for 16 bit Instruction format
 dip Min
No crisp gbitdisp →
bit source is
is register
Immediate Addressing
destination

* MOV AH
,
4cm

CAN ) < 0100 1100

( copy 4cm in An )

E AX = 9844m

A ✗ = YCYYN ( afh istuctiou )

men

: 1011 W REG
8 bits 32 bits -
I ¥
armor to An
word refer
32bitInstmchfmat @
not

☒
In 80386 -80486 ,
all registry are used Gaston's offset 1 / o l l 0 I o o

EAXFCX ,
f- DX
,
EBX
,
f- S I ,
EDI
÷
80286 only BX resist SI DI BP
By An added
8086 ycn
, we re
#
-

,
In , ,

allowed .

A MOV CX
,AD4Cn

Register Addressing Mode ( X

) <
1010
' 101
0100 1100

16 bits 16 bits E CX = 9844 n

Al Mov AX BX ( copy contents of BX into A- × ) [ ✗ =

ADYCN
, men

ofSamesije(2§{i+i6b
m u st be
(AH < LED [ Both the registers

O l l l 0 0 1

Ex :
BX 19 4AM copied after execution ¥
I
=

139 4C ADN
then AX = 19 YA n
t b
say
Resist is source ( which is B- ✗ here ) c ove r nigh
# we
byte byte
way
of
This
f, specifying
data is called Little Endian method of storage

1 O O O 1 0 0 1 I 1 0 I 1 O O
O

¥,fÉT¥r¥¥ Little vs .

Big Endian

b b b
( 5627h ) is

[ opioid (Ffa )
^^) 16 bit data and memos
fae✗anple:- have on
I
AD
si
ble
of assumed to be byte organized .

* so
, you can store only 8 bits of data in 1
memory

location
89138h .

* 16 bit data rewires 2 locations .

# we say Resists is destination ( which is AX a re

) Ciltlefndian Bigrndian
Vale
%7 IF
location
ÉÉ=- oooo
u
27
000 I 56 ooo I

£ _ * Lower

data
byte of
comes
* opposite
this
in

representation
first
81303m
* All Intel processors follow little Endian
 E Ao ya 56 27 ( 32 bits ) 891£ 00 Don

Ditta Biao
ralf ¥0s rate
location * Nov ( D Goon] ,
Bn
AO
27 000 ①
0
000
00 OH 49
00 0 I 36
0003222 56
Yg
=2,
0 002
003 AO
0003 27
0

É¥°°°°°
-22 , , ,

Direct Addressing

) of
ÑT¥r¥_¥
1
Sona
byte
d
zero
L

disport
L
Bn
L

offset ( Displacement
is Bn
P Mor Ax
, [ izzyn ]→ address
the memory

( DS used for 883£ DGN

CAN < DS : 1234 is 00

bthisaatain.ism.io,
E DS -2000m ( Let )
So
,
Address = 20000+1234 = 212344 * MOV EAX
, [ 123mn ] , ( Assume 32 bit mode
)
21234h 74 EAX < DS : 1234

⑧ 21235h 82
5=2000
Ex : D.

Jain ( )
Little Endian 20000+12134 = 21234N
stored in Address =
So data

[ An] CAL] so
,
21234 74

21235 82
A}
21236
21 23 7 45

f, So
, E.AT/='H5A3827Y#
÷ÉIÉ°É¥¥
C¥¥YY¥
d I b
) 41 1 1 I 1 L L
a
0 0 0 O O O O
0 O O
zero
displaced ¥DE-ÑT¥R¥É
d b L L L
TO
32 F- " ✗ DSL
81306 3412 zero
n
EAX bit disp

81305 34
12h
A MOV 600m ] ,BX

CDS :D 600m ) (
(BX)

E Ds 2000h
Register Indirect Addressing
-

Address = 20000-1 D 600 =

213600m

② B. ✗ = 8A 17h
* Mov AX
, CBX]
SO , 213600m = 17
C- IHA Endian ) BX= 1234m (address)
zpgo ,
n = PA
C- X) < DS : 1234

f, Ex : DS= 2000h

I 0 0 0 I 0 0 1 o o o 1 1 21 0 So Address 10000+1234=212344 ( data

isheef-pf.IT#rIr-
=
,

2123mn d d
74
d
word
ZÉO L
^" 21235h 82
source Bx
is BX displaced Data shed i - AX
=82①
?⃝
 =2-
f, I 0 0 0 1 0 1 1 00 O o o I I 1

1 1 0 1 1 FIJI # TETE

¥=ñw¥¥¥
00 0

11 L
1 1
am
To word
L f L L f- Ax
disp EFX
[BX]
Zero
Axis Word
displaced
Ax ×
]
destination there a re two possibilities .

80386 in 16 bit mode it is

→
If working , supposed

8BO7n house 16 bit addressing ⑧ 16 bit resister -

p32bitj.sk
66 8 Both

* MOV [ SI
] ,
BH

80386 working in 32 bit mode

If
→ then
,

SI =D
600h
67 8B07n
D5= zoo
oh
I
bit
so
,
address -20000 1- D 600 = ↳
600h 16 mode
address
✗ 8A
☒ My
=

8A ( stored * MOV EAX

,
[ ECX ]
F- CX =
0000 1234 n

f, LEAD ← DS : 1234

I 1 =) Address = 20000+1234=212344
0 0 0 1 O O O O o I I L o o Agg = zo o on

FIJI # RI # 21234
21235
in

82
d d d
f d 21236 A]
Zero
Source
byte Bn [ ]
SI 21237 45
is Bn disp .

EAX45A3827Y##
883cm f,
10 0 0 I 0 I 1 O O O O O O O 1
"

* MOV EAX [ Bx ] ( 16 bit address

mode
¥E-ѧ¥¥¥
)
, d l t
a word
[ BX ]
Zero
B✗= F- AX f- ⇐
1234h
b/c
of isfitdestiation disp .

( EAX) C DS : 1234

E DS = 2000m
81301h (32 bit mode )

Adders =
20000+1274=212344 6766
81301h if 16 bit mode
)

21234m 74

21235 82
Register Relative Addressing
21236 A 3

21 237 45

so
,EAX 45A3827Y& (stored ) * MOV AX ,34[ Bx ]

@ Mor AX
,
@ ✗ +34 ]

✗ 1200h
E =

DS :( 200-134
☒ <

=) IS = 2000h
 -134=21234
Address = 20000 + 1h00
46 bit mode ) 67 66 8 B. 823402m ( override's)

21234
21235
FL
so
,A×=82 Based plus Indexed Addressing Only
mode of
16 bit

:S
address
E#tE, * MOV AX ,
[ BXTSI ]
10 0 0 I 0 1 I 0 1 O O O 1 It
BX =
1200h

ÉfÉT¥r¥¥ SI =
0034h
d t b b L
best word D8 EI DS = 2000 n

CBX]td8
.

A- ✗
is Ax
disp so address = 20000 1- 1200+0034 =
21234h
,

21234m 72
81-347 34h
21235h 84

* MOV CSI -1600 ] ,

BH
So
,
AX=8H72n@
SI -1600
(Bn) > DS :

EI :
SI =D 000h
f,
I 0 0 0 I 0 I 1 O O O O O O O O
DS IOOON

Address = 2000 + 130001-600 = 21360 On ¥ÉÑ ¥R¥ #

BX=8A Mn
t d
word %Yp
d
Adx t

@× ] -101:]
pest .

is AX
=)
2D600n
8 ( 00h

f, Base Relative plus Indexed Addressing Bones

16

bitmooeeog

÷i=÷É=_
I 0 1 I 2 1 00

Address 's .

* ^" @ ✗ + SI-16oofp.sn
L L L L t
dib BX ( 000h
byte
=
source Bn
CSI] -1dg
is Bn disp SI = 1000h
=)

So
,
address =
zoooo + ( ooo -11000+600
88 BC 00
06h
= 2D -600h

B ✗ = 8A 17h
A MOV EAX [ Ecx -1234N ]
2D600n
,

E, E,
I

.tw#rr=a---Ir=i--wm--r=a-
0 0 0 I 0 I 1 1 O O O O O O I I o I I 1 O O O

¥=
t d d t d k
L d
we
t t
word d "
EAX LECH from 916
@×]tfsI]tdH
Eax -1dm
Bh
is source
1¥) disp
pm disp

bit mode ) 81381 3402m (

s u re will be 0000 also ) 8813800 06h
It is generally going
to be
put
?⃝
* Example of Based
plus
Indexed Addressing n2,

ÉÉÉÉ÷÷
* Mov f- AX ,
[B- ✗ + SI ]

16 bit Address 's .

d L a
d d
resister word
32 bit To Ze ro
EAX Scaled
EAX disp I n d ex

=) BX =
1200h

51=-0034 n
z o o o z o z 1 lnmotur 8 bits
)

q,
É%d×
[ TET
Scali > value
Address = 20000+12001-0034 =
21234h
Index 00
scaling

z , ,
Base
Resign {
,
zzyn t d
21235 µ,
82
I ECX EBX
' '

21236h A
}
21237h
gBoyg
45
( 32 bit mode of operation)

EAX=45A3827& )
6ygggBoygp@
of operation
( 16 bit mode

f, Segment overrides

I 0 0 0 I 0 1 1 O O O O O O O O

-ÉEÑT¥R¥¥ * If we don't wa n t to fetch some data

d d d d t
word from Data segment CDs ) but from ES @ SS .

to zero EAX
(BX]t[ SI ]
Eax 132 ) disp override
.

* we do segment foetus .

used
66 8 Boon [ 16 bit mode of operation] P
Segment overrides can be with

any addressing modes

[ 3L bit mode of operation ] used a s plinth

If Bp
67 8 Boon is
*
Ss
is default
* MOV AX ,[B× ]

Scaled Indexed Addressing (only in 80386 =) BX = 1234N

Onwards )
⑧ CAN ← DS : 1234 [ Default)
* MOV EAX
, [ f- Bx+y*ECX]→bdi&×
( can be 1,2 ,
So
,
Now Mor Ax
, EI:[ BX ] ( ES assegmet
override
)
y @ 8)
=) EBX = 0000 1130h Segment override Prefix
F- ( ✗ = 0000 000 I
n

so
,
address = 20000+1230 + 4*0001
segmeutprezfigxnvalue.ES
+
( 23° 0004 2 (2) 2 F-
Yn
= 10000 1- =
CS n

SS 36N
74 DS
21234h 3 F- n

21235h 82 FS Gun
21236N As as 65h
21237h
yg

EAX = us a ] 8274
ÉÉ-

÷Éñw¥¥-
I 1 O O o o o I I 1

Tothxwtird Zthoeisp F- ✗ Csx]

 26 81307 * Instruction decoder knows
µ
true
size of
a
intuition

first8-bitsofopcode.si
f- s from

je of data is known for of destination

size
loading segment registers
AX 16 bits
bits if
-

register
-

if AL -8

Seg code

000
ES

CS 001

SS 010

DS 011
f- 5 100

US 101

* MOV DS
,
AX [only 16 bit resist

is used with Segment

( Immediate addressing register ( Dusty
allowed )
not
Ax register ) ]
( so first we transfer
and t h e n to
to AX
Ds
)
Format :
100011 DO MOD SEGREG RIM
t
d d L
To
segmet
from A ✗
usually
@ from
above
in his
12
sennet case
resin table
(register
to register)

10001110 11
-
011 000
- -

l t L t
At
TO Mod Ds

segvg

8 F- D8

FAQs

⑧ If BP is pointer ,
55 is
default
accumulator
⑧ Format for men .

8
direct
@ 16 bit
to/from

g.
dis
dy
w p
10100C
1 if from ace

0 if to a- cc

[ 1420 ] AX
E Mov ,

A- 32014
101000-11 20 In
A ,