Unit –V

Memory and Programmable Logic

1 a) What is RAM? Design a 4 X 4 RAM.

Random-access memory, or RAM, is a form of data storage that can be accessed randomly at
any time, in any order and from any physical location in contrast to other storage devices, such as
hard drives, where the physical location of the data determines the time taken to retrieve it. RAM
is measured in megabytes and the speed is measured in nanoseconds and RAM chips canread data
faster than ROM.

Construction of 4X4 RAM:

The logical construction of a small RAM consists of four words of four bits each and has a total of16
binary cells. The small blocks labeled BC represent the binary cell with its three inputs and one
output. A memory with four words needs two address lines. The two address inputs go through a 2 4
decoder to select one of the four words. The decoder is enabled with the memory-enable input.

When the memory enable is 0, all outputs of the decoder are 0 and none of the memory words are
selected. With the memory select at 1, one of the four words is selected, dictated by the value in the
two address lines. Once a word has been selected, the read/write input determines the operation.
During the read operation the four bits of the selected word go through OR gates to the output
terminals.

During the write operation, the data available in the input lines arc transferred into the four binary
cells of the selected word. The binary cells that are not selected are disabled and their previous
binary values remain unchanged. When the memory select input that goes into the decoder is equalto
0 none of the words are selected and the contents of all cells remain unchanged regardless of the
value of the read/write input.
1 b) Explain in brief about memory decoding.

MEMORY DECODING

In addition to requiring storage components in a memory unit, there is a need for decoding circuits
to select the memory word specified by the input address.

The storage part of the cell is modeled by an SR latch with associated gate s to form a D latch.
Actually, the cell is an electronic circuit with four to six transistors. The select input enables the
cell for reading or writing and the read/write input determines the operation of the cell when it is
selected.

A 1 in the read/write input provides the read operation by fanning a path from the latch to the
output terminal. A 0 in the read/write input provides the write operation by forming a path from the
input terminal to the latch.
 2 a) What is an Error in digital systems? List the sources of errors.

Error is a condition when the output information does not match with the input information.
During transmission, digital signals suffer from noise that can introduce errors in the binary bits
travelling from one system to other. That means a 0 bit may change to 1 or a 1 bit may change to
0.
Two types of errors: Random bit errors and Burst errors. A channel that usually has random bit
errors will tend to have isolated bit flips during data transmissions and the bit errors are
independent of each other.

Sources of Errors

Line noise and distortion can cause data communication errors. The focus in this section is on
electrical media such as twisted-pair wire and coaxial cable, because they are more likely to suffer
from noise than are optical media such as fiber-optic cable. In this case, noise is undesirable
electrical signals (for fiber-optic cable, it is undesirable light). Noise is introduced by equipment
or natural disturbances, and it degrades the performance of a communication circuit. Noise
manifests itself as extra bits, missing bits, or bits that have been "flipped" (i.e., changed from 1 to
0 or vice versa).

White noise or Gaussian noise is caused by the thermal agitation of electrons and therefore is
in escapable.

2 b) Explain about Error correction & Detection Codes with examples.

Error detection and correction:

When the digital information in the binary form is transmitted from one circuit to another circuit an error
may occur. To maintain the data integrity between transmitter and receiver extra bit or more than one bit
are added in the data. These extra bits allow the detection and sometimes correction of error in the data.
The data along with the extra bits forms the code. Codes which allow only error detection are called error
detecting codes and codes which allow error detection and correction are called error detecting and
correcting codes.

Parity Bit:

A parity bit is used for the purpose of detecting errors during transmission of binary information. A parity
bit is an extra bit included with a binary message to make the number of 1s either odd or even. The circuit
generates the parity bit in the transmitter is called a parity generator and the circuit that checks the parity in
the receiver is called a parity checker. There are Two types of parity: Odd parity, even parity.

In even parity the added parity bit will make the total number of 1s an even. In odd parity the added parity
bit will make the total number of 1s an odd.
 Decimal 8421 code
0 0000
1 0001
2 0010
3 0011
4 0100
5 0100
6 0110
7 0111
8 1000
9 1001
Odd parity Even parity
1 0
0 1
0 1
1 0
0 1
1 0
1 0
0 1
0 1
1 0

Ex: Even parity scheme

(a) 10101010 ( b) 11110110 (c) 10111001

Ans:
(a) No. of 1‘s in the word is even is 4 so there is no error
(b) No. of 1‘s in the word is even is 6 so there is no error
(c) No. of 1‘s in the word is odd is 5 so there is error

Ex: odd parity

(a)10110111 (b) 10011010 (c)11101010
Ans:
(a) No. of 1‘s in the word is even is 6 so word has error
(b) No. of 1‘s in the word is even is 4 so word has error
(c) No. of 1‘s in the word is odd is 5 so there is no error

Hamming Code:

Hamming code not only provides the detection of a bit error but also identifies which bit is in error so that
it can be corrected. Thus hamming code is called error detecting and correcting code. The code uses a
number of parity bits located at certain positions in the code group.

Step-I: Number of parity bits:

Number of parity bits depend on the number of information bits. If the number of information bits is
designed x, then the number of parity bits, P is determined by the following relation ship

2p≥x+p+1
Ex: Encode the data bits 1101 into the 7 bit even parity Hamming Code

The bit pattern is

P1P2D3P4D5D6D7

1 1 0 1
Bits 1,3,5,7 (P1 111) must have even parity, so P1 =1 Bits 2, 3, 6, 7(P2 101) must have even

parity, so P2=0 Bits 4,5,6,7 (P4 101) must have even parity, so P4=0

The final code is 1010101

3 a) Define and distinguish between PROM, PLA & PAL.

PROM: PROM is an abbreviation for Programmable Read-Only Memory. When a memory device stores
information in binary form permanently then it is known as Read-Only Memory or ROM but when the
ROM can be programmed by including a programmable feature in it then it is known as PROM. By
applying for the PROM program, the user has the flexibility to program the binary data.

PLA: PLA or Programmable Logic Array is a device that contains various OR, AND gates and other logic
circuits linked together. PLA is such kind of logic device that can be programmed to perform various
combinational logic circuits.

PAL: PAL or Programmable Array Logic is also a device that can perform various logic functions and
also combined with AND and OR gates but the difference is that it has fixed OR array and programmable
AND array. It is simple to use but not much flexible as compared to PLA.
Differences between PROM, PLA and PAL:
3 b) Design and Implement the following Boolean expressions using PROM
F1(A,B,C)=Σm(0,2,4,7), F2(A,B,C)=Σm(1,3,5,7).
 4 a) Compare RAM and ROM.

Comparison chart

RAM ROM

Definition Random Access Memory or RAM is a
form of data storage that can be
accessed randomly at any time, in any
order and from any physical location,
allowing quick access and
manipulation.
Read-only memory or ROM is also a form of
data storage that cannot be easily altered or
reprogrammed. Stores instructions that are
not necessary for re-booting up to make the
computer operate when it is switched off.
They are hardwired.

Stands for Random Access Memory Read-only memory

Use RAM allows the computer to ROM stores the program required to initially
read data quickly to run applications. It boot the computer. It only allows reading.
allows reading and writing.

Volatility RAM is volatile i.e. its contents are lost It is non-volatile i.e. its contents are retained
when the device is powered off. even when the device is powered off.

Types The two main types of RAM are static The types of ROM include PROM, EPROM
RAM and dynamic RAM. and EEPROM

4 b) List the different types of ROMs.

Types of ROM:

 Masked Read Only Memory (MROM)

 Programmable Read Only Memory (PROM)
 Erasable and Programmable Read Only Memory (EPROM)
 Electrically Erasable and Programmable Read Only Memory (EEPROM)
 Flash ROM

5 a) What is ROM? Explain combination of PLD’S.

A read only memory (ROM) is a device that includes both the decoder and the OR gates within a single IC
package. It consists of n input lines and m output lines. Each bit combination of the input variables is
called an address. Each bit combination that comes out of the output lines is called a word. The number of
distinct addresses possible with n input variables is 2n.
 Figure: Block Diagram of ROM

Programmable Logic Device (PLD):

An IC that contains large numbers of gates, flip-flops, etc. that can be configured by the user to
perform different functions is called a Programmable Logic Device (PLD).

The internal logic gates and/or connections of PLDs can be changed/configured by a programming
process.

One of the simplest programming technologies is to use fuses. In the original state of the device,
all the fuses are intact.

Programming the device involves blowing those fuses along the paths that must be removed in
order to obtain the particular configuration of the desired logic function.

PLDs are typically built with an array of AND gates (AND-array) and an array of OR gates
(OR-array).

There are three fundamental types of standard PLDs: PROM, PAL, and PLA.

A fourth type of PLD, which is discussed later, is the Complex Programmable Logic Device
(CPLD), e.g., Field Programmable Gate Array (FPGA). A typical PLD may have hundreds to
millions of gates.

Three Fundamental Types of PLDs:

The three fundamental types of PLDs differ in the placement of programmable connections in the
AND-OR arrays. Figure shows the locations of the programmable connections for the three types.
  The PROM (Programmable Read Only Memory) has a fixed AND array (constructed as a
decoder) and programmable connections for the output OR gates array. The PROM implements
Boolean functions in sum-of-minterms form.

 The PAL (Programmable Array Logic) device has a programmable AND array and fixed
connections for the OR array.

 The PLA (Programmable Logic Array) has programmable connections for both AND and
OR arrays. So it is the most flexible type of PLD.

5b) Design internal logic of a 32 X 8 ROM.

 A 32 * 8 ROM. The unit consists of 32 words of 8 bits each.

 There are five input lines that form the binary numbers from 0 through 31 for the address.
 It shows the internal logic construction of this ROM.
 The five inputs are decoded into 32 distinct outputs by means of a 5 * 32 decoder.
 Each output of the decoder represents a memory address.
 The 32 outputs of the decoder are connected to each of the eight OR gates.
 The diagram shows the array logic convention used in complex circuits.
 Each OR gate must be considered as having 32 inputs.
 Each output of the decoder is connected to one of the inputs of each OR gate.
 Since each OR gate has 32 input connections and there are 8 OR gates, the ROM contains 32 * 8 =
256 internal connections.
 In general, a 2k * n ROM will have an internal k * 2 k decoder and n OR gates.
 Each OR gate has 2 k inputs, which are connected to each of the outputs of the decoder.
6a) What is PLA? List its applications.

PLA: PLA or Programmable Logic Array is a device that contains various OR, AND gates and other logic
circuits linked together. PLA is such kind of logic device that can be programmed to perform various
combinational logic circuits.

Applications:

 PLA is used to provide control over data path.

 PLA is used as a counter.
 PLA is used as a decoder.
 PLA is used as a BUS interface in programmed I/O.

6b) Design and Implement following Boolean functions using PLA

F1(A,B,C)=Σm(0,1,3,5) and F2(A,B,C)=Σm(0,3,5,7).

Given F1(A,B,C)=Σm(0,1,3,5) and F2(A,B,C)=Σm(0,3,5,7)

7 Design and Implement the following functions using PLA.
A(x,y,z)=∑m(1,2,4,6), B(x,y,z)=∑m(0,1,6,7), C(x,y,z)=∑m(2,6).
8a) What is PAL? List its applications.

PAL: PAL or Programmable Array Logic is also a device that can perform various logic functions and
also combined with AND and OR gates but the difference is that it has fixed OR array and programmable
AND array. It is simple to use but not much flexible as compared to PLA.

Applications:

• PAL is the most commonly used type of PLA

• Counter
• State machine
• Decoder
• Synchronization
• Bus Interfaces
• Parallel to serial
• Serial to parallel
• Glue logic
• Combinational logic circuit

8 b) Illustrate the PAL for the following Boolean function

(i)W(A,B,C,D) = Σm(0,2,6,7,8,9,12,13)
(ii)X(A,B,C,D) = Σm(0,2,6,7,8,9,12,13,14)

Table: PAL Programming table

The PAL realization for these Boolean functions is as follows
 9 a) Explain in brief about Sequential programmable logic devices

Digital systems are designed with flip‐flops and gates. Since the combinational PLD consists of
only gates, it is necessary to include external flip‐flops when they are used in the design. Sequential
programmable devices include both gates and flip‐flops. In this way, the device can be programmed
to perform a variety of sequential‐circuit functions. There are several types of sequential
programmable devices available commercially, and each device has vendor‐specific variants within
each type. The internal logic of these devices is too complex to be shown here. Therefore, we will
describe three major types without going into their detailed construction:

1. Sequential (or simple) programmable logic device (SPLD)

2. Complex programmable logic device (CPLD)
3. Field‐programmable gate array (FPGA)

1. Sequential Programmable Devices: The sequential PLD is sometimes referred to as a simple PLD to
differentiate it from the complex PLD. The SPLD includes flip‐flops, in addition to the AND–OR array,
within the integrated circuit chip. The result is a sequential circuit as shown in Figure.

A PAL or PLA is modified by including a number of flip‐flops connected to form a register. The
circuit outputs can be taken from the OR gates or from the outputs of the flip‐flops. Additional
programmable connections are available to include the flip‐flop outputs in the product terms formed
with the AND array. The flip‐flops may be of the D or the JK type.

SPDs are electronic circuits that are used for controlling mechanical devices or machines. They can
be found in a variety of settings, from the most complex operations and tasks to simple machine control
solutions. SPDs can also trigger actions such as counting, sequencing, and timing for other devices.
These devices are used in a variety of industries including medical, industrial automation, aerospace
and defense, military, consumer electronics, energy management systems, and transportation
systems.

2. Complex programmable logic device (CPLD): The design of a digital system using PLDs often requires
the connection of several devices to produce the complete specification. For this type of application, it is
more economical to use a complex programmable logic device (CPLD), which is a collection of individual
PLDs on a single integrated circuit. A programmable interconnection structure allows the PLDs to be
connected to each other in the same way that can be done with individual PLDs.
It shows the general configuration of a CPLD. The device consists of multiple PLDs interconnected
through a programmable switch matrix. The input–output (I/O) blocks provide the connections to the IC
pins. Each I/O pin is driven by a three state buffer and can be programmed to act as input or output. The
switch matrix receives inputs from the I/O block and directs them to the individual Macrocells. Similarly,
selected outputs from macrocells are sent to the outputs as needed. Each PLD typically contains from 8 to
16 macrocells, usually fully connected. If a macrocell has unused product terms, they can be used by other
nearby macrocells. In some cases, the macrocell flip‐flop is programmed to act as a D, JK, or T flip‐flop.

A complex programmable logic device, or CPLD, is any semiconductor device that can be
programmed to perform a variety of logical operations. Depending on the manufacturer and
intended use, a CPLD may contain hundreds or even thousands of individual logic blocks that can
each be programmed to perform specific functions on digital signals.

3.Field programmable gate array (FPGA): A FPGA is a type of electronic circuit designed to be
reprogrammed in the field while it is still working. This alternative to general-purpose computers can
provide several advantages. FPGAs can be used for tasks such as signal processing, encryption, ISP packet
filtering, power supply design, and other areas where software typically cannot compete with hardware
implementation. FPGAs are often applied in systems that require parallel computation capability such as
voice- processing systems for telephony or music synthesis systems for audio.
In Summary, sequential programmable devices are versatile and allow for easy customization for a variety
of different applications. Their ability to be reprogrammed has allowed them to go from being simple
mechanical mechanisms used for the most menial of tasks, such as clocking machines or timing sequencing
scripts or other tasks, to high-level electronic devices that can interface with other electronic devices and
provide real-time monitoring and control system solutions. They are a relatively new technology that is still
in development with many potential uses still unexplored.

9b) Explain basic Macrocell logic.

A macrocell is a basic building block that consists of five product terms and a configurable register, and
can be configured individually for either sequential or combinational logic operation. A macrocell consists
of three functional blocks: the logic array, the product-term select matrix, and the programmable register.
A macrocell is also generally known as a logic cell.

These are the functional blocks that perform combinatorial or sequential logic, and also have the added
flexibility for true or complement, along with varied feedback paths. Traditionally, CPLDs have used
analog sense amplifiers to boost the performance of their architectures.
Macro-cells in the integrated circuits (IC) design are large blocks which can be viewed as black boxes. The
logic and electronic behavior of these macro-cells are given but the inside structural description may or
may not be known. As a consequence, macro-cells may have flexible geometries and pins of macro-cells
can be located inside the block. The sizes of macro-cells are much larger than the sizes of standard-cells. A
typical macro-cell could have a size being several percent of the whole placement area. Macro-cells are
usually divided into two categories: soft macro-cells and hard macro-cells. Soft macros can have several
possible specified shapes while hard macros have only one fixed geometry.

10 a) Discuss about Complex programmable logic device.

Complex Programmable Logic Device (CPLD) is one of the PLD. It is used for the implementation of
the logical circuits. It is a complex device than programmable logic devices discussed in previous
sections. CPLD contains the circuitry similar to PAL devices. Figure 1 below shows the typical
CPLD architecture having four function blocks of PLDs.

The function blocks has programmable interconnections. A switch matrix is used for function
blocks to function blocks interconnections. Further, switch matrix in a CPLD may or may not be
fully connected. This shows that, some of the connections between function block outputs and
inputs are not supported in the CPLD. The complexity of a typical PAL device is around few
hundred logic gates whereas the complexity of CPLD is around tens of thousands of logic gates.


The CPLDs has predictable timing characteristics hence are suitable for critical control applications
and other applications where a high performance level is required. Further, due to low power
consumption and low cost, CPLDs are mostly used for battery-operated portable applications such
as mobile phones, digital assistants etc.

10 b) What are Integrated Circuits? List its applications.
An integrated circuit is a minuscule chip made of semiconductor material. This chip is what makesthe
entire circuit. It is quite small in comparison to the basic circuit circuits made of different
components and approximately the size of a human fingernail. At present, the most common
integrated circuits used are the monolithic chips.

Integrated circuit meaning would be a chip used in almost every electric equipment or appliance
found in the present times. This includes computers, televisions, mobiles and even toys meant to be
used by children.

Applications of Integrated Circuits:

Integrated circuits are used in different forms. The varied uses of the integrated circuit include:

 Wristwatches  Microwave amplifiers  Video processors

 Radar  Voltage regulators  Memory devices
 Computers  Small-signal amplifiers  Audio amplifiers
 Juice makers  Calculator chips  Radiofrequency
 Televisions  Microcontrollers decoders and encoders
 Logic devices  Clock chips  Counters
 Memory chips  Temperature sensors  Timers