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UNIT 1

Q1. Silicon Control Rectifier (SCR)


Static I-V characteristics of SCR can be
explained through following three modes
of operation :
(1) Reverse Blocking Mode
(2) Forward blocking mode
-It is four layered PNPN Switching devices, (3) Forward conduction mode
having three junctions J1, J2, J3. (1): Reverse blocking
-It has three external terminal namely the When negative and positive terminals of
anode (A) cathode(K) &gate(G) the D.C. supply are connected to anode
(A) and cathode (K) respectively without
-The anode and cathode are connected to
any gate current as shown in the following
the main power circuit
fig, J, and J3 get reverse biased while
-The gate terminal Carries a low level gate junction J₂ gets forward biased.
current in the direction gate to Cathodes
-the gate terminal is provided at the p
layer near the cathode
This is known as cathode Gate
-when the end P layer is made positive
w,r,t. end N layer, the two junction J1 & J3
(2): Forward blocking
Forward biased but the middle junction J2
When positive and negative terminals of
becomes reversed biased.
the D.C. supply are connected to anode
-Thus the junction J2 because of the
(A) and cathode (K) respectively without
presence of depletion layer, does not
any gate current as shown in the following
allow any current to flow through the
Fig., junctions J, and J, get forward biased
device
while junction J, gets reverse biased.
-only leakage current, neglisibly small in
magnitude, flows through the device due
to the driff of the mobile charges
-This current is insufficient to make device
conduct the depletion mostly of immobile
charges do not Constitute any flow of
Current. In other word, the SCR under the (3): Forward conduction mode
forward biased does not conduct. - After the avalanche breakdown, SCR gets
Q2.Static V-I Characteristic of SCR turned on and remains in the forward
conduction mode, causing a voltage drop
of 1V to 3V across it depending upon its
rating.
- In this mode, SCR acts as a closed switch.
-An SCR can be brought from forward
blocking mode to forward conduction
mode by turning it ON by applying a
positive gate voltage pulse so that a gate
current (1) flows between gate to cathode the entire cross section of the cathode of
such that higher the gate current, lower is SCR. After value and the voltage drop
the forward break over Voltage as shown across SCR is equal to the on-state voltage
in the fig. drop of the order of 1 V to 1.5 V.

Q3. Turn- on & Turn -off characteristics of


SCR
* TURN – ON
1) A forward-biased SCR is usually turned
on by applying (i a positive gate voltage
pulse between gate and cathode.
2) There is however a transition time from
forward off-state to forward on-state.
3) Total turn-on time can be divided into
three intervals :
(1) Delay Time (Td)
(2) Rise Time (Tr)
(3) Spread Time (Ts)
(1) Delay Time (Td)
(i) The delay time Td is measured from the
instant at which gate current reaches 90%
of final value Ig to the instant at which
anode current reaches 10% of final value
Ia. *TURN-OFF
(ii) The delay time may also be defined as (1) SCR turn-off means that it has changed
the time during which anode voltage falls from on to off state and is capable of
from Va, to 90% of Va Where Va, is the blocking the forward voltage. The turn-off
initial anode voltage. During delay time time (T) of SCR is defined as the time
anode current rises from forward leakage between the instant anode current
current to 10% of final value Ia becomes zero, and the instant SCR regains
(2) Rise Time (Tr) forward blocking capability.
(i) The rise time (Tr), is the time taken by (2) During the off time (Tag), all the excess
the anode current to rise from 0.1 Ia (10% carriers from the four layers of SCR must
of final anode current) to 0.9 Ia , (90 % of be removed. This removal of excess
final anode-current). carriers consists of sweeping out of holes
(ii) The rise time is also defined as the from outer p-layer and electrons from
time required for the forward blocking outer n-layer.
off-state voltage to fall from 90 % of its (3) The carriers around the junction J, of
initial value to 10%. SCR can be removed by recombination.
(3) Spread Time (T) (4) the turn-off time is divided into two
(ii) It is also defined as the time for the intervals
forward blocking voltage to fall from 0.1 1. Reverse Recovery Time
V, to on state voltage drop (1 V1.5 V). 2. Gate Recovery Time
During this time, conduction spreads over
an electric field is established as shown in
the Fig.
(5) At last, induced negative charges in the
p-substrate below SiO₂ layer are formed
thus causing the p-layer below gate to
become an induced n-layer. These
electrons (negative charges) form n-
channel between n+ regions and current
can flow from drain to source as shown by
the arrow in the Fig.
(6) If VGs is made more positive, induced
n-channel becomes more deep and
therefore more current flows from D to S.
Q4. Working of Power MOSFET & Steady This shows that drain current Ip is
state characteristics of it enhanced by the gradual increase of gate
Working: voltage, hence the name enhancement
MOSFET.
Steady State Characteristics

(i) The circuit diagram for plotting steady


(1) As shown in the Fig. , on P-substrate
state characteristics of power MOSFET is
(or body), two heavily doped n' regions
shown in fig.
are diffused. An insulating layer of silicon
(ii) The voltages Vos and Vps with forward
dioxide (SiO2) is grown on the surface.
current from drain to source In are
(2) Now this insulating layer is etched in
indicated. The source terminal is taken as
order to embed metallic contacts which
common terminal between the input and
form source and drain terminals of
output of a MOSFET.
MOSFET.
(I) Transfer Characteristics
(3) A layer of metal is also deposited on
(1) This characteristic shows the variation
SiO2 layer so as to form the gate of
of drain current ID as a function of gate-
MOSFET in between source and drain
source voltage Vocs as shown in the Fig.
terminals.
(2) Threshold voltage Vost is an important
(4) When gate circuit is open, junction
parameter of MOSFET. VOST is the
between n* region below drain and p-
minimum positive voltage between gate
substrate is reverse biased by input
and source to induce n-channel.
voltage VDD. Therefore, no current flows
(3) For Vos below Vost device is in the off-
from drain to source and load. When gate
state. Magnitude of VGST is of the order
is made positive with respect to source,
of 2 to 3 V.
- this means trigger circuit damage due to
device damage therefore these must be
some electric isolation between control
and power circuit .
- Isolation can be achieved by using :
A) Pulse transformer
B) Using optocouplers
(II) Output Characteristics
A) Isolation using pulse transformer
The output characteristics of N-channel
- pulse transformer having one primary
power MOSFET is shown in the Fig.
and one secondary winding.
1.16.6. The output characteristics is a plot
- It is normally used for pulsed mode of
of drain current (ID) versus drain to source
triggering get fig below shows the
voltage (VDS) for different values of gate
isolation using pulse transformer.
to source voltage (Vcs).
- In above circuit observed that triggering
circuit is electrically isolated from IGBT.

B) Isolation using optocouplers-


Q5. Isolated gate of MOSFET optocoupler consist of pair of infrared
- Derive circuit operates or very low LED and phototransistor.
power levels. Normally the signal levels
are 3 to 12 V.
- sometimes digital circuits & up are aiso
used to trigger circuit.
- the gate and base drive are connected to - When the signal is applied to the
power devices which operates of high infrared LED it turn on
power. - it light falls on phototransistor therefore
, phototransistor also starts conducting .
there is no electric connection between
LED and phototransistor .
Q6. Insulated Gate Bipolar Transister
(IGBT)
- From above fig observe that drain of
- it is another development in power
MOSFET can have voltage of 200V. but
electronics
base is connected to trigger circuit that
- it is obtained by combining properties of
have voltage of 5V . if MOSFET is
BJT & MOSFET
damaged and drain gate gets shorted,
- this devices retains the high input
then high voltage will get connected to
impedance of the MOSFET and in addition
trigger circuit . this will damage trigger
a low on state voltage drop which is
circuit also.
comparable to that of bipolar transistor
- fig. below shows a symbol of IGBT : (1) Static
(i) Due to the inherent variations in the i,
V/S. VAK (i.e. static) characteristics of
individual MOSFET as shown in the
following Fig. 1.16.10(b), the voltage
shared by each MOSFET in OFF state is not
- the IGBT has three terminals : Gait(G) ,
equal.
collector(C) & emitter (E)
- current flows collector to emitter
whenever a voltage between gate and
emitter is applied .
- the IGBT is said to be turn on , when gate
emitter voltage is removed it is turn off
- thus a gate has full control over the ii) A uniform voltage distribution in the
conduction of IGBT. steady state is achieved by connecting a
- structure of IGBT shunt resistance (Rs) across each MOSFET
which is called the static equalizing
resistance and the circuit formed by such
resistances is called static equalizing
circuit.
(B) Parallel Connected MOSFET:
(I) Need Connection
(i) When the output current required is
very high as in the case of battery
Q7. Series and parallel operation power chargers and overhead D.C. supply in
MOSFET railways etc. parallel connection of
(A) Series Connected MOSFET : MOSFET is used.
(I) Need of series Connection (ii) Two (or more) MOSFETs of lower
(i) When the output voltage required is very
current rating are connected in parallel to
high as in the case of electronic precipitators
form a string as shown in the following
used for pollution control in chemical
factories, refineries etc. series connection of Fig. 1.16.11(a) in which their output
MOSFET is used. current (IT) is more at the same output
(ii) Two (or more) MOSFETs of lower voltage string voltage (V).
ratings are connected in series to form a
string as shown in the following Fig. 1.16.10(a)
and their output voltage is called string
voltage V, while the voltage of each MOSFET
is called link voltage VL.

(II) Equalization of currents

(i) The V-I characteristics of the two


parallel connected MOSFETs in the
(II) Equalizing circuits
These are of following two types:
conding mode is shown in the following (iii) Some of the MOSFETs sharing more
Fig. currents will dissipate more power causing
higher junction temperature which will
further increase their current.

(iv) The process is cumulative and ultimate


their junction temperature will exceed the
maximum permissible limit and those
MOSFETs will be damaged permanently one
ii) For equal sharing of currents between by one due to thermal run away.
MOSFETs, their current ratings must be same
which is not possible practically as shown in
the Fig. because for the same voltage (V) Q8. Difference between SCR , BJT , Power
there will be some small difference in the ON- MOSFET & IGBT
state currents I, and I₂ supplied by them.
Q9. Two transistor model of SCR
UNIT 2 (b) the load voltage waveform is similar to
that with an inductive load.
Q1. Three Phase Converters with R – (c) the SCRs are commutated due to the line
Lode commutation.
Mode (II): Discontinuous conduction
(a) The load current is discontinuous as the
load voltage reaches zero.
(b) Due to this the conducting pair of SCRs is
turned OFF.
(c) As the load voltage cannot become
negative the converter works only as a
rectifier and inverter action is not possible.
(II) Explanation of the circuit
(1) In three phase fully controlled bridge
converter, six S.C.R.s are connected in a
bridge to obtain full wave rectification.
(2) SCR1, SCR3, SCR5 form the positive
group while SCR4, SCR6, SCR₂ form the
negative group.
(3) SCRs are numbered in the order of
their triggering. The SCR triggering
sequence is 12, 23, 34, 45, 56, 61, 12, 23,
34, ...
Q2) Single phase full wave fully controlled
(4) The positive group is turned ON when
bridge converter using R – L
the supply ( voltage is positive and the
(I) Assumptions
negative group is turned ON when the 1) The R-L load is highly inductive hence the
supply voltage is negative. The R load is load current is continuous.
connected across the common cathode 2) The transformer secondary winding
point of SCR2, SCR4, SCR. resistance is very small and the potential drop
(III) Working across it can be neglected.
(1) A three phase full converter with a 3) The SCR is ideal means after applying the
purely resistive load (R) has two modes of input voltage Vi and once it is triggered with a
working depending upon the value of the gate voltage pulse VG, it acts as short circuit
firing angle a as shown in the following and hence conducts but during the negative
half cycle of Vi i.e. during the forward blocking
Fig.
state, the SCR acts as open circuit and does
not conduct.

(2) These are described as follows:

Mode (I): Continuous conduction


(III) Working
(a) the load current is continuous
(1) During interval 0 < thita < a
SCR, and SCR, remain in the forward blocking (c) At 0 = 2n, the negative cycle of V₁ starts
state while SCR₂ and SCR4 are reverse biased. which tends to reverse bias SCR2 and SCR4
Hence all the SCRs act as the OFF switch.. i = 0 but the load current (i) will not change
and Vo = i x R = 0 instantly as, the inductive part L has stored
energy during 0 = (π + α) and θ = 2π. Hence
SCR2 and SCR4 still conduct during this
period.

(ii) During interval α≤0≤ (π + α)


(a) SCR, and SCR3 are triggered by applying a
gate voltage (VG) pulse at 0 = a hence they
conduct and act as the ON switch. The load
current (i) flows as shown developing an
output voltage Vo across the highly inductive
R-L load.
(b) The output current rises from the initial
value at = a exponentially and rises to a
maximum value it 0 = π.
(c) At 0 = π, the negative cycle of Vi starts Q3. Single phase full wave fully controlled
which tends to reverse bias SCR₁ and SCR3 but bridge converter using R load
the load current (i) will not change instantly as (I) Assumptions
the inductive part L has stored energy during (1) The transformer secondary winding
0 = 0 and 0 = π. Hence SCR₁ and SCR3 still resistance is very small and the potential drop
conduct during this period. across it can be neglected.
(iii) During interval (+α)≤ thita<_(2π +α) (2) The SCR is ideal means after applying the
(a) SCR2 and SCR4 are triggered by applying a input voltage Vi and once it is triggered with a
gate voltage (VG) pulse at 0 = (π + a) hence gate voltage pulse VG, it acts as short circuit
they conduct and act as the ON switch during and hence conducts but during the negative
this period. i, flows as shown developing an half cycle of Vi i.e. during the forward blocking
output voltage Vo across the load. SCR₁ and state, the SCR acts as open circuit and does
SCR4 remain in the forward blocking state and not conduct.
do not conduct.

(III) Working
(a) During positive half cycle of Vi
(b) The output current (i) rises from its initial
(i) During interval 0≤0≤α
value at 0 = (π + α) exponentially and rise to a
SCR₁ and SCR3 remain in the forward blocking
maximum value at 0 = 2π.
state while SCR2 and SCR4 are reverse biased.
Hence all the SCRs act as the OFF switch: i = 0 Q4. Single phase half wave rectifier with R – L
and Vo=ixR=0 load
(ii) During interval α≤0≤π (1) To understand the significance of the
SCR, and SCR3 are triggered by applying a gate freewheeling diode (or flywheel diode or
voltage (VG) pulse at 0 = a hence they conduct bypass diode), consider an RL load connected
and act as the ON switch. The load current i, across a single phase half wave controlled
flows as shown developing an output voltage rectifier.
V across R load. (II) Assumptions
(1) The RL load is highly inductive.
(2) The transformer secondary winding
resistance is very small and the potential drop
across it can be neglected.
(3) The SCR is ideal means after applying the
input voltage vi and once it is triggered with a
gate voltage pulse VG, it acts as short circuit
and hence conducts but during the negative
(b) During negative half cycle of Vi half cycle of vi i.e. during the forward blocking
(i) During interval π≤0≤ (π + α) state, the SCR acts as open circuit and does
SCR2 and SCR4 remain in the forward blocking not conduct.
state while SCR₁ and SCR3 are reverse biased. (III) Circuit diagram
Hence all the SCRs act as the OFF switch.. i = 0 Consider the Fig. which represents a single
and Vo = ix R = 0. phase half wave controlled rectifier with an RL
(ii) During interval (π + α) ≤0≤2π load across which a freewheeling diode (FWD)
SCR2 and SCR4 are triggered by applying a is connected.
gate voltage (VG) pulse at 4) = (π + α) hence
they conduct and act as the ON switch. The
load current flows as shown developing an
output voltage Vo across the R load.

1) The SCR gets forward biased and remains in


the forward blocking state.
(ii) It acts as an OFF switch. i=0 and v = 0
(1) When the S.C.R. is triggered by applying a
positive voltage pulse VG at the gate Gat the
firing angle a, the S.C.R. conducts and like ON
switch.
(2) FWD gets reverse biased, acts as open
circuit and does not conduct. The load current
i, flows as shown in the
(3) Simultaneously four actions take place:
1. a self induced EMF e₁ is developed and
2. the input voltage v₁ = V2 applied across the
load.
3. electromagnetic energy is stored in the
inductance L of the load.
4. the resultant output voltage vo = (Vi+er)
appears across the load.
Mode (III): During the interval π≤ 05 (2π + α)
(1) At 0 = the input voltage V₁ becomes zero
since the SCR is reverse biased and the output
voltage vo = eL
(2) The supply current is zero since the SCR is
OFF, but the load current i, flows continuously
through the load and the freewheeling diode
FWD after 0 = n due to the dissipation of the Q5. Single phase half wave rectifier with R
stored energy in the inductance L. load
(3) The load current i, decreases but does not (I) Assumption
become zero. Thus, the load current flows (1) Let us Consider a purely resistive load R for
continuously after 6 = π due to the which the output voltage v, and the load
freewheeling action current in will be in phase.
(2) The transformer secondary winding
resistance is very small and the potential drop
across it can be neglected.
(3) The SCR is ideal means after applying the
input voltage V; and once it is triggered with a
gate voltage pulse VG, it acts as short circuit
and hence conducts but during the negative
half cycle of Vi i.e. during the forward blocking
(1) At 0 = the input voltage V₁ becomes zero state, the SCR acts as open circuit and does
since the SCR is reverse biased and the output not conduct.
voltage vo = eL (II) Circuit diagram
(2) The supply current is zero since the SCR is
OFF, but the load current i, flows continuously
through the load and the freewheeling diode
FWD after 0 = n due to the dissipation of the
stored energy in the inductance L.
(3) The load current i, decreases but does not
become zero. Thus, the load current flows
continuously after 6 = π due to the
freewheeling action (III) Working
Q6. Single phase Controlled rectifier
(1) For convenience, let us discuss the
operation of a half wave controlled mctifier
saing an SC.R. in series with a portly resistive
load (R). A variable D.C. cutput voltage v, is
obtained across the load (R) by varying the
firing angle (8) of the SCR.
(i) During the positive half cycle of V; as
(2) Its symbol and block diagram are as shown
shown Fig. the SCR gets Forward Biased and
in the Fig. and (b) respectively. Note that
remains in the forward blocking state.
S.C.R. acts as a controlled switch. The single
(ii) Once triggered at the delay angle a,
phase A.C. supply voltage is applied across the
conducts between a and π. i₁ flows in the
S.C.R. and series connected load.
direction developing the output voltage vo of
the polarity shown across RL.

Working
(3) The working is explained in the following
steps:
(1) During the negative half cycle of V₁ as A) Between 0 = 0 and a, the S.C.R. does not
shown in the Fig. 2.3.1(c) the SCR gets conduct and acts as the OFF switch therefore
reverse biased and remains in the reverse no load current i flows hence no output
blocking state and hence does not conduct voltage is developed across the load since
between π το 2π.
.. no load current flows in .. vo = 0.
(ii) The process is thus repeated by triggering
at a, (2π + α), (4π + α)... developing the output
voltage vo. Since only i/2 cycle of the input
voltage waveform is used and since we can
control output voltage vo by properly B) When a positive voltage pulse V is applied
selecting the delay angles a, hence it is called to the gate G at the firing angle ct, the S.C.R.
as half wave controlled rectifier. conducts and acts as the ON switch and the
load current it flows through the load from 0
and rad developing the output voltage the
load as shown in the Fig.

C) Between θ = π and 2n, the S.C.R. gets


reverse biased and acts as the OFF switch
therefore no load current i flows hence
as shown in the Fig. Thus, the S.C.R. gets
commutated naturally.
D) The S.C.R. remains OFF between 0 = 2π τo
(2π + α) since it is not triggered hence V = 0 as
shown in the Fig.

e) At 0 = (2π + α) a positive voltage VG is


applied to the gate G, the S.C.R. conducts,
acts as the ON switch and the load current in
flows through the load from θ = (2π + α) and 3
developing the output voltage V across the
load R as shown in the Fig.

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