LM5157/58 DC/DC Coupled Inductor SEPIC Controller Design Tool

ABOUT =Input Box TERMS OF USE

Rev 1.0.2 March-2022

Step 1: Design Specifications
Minimum Input Supply Voltage , VSUPPLY(min) 8V
VSUPP LY LM CAC VLOAD VSUPP LY
Typical Input Supply Voltage, VSUPPLY(typ) 12 V

ILOAD
Maximum Input Supply Voltage , VSUPPLY(max) 16 V
Output Target Voltage, VLOAD 5V VCC
Maximum Output Current , ILOAD 2A CVCC D1
RVCC
+

RLOAD
Free Running Switching Frequency, FSW 2100 kHz

COUT
CIN

CIN
Free running Oscillator Set Resistor, RT 9.57 kΩ –

RUVT
Output Power, POUT 10 W LM
SEPIC Regulator Duty Cycle Limit by LM5157/58 at VSUPPLY(MIN) 80.9 % BIAS VCC
Ideal Duty Cycle at VSUPPLY(MIN) 38.5 % UVLO/SYNC SW
LM51571
LM5157x

RUVB
Step 2: Filter Inductor
VCC PGND VC
Required Mode of Operation: CCM
Desired Maximum Inductor Current Ripple Ratio (IRR_MAX) 30 %
AGND

RFBT
Recommended Inductance (LM_CALC) 3.36 uH
User Selection. Inductance, (LM) 5.1 uH
RPG FB
Peak inductor current, ILPK 3.54 A PGO OD

RFBB
RT COMP
Step 3: Device Selection
RT
Device Recommenation LM51571
RMODE

CCOMP RCOMP
Device Selected LM51571 Mode SS

CHF
Peak Current Limit Margin 22 %
Slope Compensation Check Pass
CSS
Step 4: CAC Capacitor Selection
Minimum couplpling capacitor value (C AC_min) 0.46 uF
Selected Coupling Capacitor (C AC) 4.7 uF
Minimuum require CAC RMS current Rating 1.58 A VSUPP LY LM CAC VLOAD VSUPP LY

ILOAD
Step 5: Output Capacitor Selection VCC
Desired load step ripple voltage (ΔvOUT) 150 mV CVCC D1
+

RLOAD
Minimum output capacitance 82.87 uF

COUT
CIN

CIN
Capacitor RMS current (I RMS_COUT) 1.58 A –
RUVT

Selected Output Capacitance (C OUT) 30 uF LM

BIAS VCC
Equivalent COUT ESR (R ESR) 0.3 mΩ
UVLO/SYNC SW
Step 6: Soft-Start Capacitor Selection LM5158x
RUVB

Suggested minimum soft-start capacitor (C SS_MIN) 0.75 nF VCC PGND VC

Desied soft-start time at minimum input voltage (T SS) 10 ms
AGND

RFBT
Calculated soft-start capacitor (C SS) 100 nF
RPG FB
Step 7: UVLO Resistor Divider Selection PGO OD

RFBB
Desired voltage On (VUVLO_ON)
Desired voltage OFF (VUVLO_OFF)
3.8 V
3.5 V Bode Plot
RT VIN = 12 COMP
V Gain (dB) Phase (deg)
RT
Calculated top UVLO resistor value (R UVT_CALC) 34.92 kΩ 60 RMODE 180

CCOMP RCOMP
Mode SS
Selected top UVLO resistor value (R UVT) 34.8 kΩ
CHF

Bottom UVLO Resistor (R UVB) 22.696 kΩ

40
CSS
Step 8: Loop Compensation 90
Voltage selected (VIN_VAR) 12V 20
8

Feedback Resistor Selection fz_ea

fLP

Phase (deg)
Gain (dB)

Select a top feedback resistor(R FBT) 51.1 kΩ 0 0

Calculated bottom feedback resistor (R FBB_cala) 12.78 kΩ
Select a bottomresistor based on calculated balue(R FBB) 4.64 kΩ
-20 fz_rhp

-90
Suggested bandwidth 12.803 kHz
Selected band width (F CO) 5 kHz -40 fp_ea
Crossover Frequency = 12.9 kHz
Calculated Selected Phase Margin = 79°
RCOMP 0.364 kΩ 2 kΩ -60 -180
10 100 1000 10000 100000 1000000
CCOMP 114.16 nF 47 nF
Frequency (Hz)
CHF 5696 pF 220 pF

Efficiency / Power Loss Analyzer

Diode Parameters η VIN = 12 V Loac Current (A) Eff MOSFET Diode RCS
Recommended minimum average current rating (I D_AVG) 2A 100 2
Forward Voltage Drop (VD) 700 mV
Reverse recovery charge of Schottky Diode (QRR) 10 nC 1.8
95

1.6
90
1.4

85
1.2
Efficiency (%)

Losses (W)

80 1

0.8
75

0.6
70
0.4

65
0.2

60 0
0 0.5 1 1.5 2 2.5
 About this tool...

Version Number 1.0.2

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Version History
Version Change List Description
1.0.0 Initial Release
1.0.1 Updated Schematic, updated MOSFET loss calculation
1.0.2 Fixed calculation of loop compensation
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ftware provided in binary form.

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