A simple DBPSK modem based on high-speed

logical gates for a 70/80 GHz GbE microwave link.

Jonas Hansryd, Jingjing Chen, Yinggang Li, Bengt-Erik Olsson
Ericsson Research, Ericsson AB, SE-431 84 Mölndal, Sweden
jonas.hansryd@ericsson.com

(a)
Abstract—A simple DBPSK modulator and demodulator based
on high-speed logical gates is implemented. The modulator Baseband
Differential encoder BPSK modulator
signal
and demodulator is verified in a GbE microwave link for the
DIN
70/80 GHz band. Performance is evaluated back-to-back and in T Flip- IF
CLK AND XOR
an outdoor hop over 1 km. We also show how the scheme may Flop

be extended to support the DQPSK format and thus double the

capacity further.
Oscillator

I. I NTRODUCTION
The mobile backhaul network is the most important com-
mercial application for point-to-point microwave links with a (b)
global installed base exceeding three million devices. How- Baseband
Differential encoder
signal BPSK modulator
ever, with the roll-out of next generation, radio access tech-
nologies (e.g. HSPA+, LTE rel. 8, LTE rel. 10 and beyond) DIN XOR XOR IF

the backhaul network needs increased capacity [1]. From a

typical bit rate of 2-10 Mbps in todays ”last mile” links and
up to 100 Mbps for aggregated links, it is predicted that the 1 bit
Oscillator

network in a few years time must support 100-1000 times this delay

capacity. Here, the recently available 70-80 GHz band with a

total bandwidth of 10 GHz over two bands (71-76 GHz and 81-
86 GHz) will be an important complement to the conventional
microwave bands (6-38 GHz). Using high speed ADC’s and
DAC’s upto 6 Gbps point-to-point microwave links has been
demonstrated [2].
The modulation of a digital signal onto a microwave RF
carrier is commonly performed in sequential steps where the
baseband signal is in a first step converted to an interme-
diate frequency (IF) and in a second step converted to the
RF microwave carrier. In order to utilize the full available
bandwidth of the 70/80 GHz band the width of the IF may
in extreme cases span up to 5 GHz when implemented in a
Frequency Division Duplex (FDD) configuration (transmitting
on one band and receiving on another).
The 70/80 GHz band is advantageous as it allows for mi-
crowave links with multi Gbps capacity. A second application
for the 70/80 GHz band is low cost, medium capacity modems
utilizing a wide spectra but a lower order of modulation and
thus without the need for costly high-speed ADC’s, DAC’s and
parallel, high symbol rate, signal processing implemented in
FPGAs or ASICs. Further, a low order modulation transmitter
relaxes the requirements on the power amplifier allowing for
higher output power, lower power consumption and lower cost.
In this work we demonstrate a simple implementation of the
well-known differential binary phase shift keyed (DBPSK)
modulator and suboptimum DBPSK demodulator using com-
mercially available digital high-speed logical gates.
Fig. 1. XOR based BPSK modulator with (a) AND based differential
encoder [3] and (b) XOR based differential encoder.
II. DBPSK MODULATOR AND DEMODULATOR
A DBPSK modulator (Figure 1) consists of two main
blocks: a differential encoder performing a modulo two addi-
tion of the input symbol with the output symbol and a BPSK
encoder modulating an IF with 0◦ or 180◦ phase.
A. Differential encoder
Two implementations of a differential encoder (DE) have
been considered: (I) a digital AND gate succeeded by a high-
speed T Flip-Flop (Inphi 13751DE) [3] (see Figure 1a) and (II)
a high-speed digital exclusive-or (XOR) gate (Inphi 13610XR)
with one symbol feedback delay [4] (see Figure 1b). An
important advantage of the AND based DE is simplified
implementation as there is no need for a precise feedback
delay line while the drawback is the need for an external
clock (CLK) synchronized with the symbol rate. This paper
has focused on the earlier implementation shown in Figure 1a.
Here a clock and data recovery circuit (CDR) (Silicon Labs
Si5023) was used to generate the CLK for the AND gate.
B. BPSK modulator
In traditional BPSK modulators an analog mixer is often
used for phase modulation of the signal. In this work the

978-1-4244-2519-8/10/$26.00 ©2010 IEEE

 1 bit networks are commercially available in volumes [5]. The IF
delay
generated by the LO is 9.16 GHz when transmitting on the
high band (81-86 GHz) or 10.4 GHz when transmitting on the
IF
Baseband
signal
low band (71-76 GHz).
XOR
C. DBPSK demodulator
The block scheme for the suboptimum DBPSK demodulator
Fig. 2. XOR based suboptimum DBPSK demodulator. [4] is shown in Figure 2. The DBPSK encoded IF is split into
two paths where the first path is delayed one symbol compared
10-2
Low frequency High frequency PRBS: 231-1
to the second path. The two signal paths are combined in a
10-3 operation window operation window high-speed XOR gate (Inphi 13160XR). An important criterion
10-4 is the one bit delay line, which for a symbol rate of 1.25 Gbaud
9.16 GHz IF 10.4 GHz IF
10-5 (GbE rate) should be approx. 800 ps. Further, the delay needs
10-6 to match the IF frequency so that the delay is a multiple of the
BER

10-7 IF period. As a consequence of the latter, the DBPSK decoder

10-8 will for a fixed delay have different operating windows for the
10-9 IF frequency.
10-10 Figure 3 shows the measured IF operating windows for
10-11 the DBPSK demodulator with a 800 ps delay. A DBPSK
8.5 9 9.5 10
Intermediate frequency (IF) [GHz]
10.5 11
modulated IF signal at 1.25 Gbps with a PRBS = 231 −1) and
high signal-to-noise-ratio is fed into the DBPSK demodulator.
Fig. 3. BER versus IF for a XOR based DBPSK demodulator at 1.25 Gbps. The bit-error-rate (BER) is monitored while the IF is swept
Insets shows measured eye diagrams on used IF frequencies. from 8.5 GHz to 11 GHz. A third operating window offering
inverted data is placed from 9.5 GHz to 10.1 GHz.

BPSK encoder is implemented through a high-speed XOR III. S YSTEM INTEGRATION

gate (Inphi 13610XR) operating on a local oscillator (LO)
and differentially encoded data. By using a XOR gate with a
bandwidth equal to or higher than the frequency of the LO
the narrow band analog oscillator signal is treated as a digital
series of 1’s and 0’s. Note that the bit rate handled by the XOR
is twice the LO frequency, in our case 20 Gbps and 10 GHz
respectively. By XOR’ing the LO with a logic control signal
(1,0) the output IF will be inverted (180◦ phase shift) or non-
inverted (0◦ phase shift) compared to the LO. A mixed, analog
and digital implementation, is advantageous in high symbol
rate applications as high bandwidth digital broadband circuits,
driven by optical communication and high speed local area
The DBPSK modulator and demodulator was integrated into
an outdoor 70/80 GHz microwave link. Figure 4 shows the link
block diagram. The radio has an optical GbE signal interface
(1000BASE-LX) and a monitor port for measuring received
70/80 GHz power. It utilizes a FDD transmission scheme. The
transmitter consists of a DBPSK encoder (Figure 1a) and a
70/80 GHz Tx module generating a RF carrier on either the
71-76 GHz (low) or the 81-86 GHz (high) band depending on
which band is used for Tx/Rx. A variable attenuator attenuates
the IF thereby controlling the output RF power. Maximum
output power is 18.6 dBm. The antenna gain is 43 dBi. On
the receiver side a 70/80 GHz Rx module converts the received

Antenna
Clock data
Differential BPSK Variable 70/80 GHz
recovery
encoder modulator attenuator T x-module
(CDR)

1000BASE-LX
transceiver

DBPSK Limiting 70/80 GHz

decoder amplifier Rx-module
Diplexer

R F P o wer
monitor

Fig. 4. Block diagram of the 70/80 GHz microwave radio.

 -4
10 I
XOR
PRBS:231-1
-5
10
DQPSK
-6
10
Oscillator Combiner
DIN IF
Encoder
10
-7 +
BER

-8
10 (a)
90°

-9
10
XOR
Link #1
-10 Q
10 Link #2
Link #3
-11
10 Link #4
(b) 45°
-12 Phase
10 shift
Combiner
-70 -65 -60 -55 -50 -45
XOR
Received power, dBm +
1 bit
delay
Fig. 5. Back-to-back BER vs. received power for four 70/80 GHz microwave DOUT
links. Lines are inserted as a help for the eye. Insets: (left) mounted radio at Combiner
IF
2:1 MUX
outdoor test site, (right) eye diagrams of detected signal. +
-45°
Phase
1 mm/h 3 mm/h 5 mm/h 7 mm/h shift
10 Combiner
XOR
9 mm/h
+
9
1 bit
8 11 mm/h delay

13 mm/h
7 15 mm/h
Max hop length [km]

17 mm/h
6 Fig. 7. Block diagram of XOR based (a) DQPSK modulator and (b) DQPSK
demodulator.
5

3 RF to an IF (9.16 or 10.4 GHz), a limiting amplifier amplifies

2
the signal and the DBPSK demodulator (Figure 2) converts it
from the IF to the baseband.
1
Figure 5 shows measured BER versus received power into
0 the 70/80 GHz Rx module for four different microwave
110 120 130 140 150 160 170 180 190 200
Link gain [dB]
30 mm/h
links using the DBPSK modulator and demodulator. A PRBS
4
pattern length of 231 − 1 was used. The effective noise figures,
3.5
measured between antenna and demodulator, for links 1 to
50 mm/h
4 was measured to 7.8 dB, 7.1 dB, 7.8 dB, and 8.2 dB.
3 The calculated theoretical threshold for a suboptimum DBPSK
70 mm/h
demodulator at BER= 10−12 , 1.25 Gbps and the noise figures
Max hop length [km]

2.5
90 mm/h above is -58.3 dBm, -59.0 dBm, -58.3 dBm, and -57.9 dBm
110 mm/h
2
130 mm/h
[4]. As shown in Figure 5, the measured receiver threshold
150 mm/h
170 mm/h
values agree well with theory. No pattern dependence of the
1.5 190 mm/h
receiver threshold value was observed.
1 A 70/80 GHz microwave link with the integrated DBPSK
modem was set up over a 1 km outdoor hop. The link gain
0.5
in dB is typically 162 dB and is here defined as the sum of
0 Tx output power (18 dBm), antenna gain at Rx side (43 dBi),
110 120 130 140 150 160 170 180 190 200
Link gain [dB] antenna gain at Tx side (43 dBi) minus the receiver threshold
value (typically -58 dBm). The fading margin across the 1 km
Fig. 6. Calculated maximum hop length [km] versus link gain [dB] for hop is 30 dB. Figure 6 shows calculated maximum hop length
rain intensities between 1 mm/h and 190 mm/h (72 GHz carrier and vertical
polarization). Red dashed line shows link gain for the demonstrated radio versus link gain and rain intensity assuming 72 GHz centre
configuration. frequency, ground level, and a vertically polarized signal. The
path attenuation is calculated from the ITU-R models ITU-
R:P676-8 [6], and ITU-R:P838-3 [7]. As shown in the figure,
the demonstrated radio configuration (link gain 162 dB) covers
 TABLE I
DQPSK ENCODER TRUTH TABLE . R EFERENCES
[1] S. Little, “Is Microwave Backhaul Up To The 4G Task?” IEEE Microwave
Input (DIN) I(k) Q(k) Δϕ Magazine, vol. 10, pp. 67–74, August 2009.
00 I(k − 1) Q(k − 1) 180◦ [2] V. Dyadyuk, J. Bunton, R. Kendall, J. Pathikulangara, O. Sevimli, and
01 Q(k − 1) I(k − 1) −90◦ L. Stokes, “Improved spectral efficiency for a multi-gigabit mm-wave
10 Q(k − 1) I(k − 1) 90◦ communication system,” in Microwave Conference, 2007. European,
11 I(k − 1) Q(k − 1) 0◦ Munich, Germany, Oct. 2007, pp. 810 –813.
[3] H. Shankar and P. van der Wagt, Implementing a high-speed differential
encoder, White Paper, Inphi Inc., USA, 2008.
[4] F. Xiong, Digital Modulation Techniques, 2nd ed. Norwood, USA:
Artech House, 2006, ch. 4, p. 143.
> 1 km hops for rain intensities below 110 mm/h. [5] B.-E. Olsson, J. Mårtensson, A. Rhodin, and A. Alping, “RF-assisted
optical dual-carrier 112 Gbit/s polarization-multiplexed 16-QAM trans-
mitter,” in Optical Fiber Communication, 2010. OFC 2010. Conference
IV. E XTENSION TO DQPSK on, March 2010, paper OMK5.
[6] “Attenuation by atmospheric gases,” International Telecommunication
The XOR based DBPSK scheme may be extended to a Union/ITU Radiocommunication Sector, Geneva, Switzerland, Tech. Rep.
ITU-R:P676-8, Oct. 2009.
differentially encoded quadrature phase shift keyed DQPSK [7] “Specific attenuation model for rain for use in prediction methods,” In-
modulator and demodulator as shown in Figure 7. In Figure 7a ternational Telecommunication Union/ITU Radiocommunication Sector,
the modulator section is shown. Here an input on-off-keyed Geneva, Switzerland, Tech. Rep. ITU-R:P838-3, Jan. 2005.
[8] Z. He, J. Chen, Y. Li, and H. Zirath, “A Novel FPGA-based 2.5Gbps D-
(OOK) data stream (DIN) is encoded as a DQPSK signal onto QPSK Modem for High Capacity Microwave Radios,” accepted for oral
an IF generated by the oscillator. In order to use the simple presentation at ICC 2010.
demodulator scheme shown in Figure 7b the signal needs to
be differentially encoded at the modulator. Compared to the
very simple differential encoder for the DBPSK modulation
format the encoder for DQPSK is slightly more complicated
to implement. Table I shows the truth table for the DQPSK
encoder block. Two incoming DIN bits are processed simul-
taneously and encoded onto symbol k. Q(k) and I(k) are
the binary values (0,1) of the quadrature (Q) and in-phase
(I) arms for symbol k while Q(k) and I(k) are the inverted
values for Q(k) and I(k) and Δϕ is the generated phase shift
compared to the previous symbol. The encoder block may
be physically implemented with discrete Flip-Flop circuits,
or a high speed FPGA [8]. Figure 7b shows the DQPSK
demodulator section. Here, the incoming DQPSK modulated
IF is split into two arms using a combiner circuit. Using two
additional combiners the upper and lower arms are split into
two arms where the path difference between the two arms are
equal to one symbol and ±45◦ with respect to the IF. The
two DQPSK modulated paths are combined into a XOR gate
demodulating the signal into a baseband signal. The two OOK
signals are finally combined into an output baseband signal
(DOUT) by a 1:2 MUX circuit.

V. C ONCLUSION

In this work we have presented and implemented a simple,

mixed signal, differential binary phase shift keying (DBPSK)
modem for Gbps data rates based on high-speed logical gates.
A 10 GHZ BPSK IF is directly generated from a high-speed
XOR gate by treating the signal from a local oscillator as
a consecutive series of 1’s and 0’s. A sub-optimum DBPSK
demodulator is implemented through a second XOR gate.
Receiver threshold values agree well with theory indicating
that negligible system penalty is added through the imple-
mentation of the modem. The modulator and demodulator
schemes are scalable to differential quadrature phase shift
keying (DQPSK).