Professional Documents
Culture Documents
INSTRUCTION SET
09/03/19
Introduction
An instruction or a line of code is an order
or command given to a processor by a
computer program. All commands are
known as instruction set and set of
instructions is known as program.
8051 have in total 111 instructions, i.e. 111
different words available for program
writing.
09/03/19
Label: a label is a name or symbol given to
the address number.
09/03/19
Instruction:
Every instruction can be converted into
unique Machine
language binary code .
Each instruction is made up of three distinct
part .
Instruction Part 1 2 3
mov destination, source
(mnemonic) (operands)
09/03/19
Instruction Format
Where first part describes WHAT should be
done, while other explains HOW to do it.
Part 2 is called operand or data address –It
specifies the destination for the data that is
being copied from the source.
Part 3-operand containing the address of
the source location.
Depending upon the number of bytes
required to represent 1 instruction
completely.
09/03/19
Types Of Instructions
Instructions are divided into 3 types;
09/03/19
Types Of Instructions
1. One/single byte instructions :
OPCODE 8 bit
EX: NOP
CLR
RET
09/03/19
Types Of Instructions
2. Two/double byte instruction:
09/03/19
Types Of Instructions
3. Three/triple byte instruction:
09/03/19
Types Of Instructions
1. First byte will be instruction code.
2. Second byte will be 8 LSB’s of 16 bit
number.
3. Third byte will be 8 MSB’s of 16 bit number.
EX:
LJMP addr16
09/03/19
Addressing Modes
Addressing modes specifies where the data
(operand) is. They specify the source or
destination of data (operand) in several
different ways, depending upon the
situation.
09/03/19
Addressing Modes
There are 5 types of addressing modes:
1. Immediate addressing.
2. Register addressing.
3. Direct addressing.
4. Register indirect addressing
Accessing
5. Index addressing. memories
09/03/19
Immediate Addressing Mode
In immediate addressing mode, the data is
given with the instruction itself.
In this case; the data to be stored in
memory immediately follows the opcode.
Can load information into any registers,
including 16-bit DPTR register
DPTR can also be accessed as two 8-bit registers,
the high byte DPH and low byte DPL
09/03/19
Immediate Addressing Mode
For example;
MOV A, #25H (This instruction will move
the data 25H to accumulator---load 25H
into A)
MOV R4,#62 ;load 62 into R4
MOV B,#40H ;load 40H into B
MOV DPTR,#4521H ;DPTR=4512H
MOV DPL,#21H ;This is the same
MOV DPH,#45H ;as above
09/03/19
Immediate Addressing
Diagram
Instruction
Opcode Operand
Register Addressing Mode
In register addressing mode; the source
and/or destination is a register.
09/03/19
Register Addressing Diagram
Instruction
Operand
Register Addressing Mode
For example:
• ADD A, Rn (This is general instruction).
• ADD A, R5 (This instruction will add the
contents of register R5 with the
accumulator contents).
Example
MOV A,R0 ;copy contents of R0 into A
MOV R2,A ;copy contents of A into R2
ADD A,R7 ;add contents of R7 to A
09/03/19
Direct Addressing Mode
In direct addressing mode; the address of
memory location containing data to be read
is specified in instruction.
09/03/19
Direct Addressing Diagram
Instruction
Opcode Address A
Memory
Operand
Direct Addressing Mode
For example;
09/03/19
Register Indirect Addressing
Mode
In register indirect addressing mode, the
contents of the designated register are
used as a pointer to memory.
09/03/19
Indirect Addressing Diagram
Instruction
Opcode Address A
Memory
Pointer to operand
Operand
Register Indirect Addressing
Mode
For example;
09/03/19
Index Addressing Mode
Offset (from accumulator) is added to the base
index register (DPTR OR Program Counter) to
form the effective address of the memory
location.
Indexed addressing mode is widely used in
accessing data elements of look-up table entries
located in the program ROM
The instruction used for this purpose is MOVC
,@A+DPTR
Use instruction MOVC, “C” means code
The contents of A are added to the 16-bit register
DPTR to form the 16-bit address of the needed data
09/03/19
Index Addressing Mode
For example:
09/03/19
Types Of Instructions
1. Data transfer instructions.
2. Arithmetic instructions.
3. Logical instructions.
4. Logical instructions with bits.
5. Branch instructions.
09/03/19
Data Transfer Instructions
These instructions move the content of one
register to another one.
09/03/19
Data Transfer Instructions
MNEMONIC DESCRIPTION
MOV A,Rn (A) (Rn)
MOV A,R1 (A) (R1)
MOV A,@Ri (A) (Ri)
MOV A,#X (A) Data
MOV Rn,A (Rn) (A)
MOV Rn, Rx (Rn) (Rx)
MOV Rn, #X (Rn) Data
MOV Rx, A (Rx) (A)
MOV Rx, Rn (Rx) (Rn)
09/03/19
Data Transfer Instructions
MOV Rx, Ry (RX) (Ry)
MOV Rx, @ Ri (Rx) (Ri)
MOV Rx, # X (Rx) Data
MOV @ Ri, A (Ri) (A)
MOV @ Ri, Rx (Ri) (Rx)
MOV @ Ri, #X (Ri) Data
MOV DPTR, #X (DPTR) Data
MOVC A @ A+DPTR (A) (A+DPTR)
MOVC A@ A+PC (A) (A+PC)
09/03/19
Data Transfer Instructions
MOVX A, @
DPTR (A) (DPTR)
09/03/19
Data Transfer Instructions
MOVX @DPTR, A (DPTR) (A)
09/03/19
Data Transfer Instructions
XCH A, Rn (A) (Rn)
09/03/19
Arithmetic Instructions
These instructions perform several basic
operations. After execution, the result is
stored in the first operand.
09/03/19
Arithmetic Instructions
MNEMONICS DESCRIPTION
ADD A, Rn A = A + Rn
09/03/19
Arithmetic Instructions
ADD A, # X Add immediate data
to accumulator
ADDC A, Rn A = A + Rn + C
ADDC A , Rx A = A + Rx + C
ADDC A, @ Ri A = A + Ri + C
ADDC A, # X A = A + Byte + C
SUBB A, Rn A = A – Rn – 1
09/03/19
Arithmetic Instructions
SUBB A, Rx A = A – Rx
SUBB A, @ Ri A = A – Ri
SUBB A, # X A = A – Byte
INC A A=A+1
INC Rn Rn = Rn + 1
INC Rx Rx = Rx + 1
09/03/19
Arithmetic Instructions
INC @ Ri Ri = Ri + 1
DEC A A=A–1
DEC Rn Rn = Rn – 1
DEC Rx Rx = Rx – 1
DEC @ Ri Ri = Ri – 1
09/03/19
Arithmetic Instructions
MUL AB B:A = A * B
DIV AB A = [A/B]
09/03/19
Logical Instructions
These instructions perform logical
operations between two register contents
on bit by bit basis.
09/03/19
Logical Instructions
MNEMONIC DESCRIPTION
ANL A, Rn (A) (A) ^ (Rn)
ANL A, Rx (A) (A) ^ (Rx)
ANL A,@ Ri (A) (A) ^ (Ri)
ANL A, # X (A) (8 bit data) ^ (A)
ANL Rx, A (Rx) (A) ^ (Rx)
ANL Rx,# X (Rx) (8 bit data) ^ (Rx)
09/03/19
Logical Instructions
09/03/19
Logical Instructions
ORL Rx, A (Rx) (A) + (Rx)
09/03/19
Logical Instructions
XORL A, Rx Logical exclusive OR
operation between the contents of the
accumulator and directly addressed register Rx.
XORL A,@ Ri Logical exclusive OR
operation between the contents of the
accumulator and indirectly addressed register.
XORL A, # X Logical exclusive OR
operation between the contents of accumulator
and the given 8 bit data.
XORL Rx, A Logical exclusive OR
operation between the contents of the
accumulator and directly addressed register Rx.
09/03/19
Logical Instructions
XORL Rx, # X Logical exclusive OR
operation between the contents of the
directly addressed register Rx and the
given 8 bit data.
CLR A (A) 0
CPL A (A) (A)
SWAP A (A3-0) (A7-4)
09/03/19
Logical Instructions
RL A (An + 1) (An)
(A0) (A7)
09/03/19
Logical Instructions
RR A (An) (An + 1)
(A7) (A0)
09/03/19
Logical Instructions On Bits
09/03/19
Logical Instructions On Bits
MNEMONIC DESCRIPTION
CLR C (C=0)
CLR bit clear directly addressed bit
SETB C (C=1)
SETB bit Set directly
addressed bit
CPL C (1 = 0, 0 = 1)
addressed bit
09/03/19
Logical Instructions On Bits
ANL C, bit Logical AND operation
between Carry bit and directly addressed bit.
09/03/19
Logical Instructions On Bits
MOV C, bit Move directly addressed
addressed bit.
09/03/19
Program Flow Control
Instructions
In this group, instructions are related to the
flow of the program, these are used to
control the operation like, JUMP and CALL
instructions.
09/03/19
Program Flow Control
Instructions
Call instruction is used to call a subroutine.
Subroutines are often used to perform frequently
needed task.
MNEMONIC DESCRIPTION BYTE
ACALL adr11 absolute call 2
The target address of the subroutine must be within
2K bytes.
• LCALL adr16 long call 3
• First byte: opcode
• Second and third byte:16 bit address
• The target address of the subroutine must be within
64K bytes address space of 8051.
• Every subroutine needs RET as the last instruction.
09/03/19
Program Flow Control
Instructions
RET return from subroutine
1
09/03/19
Program Flow Control
Instructions-unconditional
jump instructions
LJMP addr16 (PC) addr15-0
09/03/19
Program Flow Control
Instructions-conditional
JC lab Jump if carry, jumps if C=1
09/03/19
Program Flow Control
Instructions
Looping instructions-repeating a sequence of
instruction for certain number of times.
In this instruction both the register decrement
and the decision to jump are combined.
09/03/19
NOP No operation 1
This performs no operation and execution
continues with the next instruction. It is
sometimes used for time delays to waste
clock cycles.
09/03/19
Summary
Instruction set.
Addressing modes.
Data transfer instruction.
Arithmetic instruction.
Logical instruction.
Logical operation on bits.
09/03/19