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Hardware Description Languages

• Hardware Description Languages


– Hardware description languages (HDLs) exist to
describe hardware
– Two application  simulation and synthesis.
• Traditional programming language
– Describe algorithms
• Difference traditional programming is sequential
and hardware systems concurrent
• To properly describe hardware, one must be able
to describe both the behavior of the individual
components as well as how they are
interconnected.
Hardware Description Languages
• Simulation
– one applies various stimuli to an executable model
that is described using the HDL in order to predict
how it will respond.
– Goal  expressiveness
• Synthesis
– is the process of actually implementing the hardware
– Synthesis is the act of creating a new refined
description with equivalent behavior at the inputs and
outputs that uses components that do have a physical
implementation.
– Goal  realizability
Mixed-signal hardware
• Modeling of analog and mixed-signal systems
– Process digital signals and analog signals
• Two types
– Verilog-AMS
• Merger of Verilog-HDL and Verilog-A.
• Verilog-AMS is primarily used for verification.
– VHDL-AMS
• Types of signals
– Digital signal
• With digital signals there are generally only a small number of
possible signal values, typically two, designated true and
false, high and low, or zero and one
– Analog Signal (discrete and continuous )
• vary continuously, meaning that the value of the signal at any
point may be any value from within a continuous range of
values
• Mixed-signal simulators
– combine two different methods of simulation:event-driven
simulation as found in logic simulators
– continuous-time simulation as found in circuit simulators
Applications of Verilog-AMS
• There are five main reasons why engineers use
Verilog-AMS
– to model components
• used to efficiently describe a broad range of models
• Compact Models in Verilog-A
– to create test benches
– to accelerate simulation
• Non-critical part by behavioral models
– to verify mixed-signal systems
• allows both digital and analog circuits
– to support the top-down design process
• designing large complex systems
• system at an abstract or ‘block diagram’ level before starting the
detailed design of the individual blocks
Verilog-A code for Resistor
//  comment
Multiple line comment
/*
*RESISTOR
* A linear resistor that
uses the resistance
formulation: v = ri
*/
• Discipline
– supports multiple disciplines
• A discipline is a collection of related physical signal types, which in Verilog-A/MS are
referred to as natures.
• Electrical discipline consists of voltages and currents, where both voltage and current are
natures.
• The collection of common disciplines and natures are defined in a file disciplines.vams
– `include “disciplines.vams”
• Module
– module resistor (p, n);
• Parameter
– parameter real r=0; // default value if model is instantiated and not defined
• Ports
– points where connections can be made to the component
• Electrical
– inout p, n;
– electrical p, n;
– These two lines describe the direction and the type of the ports
– Each port should be given a direction. Input ports can sense the signals that they are connected to,
but cannot affect them; output ports can affect the signals, but cannot sense them; and inout ports
can both sense and affect the signals
• Actual behavior
analog
V(p,n) <+r * l(p,n);
– analog keyword introduces an analog process
– V(p,n) and I(p,n) are the voltage across and the current through the
implicit or unnamed branch between the nodes p and n
– An implicit branch inherits its discipline from its endpoints, both of which
must have equivalent disciplines. In this case, the discipline of the end
points p and n are electrical, and so the discipline of the implicit branch
is electrical.
– The electrical discipline defines V as the access function for the
potential of the branch and I as the access function for the flow through
the branch. As such, the V in V(p,n) accesses the voltage across p and
n, and the I in I(p,n) accesses the current that flows between p and n.
• Endmodule
– terminated with the endmodule
Conductance
Capacitor
Example Inverter
Example AND gate

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