COMPUTATIONAL BUILDING

BLOCKS OF DSP

Presented by
ELAMATHI.S 1704013
KAMALI.A.V 1704022
RIYA SARKAR 1704039
VASANTHA.C 1704111
 DSP COMPUTATIONAL BLOCKS.
Each computational block of the DSP should be
optimized for functionality and speed and the
design should be general to easily integrate
with other blocks, to implement overall DSP
systems.
• Multiplier
• Shifter
• Multiply and accumulate (MAC) unit
• Arithmetic logic unit
MULTIPLIERS
 MULTIPLIER
Specifications when designing a multiplier:
• speed−→decided by architecture which trades
off with circuit complexity and power
dissipation
• accuracy−→decided by format
representations (number of bits and
fixed/floating pt)
• dynamic range−→decided by format
representation
 PARALLEL MULTIPLIERS
• Advances in speed and size in VLSI technology
have made hardware implementation of
parallel or array multipliers possible.
• Parallel multipliers implement a complete
multiplication of two binary numbers to
generate the product within a single processor
cycle.
PARALLEL MULTIPLIER:BIT EXPANSION
PARALLEL MULTIPLIER

Base 10 addition(n=m=4)
PARALLEL MULTIPLIER

NEED TO COMPENSATE OVER CARRY BIT

 PARALLEL MULTIPLIER
• Speed: For parallel multiplier, the
multiplication time is only the longest path
delay time through the gates and adders
(within one processor cycle)
• Additional hardware before and after the
Braun multiplier is required to deal with
signed numbers represented in two’s
complement form
PARALLEL MULTIPLIER:BRAUN MULTIPLIER
 PARALLEL MULTIPLIERS
Bus Widths: Straightforward implementation requires
two buses of width n-bits and a third bus of width 2n-
bits, which is expensive to implement.

• To avoid complex bus implementations:

o program bus can be reused after the multiplication
instruction is fetched.
SHIFTERS
 SHIFTERS
• Required to scale down or scale up operands
and results to avoid errors resulting from
overflows and underflows during
computations.
-When computing the sum of N numbers,
each represented by n-bits, the overall sum
will have n+ log2N bits.
For the sum of N numbers, Pmax=N×(2n−1).
 USES OF SHIFTERS
• To avoid overflow it can scale down each of
the N numbers by log2N bits before conducting
the sum
• To obtain actual sum, scale up the result by
log2N bits when required
• Trade-off between overflow prevention and
accuracy
SHIFTERS EXAMPLE
SHIFTERS EXAMPLE
 APPLICATIONS OF SHIFTERS
• Conducting floating point additions, where
each operand should be normalized to the
same exponent prior to addition.
• One of the operands can be shifted to the
required number of bit positions to equalize
the exponents
 BARREL SHIFTERS
• In DSPs multibit shifts are common.
• Shifts by multibit is possible in one cycle
using acombinational circuit called Barrel
shifter
• It connects the input lines representing a word
to a group of output lines with required shift
determined by its control inputs and control
unit also determines the direction of shift
 BARREL SHIFTERS
•For input word of n bits, 0 – (n-1) bit shifts require log2n control lines.
•Bits shifted out in the left shift are filled with zeros in LSB & new bit
positions are filled with MSB to retain the sign in case of right shift.
ARITHMETIC AND LOGIC UNIT(ALE)
 ARITHMETIC AND LOGIC UNIT(ALE)
ALU carries out additional arithmetic and logic
operations required for a DSP
Functions:
• Add, subtract, increment, decrement, negate
• AND, OR, NOT, XOR, compare
• Shift, multiply (uncommon to general
microprocessors)
• Status flags for sign, zero, carry and overflow
• Register files for storing intermediate result
 MULTIPLY AND
ACCUMULATE(MAC) UNIT
 MULTIPLY AND ACCUMULATE(MAC) UNIT

• Multiply and accumulate (MAC) unit performs

the accumulation of a series of successively
generated products.
• Common operation in DSP applications such
as filtering
MULTIPLY AND ACCUMULATE(MAC) UNIT
MULTIPLY AND ACCUMULATE(MAC) UNIT
MULTIPLY AND ACCUMULATE(MAC) UNIT
 CONCLUSION
Thus a digital signal processor is a specialized
microprocessor that implies various
computational blocks for the purpose of real-
time DSP computing.
THANK YOU