DC Characteristics of a CMOS Inverter

• A complementary CMOS inverter • The MOS device first order

consists of a p-type and an n-type Shockley equations
device connected in series.
describing the transistors in
• The DC transfer characteristics of the
inverter are a function of the output
cut-off, linear and saturation
voltage (Vout) with respect to the input modes can be used to
voltage (Vin). generate the transfer
characteristics of a CMOS
inverter.
• Plotting these equations for
both the n- and p-type
devices produces voltage-
current characteristics
shown below.
IV Curves for nMOS
PMOS IV Curves
 DC Response
• DC Response: Vout vs. Vin for a gate
• Ex: Inverter
– When Vin = 0 -> Vout = VDD
– When Vin = VDD -> Vout = 0
– In between, Vout depends on VDD
transistor size and current
Idsp
– By KCL, we that Vin Vout
Idsn = |Idsp| Idsn
– We could solve equations
– But graphical solution gives more insight
 Transistor Operation
• Current depends on region of transistor behavior
• For what Vin and Vout are nMOS and pMOS in
– Cutoff?
– Linear?
– Saturation?
 nMOS Operation
Cutoff Linear Saturated
Vgsn < Vgsn > Vgsn >

Vdsn < Vdsn >

VDD

Idsp
Vin Vout
Idsn
 nMOS Operation
Cutoff Linear Saturated
Vgsn < Vtn Vgsn > Vtn Vgsn > Vtn

Vdsn < Vgsn – Vtn V > V – V

dsn gsn tn

VDD

Idsp
Vin Vout
Idsn
 nMOS Operation
Cutoff Linear Saturated
Vgsn < Vtn Vgsn > Vtn Vgsn > Vtn

Vdsn < Vgsn – Vtn V > V – V

dsn gsn tn

VDD
Vgsn = Vin Idsp
Vin Vout
Vdsn = Vout Idsn
 nMOS Operation
Cutoff Linear Saturated
Vgsn < Vtn Vgsn > Vtn Vgsn > Vtn
Vin < Vtn Vin > Vtn Vin > Vtn
Vdsn < Vgsn – Vtn Vdsn > Vgsn – Vtn
Vout < Vin - Vtn Vout > Vin - Vtn
VDD
Vgsn = Vin
Idsp
Vdsn = Vout Vin Vout
Idsn
 pMOS Operation
Cutoff Linear Saturated
Vgsp > Vgsp < Vgsp <

Vdsp > Vdsp <

VDD

Idsp
Vin Vout
Idsn
 pMOS Operation
Cutoff Linear Saturated
Vgsp > Vtp Vgsp < Vtp Vgsp < Vtp

Vdsp > Vgsp – Vtp Vdsp < Vgsp – Vtp

VDD

Idsp
Vin Vout
Idsn
 pMOS Operation
Cutoff Linear Saturated
Vgsp > Vtp Vgsp < Vtp Vgsp < Vtp

Vdsp > Vgsp – Vtp Vdsp < Vgsp – Vtp

VDD
Vgsp = Vin - VDD Vtp < 0 Idsp
Vin Vout
Vdsp = Vout - VDD Idsn
 pMOS Operation
Cutoff Linear Saturated
Vgsp > Vtp Vgsp < Vtp Vgsp < Vtp
Vin > VDD + Vtp Vin < VDD + Vtp Vin < VDD + Vtp
Vdsp > Vgsp – Vtp Vdsp < Vgsp – Vtp
Vout > Vin - Vtp Vout < Vin - Vtp
VDD
Vgsp = Vin - VDD Vtp < 0 Idsp
Vin Vout
Vdsp = Vout - VDD Idsn
 I-V Characteristics
• Make pMOS wider than nMOS such that bn = bp
Vgsn5

Vgsn4
Idsn

Vgsn3
-Vdsp
-VDD Vgsn2
Vgsp1 Vgsn1
Vgsp2 0 VDD
Vgsp3 Vdsn

Vgsp4 -Idsp

Vgsp5
 Current vs. Vout, Vin

Vin0 Vin5

Vin1 Vin4
Idsn, |Idsp|

Vin2 Vin3
Vin3 Vin2
Vin4 Vin1
VDD
Vout
 Load Line Analysis
• For a given Vin:
– Plot Idsn, Idsp vs. Vout
– Vout must be where |currents| are equal.
Vin0 Vin5

Vin1 Vin4
Idsn, |Idsp|
VDD
Vin2 Vin3
Idsp
Vin3 Vin2 Vin Vout
Vin4 Vin1 Idsn

VDD
Vout
 Load Line Analysis
• Vin = 0
Vin0

Idsn, |Idsp|

Vin0
VDD
Vout
 Load Line Analysis
• Vin = 0.2VDD

Vin1
Idsn, |Idsp|

Vin1
VDD
Vout
 Load Line Analysis
• Vin = 0.4VDD

Idsn, |Idsp|

Vin2
Vin2

VDD
Vout
 Load Line Analysis
• Vin = 0.6VDD

Idsn, |Idsp|

Vin3
Vin3

VDD
Vout
 Load Line Analysis
• Vin = 0.8VDD

Vin4
Idsn, |Idsp|

Vin4
VDD
Vout
 Load Line Analysis
• Vin = VDD
Vin0 Vin5

Vin1
Idsn, |Idsp|

Vin2
Vin3
Vin4
VDD
Vout
 Load Line Summary

Vin0 Vin5

Vin1 Vin4
Idsn, |Idsp|

Vin2 Vin3
Vin3 Vin2
Vin4 Vin1
VDD
Vout
 DC Transfer Curve
• Transcribe points onto Vin vs. Vout plot

VDD
Vin0 Vin5
A B

Vout
Vin1 Vin4
C

Vin2 Vin3
Vin3 Vin2 D
Vin4 Vin1 E
0 Vtn VDD/2 VDD+Vtp
VDD VDD
Vout Vin
 Operating Regions
• Revisit transistor operating regions

VDD
Region nMOS pMOS A B

A Vout
C
B
C D
E
0 Vtn VDD/2 VDD+Vtp
D Vin
VDD

E
 Operating Regions
• Revisit transistor operating regions

Region nMOS pMOS VDD

A B
A Cutoff Linear
Vout
B Saturation Linear C
C Saturation Saturation
D Linear Saturation D
E
0
E Linear Cutoff Vtn VDD/2 VDD+Vtp
VDD
Vin
 Beta Ratio
• If bp / bn  1, switching point will move from VDD/2
• Called skewed gate
• Other gates: collapse into equivalent inverter

VDD
bp
 10
bn
Vout 2
1
0.5
bp
 0.1
bn

0
VDD
Vin
 DC Characteristics of a CMOS Inveter
• The DC transfer characteristic curve
is determined by plotting the common
points of Vgs intersection after taking
the absolute value of the p-device IV
curves, reflecting them about the x-
axis and superimposing them on the
n-device IV curves.
• We basically solve for Vin(n-type) =
Vin(p-type) and Ids(n-type)=Ids(p-type)
• The desired switching point must be
designed to be 50 % of magnitude of
the supply voltage i.e. VDD/2.
• Analysis of the superimposed n-type
and p-type IV curves results in five
regions in which the inverter operates.
• Region A occurs when 0 leqVin leq
Vt(n-type).
– The n-device is in cut-off (Idsn =0).
– p-device is in linear region,
– Idsn = 0 therefore -Idsp = 0
– Vdsp = Vout – VDD, but Vdsp =0 leading
to an output of Vout = VDD.
• Region B occurs when the condition
Vtn leq Vin le VDD/2 is met.
– Here p-device is in its non-saturated
region Vds neq 0.
– n-device is in saturation
• Saturation current Idsn is obtained by
setting Vgs = Vin resulting in the
equation:
bn
I dsn  Vun  Vtn 2
2
CMOS Inverter DC Characteristics
 CMOS Inverter Transfer Characteristics

• In region B Idsp is governed by • Region D is defined by the inequality

VDD
voltages Vgs and Vds described by:  Vin  VDD  Vtp
2
V gs  Vin  VDD  and Vds  Vout  VDD  • p-device is in saturation while n-
  V  VDD  
I dsp   b p Vin  VDD  Vtp Vout  VDD  out
2


device is in its non-saturation region.
  2 
bp
Recall that :  I dsn  I dsp


bn
Vin  Vtn 2  b p Vin  VDD  Vtp Vout  VDD   Vout  VDD 
 2
 I dsp   Vin  VDD  Vtp 2 ; Vin  Vtp  VDD
2  2


2
• Region C has that both n- and p- AND
devices are in saturation.   Vout  
2

• Saturation currents for the two I dsn  b n Vin  Vtn Vout    ; Vin  Vtn
  2  
devices are: • Equating the drain currents allows us
bp
I dsp   Vin  VDD  Vtp 2 ; Vin  Vtp  VDD to solve for Vout. (See supplemental
2 notes for algebraic manipulations).
AND
b
I dsn  n Vin  Vtn  ; Vin  Vtn
2

2
 CMOS Inverter Static Charateristics

• In Region E the input condition • nMOS & pMOS Operating points

satisfies: Vout =Vin-Vtp
A
Vin  V DD  Vtp VD
D
B
Vout =Vin-Vtn

Output Voltage
• The p-type device is in cut-off: Idsp=0 Both in sat
• The n-type device is in linear mode C nMOS in sat
• Vgsp = Vin –VDD and this is a more pMOS in sat
positive value compared to Vtp.
• Vout = 0
D E
0
Vtp Vtn VDD/2 VDD+Vt VD
p D