Static Properties

Switching Threshold & Noise Margin

Reference: Kang
 The Static Behavior
• Switching Threshold
The switching threshold, VM, or Vth is defined as the point where,

Vin = Vout

Its value can be obtained graphically from the intersection of the

VTC with the line given by Vin = Vout (as shown in VTC)

In this region, both PMOS and

NMOS are always saturated,
since, VDS = VGS. An analytical
expression for VM is obtained
by equating the currents
through the transistors.
  = and -

Here KR is defined as the

trans conductance ratio
 𝑉 𝑚
• Given the power supply voltage VDD, the NMOS and the
PMOS transistor threshold voltages, and the desired
inverter threshold voltage V𝑉
  th𝑚, the corresponding ratio

kR can be found as follows

𝑉
  𝑚

𝑉
  𝑚
𝑉
  𝑚
the switching threshold voltage of an ideal inverter is defined as

𝑉
  𝑚

If threshold voltages of NMOS and PMOS are

Thus
 Drain current of NMOS for short channel MOSFET

Switching threshold voltage for CMOS employing short channel MOSFET

Please note VM is the switching threshold, (VM was Vth in previous

equation)
Switching threshold voltage for CMOS employing short channel MOSFET

𝒘𝒉𝒆𝒓𝒆
  𝒓=¿

• It states that the switching threshold is set by the ratio r,

which compares the relative driving strengths of the
PMOS and NMOS transistors.
• It is generally considered to be desirable for VM to be
located around the middle of the available voltage swing
(or at VDD/2), since this results in comparable values for
the low and high noise margins.
 Noise Margin
The word noise in the context of digital circuits means “unwanted variations of voltages
and currents at the logic nodes.”

Noise signals can enter a circuit in many ways. Some examples of digital noise
sources are depicted in Figure

For instance, two wires placed side by side in an integrated circuit form a coupling
capacitor and a mutual inductance.

Hence, a voltage or current change on one of the wires can influence the signals on the
neighboring wire. Noise on the power and ground rails of a gate also influences the
signal levels in the gate.
Digital circuits (DC) perform operations on logical (or Boolean)
variables. A logical variable x can only assume two discrete
values:

As an example, the inversion (i.e., the function that an inverter

performs) implements the following compositional relationship
between two Boolean variables x and y:
A logical variable is, however, a mathematical abstraction. In a
physical implementation, such a variable is represented by an
electrical quantity.

This is most often a node voltage that is not discrete but can adopt
a continuous range of values. This electrical voltage is turned into a
discrete variable by associating a nominal voltage level with each
logic state.

where VOH and VOL represent the high and the low logic levels,
respectively.
The regions of acceptable high and low voltages are delimited by
the VIH and VIL voltage levels, respectively.

These represent by definition the points where the gain

(= dVout / dVin) of the VTC equals -1

The region between VIH

and VIL is called the
undefined region
(sometimes also referred to
as transition width, or
TW).

Steady-state signals should

avoid this region if proper
circuit operation is to be
ensured.
 Noise Margins
For a gate to be robust and insensitive to noise
disturbances, it is essential that the “0” and “1”
intervals be as large as possible.

A measure of the sensitivity of a gate to noise is given

by the noise margins NML (noise margin low) and NMH
(noise margin high), which quantize the size of the
legal “0” and “1”, respectively, and set a fixed
maximum threshold on the noise value:
 Noise Margins: Design Parameter
Long Channel MOSFET

VOH = VDD and VOL = 0 for Static CMOS

Inverter;

Calculation of VIL

 
By definition, the slope of the VTC is equal to (-1), i.e.,
= -1 when the input voltage is V = VIL.
in this case, the NMOS transistor operates in
saturation while the PMOS transistor operates in the
linear region. From IDn= ID p
Differentiating both sides with respect to Vin

Here
 By the similar analysis

Example:
VOL = 0 V

VOH = 3.3 V
In order to find the Vout, we make use of KCL equation at point of interest

From this value, we can calculate the critical voltage VIL as:
Similarly,

VIH = 1.55 V