PERTEMUAN 5

Merancang Rangkaian Kombinasional

Gerbang Universal & Eksklusive
https://pnj.academia.edu/zulhelmanSTMT
 CAPAIAN PEMBELAJARAN
• Mahasiswa dapat merancang Rangkaian
Kombinatorial dengan menggunakan Gerbang
UNIVERSAL & EkSKLUSIV
 Gerbang Universal

• Gerbang Universal adalah gerbang

yang bisa difungsikan sebagai gerbang
lainnya
• Ada dua gerbang universal :
• Gerbang NOR
• Gerbang NOR
 Combinational Logic Design
• A process with 5 steps
– Specification
– Formulation
– Optimization
– Technology mapping
– Verification
• 1st three steps and last best illustrated by
example
9/15/09 - L12 Copyright 2009 - Joanne DeGroat, 4
Combinational Logic ECE, OSU
 Algebraic Laws
• DeMorgan’s Laws
– The AND and OR functions can be shown to be
related to each other through the following
equations:

A B  A B
A B  A B
A B  A B
A B  A B
 DeMorgan
• DeMorgan’s Laws
– Example: Implement the expression A.B + C.D
using only NAND gates

• NOT the individual terms

• Change the sign
• NOT the lot

.
 Functional Blocks
• Fundamental circuits that are the base building
blocks of most larger digital circuits
• They are reusable and are common to many systems.
• Examples of functional logic circuits
– Decoders
– Encoders
– Code converters
– Multiplexers

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 Where they are used
• Multiplexers
– Selectors for routing data to the processor, memory, I/O
– Multiplexers route the data to the correct bus or port.
• Decoders
– are used for selecting things like a bank of memory and then
the address within the bank. This is also the function
needed to ‘decode’ the instruction to determine the
operation to perform.
• Encoders
– are used in various components such as keyboards.

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 Specifications step

• Write a specification for the circuits

• Specification includes
– What are the inputs: how many, how many bits in a given
output, how are they grouped,, are they control, are they
active high?
– What are the outputs: how many and how many bits in a
each, active high, active low, tristate output?
– The functional operation that takes place in the chip, i.e., for
given inputs what will appear on the outputs.
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 Formulation step
• Convert the specifications into a variety forms for optimal
implementation.
– Possible forms
• Truth Tables
• Expressions
• K-maps
• Binary Decision Diagrams
• IF THE SPECIFCATION IS ERRONOUS OR INCOMPLETE
(open for various interpretation) then the circuit will perform
as specified but will not perform as desired.

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 Last 3 steps
• Best illustrated by example
– A BCD to Excess-3 code converter
– BCD-to-7-segment decoder

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BCD-to-Excess-3 Code converter
• BCD is a code for the decimal digits 0-9
• Excess-3 is also a code for the decimal
digits

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• 9-6 = 1001......1001
• = 1100
0110
0011
• 8-5 = 1011.....1000
0111
0010
1
0011
Specification of BCD-to-Excess3

• Inputs: a BCD input, A,B,C,D with A as the

most significant bit and D as the least
significant bit.
• Outputs: an Excess-3 output W,X,Y,Z that
corresponds to the BCD input.
• Internal operation – circuit to do the
conversion in combinational logic.

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Formulation of BCD-to-Excess-3

• Excess-3 code is easily formed by adding a

binary 3 to the binary or BCD for the digit.
• There are 16 possible inputs for both BCD
and Excess-3.
• It can be assumed that only valid BCD
inputs will appear so the six combinations
not used can be treated as don’t cares.

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 Expressions for W X Y Z
• W(A,B,C,D) = Σm(5,6,7,8,9)
+d(10,11,12,13,14,15)
• X(A,B,C,D) = Σm(1,2,3,4,9)
+d(10,11,12,13,14,15)
• Y(A,B,C,D) = Σm(0,3,4,7,8)
+d(10,11,12,13,14,15)
• Z(A,B,C,D) = Σm(0,2,4,6,8)
+d(10,11,12,13,14,15)
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BCD-to-Seven-Segment Decoder
• Specification
– Digital readouts on many digital products often
use LED seven-segment displays.
– Each digit is created by lighting the appropriate
segments. The segments are labeled
a,b,c,d,e,f,g
– The decoder takes a BCD input and outputs the
correct code for the seven-segment display.

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 Specification
• Input: A 4-bit binary value that is a BCD
coded input.
• Outputs: 7 bits, a through g for each of the
segments of the display.
• Operation: Decode the input to activate the
correct segments.

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 Formulation
• Construct a truth table

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 4-bit Equality Checker
• Specification
– Input: Two vectors, A(3:0) and B(3:0) each
being 4-bits. The msb bits the A(3) and B(3).
– Output: E which has a value of 1 when A=B
and 0 if any bit of A/=B.
– Operation: Combinational logic to compare the
4 bits of A with the 4 bits of B to produce E

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 4-bit Equality Checker
• Formulation
– For each bit position Ai will be compared with
Bi and if they are equal, a 0 will be output. If
they differ a 1 will be output.
– Thus, if any bit position indicates a 1 then the
values are different. These 1st level
comparators outputs can then be Ored together.
– The ORed output is inverted to produce a 1
when they are equal.
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 4-bit Equality Checker
• Optimization
• Done by implementing
two separate blocks.
• 1st the unit MX that
compares two bit and
outputs a 0 if they are
equal, i.e., an XOR
operation.
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 Encoder/Decoder Vocabulary

ENCODER- a digital circuit that produces a binary

output code depending on which of its
inputs are activated.

DECODER- a digital circuit that converts an input

binary code into a single numeric output.
ENCODERS AND DECODERS
A 0 O 0 A 0 O 0
A 1 O 1 A 1 O 1
A 2 O 2 A 2 O 2
A 3 ENCODER DECODER O 3
A 4 O 4
A 5 O 5
A 6 O 6
A 7 O 7

ONLY ONE INPUT BINARY CODE INPUT

ACTIVATED AT A TIME ONLY ONE OUTPUT
BINARY CODE OUTPUT ACTIVATED AT A TIME
A2 A1 A0 Output Aktif

0 0 0 O0

0 0 1 O1

0 1 0 O2

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
A3 A2 A1 A0 A B C D E F G

0 0 0 0 1 1 1 1 1 1 0

0 0 0 1 0 1 1 0 0 0 0

0 0 1 0 1 1 0 1 1 0 1

0 0 1 1 1 1 1 1 0 0 1

0 1 0 0 0 1 1 0 0 1 1

0 1 0 1 1 0 1 1 0 1 1

0 1 1 0 1 0 1 1 1 1 1

0 1 1 1 1 1 1 0 0 0 0

1 0 0 0 1 1 1 1 1 1 1

1 0 0 1 1 1 1 1 0 1 1
 THE 8421 BCD CODE
• BCD stands for Binary-Coded Decimal.

• A BCD number is a four-bit binary group that

represents one of the ten decimal digits 0 through 9.

Example:
Decimal number 4926 4 9 2 6

8421 BCD coded number 0100 1001 0010 0110

 ELECTRONIC ENCODER -
DECIMAL TO BCD
BCD output
Decimal input
00
1011
0
7
Decimal
5 to
BCD
3 Encoder
0

• Encoders are available in IC form.

• This encoder translates from decimal
input to BCD output.
10 line to 4 line Encoder
 10 line to 4 line Encoder
DECIMAL BINARY (BCD)
8 4 2 1
ENCODER
9 5V
8 5V 74147
I9
7 5V I8
6 5V I7 A3
I6 A2
5 5V I5 A1
I4 A0
4 5V I3
I2
3 5V I1
2 5V
1 5V
 Priority Encoder
• Assign priorities to the inputs
• When more than one input are asserted, the output generates the code
of the input with the highest priority
• Priority Encoder : Priority encoder
H7=I7 (Highest Priority) Priority Circuit Binary encoder
H6=I6.I7’
H5=I5.I6’.I7’ I7 I7 H7 I7
H4=I4.I5’.I6’.I7’ I6 I6 H6 I6
H3=I3.I4’.I5’.I6’.I7’
H2=I2.I3’.I4’.I5’.I6’.I7’ I5 I5 H5 I5 Y2 A2
H1=I1. I2’.I3’.I4’.I5’.I6’.I7’ I4 I4 H4 I4 Y1 A1
H0=I0.I1’. I2’.I3’.I4’.I5’.I6’.I7’ I3 I3 H3 I3 Y0 A0
IDLE= I0’.I1’. I2’.I3’.I4’.I5’.I6’.I7’
I2 I2 H2 I2
- Encoder
I1 I1 H1 I1
A0=Y0 = H1 + H3 + H5 + H7
A1=Y1 = H2 + H3 + H6 + H7 I0 I0 H0 I0
IDLE
A2=Y2 = H4 + H5 + H6 + H7 IDLE
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8-input priority encoder

• I7 has the highest priority,I0

least
• A2-A0 contain the number of the
highest-priority asserted input if
any.
• IDLE is asserted if no inputs are
asserted.

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74x148 8-input priority encoder

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74x148 8-input priority encoder

– Active-low I/O
– Enable Input
– “Got Something": Group Select
– Enable Output 37
74x148 Truth Table

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74x148
circuit

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 4 line to 10 line Decoder
DECIMAL
9
8
DECODER 7
74LS42
BINARY (BCD) 9 6
8
7 5
6
5
8 0V 4 4
A3 3
4 0V A2 2
2 0V
A1
A0
1
0
3
1 0V 2
1
0
 Display 7 Segment
Type :
1. Common Anoda
2. Common Cathoda
 DECODERS: BCD TO
7-SEGMENT DECODER/DRIVER
BCD input Decimal output
LED
01
0010
1
BCD-to-
7-Segment
Decoder/
Driver

• Electronic decoders are available in IC form.

• This decoder translates from BCD to decimal.
• Decimals are shown on an 7-segment LED display.
• This IC also drives the 7-segment LED display.
 TEST
Q #5-
#1- What is the decimal output from the decoder that
#2-
#3-
#4-
appears on the 7-segment display?
Answer: 6
3
0
9
7

BCD input
Decimal output
010 100 010
1 011
0
BCD-to-
7-Segment
Decoder/
Driver ?
BCD-TO-SEVEN SEGMENT DECODER DRIVER
V+

abcdef g .
74LS47
A3 g
A2 f
A1 e
A0 d
c
b
a
5V
test
RBI RBO
 TEST

A 0 O 0
A 1 O 1
A O
2 2 INPUT O3 O2 O1 O0
A 3 ENCODER O 3 A1=1
A 4
A4=1
A A6=1
5
A8=1
A 6
A 7
A 8
A 9
 TEST

A 0 O 0
A 1 O 1
A 2 O 2 A3 A2 A1 A0 OUTPUT
A 3 DECODER O 3
0 0 0 0
O 0 1 0 1
4
O 0 1 1 1
5
1 0 0 1
O 6
O 7
O 8
O 9
 TEST
ANSWER THE FOLLOWING QUESTIONS WITH ONE OR MORE
OF THESE WORDS: MUX, DEMUX, ENCODER, DECODER.
A. Has more inputs than outputs. ENCODER, MUX

B. Uses select inputs. MUX, DEMUX

C. Can be used in parallel-to-serial conversion. MUX

D. Produces a binary code at its output. ENCODER

E. Only one of its outputs is activated at one time. DEMUX, DECODER

F. Used to route input signals to one of several outputs. MUX

G. Used to generate arbitrary logic functions. MUX, DEMUX

H. 3 line-to-8 line or binary to octal. DECODER

I. Data Selectors are also MUX.

 Latihan :
• Rancanglah Input Aktif O2 O1 O0

Encoder dari 8 ke 3 D0 0 0 0
– Buat Tabel
D1 0 0 1
Kebenaran
D2 0 1 0
– Tentukan
persamaan Output D3 0 1 1

nya D4 1 0 0
• O2 = ?
D5 1 0 1
• O1 = ?
D6 1 1 0
• O0 = ?
D7 1 1 1
– Rangkaiannya ?
 Latihan 2
• Rancang rangkaian Input Output
I2 I1 I0
Dekoder dari 3 ke 8 0 0 0 O0
– Buat Tabel 0 0 1 O1
kebenarannya 0 1 0 O2
– Tentukan Persamaannya 0 1 1 O3
1 0 0 O4
– Buat rangkaiannya
1 0 1 O5
1 1 0 O6
1 1 1 O7
 Soal
• Rancanglah rangkaian Decoder BCD ke
Display Seven Segment.