1

Registers Used in Timer/Counter

 TH0, TL0, TH1, TL1

 TMOD (Timer mode register)
 TCON (Timer control register)

2
 Timer register

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

TH0 /TH1 TL0/TL1

3
 TMOD Register:

 Gate : When set, timer only runs while INT(0,1) is

high.
 C/T : Counter/Timer select bit.
 M1 : Mode bit 1.
 M0 : Mode bit 0.

4
 TCON Register:

 TF1: Timer 1 overflow flag.

 TR1: Timer 1 run control bit.
 TF0: Timer 0 overflag.
 TR0: Timer 0 run control bit.
 IE1: External interrupt 1 edge flag.
 IT1: External interrupt 1 type flag.
 IE0: External interrupt 0 edge flag.
 IT0: External interrupt 0 type flag.

5
 Timer modes
 Timer Mode 0 :
 Emulates 8048 counter/timer (13-bits).
 8-bit counter (TL0 or TL1).
 5-bit prescaler (TH0 or TH1).

6
 Timer Mode 1 :
 Simple 16-bit counter.
 -Timer Mode 2 :
 8-bit auto-reload.
 Counter in TL0 or TL1.
 Reload value in TH0 or TH1.
 Provides a periodic flag or interrupt

7
 Timer Mode 3
 Splits timer 0 into two 8-bit counter/timers.
 First counter (TLO) acts like mode 0,
without prescaler.
 Second counter (TH0):
 Counts CPU cycles.
 Uses TR1 (timer 1 run bit) as enable.
 Uses TF1 (timer 1 overflow bit) as flag.
 Uses Timer 1 interrupt.
8
TIMING MODE DIAGRAM

9
 ANIMATED TIMER MODE:
SFR

TMOD TH1 TL1

FF
FFFB
FFFC
FFFD
FFFE FB
FFFF
FFFF+01

TR1 TF1

01 10
10
 ANIMATED TIMER MODE:
SFR

TMOD TH1 TL1

FF
FFFB
FFFC
FFFD
FFFE FB
FFFF
FFFF+01

TR1 TF1

01 10
11
12
 SAMPLE PGM FOR TIMER:
 ORG 0H
 START:SETB P1.0
 ACALL DELAY
 CLR P1.0
 ACALL DELAY
 SJMP START

13
 SAMPLE PROGRAM
 DELAY:MOV TMOD,#0001 0000B ;10H
MOV TL1,#00
MOV TH1,#00
SETB TR1
JNB TF1,LOOP
CLR TR1
CLR TF1
RET
14
15
SCON REGISTER

16
 SM0,SM1
 - SM0, SM1 = Serial Mode:
 00 = Mode 0 : Shift register I/O expansion.
 01 = Mode 1 : 8-bit UART with variable baud
rate.
 10 = Mode 2 : 9-bit UART with fixed baud
rate.
 11 = Mode 3 : 9-bit UART with variable baud
rate.
17
 SM2
 - SM2 :
 Mode 0 : Not used.
 Mode 1 : 1 = Ignore bytes with no stop bit.
 Mode 2,3 : 0 = Set receive interrupt (RI) on
all bytes.
 : 1 = Set RI on bytes where bit 9 = 1.

18
 REN = Enables receiver.
 - TB8 = Ninth bit transmitted (in modes 2 and
3).
 - RB8 = Ninth bit received:
 Mode 0 : Not used.
 Mode 1 : Stop bit.
 Mode 2,3 : Ninth data bit.
 - TI = Transmit interrupt flag.
 - RI = Receive interrupt flag.
19
20
 BAUD RATE
TH1(DECIMAL) TH1(HEX) SMOD=0 SMOD=1

-3 FD 9,600 19,200

-6 FA 4,800 9,600

-12 F4 2,400 4,800

-24 F8 1,200 2,400

21
22
23
Mode 1:TX

24
 MODE 1:TX
TITI=1
=0

STOP BIT
8

8 BIT DATA BIT PARALLEL TO

DATA
SBUF SERIAL TX
DATA

SERIAL DATA
START BIT
TRANSFER

STOP START 25
 MODE 1:TX
TITI=1
=0

STOP BIT
8

8 BIT DATA BIT PARALLEL TO

DATA
SBUF SERIAL TX
DATA

SERIAL DATA
START BIT
TRANSFER

STOP START 26
 DATA TX SERIALLY:
 Load TMOD Register ;timer1
 Load TH1 or TL1 values ; for Baud rate
 Load SCON register; serial mode 0,1,2,3
 SET TR1 ;To start the timer
 Character byte is written to SBUF;
 Check if TI=1;
 CLR TI
 Reload the value again.
27
 SAMPLE PROGRAM:TX
 MOV TMOD,#20H
 MOV TH1,#-3
 MOV SCON,#50H
 SETB TR1
 AGAIN:MOV SBUF,#’Y’
 JNB TI ,Here
 CLR TI
 SJMP AGAIN
28
 SERIAL DATA TRANSFER

Y

8051

N DISPLAY

29
 SAMPLE PROGRAM:
 MOV TMOD,#20H
 MOV TH1,#-3
 MOV SCON,#50H
 SETB TR1
 AGAIN:MOV SBUF,#’Y’
 JNB TI,Here
 CLR TI
 MOV P1,#’N’
 SJMP AGAIN
30
Mode 1:RX

31
 MODE 1:RX
RI=1
RI=0

START BIT
8

BIT PARALLEL TO
DATA RX 8 BIT
SBUF SERIAL TX
DATA
DATA

SERIAL DATA
STOP BIT RECEIVE

STAR
T STOP 32
 SAMPLE PROGRAM:RX
 Load TMOD Value.
 Load TH1 value ;baud rate
 Load SCON Register
 Set TR1 To start timer.
 Clear RI
 Check the RI each time.
 When RI =1,Load the value from SBUF.

33
 SAMPLE PROGRAM:RX
 MOV TMOD,#20H
 MOV TH1,#-3
 MOV SCON,#50H
 SETB TR1
 CLR RI
 LOOP:JNB RI,LOOP
 MOV A,SBUF
 END
34
SERIAL PORT TRANSMITTER

35
 SERIAL MODE 2
TITI=1
=0

STOP BIT
TB8=1
TB8=0
8

8 BIT DATA BIT PARALLEL TO

DATA
SBUF SERIAL TX
DATA

SERIAL DATA
START BIT
TRANSFER

STOP START 36
RECEIVE DATA

37
 SERIAL MODE 2 :RX
RI=1
RI=0

START BIT

BIT
PARALLEL TO
DATA RX 8 BIT
SBUF DATA SERIAL TX
DATA

RB8=0 SERIAL DATA

STOP BIT RECEIVE

STAR
T STOP 38
Interrupt :

39
 Interrupts Programming
 An interrupt is an external or internal event that
interrupts the microcontroller to inform it that a device
needs its service.
Interrupts vs. Polling
 A single microcontroller can serve several devices.
 There are two ways to do that:
– interrupts
– polling.
 The program which is associated with the interrupt is
called the interrupt service routine (ISR) or interrupt
handler.

40
 Steps in executing an interrupt
 Finish current instruction and saves the PC on stack.

 Jumps to a fixed location in memory depend on type of

interrupt

 Starts to execute the interrupt service routine until RETI

(return from interrupt)

 Upon executing the RETI the microcontroller returns to

the place where it was interrupted. Get pop PC from
stack

41
 PROGRAM COUNTER
 It saves the address next insturction going
to be executed.

42
MAIN PGM

INTERRUPT
ISR PROGRAM

END

43
 Example
 AA10khz
10khzsquare
squarewave
wavewith
with50%
50%duty
dutycycle
cycle
ORG
ORG 00 ;Reset
;Reset entry
entry poit
poit
LJMP
LJMP MAIN
MAIN ;Jump
;Jump above
above interrupt
interrupt

ORG
ORG 000BH
000BH ;Timer
;Timer 00 interrupt
interrupt vector
vector
T0ISR:CPL
T0ISR:CPL P1.0
P1.0 ;Toggle
;Toggle port
port bit
bit
RETI
RETI ;Return
;Return from
from ISR
ISR to
to Main
Main program
program

ORG
ORG 0030H
0030H ;Main
;Main Program
Program entry
entry point
point
0030:MAIN:
0030:MAIN: MOVMOV TMOD,#02H
TMOD,#02H ;Timer
;Timer 0,0, mode
mode 22
0032:
0032: MOV
MOV TH0,#-50
TH0,#-50 ;50 ;50 us
us delay
delay
0034:
0034: SETB
SETB TR0
TR0 ;Start
;Start timer
timer
0036:
0036: MOV
MOV IE,#82H
IE,#82H ;Enable
;Enable timer
timer 00 interrupt
interrupt
0038:
0038: SJMP
SJMP $$ ;Do
;Do nothing
nothing just
just wait
wait
END
END 44
 INTERRUPT PGM

STACK
POINTER
MAIN PGM

0B INTERRUPT

0A
ISR
09 00
PCH

08 38 PCL

45
 Interrupt Sources
 Original 8051 has 6 sources of interrupts
– Reset
– Timer 0 overflow
– Timer 1 overflow
– External Interrupt 0
– External Interrupt 1
– Serial Port events (buffer full, buffer empty, etc)

 Enhanced version has 22 sources

– More timers, programmable counter array, ADC, more
external interrupts, another serial port (UART)

46
 Interrupt Vectors
Each interrupt has a specific place in code memory where
program execution (interrupt service routine) begins.

External Interrupt 0: 0003h

Timer 0 overflow: 000Bh
External Interrupt 1: 0013h
Timer 1 overflow: 001Bh
Note: that there are
Serial : 0023h only 8 memory
Timer 2 overflow(8052+) 002bh locations between
vectors.

47
 ISRs and Main Program in 8051
SJMP main
ORG 03H
ljmp int0sr
ORG 0BH
ljmp t0sr
ORG 13H
ljmp int1sr
ORG 1BH
ljmp t1sr
ORG 23H
ljmp serialsr
ORG 30H
main:
…
END
48
Interrupt Enable Register :

 EA : Global enable/disable.
 --- : Undefined.
 ET2 :Enable Timer 2 interrupt.
 ES :Enable Serial port interrupt.
 ET1 :Enable Timer 1 interrupt.
 EX1 :Enable External 1 interrupt.
 ET0 : Enable Timer 0 interrupt.
 EX0 : Enable External 0 interrupt.

49
 Enabling and disabling an interrupt

by bit operation

Recommended in the middle of program
SETB EA SETB IE.7 ;Enable All
SETB ET0 SETB IE.1 ;Enable Timer0 ovrf
SETB ET1 SETB IE.3 ;Enable Timer1 ovrf
SETB EX0 SETB IE.0 ;Enable INT0
SETB EX1 SETB IE.2 ;Enable INT1
SETB ES ;Enable Serial port
SETB IE.4
by mov instruction
Recommended in the first of program
MOV IE, #10010110B

50
 Timer ISR

 Notice that
– There is no need for a “CLR TFx” instruction in
timer ISR
– 8051 clears the TF internally upon jumping to
ISR

 Notice that
– We must reload timer in mode 1
– There is no need on mode 2 (timer auto reload)

51
 External interrupt type control
 By low nibble of Timer control register TCON
 IE0 (IE1): External interrupt 0(1) edge flag.
– set by CPU when external interrupt edge (H-to-L) is detected.
– Does not affected by H-to-L while ISR is executed(no int on int)
– Cleared by CPU when RETI executed.
– does not latch low-level triggered interrupt
 IT0 (IT1): interrupt 0 (1) type control bit.
– Set/cleared by software
– IT=1 edge trigger
– IT=0 low-level trigger

(MSB) (LSB)
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Timer 1 Timer0 for Interrupt
52
 External Interrupts

Level-triggered (default)
INT0
)Pin 3.2( 0
0003
IT0
1 IE0 (TCON.3)
2

Edge-triggered

Level-triggered (default)
INT0
)Pin 3.3( 0 0013
IT1
1 IE1 (TCON.3)
2

Edge-triggered

53
 Interrupt Priorities
 What if two interrupt sources interrupt at the same
time?
 The interrupt with the highest PRIORITY gets serviced
first.
 All interrupts have a power on default priority order.
1. External interrupt 0 (INT0)
2. Timer interrupt0 (TF0)
3. External interrupt 1 (INT1)
4. Timer interrupt1 (TF1)
5. Serial communication (RI+TI)
 Priority can also be set to “high” or “low” by IP reg.

54
 Interrupt Priorities (IP) Register

--- --- PT2 PS PT1 PX1 PT0 PX0

IP.7: reserved
IP.6: reserved
IP.5: timer 2 interrupt priority bit(8052 only)
IP.4: serial port interrupt priority bit
IP.3: timer 1 interrupt priority bit
IP.2: external interrupt 1 priority bit
IP.1: timer 0 interrupt priority bit
IP.0: external interrupt 0 priority bit

55
 Interrupt Priorities Example
--- --- PT2 PS PT1 PX1 PT0 PX0

 MOV IP , #00000100B or SETB IP.2 gives priority order

1. Int1
2. Int0
3. Timer0
4. Timer1
5. Serial
 MOV IP , #00001100B gives priority order
1. Int1
2. Timer1
3. Int0
4. Timer0
5. Serial

56
 Interrupt inside an interrupt
--- --- PT2 PS PT1 PX1 PT0 PX0

 A high-priority interrupt can interrupt a low-priority interrupy

 All interrupt are latched internally
 Low-priority interrupt wait until 8051 has finished servicing the high-
priority interrupt

57
 Example of external interuupt
ORG 0000H
LJMP MAIN
;
;interrupt service routine (ISR)
;for hardware external interrupt INT1
;

ORG 0013H
SETB P1.1
MOV R0,200
WAIT: DJNZ R0,WAIT
CLR P1.1
RETI
;
;main program for initialization
;
ORG 30H
MAIN: SETB IT1 ;on negative edge of INT1
MOV IE,#10000100B
WAIT2: SJMP WAIT2
END

58