UNIT- I

EMBEDDED COMPUTING
EMBEDDED COMPUTER
SYSTEM
Definition:
 Any device that includes a
programmable computer but is not itself
intended to be a general purpose computer
 It is a computer based system
designed for a specific application or a
product
ex. Fax machine
Microprocessor & Microcontroller
Microprocessor
It is a single chip CPU having no memory & I/O ports
on the chip itself
Ex. Intel 4004
Microcontroller
It is a single chip CPU having fixed amount of RAM,
ROM, i/o ports and timers
Ex. Intel 8051
Advantages of programmable CPU over dedicated
hardwired unit
• Easier to design & debug the system
• It allows upgradation
Characteristics of Embedded computing applications
• Complex algorithms
operations performed by microprocessor may be sophisticated
• User interface
microprocessors are used to control complex UI
• Real time
operations must be performed in real time
• Multirate
must control both slow and fast operations simultaneously
• Manufacturing cost
determined by type of microprocessor used, amount of memory & type of I/O
devices
• Power & Energy
power consumption affects cost
Reasons for not using ordinary PC for embedded
computing
 Real time performance requirements
 Low power & low cost

Challenges in Embedded Computing system Design

 How much hardware do we need?
 How do we meet deadlines?
 How do we minimize power requirements?
 How do we design for upgradability?
 Does it really work?
Reasons for the difficulties in designing embedded computing
machines
 complex testing
 limited observability & controllability
 restricted development environments
Different levels of abstraction of embedded computing s/m
 CPU
 platform
 program
 task
 multiprocessor
Embedded Systems Design Process
Major goals of design
• Manufacturing cost
• Performance
• Power consumption

At each step in the design do

• Analyse
• Refine
• Verify
Embedded Systems Design Process
Steps in embedded system design process
Requirements

Specifications

Architecture

Components

System Integration
Steps in embedded system design process

Requirements
- informal description from the customers
Types
• Functional - basic functions of the
system
• Non functional
- performance
- cost
- physical size & weight
- power consumption
Requirements methodology – use of requirements
form
Entries in the requirements form
• Name
• Purpose
• Inputs and Outputs
• Functions
• Performance
• Manufacturing cost
• Power
• Physical size & weight
Specifications
- serves as a contract between the
customer and the architects
- accurately reflects the customers
requirements & does it in a way that can
be clearly followed during design
Architecture design
It describes how the system functions
It is a plan for the overall structure
It must satisfy both functional & non
functional requirements
Designing h/w & s/w components
Components design builds the
components in conformance to the
architecture & specification
It includes both h/w & s/w
System Integration
Putting all components together
Bugs are normally found during
integration
Usually difficult because it un covers
problems
Formalism for system design
UML – Unified Modeling Language
visual language used to capture all design
tasks
Structural Description
describes basic components of the system
Object – principal component of OO design
Class – form of type definition
Types of relationships between objects &
classes
Association
Aggregation
Composition
Generalization
Behavioral Description
specifies the behavior of the system as
well as its structure
State machine – shows UML states
Events – Some type of action
Types of events
• Signal
• Call event
• Timeout event
Computer Architecture Taxonomy
Ways to organize a computer
Based on architecture
Based on the instructions used & their execution
Based on the characteristics of instruction set

Based on Architecture
Von Neumann architecture
Harvard architecture
Von Neumann Architecture
Data and instructions are held in a single
block of memory
Not harder to write self modifying
program
Harvard Architecture
Program and Data are held in separate
block of memory
Harder to write self modifying program
Based on Instructions used
• Complex Instruction Set Computers
• Reduced Instruction Set Computers
Based on the characteristics of Instruction
Set
• Fixed vs variable length
• Addressing modes
• Number of operands
• Types of operations supported
Basic Features of Assembly
Language
One Instruction appears per line
Memory locations are given names called labels
in the first column
Instructions must start in the second column
Comments run from some designated comment
character
An assembly language instruction consists of four
fields
[ label:] mnemonic [operands] [;comments]
 Embedded Processors
8051- Block Diagram

INTERRUPT ON CHIP ON CHIP TIMER1

CONTROL ROM RAM
TIMER0

CPU

osc BUS 4 I/O SERIAL

CONTROL PORTS PORT
Pin Diagram
Addressing modes
5 different modes
1. Immediate
2. Register
3. Direct
4. Register indirect
5. Indexed
Immediate addressing mode
Operand comes immediately after the
opcode
Immediate data is preceeded by # sign
Ex.
MOV A,#25H
MOV A, #25
Register addressing mode
Registers hold the data to be manipulated
Source and destination registers must
match in size
Movement of data between registers is
invalid except accumulator
Ex.
MOV A,R0
ADD A,R5
Direct addressing mode
The address of the data is given as a part
of the instruction
Ex.
MOV R0,40H
MOV 56H,A
Register indirect addressing mode
In this mode a register is used as a pointer
to the data
If data is inside the CPU only registers R0
and R1 are used
If R0 and R1 are used as pointers they
must be preceeded by @ sign
Ex.
MOV A,@R0
Indexed addressing mode
This mode is used to access data elements
of a look up table entries located in a
program ROM space
Ex.
MOVC A,@A+DPTR
Instructions - Types
Arithmetic
ADD A,source
ADDC A,source
DA A
SUB A,source
SUBB A,source
MUL AB
DIV AB
Instructions - Types
Logic
ANL destination,source
ORL destination,source
XRL destination,source
CPL A
CJNE destination,source,relative address
Instructions - Types
Rotate & Swap
RR A
RL A
RRC A
RLC A
SWAP A
Instructions - Types
Single Bit Instructions
SETB
CLR
CPL
JB
JNB
JBC
Register Bank
8051
has 128 bytes of RAM
RAM is divided into 3 groups
1. 32 bytes – for register bank & stack
2. 16 bytes – for bit addressable r/w memory
3. 80 bytes – for read/write storage(scratch pad)

Register bank – 4 (8 bytes each)

Each bank has 8 registers
Assembling & Running 8051 pgm.

EDITOR PGM

Myfile.asm

ASSEMBLER
PGM

Myfile.lst

Myfile.obj

Other obj files

LINKER PGM

Myfile.obj

OH PGM

Myfile.hex
ARM Processor
Features
 RISC processor
 Instructions are written one per line
 Comments begin with semicolon
 Labels , names of memory locations comes at the
beginning of the line
 16 GPRs (R0 – R15)
 R15 used as PC
 CPSR (current program status register) is set
automatically during every operation
the top 4 bits of CPSR denotes negative, zero,carry &overflow bits
Processor & Memory Organization
Versions of ARM processor
1. ARM 7 (von Neumann archi. Based)
2. ARM 9 (Harvard archi. Based)
Data types
1. Std. 32 bit word
2. Four 8 bit bytes
Byte Organizations in a ARM word
Little Endian mode
Big Endian mode
Data operations
ARM is a load and store architecture
Load & Store archi.
Data operands are first loaded into the
CPU and then stored back to main
memory to save the result

In ARM processor arithmetic and logical

operations cannot be performed directly
on memory locations
Instruction types
ARM data instructions
1. Arithmetic
ADD,ADC,SUB,SBC,MUL,MLA
1. Logical
AND,ORR,EOR,BIC
1. Shift / rotate
LSL,LSR,ASL,ASR,ROR
Instruction types
ARM comparison instructions
CMP, CMN, TST, TEQ
ARM move instructions
MOV, MVN
ARM load - store instructions
LDR, STR, LDRH, STRH, LDRSH, LDRB, STRB,
ADR
ARM addressing modes
1. Register
2. Immediate
3. Register indirect
4. Base plus offset
C assignments in ARM instructions
1. X=(a+b)–c
ADR r4,a ; get address for a
LDR r0,[r4] ; get value of a
ADR r4,b ; get address for b
LDR r1,[r4] ; get value of b
ADD r3,r0,r1 ; set intermediate result
ADR r4,c ; get address for c
LDR r2,[r4] ; get value of c
SUB r3,r3,r2 ; complete computation of x
ADR r4,x ; get address for x
STR r3,[r4] ; store x at proper location
C assignments in ARM instructions
2. Y=a*(b+c)
ADR r4,b ; get address for b
LDR r0,[r4] ; get value of b
ADR r4,c ; get address for c
LDR r1,[r4] ; get value of c
ADD r2,r0,r1 ; set intermediate result
ADR r4,a ; get address for a
LDR r0,[r4] ; get value of a
MUL r2,r2,r0 ; complete computation of y
ADR r4,y ; get address for y
STR r2,[r4] ; store y at proper location
C assignments in ARM instructions
Implementing an if stmt. in ARM
if (a<b){
x = 5;
y = c + d;
}
else
x = c – d;
;compute & test the condition
ADR r4,a ; get address for a
LDR r0,[r4] ; get value of a
ADR r4,b ; get address for b
LDR r1,[r4] ; get value of b
CMP r0,r1 ; compare a<b
BGE fblock
; the true block follows
MOV r0,#5 ; generate value for x
ADR r4,x ; get address for x
STR r0,[r4] ; store value of x
ADR r4,c ; get address for c
LDR r0,[r4] ; get value of c
ADR r4,d ; get address for d
LDR r1,[r4] ; get value of d
ADD r0,r0,r1; complete computation of c + d
ADR r4,y ; get address for y
STR r0,[r4] ; store value of y
B after ; branch around the false block
; the false block follows
ADR r4,c ; get address for c
LDR r0,[r4] ; get value of c
ADR r4,d ; get address for d
LDR r1,[r4] ; get value of d
SUB r0,r0,r1 ; compute c – d
ADR r4,x ; get address of x
STR r0,[r4] ; store value of x
after ….. ; code after if stmt