Combinational Arithmetic Circuits

• Addition:
– Half Adder (HA).
– Full Adder (FA).
– Carry Ripple Adders.
– Carry Look-Ahead Adders.
• Subtraction:
– Half Subtractor.
– Full Subtractor.
– Borrow Ripple Subtractors.
– Subtraction using adders.
• Multiplication:
– Combinational Array Multipliers.

EECC341 - Shaaban
#1 Lec # 11 Winter 2001 1-16-2002
 Half Adder
• Adding two single-bit binary values, X, Y produces a sum S bit and a carry
out C-out bit.
• This operation is called half addition and the circuit to realize it is called a
half adder.
Half Adder Truth Table S(X,Y) =  (1,2)
Inputs Outputs S = X’Y + XY’
S = XY
X Y S C-out
0 0 0 0 C-out(x, y, C-in) =  (3)
0 1 1 0 C-out = XY
1 0 1 0
1 1 0 1 X
Sum S
Y
X Half S
Y Adder C-OUT C-out

EECC341 - Shaaban
#2 Lec # 11 Winter 2001 1-16-2002
 Full Adder
• Adding two single-bit binary values, X, Y with a carry input
bit C-in produces a sum bit S and a carry out C-out bit. Sum S X
XY
C-in 00 01 11 10
0 2 6 4
Full Adder Truth Table 0 1 1
1 3 7 5
Inputs Outputs 1 1 1 C-in

X Y C-in S C-out Y
0 0 0 0 0 S = X’Y’(C-in) + XY’(C-in)’ + XY’(C-in)’ + XY(C-in)
S = X  Y  (C-in)
0 0 1 1 0
0 1 0 1 0 Carry C-out X
0 1 1 0 1 XY
1 0 0 1 0 C-in 00 01 11 10
0 2 6 4
1 0 1 0 1 0 1
1 1 0 0 1 1 3 7 5
1 1 1 1 C-in
1 1 1 1 1
Y
S(X,Y, C-in) =  (1,2,4,7)
C-out = XY + X(C-in) + Y(C-in)
C-out(x, y, C-in) =  (3,5,6,7)
EECC341 - Shaaban
#3 Lec # 11 Winter 2001 1-16-2002
 Full Adder Circuit Using AND-OR
X’ X’Y’C-in
X Y’
X X’ C-in

X’
Y
X’YC-in’ Sum S
Y C-in’
Y Y’ X
Y

C-in C-in’ XY’C-in’

C-in C-in’ X
Y
C-in’ XYC-in

X Y X XY
Y
Full
C-out C-in X
XC-in
Adder C-out
C-in
Y
S
C-in YC-in

EECC341 - Shaaban
#4 Lec # 11 Winter 2001 1-16-2002
 Full Adder Circuit Using XOR

Y Sum S
X Y C-in

Full X XY
C-out C-in
Adder Y

X
XC-in C-out
S C-in
Y

C-in YC-in

EECC341 - Shaaban
#5 Lec # 11 Winter 2001 1-16-2002
 Binary Arithmetic Operations
Subtraction
• Two binary numbers are subtracted by subtracting each
pair of bits together with borrowing, where needed.
• Subtraction Example:

0 0 1 1 1 1 1 0 0 Borrow
X 229 1 1 1 0 0 1 0 1
Y - 46 - 0 0 1 0 1 1 1 0
183 1 0 1 1 0 1 1 1

EECC341 - Shaaban
#6 Lec # 11 Winter 2001 1-16-2002
 Half Subtractor
• Subtracting a single-bit binary value Y from anther X (I.e. X -Y ) produces
a difference bit D and a borrow out bit B-out.
• This operation is called half subtraction and the circuit to realize it is called
a half subtractor.
Half Subtractor Truth Table D(X,Y) =  (1,2)
Inputs Outputs D = X’Y + XY’
D = XY
X Y D B-out
0 0 0 0 B-out(x, y, C-in) =  (1)
0 1 1 1 B-out = X’Y
1 0 1 0
1 1 0 0 X Difference
D
Y
X Half D
Y Subtractor B-OUT B-out

EECC341 - Shaaban
#7 Lec # 11 Winter 2001 1-16-2002
 Full Subtractor
• Subtracting two single-bit binary values, Y, B-in from a single-bit value X produces
a difference bit D and a borrow out B-out bit. This is called full subtraction. Difference D X
XY
B-in 00 01 11 10
0 2 6 4
0 1 1
Full Subtractor Truth Table 1 3 7 5
Inputs Outputs 1 1 1 B-in

X Y B-in D B-out Y
0 0 0 0 0 S = X’Y’(B-in) + XY’(B-in)’ + XY’(B-in)’ + XY(B-in)
S = X  Y  (C-in)
0 0 1 1 1
0 1 0 1 1 Borrow B-out X
0 1 1 0 1 XY
1 0 0 1 0 B-in 00 01 11 10
0 2 6 4
1 0 1 0 0 0 1
1 1 0 0 0 1 3 7 5
1 1 1 1 B-in
1 1 1 1 1
Y
S(X,Y, C-in) =  (1,2,4,7)
B-out = X’Y + X’(B-in) + Y(B-in)
C-out(x, y, C-in) =  (1,2,3,7)
EECC341 - Shaaban
#8 Lec # 11 Winter 2001 1-16-2002
Full Subtractor Circuit Using AND-OR
X’ X’Y’B-in
X Y’
X X’ B-in

X’
Y
X’YB-in’ Difference D
Y B-in’
Y Y’ X
Y

B-in B-in’ XY’B-in’

B-in B-in’ X
Y
B-in’ XYB-in

X Y X’ X’Y
Y
Full
B-out B-in X’
X’B-in
Subtractor B-out
B-in
Y
D
B-in YB-in

EECC341 - Shaaban
#9 Lec # 11 Winter 2001 1-16-2002
 Full Subtractor Circuit Using XOR
X

Y Difference D
X Y B-in

Full X’ X’Y
B-out B-in
Subtractor Y

X’
X’B-in
B-out
D B-in
Y

B-in YB-in

EECC341 - Shaaban
#10 Lec # 11 Winter 2001 1-16-2002
4-bit Subtractor Using 4-bit Adder
Inputs to be subtracted
Y3 Y2 Y1 Y0

X3 X2 X1 X0

C4
4-bit
C-out C-in C0 = 1
Adder
S3 S2 S1 S0

D3 D2 D1 D0

Difference Output

EECC341 - Shaaban
#11 Lec # 11 Winter 2001 1-16-2002
 Binary Multiplication
• Multiplication is achieved by adding a list of shifted multiplicands according to the digits of
the multiplier.
• Ex. (unsigned)
11 1011 multiplicand (4 bits) X3 X2 X1 X0
X 13 X 1101 multiplier (4 bits) x Y3 Y2 Y1 Y0
-------- ------------------- __________________________
33 101 1 X3.Y0 X2.Y0 X1.Y0 X0.Y0
11 0000 X3.Y1 X2.Y1 X1.Y1 X0.Y1
______ 1011
X3.Y2 X2.Y2 X1.Y2 X0.Y2
X3.Y3 X2.Y3 X1.Y3 X0.Y3
143 1011 _______________________________________________________________________________________________________________________________________________

--------------------- P7 P6 P5 P4 P3 P2 P1 P0
10001111 Product (8 bits)

• An n-bit X n-bit multiplier can be realized in combinational circuitry by

using an array of n-1 n-bit adders where is adder is shifted by one
position.
• For each adder one input is the multiplied by 0 or 1 (using AND gates)
depending on the multiplier bit, the other input is n partial product bits.

EECC341 - Shaaban
#12 Lec # 11 Winter 2001 1-16-2002