Microprocessor Systems

and
Interfacing

• Buffering and De-multiplexing Pins of

8086/8088 Microprocessors

Slides courtesy:
1. Book ‘The Intel Microprocessors, Architecture,
Programming and Interfacing” , 7ed, by Barry B. Brey
2. http://www.pcpolytechnic.com/computer/ppt/micro/Chap
%203_1.pptx
The 8088
and 8086
Microproc
essors
(cont.)
 Interfacing Clock Generator
Typical Application of the 8284A for clock and Reset signal generati

frequency, f f/3

2.5 MHz
PCLK
Grounded when f/6
Xtal Osc is used

RESET
R

C
RC circuit for
Manual automatic Reset on power up 50 ms
Reset RC time constant large enough Min Effective
push button Digital
for 50 ms min Reset pulse #RES Input
Switch at worst trigger conditions
Clock Generator (8284A): Signals
Bus Demultiplexing and Buffering
• Demultiplexing:
The address/data and address/status buses
are multiplexed to reduce the device pin
count. These buses must be demultiplexed
(separated) to obtain the signals required
for interfacing other circuits to the mP
– Use the ALE output from the microprocessor to
latch the address information that appear briefly
on the multiplexed bus
– This makes the latched address information
available for long enough time for correct
interfacing, e.g. to memory
• Buffering:
Fan out is limited, so output signals should
be buffered in large systems
 De-multiplexing the 8088 Processor

Using the ALE signal to

De-multiplex:
-The Address lines
A0-A7 from the
AD0-AD7 muxed bus
-The A16-A19 from the 20-bit

A16/S3-A19/S6 muxed Not

bus Muxed

Data and address lines

must remain valid and
Octal D-type
stable for the duration Transparent Latch
of the cycle

Use as data bus, with #DEN active

De-multiplexing the
8086 Processor

20-bit

16-bit

#DEN
active
 Buffering

Since the microprocessor provides minimum drive

current, buffering is often needed if more than 10 TTL
loads are connected to any bus signal: Consider 3
types of signals
• For muxed signals: Latches used for demuxing, e.g.
‘373, can also provide the buffering for the demuxed
lines
• For non-muxed unidirectional (always output) address
and control signals (e.g. A8-15 on the 8088),
buffering is often accomplished with the 74ALS244.
• For bidirectional data signals (pin used for both in and
out), buffering is often accomplished with the
74ALS245 bidirectional bus buffer
Caution: Buffering introduces a small delay in the
buffered signals. This is acceptable unless memory or
I/O devices operate close to the maximum bus speed
Fully Muxed
and buffered 8088 Buffered
Non-Muxed
Control Lines
(unidirectional-
Always outpus)

Buffered
Non-Muxed
Address Lines
(unidirectional-
Always outputs)

Buffered
Bidirectional
Data Lines

Enable external buffers Direction

1:-->, 0: 
Fully Muxed and buffered 8086