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  • Cmos Process

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    Kallu kalia
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    The document describes the ICFT PROJECT conducted by Chauhey Pranjal. The key steps include: 1) Ion implantation is used for gate formation and P and N well formation on a P substrate. 2) Mask 1 is used for PMOS source and drain formation followed by NMOS source and drain formation. 3) CMP is used to planarize the wafer surface followed by deposition of a conformal silicon dioxide layer using LPCVD.

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    The document describes the ICFT PROJECT conducted by Chauhey Pranjal. The key steps include: 1) Ion implantation is used for gate formation and P and N well formation on a P substrate. 2) Mask 1 is used for PMOS source and drain formation followed by NMOS source and drain formation. 3) CMP is used to planarize the wafer surface followed by deposition of a conformal silicon dioxide layer using LPCVD.

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    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
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    10 views2 pages

    Cmos Process

    Uploaded by

    Kallu kalia
    The document describes the ICFT PROJECT conducted by Chauhey Pranjal. The key steps include: 1) Ion implantation is used for gate formation and P and N well formation on a P substrate. 2) Mask 1 is used for PMOS source and drain formation followed by NMOS source and drain formation. 3) CMP is used to planarize the wafer surface followed by deposition of a conformal silicon dioxide layer using LPCVD.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
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    ICFT PROJECT

    BY CHAUBEY PRANJAL
    H20221230197H
    Ion implantation for
    Gate Formation P and N well
    formation
    Similarly for pmos
    source and drain
    formation done as
    shown accordingly
    Mask 1
    si3n4
    sio2

    CMP is used to
    P Well
    planarize the wafer N Well Conformal layer of sio2
    surface is deposited by LPCVD

    Finally done! P Substrate

    Tin barrier is depsited on wafer and deposition of W layer by CVD is done


    TI is deposited by sputtering

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