CSE 204

Digital Logic Design

Lecture 21-22
Dr. Tarem Ahmed
 Quiz06
• Today
Problem 4-11
 Problem 4-11
• (a) There are 2, D flip-flops called A and B,
with inputs DA and DB,
and outputs A and B, respectively.
There are 2 inputs to the circuit, X and Y,
and a single output, Z.

• From the equations for the inputs to the

FFs, we can draw the logic diagram
 Problem 4-11
• (b) The State Table must show what the next
state and output(s) will be, for each current
state-and-input(s) combination.

• From the input equations:

DA = ~X.Y + X.A; DB = ~X.B + X.A; Z = X.B;
we can derive the following intermediate table,
showing the inputs to the flip-flops:
 Problem 4-11
• A B X Y DA DB Z
• 0 0 0 0 0 0 0
• 0 0 0 1 1 0 0
• 0 0 1 0 0 0 0
• 0 0 1 1 0 0 0
• 0 1 0 0 0 1 0
• 0 1 0 1 1 1 0
• 0 1 1 0 0 0 1
• 0 1 1 1 0 0 1
• 1 0 0 0 0 0 0
• 1 0 0 1 1 0 0
• 1 0 1 0 1 1 0
• 1 0 1 1 1 1 0
• 1 1 0 0 0 1 0
• 1 1 0 1 1 1 0
• 1 1 1 0 1 1 1
• 1 1 1 1 1 1 1
(Note: The truth table above can be most easily derived using K-maps for D A, DB and Z,
as functions of A, B, X and Y.)
 Problem 4-11
• We know the Characteristic Equation for D FFs:
• Q+ = D.
• i.e. A+ = DA and B+ = DB.

• From the Characteristic Equation and previous table,

we can derive the State Table:
 Problem 4-11
• A B X Y A+ B+ Z
• 0 0 0 0 0 0 0
• 0 0 0 1 1 0 0
• 0 0 1 0 0 0 0
• 0 0 1 1 0 0 0
• 0 1 0 0 0 1 0
• 0 1 0 1 1 1 0
• 0 1 1 0 0 0 1
• 0 1 1 1 0 0 1
• 1 0 0 0 0 0 0
• 1 0 0 1 1 0 0
• 1 0 1 0 1 1 0
• 1 0 1 1 1 1 0
• 1 1 0 0 0 1 0
• 1 1 0 1 1 1 0
• 1 1 1 0 1 1 1
• 1 1 1 1 1 1 1
 Problem 4-11
• (c) We can derive the Mealy-style State
Transition Diagram from the State Table
Problem 4-14
 Problem 4-14
• You must assume that the bit sequence arrives
MSB first.

• Show what the sequence of state changes are,

and the corresponding value of the output.
 Problem 4-14
• Bit: 0 1 0 1
• State: 00  00  01  00  01 
• Output: 0 0 1 0

• 1 0 1 1
• 11  00  01  11 
• 0 1 0 0

• 1 0 1 1 1 1 0
• 10  00  01  11  10  10  00
• 0 1 0 0 0 0 1
Problem 4-17
 Problem 4-17
• There are 2 JK flip-flops called A and B,
with inputs JA, KA and JB, KB. The overall
circuit has 1 input, X, and 1 output, Y.
 Problem 4-17

• We can derive the equations for the inputs

to flip-flops A and B from the logic diagram
given:
• JA = B; KA = ~B;
• JB = ~(AX); KB = JB;
• Y = AXB.
 Problem 4-17
• The State Table must show what the next state
and output(s) will be, for each current state-and-
input(s) combination.

• We can derive the following intermediate table

from the input equations, showing the inputs to the
flip-flops:
 Problem 4-17
• A B X JA KA JB KB Y
• 0 0 0 0 1 1 1 0
• 0 0 1 0 1 0 0 1
• 0 1 0 1 0 1 1 1
• 0 1 1 1 0 0 0 0
• 1 0 0 0 1 0 0 1
• 1 0 1 0 1 1 1 0
• 1 1 0 1 0 0 0 0
• 1 1 1 1 0 1 1 1
 Problem 4-17
• We know the characteristic table for JK flip-flops:
• J K Q+
• 0 0 Q
• 0 1 0
• 1 0 1
• 1 1 ~
Q

• We can derive the State Table from the intermediate table

previously shown, and the Characteristic Table:
 Problem 4-17
• A B X A+ B+ Y
• 0 0 0 0 1 0
• 0 0 1 0 0 1
• 0 1 0 1 0 1
• 0 1 1 1 1 0
• 1 0 0 0 0 1
• 1 0 1 0 1 0
• 1 1 0 1 1 0
• 1 1 1 1 0 1
Problem 4-24
 Problem 4-24
• Let us first derive the State Table

• There are 2 D flip-flops called A and B with inputs

DA and DB respectively, 1 input, X, and 1 output, Y.
•
• We can derive the following State Table from the
Moore-style State Transition Diagram:
 Problem 4-24
• A B X A+ B+ Y
• 0 0 0 0 1 1
• 0 0 1 0 0 1
• 0 1 0 0 1 0
• 0 1 1 1 1 0
• 1 0 0 1 0 0
• 1 0 1 0 0 0
• 1 1 0 1 0 0
• 1 1 1 1 1 0
•
(Remember that the output is a function of the current state
only, in Moore machines.)
 Problem 4-24
• Now we know the Excitation Equation for D flip-flops:
D = Q +.
• i.e. DA = A+ and DB = B+.

• We can thus derive the following table for the flip-flop inputs,
from the Excitation Equation and the State Table:
 Problem 4-24
• A B X DA DB Y
• 0 0 0 0 1 1
• 0 0 1 0 0 1
• 0 1 0 0 1 0
• 0 1 1 1 1 0
• 1 0 0 1 0 0
• 1 0 1 0 0 0
• 1 1 0 1 0 0
• 1 1 1 1 1 0
 Problem 4-24
• We can get the S.O.P expressions for DA, DB and Y
from the previous table, each in terms of A, B and X:

• DA = ~A.B.X + A.~B.~X + A.B.~X + A.B.X;

• DB = ~A.~B.~X + ~A.B.~X + ~A.B.X + A.B.X;

• Y = ~A.~B.~X + ~A.~B.X.
 Problem 4-24
• Using 3-variable (A, B and X) K-maps for DA, DB and Y,
we can simplify the above equations into:

• DA = A.~X + B.X;

• DB = ~A.~X + B.X;

• Y = ~A.~B.

• It is now possible to implement this sequential circuit

using the above input equations for the flip-flops.
Problem 4-25
 Problem 4-25
• We are given a DFF, and we must use it, along
with external gates, to construct a JKFF.

• We must first draw a schematic (black box)

block diagram:
Problem 4-25
 Problem 4-25
• The circuit must behave as a JKFF,
which has the following characteristic table:

• J K Q+
• 0 0 Q
• 0 1 0
• 1 0 1
• 1 1 ~
Q
 Problem 4-25
• Using the 1-bit DFF output to represent the states,
and the input combinations in each state,
we want the following State Transition Diagram.

Note that there are no external circuit outputs.

 Problem 4-25
• We can derive the following State Table from the
State Transition Diagram:

• Present State Inputs Next State

• Q J K Q+
• 0 0 0 0
• 0 0 1 0
• 0 1 0 1
• 0 1 1 1
• 1 0 0 1
• 1 0 1 0
• 1 1 0 1
• 1 1 1 0
 Problem 4-25
• Now we know the Excitation Equation for D flip-flops:
D = Q +.

• We can thus derive the table for the flip-flop inputs,

from the Excitation Equation and State Table:
 Problem 4-25
• Present State Inputs Next State
• Q J K D
• 0 0 0 0
• 0 0 1 0
• 0 1 0 1
• 0 1 1 1
• 1 0 0 1
• 1 0 1 0
• 1 1 0 1
• 1 1 1 0
 Problem 4-25
• We can get the following S.O.P expressions for D
in terms of Q, J and K:
D = ~Q.J.~K + ~Q.J.K + Q.~J.~K + Q.J.~K.

• Using a 3-variable (Q, J and K) K-map for D,

we can simplify the above equation into:
D = J.~Q + ~K.Q.
 Problem 4-25
• It is therefore now possible to implement this
sequential circuit:
Problem 4-26
 Problem 4-26
• We are here provided a way of breaking the Invalid
Condition state of an SR Flip-flop

• The specifications state that if S and R are both

high, the Set condition will take priority
 Problem 4-26
• Thus the desired characteristic table for this “Set-
dominant” SR flip-flops will be:
• S R Q+
• 0 0 Q
• 0 1 0
• 1 0 1
• 1 1 1

• The set-dominant SR flip-flop has a 1-bit state

representation, 2 inputs (S and R), and no external
outputs (other than Q and ~Q):
 Problem 4-26
• Then the State Table will be as follows:

• Present State Inputs Next State

• Q S R Q+
• 0 0 0 0
• 0 0 1 0
• 0 1 0 1
• 0 1 1 1
• 1 0 0 1
• 1 0 1 0
• 1 1 0 1
• 1 1 1 1
 Problem 4-26
• It is now possible to draw the State Transition Digram
from the State Table:

• There will be 2 states, Q = 0 and Q = 1;

• 4 arrows emanating from each state corresponding to
the SR input combinations;
• (And no external outputs)
 Exercises
• Problem 4-27
• Problem 4-28
• Problem 4-29
 Notes
• Reading
– Mano and Kime, Ch 4-5~4-7

• HW07
– Posted