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LOGIC AND

SEQUENTIAL CIRCUIT
DESIGN

FALL, 2023

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DIGITAL SYSTEMS AND BINARY NUMBERS

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CONTENTS

 Analog versus Digital Systems

 Digitization of Analog Signals

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DIGITAL SYSTEMS
• Digital Systems exist everywhere
• Communication, banks, hospitals, Internet etc.

• Computers are digital systems

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ANALOG VS DIGITAL SYSTEMS

 Analog means continuous

 Analog parameters have continuous range of values

 Example: temperature is an analog parameter


 Temperature increases/decreases continuously
 Increase in your height
 Increase in your weight

Kettle removed from stove


100oC
temperature

time
ANALOG VS DIGITAL SYSTEMS

 Digital signals are non-continuous i.e. discrete


 Consist of fixed set of digits. E.g. number of months in a year = 12; digits = {1,2,3,
….,10,11,12} note that 11.3 or 4.9 are invalid here
 Abrupt transition (jumping) from one digit to another

11 12
9 10
7 8
5 6
3 4
1 2
Value

Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec

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ANALOG VS DIGITAL SYSTEMS

Q: Digital or Analog?


 English letters
 Human voice
 Temperature
 Human height
 Internet IP addresses
 Human weight

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ANALOG VS DIGITAL SYSTEMS

Analog

Digital

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DIGITIZATION

 Process of conversion from analog to digital is called digitization

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COMPUTERS
 Computers are digital systems

 Deal with a vocabulary of two elements namely 0 and 1. This is also

known as the binary system of numbers


 Binary digits i.e. 0 and 1 are called bits

1 1

10
BIT
binary digit 11
LOGIC GATES

 Basic Building Blocks


 Logic Gate Symbol
 Unique function
 Truth or Function Table
 Function Expression
 Timing Diagram

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AND GATE

1 output
2 inputs
3 inputs
4 inputs
Multiple inputs

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AND GATE FUNCTION
Logical Multiplication function

Input Output
F  A B
A B F F  A  B  C  ....  N
0 0 0
0 1 0
1 0 0
1 1 1
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AND GATE TIMING DIAGRAM

t0 t1 t2 t3 t4 t5 t6

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OR GATE

1 output
2 inputs
3 inputs
4 inputs
Multiple inputs

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OR GATE FUNCTION

Boolean Add function

Input Output
F  A B
A B F
0 0 0 F  A  B  C  ..  N
0 1 1
1 0 1
1 1 1
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OR GATE TIMING DIAGRAM
A

t0 t1 t2 t3 t4 t5 t6

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NOT GATE

1 input
1 output

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NOT GATE FUNCTION

Invert function

Input Output
A F
FA
0 1
1 0

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NOT GATE TIMING DIAGRAM
A

t0 t1 t2 t3 t4 t5 t6

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OR GATE APPLICATIONS
Car door open alarm

Front left door


Rear left door
Alarm
Front right door
Rear right door

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NOT GATE APPLICATIONS
1’s Complement

1 1 0 0 1 0 1 0

0 0 1 1 0 1 0 1
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NAND GATE

1 output
2 inputs
3 inputs
4 inputs
Multiple inputs

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NAND GATE FUNCTION

Input Output
F  A B
A B F
0 0 1 F  A  B  C  ....  N
0 1 1
1 0 1
1 1 0
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NAND GATE TIMING DIAGRAM
A

t0 t1 t2 t3 t4 t5 t6

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NOR GATE

1 output
2 inputs
3 inputs
4 inputs
Multiple inputs

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NOR GATE FUNCTION

Input Output

A B F F  A B
0 0 1 F  A  B  C  ....  N
0 1 0
1 0 0
1 1 0
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NOR GATE TIMING DIAGRAM

t0 t1 t2 t3 t4 t5 t6

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NAND GATE APPLICATIONS

 Device Failure Alarm

ALARM

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ALTERNATE LOGIC SYMBOLS

Step 1: Invert each input and output of the standard


symbol
Change the operation symbol from AND to OR, or from
OR to AND.
Examples: AND, OR, NAND, NOR, INV

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ALTERNATE LOGIC-GATE REPRESENTATION

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XOR GATE

1 output
2 inputs
Multiple inputs

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XOR GATE FUNCTION

 Odd Function:

Output is equal to 1, if the input has odd numbers of 1s.

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XOR GATE FUNCTION

Input Output
A B F
0 0 0 F  A B
0 1 1
1 0 1
1 1 0

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XOR GATE TIMING DIAGRAM

t0 t1 t2 t3 t4 t5 t6

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XNOR GATE

1 output
2 inputs
Multiple inputs

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XNOR GATE FUNCTION

 Even Function:

Output is equal to 1, if the input has even numbers of 1s.

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XNOR GATE FUNCTION

Input Output
A B F
F  A B
0 0 1
0 1 0
1 0 0
1 1 1

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XNOR GATE TIMING DIAGRAM

t0 t1 t2 t3 t4 t5 t6

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SUMMARY OF LOGIC GATES

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SUMMARY OF LOGIC GATES

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LOGIC GATE INTEGRATED
CIRCUITS
14 13 12 11 10 9 8
14 13 12 11 10 9 8

1 2 3 4 5 6 7
1 2 3 4 5 6 7
7408
7432
Four 2-Input AND Gate
Four 2-Input OR Gate

14 13 12 11 10 9 8

14 13 12 11 10 9 8

1 2 3 4 5 6 7
7404 1 2 3 4 5 6 7
Hex Inverters 7400
Four 2-Input NAND Gate 43
LOGIC GATE INTEGRATED
CIRCUITS
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7
1 2 3 4 5 6 7 7402
7486 Four 2-Input NOR Gate
Four 2-Input XOR Gate

14 13 12 11 10 9 8

1 2 3 4 5 6 7
74266 44
Four 2-Input XNOR Gate
UNIVERSAL GATE – NAND
 How a NAND gate can be used to replace an AND gate, an
OR gate, or an INVERTER gate.
 How a logic circuit implemented with AND-OR-invert (AOI)
logic gates can be re-implemented using only NAND gates.
 That using a single gate type, in this case NAND, will reduce
the number of integrated circuits (IC) required to implement a
logic circuit.

AOI Logic NAND Logic

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More ICs = More Cost Less ICs = Less Cost


NAND GATE
X
Z XYXY
Y

X Y Z
0 0 1
0 1 1
1 0 1
1 1 0

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NAND GATE AS AN INVERTER GATE
XX  X (Before Bubble)

X ZX

X Z
0 1
Equivalent to Inverter
1 0

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NAND GATE AS AN AND GATE

XY
X
Z XYXY
Y

NAND Gate Inverter

X Y Z
0 0 0
0 1 0
Equivalent to AND Gate
1 0 0
1 1 1
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NAND GATE AS AN OR GATE
X

X Y
Z XY XY  XY
Y

Inverters NAND Gate

X Y Z
0 0 0
0 1 1
Equivalent to OR Gate
1 0 1
1 1 1
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NAND GATE EQUIVALENT TO AOI GATES
AND OR INVERTER

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PROCESS FOR NAND IMPLEMENTATION
1. If starting from a logic expression, implement the design
with AOI logic.
2. In the AOI implementation, identify and replace every
AND,OR, and INVERTER gate with its NAND
equivalent.
3. Redraw the circuit.
4. Identify and eliminate any double inversions (i.e., back-
to-back inverters).
5. Redraw the final circuit.
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NAND IMPLEMENTATION
Example:
Design a NAND Logic Circuit that is equivalent to the AOI circuit
shown below.

BC A C

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NAND IMPLEMENTATION
Identify and replace every AND,OR, and INVERTER gate with its NAND
equivalent.

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NAND IMPLEMENTATION
Redraw the circuit.

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NAND IMPLEMENTATION
Identify and eliminate any double inversions.

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NAND IMPLEMENTATION
Redraw the circuit.

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PROOF OF EQUIVALENCE

C BC

BCAC

Z BCAC
AC
Z BCA C
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AOI VS. NAND

IC Type Gates Gate / IC # ICs IC Type Gates Gate / IC # ICs


74LS04 1 6 1 74LS00 4 4 1
74LS08 2 4 1 Total Number of ICs → 1
74LS32 1 4 1
Total Number of ICs → 3
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UNIVERSAL GATE – NOR
 How a NOR gate can be using to replace an AND gate, an
OR gate or an INVERTER gate.
 How a logic circuit implemented with AOI logic gates
could be re-implemented using only NOR gates
 That using a single gate type, in this case NOR, will reduce
the number of integrated circuits (IC) required to
implement a logic circuit.
AOI Logic NOR Logic

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More ICs = More Cost Less ICs = Less Cost


NOR GATE
X
ZXYX Y
Y

X Y Z
0 0 1
0 1 0
1 0 0
1 1 0

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NOR GATE AS AN INVERTER GATE

XX X (Before Bubble)

X ZX

X Z
0 1
Equivalent to Inverter
1 0

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NOR GATE AS AN OR GATE
XY
X
Z XY XY
Y

NOR Gate “Inverter”

X Y Z
0 0 0
0 1 1
Equivalent to OR Gate
1 0 1
1 1 1 62
NOR GATE AS AN AND GATE
X

X Y
ZXYXYXY
Y

“Inverters” NOR Gate

X Y Z
0 0 0
0 1 0
Equivalent to AND Gate
1 0 0
1 1 1 63
NOR GATE EQUIVALENT OF AOI GATES

AND OR INVERTER

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PROCESS FOR NOR IMPLEMENTATION
1. If starting from a logic expression, implement the design
with AOI logic.
2. In the AOI implementation, identify and replace every
AND,OR, and INVERTER gate with its NOR equivalent.
3. Redraw the circuit.
4. Identify and eliminate any double inversions. (i.e. back-to-
back inverters)
5. Redraw the final circuit.

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NOR IMPLEMENTATION
Example:
Design a NOR Logic Circuit that is equivalent to the AOI circuit
shown below.

BC A C

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NOR IMPLEMENTATION
Identify and replace every AND,OR, and INVERTER gate with its NAND
equivalent.

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NOR IMPLEMENTATION
Redraw Circuit.

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NOR IMPLEMENTATION
Identify and eliminate any double inversions.

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NOR IMPLEMENTATION
Redraw Circuit.

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PROOF OF EQUIVALENCE

BCBCBC
C

B BCA C
C
Z BCA C
BCA C
A 71

ACACAC
AOI VS NOR

IC Type Gates Gate / IC # ICs IC Type Gates Gate / IC # ICs


74LS04 1 6 1 74LS02 7 4 2
74LS08 2 4 1 Total Number of ICs → 2
74LS32 1 4 1
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Total Number of ICs → 3
BOOLEAN ALGEBRA & LOGIC GATES

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BASIC DEFINITION

 Closure

A set S is closed w.r.t. a binary operator if, for every pair of elements of S, the binary
operator specifies a rule for obtaining a unique element of S.

 Example

Set of Natural numbers N={1,2,3,…….}


Closed w.r.t. Addition
NOT closed w.r.t. Subtraction

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BASIC DEFINITIONS

 Associative Law
 A binary operator * on a set S is said to be associative whenever:

(x*y) * z = x* (y*z) for all x,y,z  S

 Commutative Law
 A binary operator * on a set S is said to be commutative whenever:

x*y=y*x for all x,y  S

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BASIC DEFINITIONS

 Identity Element

 A set S is said to have an identity element with respect to a binary


operation * on S if there exist an element e S with the property
e*x=x*e=x for every x  S

With respect to operator +, the set I has identity element 0

Example: The element 0 is an identity element with


respect to the binary operator + on the set of integers
I = {c, -3, -2, -1, 0, 1, 2, 3,c}, since
x + 0 = 0 + x = x for any x  I

With respect to operator *, the set I has identity element 1

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BASIC DEFINITIONS

QUESTION

With respect to operator +, what is the identity element for the set of natural numbers
NONE
With respect to operator +, what is the identity element for the set of whole numbers
ZERO

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BASIC DEFINITIONS

 Inverse

 A set S having the identity element e with respect to a


binary operator * is said to have an inverse whenever, for
every x  S, there exist an element y  S such that

x * y = e for every x  S

 Example
For set of integers I and operator +, e=0
Inverse of a = -a

a+ (-a) = 0 = e 78
BASIC DEFINITIONS

 Distributive Law

 If ‘*’ and ‘.’ are two binary operators on S, ‘*’ is said to be


distributive over ‘.’ whenever
 The only distributive law applicable is that of * over +:

a * (b + c) = (a * b) + (a * c)

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BOOLEAN ALGEBRA

Boolean
BooleanAlgebra
Algebra developed
developed
by
by George
George Boole
Boole (1815-
(1815-
1864)
1864)

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POSTULATES & THEOREMS

Postulate (a fact)

A Abasic
basic assumption
assumption that that isis accepted
accepted without
without proof
proof
 Accepted
Accepted asas true
true in
in order
order to to provide
provide aa basis
basis for
for
logical
logical reasoning
reasoning
Theorem
A Astatement
statement which
which can
can be
be proved
proved to
to be
be true
true using
using
logical
logical (deductive)
(deductive) reasoning
reasoning
A Aproposition
proposition deducible
deducible from
from basic
basic postulates
postulates
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BOOLEAN ALGEBRA

“plus” / ”OR” “times” / ”AND”

A (two-valued) Boolean Algebra is a 3-tuple {B , + , · }, where


• B is a set of at least 2 elements
• ( + ) and ( · ) are binary operations

There are 6 fundamental laws, or axioms that these operators satisfy

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POSTULATE 1
A1. Closure: For every a, b  B
I. a + b is in B; Closure with respect to ‘+’
II. a · b is in B; Closure with respect to ‘.’

(1,0)
(1,0) (1,0)

(1,0)
(1,0) (1,0)

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POSTULATE 2

A2. Existence of identity elements: The set B has two distinct identity
elements, denoted as 0 and 1, such that for every element a  B
additive identity element
I. a+0=0+a=a
II. a·1=1·a= a

multiplicative identity element

a a
a 1 a
0
OR operation AND operation 84
POSTULATE 3
A3. Commutative laws: For every a, b  B
I. a+b=b+a
II. a·b=b·a

a
F=a+b a F = a.b
b b
b
F=b+a b F = b.a
a a
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POSTULATE 4
A4. Distributive laws: For every a, b, c  B
a · (b + c) = (a · b) + (a · c)
a·+(b . c) = (a·+ b) . (a + c)

86
POSTULATES 5 & 6
A5. Existence of a complement: For every element a  B there exists an
element a’ such that
I. a + a’ = 1
II. a · a’ = 0

the complement of a

A6. There exist at least two elements a,b  B such that


a≠b

87
BOOLEAN ALGEBRA

 Closure x + y is in B and x . y is in B
 Obvious as result either 0 or 1

 Identity (1. x = x) and (0 + x = x)

 Commutative x + y = y + x and x . y = y . x
 Can be checked from the Truth Table

 Distributive  x + (y. z) = (x + y) (x + z) and x. (y + z) = (x . y) + (x . z)


 Can be checked from the Truth Table

 Can be checked from the Truth Table

 Complement x + x’ = 1 and x.x’=0


 X+X’=1 0 +0’=0+1=1 and 1+1’=1+0=1 88

 X.X’=0  0.0’ = 0.1 =0 and 1.1’ =1.0=0


THE DUALITY PRINCIPLE

 Each postulate of Boolean algebra contains a pair of


expressions or equations such that one is transformed
into the other and vice-versa by interchanging the
operators, + ↔ ·, and identity elements, 0 ↔ 1.
 The two expressions are called the duals of each
other.
89
EXAMPLES OF DUALS

Duals
Postulate
Expression 1 Expression 2

1 a, b, a + b ε B a, b, a · b ε B

2 a+0=a a·1=a

3 a+b=b+a a·b=b·a

4 a + (b + c) = (a + b) + c a · (b · c) = (a · b) · c

5 a + (b · c)=(a + b) · (a + c) a · (b + c)=(a · b)+(a · c)

6 aa 1 aa  0
90
EXAMPLES OF DUALS
Expressions:A · B A+B

A B A B

Equations: duals
A + (BC) = (A+B)(A+C) ↔ A (B+C) = AB + AC

Note: A · B is also written as AB.


91
PROPERTIES OF BOOLEAN ALGEBRA

 The postulates are basic axioms of the algebraic structure and need no proof.
 The theorems must be proven from the postulates.

92
Identity
Identity a)a)xx++00==xx
b)b)xx.1.1==xx
Commutative
Commutative a)a)xx++yy==yy++xx
b)b)xx.y.y==y.x
y.x
THEOREM 1: Distributive
Distributive a)a)x.(y
x.(y++z)z)==(x(x.y)
.y)++(x.z)
(x.z)
b)b)xx++(y.z) = (x+y).(x+z)
(y.z) = (x+y).(x+z)
IDEMPOTENCY Complement
Complement a)a)xx++x’x’==11
b)b)x.x’
x.x’==00

 For all elements a in B:


 a+a=a
 aa=a

 Proof
a+a = (a + a).1
= (a + a).(a + ā)
= a + a.ā
= a+0
= a
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Identity
Identity a)a)xx++00==xx
b)b)xx.1.1==xx
Commutative
Commutative a)a)xx++yy==yy++xx
b)b)xx.y.y==y.x
y.x
THEOREM 1: Distributive
Distributive a)a)x.(y
x.(y++z)z)==(x(x.y)
.y)++(x.z)
(x.z)
b)b)xx++(y.z) = (x+y).(x+z)
(y.z) = (x+y).(x+z)
IDEMPOTENCY Complement
Complement a)a)xx++x’x’==11
b)b)x.x’
x.x’==00

 For all elements a in B:


 a+a=a
 aa=a

 Proof
a.a = (a.a) + 0
= (a.a) + (a.ā)
= a.(a + ā)
= a .1
= a
94
Identity
Identity a)a)xx++00==xx

THEOREM 2 b)b)xx.1.1==xx
Commutative
Commutative a)a)xx++yy==yy++xx
 a + 1 = 1, for + operator b)b)xx.y.y==y.x
y.x
Distributive
Distributive a)a)x.(y
x.(y + z)==(x(x.y)
+ z) .y)++(x.z)
(x.z)
 a · 0 = 0, for · operator b)b)xx++(y.z) = (x+y).(x+z)
(y.z) = (x+y).(x+z)
Complement
Complement a)a)xx++x’x’==11
 Proof: b)b)x.x’
x.x’==00
a+1 = (a + 1).1

= 1.(a + 1)
= (a + ā).(a + 1)
= a + ā.1
= a+ā
= 1
a · 0 = 0 (By Duality) 95
Identity
Identity a)a)xx++00==xx
b)b)xx.1.1==xx
Commutative
Commutative a)a)xx++yy==yy++xx
b)b)xx.y.y==y.x
y.x
Distributive
Distributive a)a)x.(y
x.(y++z)z)==(x(x.y)
.y)++(x.z)
(x.z)
b)b)xx++(y.z) = (x+y).(x+z)
THEOREM 2 Complement
Complement
(y.z) = (x+y).(x+z)
a)a)xx++x’x’==11
b)b)x.x’
x.x’==00

 a + 1 = 1, for + operator
 a · 0 = 0, for · operator
 Proof:

a.0 = (a.0) + 0
= 0 + (a.0)
= (a.ā) + (a.0)
= a.(ā + 0)
= a.ā

= 0

96
THEOREM 3 - INVOLUTION
 a=a
=
 Proof:

a + ā = 1 and a ā = 0, (complements)
or ā + a = 1 and ā a = 0, (commutativity)
i.e., a is complement of ā
Therefore, a = a

97
THEOREM 4 - ABSORPTION
Identity
Identity a)a)xx++00==xx
b)b)xx.1.1==xx
Commutative
Commutative a)a)xx++yy==yy++xx
b)b)xx.y.y==y.x
y.x
Distributive
Distributive a)a)x.(y
x.(y++z)z)==(x(x.y)
.y)++(x.z)
(x.z)
b)b)xx++(y.z) = (x+y).(x+z)
(y.z) = (x+y).(x+z)
 a+ab=a Complement a)a)xx++x’x’==11
Complement
 a (a + b) = a b)b)x.x’
x.x’==00

 Proof:

a + a.b = a.1 + a b
= a.(1 + b)
= a .1
= a

Similar proof for a.(a + b) = a (By Duality)

98
THEOREM 5 – DEMORGAN

(a+b)’ = a’.b’
(a.b)’ = a’+ b’
a b a+b (a+b)’ a’ b’ a’b’
0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

99
THEOREM 6 - ASSOCIATIVITY

a + (b + c) = (a + b) + c
a.(b.c) = (a.b).c

100
BOOLEAN FUNCTIONS

 Boolean functions, truth tables or logic diagrams can be generated from

each other
 Designers try to reduce complexity and number of gates to reduce circuit

cost
 Two different boolean functions may represent the same logic and truth

table
 A single variable in a boolean function is called literal

 Group of literals which forming an input to a gate are together called a term
101
IMPLEMENTATION OF BOOLEAN FUNCTIONS

Draw the logic diagram for the following function: F = (a.b)+(b.c)

a
b
F

102
IMPLEMENTATION OF BOOLEAN FUNCTIONS
FF11  xx yy''zz
Boolean Function expresses logical relationship between
binary variables

Boolean Function can be represented by a Truth Table

x
F1

y
z 103
IMPLEMENTATION OF BOOLEAN FUNCTIONS

Example 2: F2  x' y ' z  x' yz  xy '

F2
z

104
IMPLEMENTATION OF BOOLEAN FUNCTIONS
 Try another implementation using a simplified F2:

F2  x' y ' z  x' yz  xy '


 x' z ( y ' y )  xy ' Distributive Pos

 x' z (1)  xy ' Complement Pos

 x' z  xy '
x
y
F2

z
105
This implementation has fewer gates and fewer inputs to the gates (or wires) than the previous one .
SIMPLIFYING BOOLEAN FUNCTIONS
F3  xy  x' z  yz
 xy  x' z  yz ( x  x' ) Identity .1 is same & Complement Pos (x.x’)=1

 xy  x' z  xyz  x' yz Distributed Pos

 xy  xyz  x' z  x' yz Rearrange order

 xy (1  z )  x' z (1  y ) Distributed Pos

 xy  x' z Theorem 2 (X+1 =1)


x
y
F3

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z
COMPLEMENT OF A FUNCTION
 DeMorgan’s Theorem

(x+y)’ = x.’y’
(x.y)’=x’+y’

(A+B+C+D+…+F)’= A’B’C’D’…. F’
(ABCD…F)’ = A’+B’+C’+D’+… + F’

The complement of a function can be obtained by interchanging AND and OR operators and
complementing each literal
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COMPLEMENT OF A FUNCTION

 Example: Find the complement of:

F = x’yz’+x’y’z

F’ = (x’yz’+x’y’z)’
= (x’yz’)’.(x’y’z)’
=(x+y’+z).(x+y+z’)

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COMPLEMENT OF A FUNCTION

 Example: Find the complement of F by taking its dual and complementing each
literal
F = x’yz’+x’y’z

Dual of F
= (x’+y+z’).(x’+y’+z)
Complement each literal
=(x+y’+z).(x+y+z’) = F’
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COMPLEMENT OF A FUNCTION
 Example: Find the Complement of

F  ( AB 'C ) D ' E
F '  [( AB 'C ) D ' E ]'
 [( AB 'C ) D ' ]' E '
 [( AB 'C )' D ' ' ]E '
 [( AB ' )' C ' D ]E '
 ( A' B )C ' E ' DE '

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DEFINITIONS

Product terms – AND  ĀBZ


Sum terms – OR  X + Ā

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