Complementary MOS (CMOS) Fabrication

CMOS Technology depends on using both N-Type

and P-Type devices on the same chip.

The two main technologies to do this task are

1) P-Well 2)N-Well

Two more advanced technologies to do this task are

1)Twin Tub 2) Silicon-on-Insulator (SOI)

 P-Well Process

In P-well processing the basic processing steps are

of the same nature as those used for nMOS.

The structure consists of an n-type substrate in

which p-devices may be formed by suitable masking and
diffusion.

A deep p-well is diffused into the n-type substrate,

in which n-devices may be formed by suitable masking
and diffusion.
 Sio2

P-well (4-5μm )

P-substrate
 P-well acts as substrates for the n-devices within
the parent of n-substrate, the two areas are electrically
isolated.

Two substrate connections (VDD and VSS) are

required.

In all other respects- masking, pattering and

diffusion – the process is similar to nMOS fabrication.
p-well CMOS inverter showing VDD and VSS substrate connections
 The p-well doping concentration and depth will
affect the threshold voltages as well as the breakdown
voltages of the n-transistors.

To achieve low threshold voltages (0.6 to 1V), need

either deep well or high well resistivity.

Deep wells require larger spacing between the n -

and p-type transistors and wires it requires larger chip
area.
N- well process
 Formation of n-well regions

Define nMOS and pMOS active areas

Field and gate oxidations (thinox)

Form and pattern polysilicon

P+ diffusion

A
 A

N+ diffusion

Contact Cuts

Deposit and pattern metallization

Over glass with cuts for bonding pads

n-well CMOS inverter showing VDD and VSS substrate connections