CD4013BM CD4013BC Dual D Flip-Flop

February 1988

CD4013BM CD4013BC Dual D Flip-Flop

General Description
The CD4013B dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors Each flip-flop has independent data set reset and clock inputs and Q and Q outputs These devices can be used for shift register applications and by connecting Q output to the data input for counter and toggle applications The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively

Features
Y Y Y

Wide supply voltage range High noise immunity Low power TTL compatibility

3 0V to 15V 0 45 VDD (typ ) fan out of 2 driving 74L or 1 driving 74LS

Applications
Y Y Y Y

Automotive Data terminals Instrumentation Medical electronics

Y Y Y Y

Alarm system Industrial electronics Remote metering Computers

Connection Diagram
Dual-In-Line Package

Order Number CD4013B

TL F 5946 1

Top View

Truth Table
CL L L K x x x D 0 1 x x x x R 0 0 0 1 0 1 S 0 0 0 0 1 1 Q 0 1 Q 0 1 1 Q 1 0 Q 1 0 1

No change e Level change x e Dont care case

C1995 National Semiconductor Corporation

TL F 5946

RRD-B30M105 Printed in U S A

Absolute Maximum Ratings (Notes 1

2)

If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temp Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering 10 seconds)
b 0 5 VDC to a 18 VDC b 0 5 VDC to VDD a 0 5 VDC b 65 C to a 150 C

Recommended Operating Conditions (Note 2)

DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4013BM CD4013BC
a 3 VDC to a 15 VDC

0 VDC to VDD VDC

b 55 C to a 125 C b 40 C to a 85 C

700 mW 500 mW 260 C

DC Electrical Characteristics CD4013BM (Note 2)

Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS
b 55 C a 25 C a 125 C

Units mA mA mA V V V V V V

Min

Max 10 20 40 0 05 0 05 0 05

Min

Typ

Max 10 20 40 0 05 0 05 0 05

Min

Max 30 60 120 0 05 0 05 0 05

VOL

lIOl k 1 0 mA VDD e 5V VDD e 10V VDD e 15V lIOl k 1 0 mA VDD e 5V VDD e 10V VDD e 15V lIOl k 1 0 mA VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V lIOl k 1 0 mA VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V
VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V 35 70 11 0 0 64 16 42
b 0 64 b1 6 b4 2

VOH

High Level Output Voltage

4 95 9 95 14 95 15 30 40

4 95 9 95 14 95 15 30 40 35 70 11 0 0 51 13 34
b 0 51 b1 3 b3 4 b0 1

4 95 9 95 14 95 15 30 40 35 70 11 0 0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b0 1

VIL

Low Level Input Voltage

V V V V V V mA mA mA mA mA mA

VIH

High Level Input Voltage

IOL

Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current

0 36 09 24
b 0 36 b0 9 b2 4 b1 0

IOH

IIN

01

10b5

01

10

mA mA

DC Electrical Characteristics CD4013BC (Note 2)

Symbol IDD Parameter Quiescent Device Current Low Level Output Voltage Conditions VDD e 5V VIN e VDD or VSS VDD e 10V VIN e VDD or VSS VDD e 15V VIN e VDD or VSS
b 40 C a 25 C a 85 C

Units mA mA mA V V V V V V

Min

Max 40 80 16 0 0 05 0 05 0 05

Min

Typ

Max 40 80 16 0 0 05 0 05 0 05

Min

Max 30 60 120 0 05 0 05 0 05

VOL

lIOl k 1 0 mA VDD e 5V VDD e 10V VDD e 15V lIOl k 1 0 mA VDD e 5V VDD e 10V VDD e 15V lIOl k 1 0 mA VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V
2 4 95 9 95 14 95

VOH

High Level Output Voltage

4 95 9 95 14 95 15 30 40 15 30 40

4 95 9 95 14 95 15 30 40

VIL

Low Level Input Voltage

V V V

DC Electrical Characteristics CD4013BC (Note 2) (Continued)

Symbol VIH Parameter High Level Input Voltage Conditions
b 40 C a 25 C a 85 C

Units

Min

Max

Min 35 70 11 0 0 44 11 30
b 0 44 b1 1 b3 0

Typ

Max

Min 35 70 11 0

Max V V V mA mA mA mA mA mA
b1 0

lIOl k 1 0 mA VDD e 5V VO e 0 5V or 4 5V VDD e 10V VO e 1 0V or 9 0V VDD e 15V VO e 1 5V or 13 5V

VDD e 5V VO e 0 4V VDD e 10V VO e 0 5V VDD e 15V VO e 1 5V VDD e 5V VO e 4 6V VDD e 10V VO e 9 5V VDD e 15V VO e 13 5V VDD e 15V VIN e 0V VDD e 15V VIN e 15V

35 70 11 0 0 52 13 36
b 0 52 b1 3 b3 6 b0 3

IOL

Low Level Output Current (Note 3) High Level Output Current (Note 3) Input Current

0 88 2 25 88
b 0 88 b 2 25 b8 8 b 10 b 5 b0 3

0 36 09 24
b 0 36 b0 9 b2 4

IOH

IIN

03

10b5

03

10

mA mA

Note 1 Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are measured one output at a time

AC Electrical Characteristics
Symbol CLOCK OPERATION tPHL tPLH Propagation Delay Time Parameter

TA e 25 C CL e 50 pF RL e 200k unless otherwise noted Conditions Min Typ Max Units

VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V 25 62 76

200 80 65 100 50 40 100 40 32

350 160 120 200 100 80 200 80 65 15 10 5

ns ns ns ns ns ns ns ns ns ms ms ms ns ns ns MHz MHz MHz

tTHL tTLH

Transition Time

tWL tWH

Minimum Clock Pulse Width Maximum Clock Rise and Fall Time Minimum Set-Up Time

tRCL tFCL

tSU

20 15 12 5 12 5 15 5

40 30 25

fCL

Maximum Clock Frequency

SET AND RESET OPERATION tPHL(R) tPLH(S) tWH(R) tWH(S) CIN Propagation Delay Time VDD e 5V VDD e 10V VDD e 15V VDD e 5V VDD e 10V VDD e 15V Any Input 150 65 45 90 40 25 5 300 130 90 180 80 50 75 ns ns ns ns ns ns pF

Minimum Set and Reset Pulse Width Average Input Capacitance

AC Parameters are guaranteed by DC correlated testing

Schematic Diagram

TL F 5946 3 TL F 5946 2

TL F 59464

Logic Diagram

TL F 5946 5

Switching Time Waveforms

TL F 5946 6

CD4013BM CD4013BC Dual D Flip-Flop

Physical Dimensions inches (millimeters)

Ceramic Dual-In-Line Package (J) Order Number CD4013BMJ or CD4013BCJ NS Package Number J14A

Molded Dual-In-Line Package (N) Order Number CD4013BMN or CD4013BCN NS Package Number N14A LIFE SUPPORT POLICY NATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user
National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018

2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness

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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications