Code: R7411908

R07
DSP PROCESSORS & ARCHITECTURES (Electronics & Computer Engineering)

B.Tech IV Year I Semester (R07) Supplementary Examinations December/January 2013/14

Time: 3 hours Answer any FIVE questions All questions carry equal marks ***** 1

Max. Marks: 80

(a) Find the FFT of the sequence [10101010] using DIT FFT. (b) Derive the equation for number of computations required to implement an n-point FFT. (a) Perform the binary multiplication of the following Q.3 numbers. i) -0.5 X 0.875 ii) -0.375 X -0.625 (b) Determine the quantization error in starting the above results using Q-6 format. (a) Explain the architectural differences between DSP processors and micro processors. (b) With a block diagram explain how a DSP processor in connected to external memory. Explain the following terms: i) Pipeline depth. ii) Pipelining performance. iii) Inter locking. (a) What are the different busses of JMS320C5XX and their functions? (b) Explain about indirect addressing with neat block diagram. (a) Explain the functionality of second order IIR filter with help of block diagram. (b) Explain about the digital interpolation factors. (a) Derive the optimum scaling factors for the DIT-FFT butterfly. (b) Explain the computation of the signal spectrum. Draw the memory interface block diagram of JMS320C541 processor and explain its operation.

*****