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EE682 - Group Project Design: Lecture #1 Power Switch Design
EE682 - Group Project Design: Lecture #1 Power Switch Design
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Design Tasks
1. Power switch design
2. Inductor design
3. Capacitor design
4. Drive circuit
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Design Specifications
1. Input voltage: 24 V
2. Output voltage: 48 V
3. Output power: 240 W
4. Inductor current ripple: 15 %
5. Capacitor voltage ripple: 0.1 %
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PSW _ loss =
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1 Vout + VF Vin
1 48 + 0.7 24
=
sec = 25.73 s
3
f
Vout
48
20 10
2. ON state loss
PON _ loss =
=
WON _ loss
T
1 2
= I D rDS ( ON )t1
T
)
)
1
152 0.075 25.73 10 6 = 8.684W
1
20 103
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T JC ( t ) = Ploss Z JC ( 50 %) ( t ) R JC
T js = Rjs Ploss = 3.3o C/W 9.452W = 31.2o C < Tjmax = 175C
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