Dell Latitude D620 Laptop Schematics

A
COMPAL CONFIDENTIAL
1
MODEL NAME : HAL00

PCB NO : LA-2792
COMPAL P/N : 45135731L01
Travis (DIS) Schematics Document
uFCPGA Mobile Yonah

Intel Calistoga + ICH7M
2006-01-20
REV : 1.0 (DELL: A00)
3
DELL CONFIDENTIAL/PROPRIETARY
MB PCB
Part Number
DAA0000050L
Compal Electronics, Inc.
Description
PCB ZJX LA-2792
REV0 MB DIS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BOM NO. 45135731L01

PCB P/N: DAA0000051L
Title
Cover Sheet
Size
Document Number
Date:
Tuesday, February 07, 2006
Rev
1.0
LA-2792
Sheet
E
of
70
Compal confidential
Block Diagram
Model : HAL00
GUARDIAN II
EMC4000
FAN1_VOUT
page 18
Pentium-M
Yonah-2M
uFCPGA CPU
Thermal
FAN
+3.3V_SUS
+VCC_CORE
LVDS CONN
+1.2VRUN
+VDD_CORE(1.1V)
Memory BUS
(DDR2) +1.8V_SUS
DDRII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
533 / 667MHz
page 16,17
+0.9V_DDR_VTT
+1.5V_RUN
PCI-E 16X
+1.8V_SUS
1466pin BGA
+1.8V_SUS
+1.05V_VCCP (1.05V)
+3.3V_RUN
+2.5V_RUN
HUB USB[3]
page 10,11,12,13,14,15
DMI
PCI BUS
USB[5,6]
DOCKING
BUFFER
+3.3V_RUN 33MHz
+5V_RUN PAGE 35
CardBus
OZ601 TQFP
+3.3V_RUN
USB[7]
+3.3V_RUN
+3.3V_RUN
+1.5V_RUN page 34
HUB USB[1]
+3.3V_SUS
+1.5V_RUN
PCI Express BUS
Mini Card 1
WWAN
+3.3V_RUN
+1.5V_RUN page 34
GIGA Enthernet
BCM5752
VCORE (IMVP-6)
page 49
CHARGER
4
page 50
BATT SELECT
SMSC SIO
ECE5018
page 45
page 46
M DC
page 38
HUB USB[2]
D Moudle
S-HDD
+5VHDD
HUB USB[3]
+3.3V_RUN page 33
+5V_RUN
page 25
page 25
Azalia Codec
STAC9200
+3.3V_RUN
+VDDA
page 26
RJ11
IO/B
SPI
+RTC_CELL
+3.3V_ALW page 39
AMP & INT.

Speaker
COM
page 43
Cable
HUB USB[1]
SMSC KBC
MEC5004
INT MIC
IO/B
+5V_SUS
+5V_SUS page 27
page 37
Power On/Off
SW & LED
3V/5V/15V
page 51
USB[2]
+3.3V_SUS
page 33
Bluetooth
page 44
BATT IN
USB3 on the top of connector,

USB4 on the bottom
SATA
SPI
page 42
DC IN
IO/B
ATA100
LPC BUS
+3.3V_ALW
Power Sequence
page 32
Azalia I/F
+3.3V_RUN
33MHz
HUB USB[4]
1.5V/1.05V
Int.KBD &
Stick page
FIR
HeadPhone &
MIC Jack
+3.3V_RUN page 27
ST M25P80
+3.3V_ALW page 39
40
4
+3.3V_RUN page 37
Stick
DC/DC Interface
Touch Pad
+5V_RUN
page 41
page 40

Title
Block Diagram
Size
Document Number
Date:
Rev
1.0
LA-2792
A
USB Ports X2
USB[1]
IO/B
page 47
SIDE
page 29
RJ45
page 48
USB[3,4]
+3VLAN
HUB USB[2]
1.8V/0.9V
USB5 on right side of

connector, USB6 on left side
+1.05V_VCCP
USB[0]
USB Ports X2
+5V_SUS
page 21,22,23,24
Mini Card2
WLAN
SLOT
+5V_SUS
INTEL
ICH7-M
652pin BGA
IDSEL:AD17
(PIRQC,D#,GNT#1,REQ#1)
page 30
+3.3V_RUN/ +1.5V_RUN 100MHz
REAR
+1.5V_RUN
100MHz
48MHz
PAGE 36
Smart Card
OZ77C6
+3.3V_RUN page 31
TV
DOCKING
PORT
page6
H_D#(0..63)
System Bus
INTEL
Calistoga
page 52,53,54,55,56,57,58
DVI
+3.3V_RUN
+1.05V_VCCP page 7
page 7,8
page 20
NVG72-M-V
+INV_PWR_SRC
+LCDVDD page 19
FSB 533/667 MHz
CRT CONN
+5V_RUN
Clock Generator
SLG84450VTR
478pin
H_A#(3..31)
RGB
CPU ITP Port
+1.05V_VCCP (1.05V)
page 18
Sheet
E
of
70
Ceramic Capacitors :
PCI TABLE
PCI DEVICE
0.1U_0402_6.3VXX
Tolerance
Temperature Characteristics
Rated Voltage
CARD BUS
IDSEL
REQ#/GNT#
PIRQ
AD17
Package Size
Value
PM TABLE
+5V_RUN
+3.3V_SRC
Tantalum or Polymer Capacitors :
power
plane
10U_D2_10VX_R45
+3.3V_RUN
+15V_SUS
+5V_ALW
+5V_SUS
+3.3V_ALW
+3.3V_SUS
+1.8V_RUN
+0.9V_DDR_VTT
+1.5V_RUN
+1.8V_SUS
+VCC_CORE
State
+1.05V_VCCP
Low ESR Mark : 45 m ohm
Tolerance
S0
ON
ON
ON
Rated Voltage
S1
ON
ON
ON
Package Size
S3
ON
ON
OFF
Value
S5 S4/AC
ON
OFF
OFF
S5 S4/AC don't exist
OFF
OFF
OFF
USB
Capacitor Spec Guide:
+2.5V_RUN
TABLE
Temperature Characteristics:
B
Symbol
Z5P
Y5U
Y5V
Y5P
X5R
X7R
X6S
BJ
CH
CJ
CK
SH
SJ
Z5U
Z5V
NPO
COG
CODE
UJ
UK
SL
X5S
Tolerance:
Symbol
A
CODE
K
+-10%
+-0.05PF +-0.1PF +-0.25PF +-0.5PF

N
M
+-20%
+-30%
+-1PF
+-2%
+-3%
DESTINATION
USB HUB
DESTINATION
Mini 2(WLAN)
PC Card Bay
USB Hub (5018)
Mini 1(WWAN)
D Moudle
Smart Card --> BIO
3,4
SIDE
Blue tooth
5,6
REAR
Docking
USB PORT#
J
+-5%
NOTE1:
+100,-0% +30,-10% +20,-10% +40,-20% +80,-20%
@XX :
Depop component
Title
Index and Config.

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
RUN_ON
ADAPTER
RUN_ON
+PWR_SRC
FDS4435
+INV_PWR_SRC
RUN_ON
MAX8632
+1.2VRUNP
+VCC_GFX_CORE
BATTERY
ALWON
MAX8734
C
ISL6260
ISL6227
MAX88550
C
+5V_RUN
+VDDA
+15V_SUS
+3.3V_RUN
SI3456
SI4800
+3VLAN
+3.3V_SUS
RUN_ON
SUSPWROK_5V
RUNPWROK
RUNPWROK
+VCC_CORE +1.5V_RUN +1.05V_VCCP
+1.8V_SUS +0.9V_DDR_VTT
RUN_ON
SI4800
ENAB_3VLAN
PL8
RUN_ON
793475
(Option)
SI3456
+3.3V_SRC
AUDIO_AVDD_ON
RUN_ON
+5V_SATA
MODC_EN#
HDDC_EN#
SI3456
RUNPWROK
SUS_ON
SUS_ON
+3.3V_ALW
+5V_SUS
+5V_ALW
ALWON
SI4800
+1.8V_RUN
SI3456
L47
EMC4000
MOD
(+5V_RUN)
A
+2.5V_RUN

Title
Power Rail
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
+3.3V_SUS
2.2K
C22
+3.3V_RUN
2.2K
B22
2N7002
ICH_SMBDATA
2N7002
32
30
C7
+3.3V_ALW
10K
10K
SMBUS Address [TBD]
C8
32
5752M
LOM
WWAN
2.2K
CLK_SCLK
16
+3.3V_SUS
ICH_SMBCLK
ICH7-M
2.2K
17
CLK_SDATA
30
SMBUS Address [D2]
WLAN
SMBUS Address [C8]
197
DIMM0
SMBUS Address [TBD]
195
CLK_SMB
SMBUS Address [A0]
DAT_SMB
CLK GEN.
+3.3V_ALW
GUARDIAN
197
SMBUS Address [2F]
195
+3.3V_ALW
DIMM1
SMBUS Address [A2]
8.2K
10
DOCK_SMB_CLK
DOCK_SMB_DAT
SIO
39
+3.3V_ALW
40
+3.3V_ALW
4.7K
Macallan IV
112
SBAT_SMBCLK
111
SBAT_SMBDAT
8.2K
100
4.7K
3
4
100
+3.3V_ALW
DOCKING
SMBUS Address [C4, 72, 70, 48]
2'nd
BATTERY
SMBUS Address [16]
INV
Inverter
SMBUS Address [58]
+3.3V_ALW
8.2K
8
PBAT_SMBCLK
PBAT_SMBDAT
8.2K
100
3
4
BATTERY
CONN
SMBUS Address [16]
10
CHARGER
SMBUS Address [12]
+3.3V_ALW
100
9
A
Title
SMBUS TOPOLOGY
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
+3.3V_RUN
Q36
2N7002W-7-F_SOT323~D
2N7002
ICH_SMBDATA
23,28,34 ICH_SMBDATA
G 2
2
L40
BLM21PG600SN1D_0805~D
1
R275
2.2K_0402_5%~D
C326
0.1U_0402_16V4Z~D
C402
10U_0805_10V4Z~D
2
CLK_SDATA
C308
10U_0805_10V4Z~D
2
100
33.3
133
100
33.3
200
100
33.3
166
100
33.3
333
100
33.3
Place crystal within

500 mils of CK410
R274
1_0603_5%~D
1
2 +CK_VDD_REF
1
C333
27P_0402_50V8J~D
2
1
+CK_VDD_48
R273
2.2_0603_5%~D
CLK_XTAL_IN
R32
470_0402_5%~D
1
2
CLK_ICH_48M
23 CLK_ICH_48M
CLK_PCI_5004
39 CLK_PCI_5004
CLK_PCI_LOM
CLK_PCI_PCM
30 CLK_PCI_PCM
CLK_DOCKPCI_33M
36 CLK_DOCKPCI_33M
VDDSRC
VDDSRC
VDDSRC
VDDSRC
30
36
VDDPCI
VDDPCI
12
VDDCPU
18
VDDREF
40
20
52 CLK_NVSS_27M
19
X2
41
USB_48MHz/FSLA
FSB
45
FSLB/TEST_MODE
FSC
23
REF0/FSLC/TEST_SEL
CLK_PCI_ICH
CLK_ENABLE#
21 CLK_PCI_ICH
49 CLK_ENABLE#
1
12.1_0402_1%~D
1
12.1_0402_1%~D
1
33_0402_5%~D
1
33_0402_5%~D
1
33_0402_5%~D
FCTSEL1
34
PCICLK4/FCTSEL1
PCI_LOM
33
PCI_PCM
DOCKPCI_33M
CLKREF
2
2 12.1_0402_1%~D
12.1_0402_1%~D
CLK_NV
1
150_0402_5%~D
CLK_NVSS
2
33_0402_5%~D
R316
R1582
1
2
+3.3V_RUN
33_0402_5%~D
10K_0402_5%~D
PCI_ICH
2
1
R73
91_0402_5%~D
1
R362
CPU_BSEL2
FSB
MCH_CLKSEL2 10
R330
0_0402_5%~D
CPU_BSEL1
PIN44
PIN47
DOT96T DOT96C
96/100M_T
1 (DIS) 27M_out 27M SSout
SRCT0
11
MCH_BCLK
10
MCH_BCLK#
CPUT0
14
CPU_BCLK
CPUC0
13
CLK_MCH_BCLK
2
33_0402_5%~D
CLK_MCH_BCLK#
2
33_0402_5%~D
1
R321
CPU_BCLK# 1
R337
CLK_CPU_BCLK
2
33_0402_5%~D
CLK_CPU_BCLK#
2
33_0402_5%~D
CLK_CPU_ITP
2
33_0402_5%~D
CLK_CPU_ITP#
2
33_0402_5%~D
CPUT_ITP/SRCT10
CPU_ITP
CPUC_ITP/SRCC10
CPU_ITP#
SRCT9
SRCC9
1
R368
1
R376
PCIE_SATA
PCIE_SATA#
27
PCICLK1
CLKREQ8#
71
SRCT7
66
SRCC7
67
REF1
43
DOTT_96MHz/27MHz
44
DOTC_96MHz/27MHz(SS)
37
ITP_EN/PCICLK_F0
39
Vtt_PwrGd#/PD
38
SRCT6
63
PCIE_ICH
SRCC6
64
PCIE_ICH#
CLKREQ6#
62
SRCT5
60
MCH_3GPLL
MCH_3GPLL#
SRCC5
61
CLKREQ5#
29
SRCT4
58
SRCC4
59
IREF
SMBCLK
CLKREQ4#
57
SRCT3
55
PCIE_VGA
56
PCIE_VGA#
SMBDAT
R1762
GNDSRC
SRCC3
GNDCPU
CLKREQ3#
28
21
GNDREF
SRCT2
52
PCIE_MINI2
31
GNDPCI
SRCC2
53
PCIE_MINI2#
35
GNDPCI
CLKREQ2#
26
42
GND48
SRCT1
50
68
GNDSRC
SRCC1
51
CLKREQ1#
46
LCD100/96/SRC0_T
47
LCD100/96/SRC0_C
48
THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD
1
1
R370
1
R390
1
R1763
1
R1393
1
R1394
R1395 1
PCIE_MINI1
1
R1638
PCIE_MINI1#
1
R1639
1
R1640
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
SATA_CLKREQ# 23
+3.3V_RUN
CLK_3GPLLREQ# 10
2 10K_0402_5%~D
+3.3V_RUN
CLK_PCIE_LOM
2
CLK_PCIE_LOM 28
33_0402_5%~D
CLK_PCIE_LOM#
2
CLK_PCIE_LOM# 28
33_0402_5%~D
LOM_CLKREQ# 28
2 10K_0402_5%~D
+3.3V_RUN
CLK_PCIE_VGA
2
CLK_PCIE_VGA 52
33_0402_5%~D
CLK_PCIE_VGA#
2
CLK_PCIE_VGA# 52
33_0402_5%~D
2
+3.3V_RUN
10K_0402_5%~D
CLK_PCIE_MINI2
2
CLK_PCIE_MINI2 34
33_0402_5%~D
R299 1
1
R1435
PCIE_LOM#
1
R1436
CLK_PCIE_MINI2#
2
33_0402_5%~D
CLK_PCIE_MINI2# 34
MINI2CLK_REQ# 34
2 10K_0402_5%~D
+3.3V_RUN
CLK_PCIE_MINI1
2
CLK_PCIE_MINI1 34
33_0402_5%~D
CLK_PCIE_MINI1#
2
CLK_PCIE_MINI1# 34
33_0402_5%~D
MINI1CLK_REQ# 34
+3.3V_RUN
2
10K_0402_5%~D
5.1
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
CLK_PCIE_ICH
2
CLK_PCIE_ICH 23
33_0402_5%~D
CLK_PCIE_ICH#
2
CLK_PCIE_ICH# 23
33_0402_5%~D
2
+3.3V_RUN
10K_0402_5%~D
CLK_MCH_3GPLL
2
CLK_MCH_3GPLL 10
33_0402_5%~D
CLK_MCH_3GPLL#
2
CLK_MCH_3GPLL# 10
33_0402_5%~D
1
R366
1
R375
1
R1761
1
R397
1
R402
SLG84450VTR_QFN72~D
SRCC0
CLK_PCIE_VGA
1
R542
CLK_PCIE_VGA# 1
R543
CLK_PCIE_MINI2 1
R544
CLK_PCIE_MINI2# 1
R545
CLK_PCIE_MINI1 1
R1641
CLK_PCIE_MINI1# 1
R1642
CLK_MCH_BCLK# 10
2 10K_0402_5%~D
PCIE_LOM
15
73
74
75
76
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
2
49.9_0402_1%~D
CLK_MCH_BCLK 10
CLK_PCIE_SATA
2
33_0402_5%~D
CLK_PCIE_SATA#
2
33_0402_5%~D
1
R394
1
R400
R292 1
CLKREQ7#
23
H_STP_CPU# 23
1
R348
1
R359
69
22
H_STP_PCI#
FCTSEL1
Solder Thermal Pad to GND. Add min. 4 vias.
@ R278
10K_0402_5%~D
96/100M_C
CPUT1
CPUC1
SRCC8
17
R290
10K_0402_5%~D
PIN48
H_STP_CPU#
FSA
0 (UMA)
PIN43
H_STP_PCI#
24
PCICLK2
FCTSEL1
R271
10K_0402_5%~D
25
CPU_STOP#
32
CLK_SDATA
+3.3V_RUN
PCI_SRC_STOP#
72
16
+3.3V_RUN
70
CLK_SCLK
MCH_CLKSEL1 10
GNDA
SRCT8
R354
0_0402_5%~D
VDDA
PCICLK3
8.2K_0402_5%~D
1
Place near CK410+
CLKREQ9#
2 CLKIREF
475_0402_1%~D
R531
+CK_VDD_A
X1
FSA
1
R266 1
R250
CLK_NV_27M
2
R1621
CLK_NVSS_27M
1
R345
23 CLK_ICH_14M
38 CLK_SIO_14M
FSC
C70
0.1U_0402_16V4Z~D
C330
0.1U_0402_16V4Z~D
VDD48
CLK_XTAL_OUT
1
12.1_0402_1%~D
2
12.1_0402_1%~D
CLK_ICH_14M
CLK_SIO_14M
52 CLK_NV_27M
1
2
R1619
2
R1438
2
R331
2
R302
2
R294
CLK_PCI_5018
28 CLK_PCI_LOM
2
R298
1
R1589
CLK_SMC_48M
38 CLK_PCI_5018
U16
1
49
54
65
Reserve
CPU_BSEL2(FSC) CPU_BSEL1(FSB)
166
X2
31 CLK_SMC_48M
133
C329
27P_0402_50V8J~D14.31818MHz_20P_1BX14318CC1A~D
2
1
Table : ICS954305AK
CPU_BSEL
NOTE: Place Decoupling as close as

physically possilble to the VDD pins
33.3
100
400
C389
0.1U_0402_16V4Z~D
1
C344
0.1U_0402_16V4Z~D
2
R401
2.2_0603_5%~D
1
2
+CK_VDD_REF
1
33.3
100
100
+CK_VDD_48
1
C52
0.047U_0402_16V4Z~D
266
Place near each pin

W>40 mil
PCI
MHz
C64
0.1U_0402_16V4Z~D
2
16,17
CLKSEL0
SRC
MHz
C50
4.7U_0603_6.3V4Z~D
CLKSEL1
FSA
C61
0.047U_0402_16V4Z~D
CLKSEL2
CPU
MHz
FSB
C68
4.7U_0603_6.3V4Z~D
+CK_VDD_A
FSC
CLK_SCLK
C51
0.047U_0402_16V4Z~D
Q38
2N7002W-7-F_SOT323~D
CLK_SCLK
3
S
C58
0.1U_0402_16V4Z~D
2
L32
2
G
2
G
ICH_SMBCLK
C384
0.1U_0402_16V4Z~D
2
16,17
+3.3V_RUN
23,28,34 ICH_SMBCLK
+CK_VDD_MAIN2
CLK_SDATA
2
R369
2
R377
CLK_MCH_BCLK 2
R349
CLK_MCH_BCLK# 2
R360
CLK_CPU_BCLK
2
R322
CLK_CPU_BCLK# 2
R338
CLK_MCH_3GPLL 1
R392
CLK_MCH_3GPLL# 1
R403
CLK_PCIE_SATA 1
R381
CLK_PCIE_SATA# 1
R385
CLK_PCIE_ICH
1
R365
CLK_PCIE_ICH#
1
R374
CLK_PCIE_LOM
1
R393
CLK_PCIE_LOM# 1
R399
CLK_CPU_ITP#
CLK_CPU_ITP
+CK_VDD_MAIN
R270
2.2K_0402_5%~D
+3.3V_RUN
+CK_VDD_MAIN

Title
Clock Generator
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
10
10
H_ADSTB#0
H_ADSTB#1
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_ADSTB#0
H_ADSTB#1
L2
V4
ADSTB0#
ADSTB1#
DINV0#
DINV1#
DINV2#
DINV3#
J26
M26
V23
AC20
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
H23
M24
W24
AD23
G22
N25
Y25
AE24
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
A6
A5
C4
B3
C6
B4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
D5
A3
H_STPCLK#
H_SMI#
YONAH
ADDR GROUP
DATA GROUP
6 CLK_CPU_BCLK
6 CLK_CPU_BCLK#
CLK_CPU_BCLK A22
CLK_CPU_BCLK# A21
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
10
10
+1.05V_VCCP
R422
56_0402_5%~D
1
H_ADS#
H_BNR#
10 H_BPRI#
10
H_BR0#
10 H_DEFER#
10
H_DRDY#
10
H_HIT#
10
H_HITM#
10 H_LOCK#
10 H_RESET#
10
H_RS#[0..2]
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
23,39 ITP_DBRESET#
10
H_DBSY#
22
H_DPSLP#
22,49 H_DPRSTP#
10
H_DPWR#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
AD4
AD3
AD1
AC4
BPM0#
BPM1#
BPM2#
BPM3#
ITP_DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ITP_BPM#4
ITP_BPM#5
C20
E1
B5
E5
D24
AC2
AC1
D21
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
D6
D7
AC5
AA6
AB3
C26
D25
AB5
AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
A24
A25
C7
THERMDA DIODE
THERMDC
THERMTRIP#
22 H_PWRGOOD
10,22 H_CPUSLP#
R1387
@
1K_0603_1%~D
2
1
2
1
R1378
51_0603_1%~D
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
H_THERMDA
H_THERMDC
18 H_THERMDA
18 H_THERMDC
18 H_THERMTRIP#
CONTROL
RS0#
RS1#
RS2#
TRDY#
38 CPU_PROCHOT#
Pop R1378 required by

Intel for B0 Yonah.
Backward compatible for
A0 and A1 Yonah
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
HOST CLK
F3
F4
G3
G2
10 H_TRDY#
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
BCLK0
BCLK1
MISC
THERMAL
2 @
JITP
2 @
ITP_DBRESET#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
R424
22.6_0402_1%~D
H_RESET# 1
2
R434
22.6_0402_1%~D
ITP_TDO
1
2
6
6
CLK_CPU_ITP
CLK_CPU_ITP#
ITP_BPM#5
ITP_TCK
CLK_CPU_ITP
CLK_CPU_ITP#
ITP_TCK
ITP_TRST#
ITP_TMS
ITP_TDI
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+3.3V_SUS
R367
150_0402_1%~D
ITP_DBRESET#
1
2
VTT1
VTT0
VTAP
DBR#
DBA#
BPM0#
GND5
BPM1#
GND4
BPM2#
GND3
BPM3#
GND2
BPM4#
GND1
BPM5#
RESET#
FBO
GND0
BCLKP
BCLKN
TDO
NC2
TCK
NC1
TRST#
TMS
TDI
+1.05V_VCCP
R415
51_0402_5%~D
ITP_TDO
1
2
R416
51_0402_5%~D
H_RESET#
1
2
R33
54.9_0402_1%~D
ITP_BPM#5
1
2
@ MOLEX_52435-2891_28P~D
+1.05V_VCCPR387
39.2_0402_1%~D
ITP_TMS
1
2
R417
150_0402_5%~D
ITP_TDI
1
2
This shall place near CPU
R391
680_0402_5%~D
ITP_TRST#
1
2
R436
27.4_0402_1%~D
ITP_TCK
1
2
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
LEGACY CPU
29
K3
H2
K2
J3
L5
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
29
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
+1.05V_VCCP
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
30
10 H_REQ#[0..4]
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
30
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
H_D#[0..63] 10
JCPUA
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
C72
0.01U_0402_16V7K~D
H_A#[3..31]
C71
0.01U_0402_16V7K~D
10
10
10
10
10
B
H_DSTBN#[0..3] 10
H_DSTBP#[0..3] 10
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
22
22
22
22
22
22
H_STPCLK# 22
H_SMI# 22
H_THERMTRIP#
TYCO_1-1674770-2_Yonah~D
H_THERMDA, H_THERMDC routing together.

Trace width / Spacing = 10 / 10 mil
A
+1.05V_VCCP
R398
56_0402_5%~D
1
2 H_THERMTRIP#
Title
Yonah in mFCPGA479
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
Length match within 25 mils

+VCC_CORE
JCPUB
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+1.5V_RUN
+1.05V_VCCP
+VCC_CORE
R140
1K_0402_1%~D
2
R555
100_0402_1%~D
VCCSENSE
2
V_CPU_GTLREF
R556
100_0402_1%~D
VSSSENSE
1
2
R_B
49
H_PSI#
49
49
49
49
49
49
49
VID0
VID1
VID2
VID3
VID4
VID5
VID6
H_PSI#
R147
2K_0402_1%~D
C87
10U_0805_4VAM~D
R_A
C88
0.01U_0402_16V7K~D
+1.05V_VCCP
Layout close CPU PIN AD26

0.5 inch (max)
Layout close CPU
VID0
VID1
VID2
VID3
VID4
VID5
VID6
10
6
6
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
R129
27.4_0402_1%~D
1
R124
54.9_0402_1%~D
1
R465
27.4_0402_1%~D
1
R457
54.9_0402_1%~D
1
+VCC_CORE
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any
other toggling signal.
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
133
166
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
AE6
PSI#
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AD26
V_CPU_GTLREF
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
YONAH
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
JCPUC
AF7
AE7
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
POWER, GROUNG, RESERVED SIGNALS AND NC
49
49
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
YONAH
POWER, GROUND
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
Title
Yonah in mFCPGA479
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
+VCC_CORE
Place these inside 1

socket cavity on L8
(North side
Secondary)
2
1
C100
10U_0805_4VAM~D
2
1
C429
10U_0805_4VAM~D
1
C98
10U_0805_4VAM~D
1
C430
10U_0805_4VAM~D
C99
10U_0805_4VAM~D
C472
10U_0805_4VAM~D
2
1
C473
10U_0805_4VAM~D
1
C119
10U_0805_4VAM~D
1
C142
10U_0805_4VAM~D
C141
10U_0805_4VAM~D
+VCC_CORE

socket cavity on L8
(Sorth side
Secondary)
2
1
C428
10U_0805_4VAM~D
2
1
C138
10U_0805_4VAM~D
1
C447
10U_0805_4VAM~D
1
C470
10U_0805_4VAM~D
C469
10U_0805_4VAM~D
C467
10U_0805_4VAM~D
2
1
C471
10U_0805_4VAM~D
1
C97
10U_0805_4VAM~D
1
C102
10U_0805_4VAM~D
C433
10U_0805_4VAM~D
+VCC_CORE

socket cavity on L8
(North side
Primary)
2
1
C468
10U_0805_4VAM~D
2
1
C140
10U_0805_4VAM~D
1
C139
10U_0805_4VAM~D
1
C446
10U_0805_4VAM~D
1
C466
10U_0805_4VAM~D
C137
10U_0805_4VAM~D
+VCC_CORE

socket cavity on L8
(Sorth side
Primary)
2
1
C448
10U_0805_4VAM~D
2
1
C432
10U_0805_4VAM~D
1
C426
10U_0805_4VAM~D
1
C427
10U_0805_4VAM~D
22uF 0805 X5R -> 85 degree C
1
C431
10U_0805_4VAM~D
C120
10U_0805_4VAM~D
C
High Frequence Decoupling
Near VCORE regulator.
The caps need change to ESR=6m ohms
1
+
2
1
+
2
C365
330U_D_2.5VM_R6M~D
@ C618
330U_D_2.5VM_R6M~D
C497
330U_D_2.5VM_R6M~D
@ C354
330U_D_2.5VM_R6M~D
C496
330U_D_2.5VM_R6M~D
South Side Secondary
C352
330U_D_2.5VM_R6M~D
+VCC_CORE
1
+
2
North Side Secondary
ESR <= 1.5m ohm

Capacitor > 1980uF
+
2
7mOhm
PS CAP
7mOhm
PS CAP
7mOhm
PS CAP
7mOhm
PS CAP
7mOhm
PS CAP
7mOhm
PS CAP
@ C372
330U_D2E_2.5VM_R9~D
+1.05V_VCCP
1
1
+
2
1
C415
0.1U_0402_10V7K~D
1
C439
0.1U_0402_10V7K~D
1
C451
0.1U_0402_10V7K~D
1
C416
0.1U_0402_10V7K~D
1
C462
0.1U_0402_10V7K~D
C414
0.1U_0402_10V7K~D
Place these inside

socket cavity on L8
(North side
Secondary)
CRB was 270uF
Title
CPU Bypass
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
of
70
Description at page12
Note :
CFG3:17 has
internal pullup,
CFG18:19 has
internal pulldown
+1.05V_VCCP
HRS0#
HRS1#
HRS2#
B4
E6
D6
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#
H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#
7
7
7
7
7
7
7
7
7
7
7
7
7
7,22
16
16
17
17
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
16
16
17
17
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
16
16
17
17
+1.8V_SUS
R142 1
1
R141
H_VREF
M_ODT0
M_ODT1
M_ODT2
M_ODT3
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
AE37
AF41
AG37
AH41
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
AC37
AE41
AF37
AG41
DMITXP0
DMITXP1
DMITXP2
DMITXP3
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
AY35
AR1
AW7
AW40
SM_CK0
SM_CK1
SM_CK2
SM_CK3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
AW35
AT1
AY7
AY40
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
AU20
AT20
BA29
AY29
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDR_CS0_DIMMA# AW13
DDR_CS1_DIMMA# AW12
DDR_CS2_DIMMB# AY21
DDR_CS3_DIMMB# AW21
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDOCMP0
M_OCDOCMP1
AL20
AF10
SM_OCDCOMP0
SM_OCDCOMP1
M_ODT0
M_ODT1
M_ODT2
M_ODT3
BA13
BA12
AY20
AU21
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
2 80.6_0402_1%~D
2
80.6_0402_1%~D
SMRCOMPN
SMRCOMPP
AV9
AT9
V_DDR_MCH_REF
23 PM_BMBUSY#
PM_EXTTS#0
16 PM_EXTTS#0
PM_EXTTS#1
23 PM_EXTTS#1
18 THERMTRIP_MCH#
ICH_PWRGD
23,42 ICH_PWRGD
PLTRST_R#
2
1
21,23,28,34 PLTRST#
100_0402_1%~D
R441
21 MCH_ICH_SYNC#
CFG
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
AC35
AE39
AF35
AG39
SM_RCOMPN
SM_RCOMPP
AK1
AK41
SM_VREF0
SM_VREF1
G28
F25
H26
G6
AH33
AH34
PM_BMBUSY#
PM_EXTTS0#
PM_EXTTS1#
PM_THERMTRIP#
PWROK
RSTIN#
K28
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
G_CLKP
G_CLKN
CLK
0.1U_0402_16V4Z~D
C48
23
23
23
23
+1.05V_VCCP
H_DSTBP#[0..3] 7
7
7
7
7
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3
NC
0.1U_0402_16V4Z~D
C65
2
1
2
1
2
221_0402_1%~D
R64
100_0402_1%~D
R65
2
CLK_MCH_BCLK# 6
CLK_MCH_BCLK 6
H_DSTBN#[0..3] 7
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_RESET#
H_ADS#
H_TRDY#
16
16
17
17
7
7
23
23
23
23
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
RESERVED
B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3
16
16
17
17
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3
AE35
AF39
AG35
AH39
ICH_SYNC#
CALISTOGA_FCBGA1466~D
AG33
AF33
D_REF_CLKN
D_REF_CLKP
A27
A26
D_REF_SSCLKN
D_REF_SSCLKP
C40
D41
CLK_REQ#
H32
CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6
+1.5V_RUN
CLK_3GPLLREQ# 6
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13
T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35
Layout Note:
Route as short
as possible
H_RS#0
H_RS#1
H_RS#2
PM_EXTTS#0
16,17,48 V_DDR_MCH_REF
H_RS#[0..2]
CPU_BSEL0
CPU_BSEL0 8
MCH_CLKSEL1
MCH_CLKSEL1 6
MCH_CLKSEL2
MCH_CLKSEL2 6
CFG3
PAD~D T34
CFG4
PAD~D T35
CFG5
CFG5
12
CFG6
CFG6
12
CFG7
CFG7
12
CFG8
PAD~D T41
CFG9
CFG9
12
CFG10
PAD~D T42
CFG11
CFG11
12
CFG12
CFG12
12
CFG13
CFG13
12
CFG14
PAD~D T43
CFG15
PAD~D T44
CFG16
CFG16
12
CFG17
PAD~D T45
CFG18
CFG18
12
CFG19
CFG19
12
CFG20
CFG20
12
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
+3.3V_RUN
V_DDR_MCH_REF
R336
10K_0402_5%~D
2
1
@
PM_EXTTS#1
M_OCDOCMP0
M_OCDOCMP1
R253
10K_0402_5%~D
2
1
@ R437
40.2_0402_1%~D
2
1
HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
23
23
23
23
DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3
@ R435
40.2_0402_1%~D
2
1
J7
W8
U3
AB10
0.1U_0402_16V4Z~D
HDINV#0
HDINV#1
HDINV#2
HDINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
221_0402_1%~D
R85
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
K4
T7
Y5
AC4
K3
T6
AA5
AC5
H_ADSTB#0
H_ADSTB#1
AG1
AG2
H_ADSTB#0
H_ADSTB#1
HCLKN
HCLKP
H_REQ#[0..4] 7
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_SWNG0
100_0402_1%~D
R326
B9
C13
+1.05V_VCCP
HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
HADSTB#0
HADSTB#1
C425
0.1U_0402_16V4Z~D
24.9_0402_1%~D
R90
24.9_0402_1%~D
R57
2
1
1
2
J13
K13
E1
E2
Y1
U1
E4
W1
D8
G8
B8
F8
A8
H_SWNG1
C363
1
2
54.9_0402_1%~D
R52
1
2
54.9_0402_1%~D
R80
H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3
PM
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
U40B
23
23
23
23
DDR MUXING
+1.05V_VCCP
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
DMI
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_A#[3..31]
200_0402_1%~D
U40A
R325
H_D#[0..63]
HOST
100_0402_1%~D
R86
THERMTRIP_MCH# 1
R335
75_0402_5%~D
2
+1.05V_VCCP
Stuff R435 & R437 for A1 Calistoga
Layout Note:
H_XRCOMP & H_YRCOMP trace width
and spacing is 10/20
Title
Calistoga(1 of 6)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
10
of
70
D
E
16 DDR_A_DQS[0..7]
AU12
AV14
BA20
SA_BS0
SA_BS1
SA_BS2
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
16 DDR_A_DQS#[0..7]
16 DDR_A_MA[0..13]
16 DDR_A_CAS#
16 DDR_A_RAS#
16 DDR_A_WE#
T2022
T2024
PAD~D
PAD~D
DDR_A_DQS#0 AK32
DDR_A_DQS#1 AU33
DDR_A_DQS#2 AN27
DDR_A_DQS#3 AM21
DDR_A_DQS#4 AM12
DDR_A_DQS#5 AL8
DDR_A_DQS#6 AN3
DDR_A_DQS#7 AH5
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
DDR_A_CAS# AY13
DDR_A_RAS# AW14
DDR_A_WE# AY14
SA_RCVENIN# AK23
SA_RCVENOUT# AK24
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
U40E
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_D[0..63] 16
17 DDR_B_BS0
17 DDR_B_BS1
17 DDR_B_BS2
17 DDR_B_DM[0..7]
17 DDR_B_DQS[0..7]
17 DDR_B_DQS#[0..7]
17 DDR_B_MA[0..13]
17 DDR_B_CAS#
17 DDR_B_RAS#
17 DDR_B_WE#
T2023
T2025
PAD~D
PAD~D
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AT24
AV23
AY28
SB_BS0
SB_BS1
SB_BS2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
SB_RCVENIN#
SB_RCVENOUT#
AR24
AU23
AR27
AK16
AK18
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYS MEMORY B
16 DDR_A_DM[0..7]
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR SYS MEMORY A
U40D
16 DDR_A_BS0
16 DDR_A_BS1
16 DDR_A_BS2
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3
DDR_B_D[0..63] 17
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
Title
Calistogo(2 of 6)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
11
of
70
Strap Pin Table

CFG5
C
+1.5VRUN_PCIE
U40C
SDVOCTRL_DATA
SDVOCTRL_CLK
B37
B34
A36
LA_DATA0
LA_DATA1
LA_DATA2
C37
B35
A37
G30
D30
F29
A32
A33
E26
E27
+1.5V_RUN
D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
LA_DATA#0
LA_DATA#1
LA_DATA#2
LB_DATA0
LB_DATA1
LB_DATA2
LB_DATA#0
LB_DATA#1
LB_DATA#2
LVDS
F30
D29
F28
EXP_COMPI
EXP_COMPO
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
PCI-EXPRESS GRAPHICS
H27
H28
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
TVDAC_A
TVDAC_B
TVDAC_C
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
J29
K30
TV_DCONSEL1
TV_DCONSEL0
C26
C25
DDCCLK
DDCDATA
H23
G23
E23
D23
C22
B22
A21
B21
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
J22
CRT_IREF
CRT
J20
B16
B18
B19
TV
+1.05V_VCCP
A16
C18
A19
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
PEGCOMP
R1493
24.9_0402_1%~D
1
2
CFG6
CFG7
PEG_MRX_GTX_N0
PEG_MRX_GTX_N1
PEG_MRX_GTX_N2
PEG_MRX_GTX_N3
PEG_MRX_GTX_N4
PEG_MRX_GTX_N5
PEG_MRX_GTX_N6
PEG_MRX_GTX_N7
PEG_MRX_GTX_N8
PEG_MRX_GTX_N9
PEG_MRX_GTX_N10
PEG_MRX_GTX_N11
PEG_MRX_GTX_N12
PEG_MRX_GTX_N13
PEG_MRX_GTX_N14
PEG_MRX_GTX_N15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
PEG_MRX_GTX_P0
PEG_MRX_GTX_P1
PEG_MRX_GTX_P2
PEG_MRX_GTX_P3
PEG_MRX_GTX_P4
PEG_MRX_GTX_P5
PEG_MRX_GTX_P6
PEG_MRX_GTX_P7
PEG_MRX_GTX_P8
PEG_MRX_GTX_P9
PEG_MRX_GTX_P10
PEG_MRX_GTX_P11
PEG_MRX_GTX_P12
PEG_MRX_GTX_P13
PEG_MRX_GTX_P14
PEG_MRX_GTX_P15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
PEG_MTX_GRX_C_N0
PEG_MTX_GRX_C_N1
PEG_MTX_GRX_C_N2
PEG_MTX_GRX_C_N3
PEG_MTX_GRX_C_N4
PEG_MTX_GRX_C_N5
PEG_MTX_GRX_C_N6
PEG_MTX_GRX_C_N7
PEG_MTX_GRX_C_N8
PEG_MTX_GRX_C_N9
PEG_MTX_GRX_C_N10
PEG_MTX_GRX_C_N11
PEG_MTX_GRX_C_N12
PEG_MTX_GRX_C_N13
PEG_MTX_GRX_C_N14
PEG_MTX_GRX_C_N15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
PEG_MTX_GRX_C_P0
PEG_MTX_GRX_C_P1
PEG_MTX_GRX_C_P2
PEG_MTX_GRX_C_P3
PEG_MTX_GRX_C_P4
PEG_MTX_GRX_C_P5
PEG_MTX_GRX_C_P6
PEG_MTX_GRX_C_P7
PEG_MTX_GRX_C_P8
PEG_MTX_GRX_C_P9
PEG_MTX_GRX_C_P10
PEG_MTX_GRX_C_P11
PEG_MTX_GRX_C_P12
PEG_MTX_GRX_C_P13
PEG_MTX_GRX_C_P14
PEG_MTX_GRX_C_P15
CFG9
Low
= DMI x 2
High = DMI x 4
LOW = Moby Dick

HIGH = Calistoga
Low
= DT/Transportable CPU
High = Mobile CPU
*
D
Low = Reverse Lane

High = Normal Operation
CFG11
CFG[13:12]
CFG16
(FSB Dynamic ODT)
CFG18
(VCC Select)
CFG19
(DMI Lane Reversal)
00
01
10
11
Low
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation *
(Default)
= Disabled
High = Enabled
Low
10
CFG5
10
CFG6
10
CFG7
10
CFG9
10
CFG11
10
CFG12
10
CFG13
10
CFG16
R307
2 @ 2.2K_0402_5%~D
R67
2 @ 2.2K_0402_5%~D
R281
2 @ 2.2K_0402_5%~D
R282
2 @ 2.2K_0402_5%~D
R357
2 @ 2.2K_0402_5%~D
R288
2 @ 2.2K_0402_5%~D
R323
2 @ 2.2K_0402_5%~D
R346
2 @ 2.2K_0402_5%~D
CFG[3:17] have internal pullup
= 1.05V (Default)
*
+3.3V_RUN
High = 1.5V
Low = Normal *
Operation (Default):
Lane number in Order
10
10
CFG18
CFG19
High = Reverse Lane
10
CFG20
@
R308
R306
R310
1
1
2
2
1K_0402_5%~D
@ 1K_0402_5%~D
@ 1K_0402_5%~D
C
SDVO_CTRLDATA
CFG20
(PCIE/SDVO select)
Low
= No SDVO Device Present

(Default)*
High = SDVO Device Present
CFG[18:20] have internal pulldown
Low = Only PCIE or SDVO is

operational. (Default)
High = PCIE/SDVO are operating

simu.
PEG_MTX_GRX_C_P0
PEG_MTX_GRX_C_N0
C1561 1
2 0.1U_0402_16V4Z~D
C1562 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P0
PEG_MTX_GRX_N0
PEG_MTX_GRX_C_P1
PEG_MTX_GRX_C_N1
C1563 1
2 0.1U_0402_16V4Z~D
C1564 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P1
PEG_MTX_GRX_N1
PEG_MTX_GRX_C_P2
PEG_MTX_GRX_C_N2
C1565 1
2 0.1U_0402_16V4Z~D
C1566 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P2
PEG_MTX_GRX_N2
PEG_MTX_GRX_C_P3
PEG_MTX_GRX_C_N3
C1567 1
2 0.1U_0402_16V4Z~D
C1568 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P3
PEG_MTX_GRX_N3
PEG_MTX_GRX_C_P4
PEG_MTX_GRX_C_N4
C1569 1
2 0.1U_0402_16V4Z~D
C1570 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P4
PEG_MTX_GRX_N4
PEG_MTX_GRX_C_P5
PEG_MTX_GRX_C_N5
C1571 1
2 0.1U_0402_16V4Z~D
C1572 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P5
PEG_MTX_GRX_N5
PEG_MTX_GRX_C_P6
PEG_MTX_GRX_C_N6
C1573 1
2 0.1U_0402_16V4Z~D
C1574 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P6
PEG_MTX_GRX_N6
PEG_MTX_GRX_C_P7
PEG_MTX_GRX_C_N7
C1575 1
2 0.1U_0402_16V4Z~D
C1576 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P7
PEG_MTX_GRX_N7
PEG_MTX_GRX_C_P8
PEG_MTX_GRX_C_N8
C1577 1
2 0.1U_0402_16V4Z~D
C1578 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P8
PEG_MTX_GRX_N8
PEG_MTX_GRX_C_P9
PEG_MTX_GRX_C_N9
C1579 1
2 0.1U_0402_16V4Z~D
C1580 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P9
PEG_MTX_GRX_N9
PEG_MTX_GRX_C_P10
PEG_MTX_GRX_C_N10
C1581 1
2 0.1U_0402_16V4Z~D
C1582 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P10
PEG_MTX_GRX_N10
PEG_MTX_GRX_C_P11
PEG_MTX_GRX_C_N11
C1583 1
2 0.1U_0402_16V4Z~D
C1584 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P11
PEG_MTX_GRX_N11
PEG_MTX_GRX_C_P12
PEG_MTX_GRX_C_N12
C1585 1
2 0.1U_0402_16V4Z~D
C1586 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P12
PEG_MTX_GRX_N12
PEG_MTX_GRX_C_P13
PEG_MTX_GRX_C_N13
C1587 1
2 0.1U_0402_16V4Z~D
C1588 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P13
PEG_MTX_GRX_N13
PEG_MTX_GRX_C_P14
PEG_MTX_GRX_C_N14
C1589 1
2 0.1U_0402_16V4Z~D
C1590 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P14
PEG_MTX_GRX_N14
PEG_MTX_GRX_C_P15
PEG_MTX_GRX_C_N15
C1591 1
2 0.1U_0402_16V4Z~D
C1592 1
2 0.1U_0402_16V4Z~D
PEG_MTX_GRX_P15
PEG_MTX_GRX_N15
PEG_MRX_GTX_P[0:15]
PEG_MRX_GTX_N[0:15]
PEG_MTX_GRX_P[0:15]
PEG_MTX_GRX_N[0:15]
PEG_MRX_GTX_P[0:15] 52
PEG_MRX_GTX_N[0:15] 52
PEG_MTX_GRX_P[0:15] 52
PEG_MTX_GRX_N[0:15] 52
Title
Calistoga(3 of 6)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
12
of
70
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
+1.5V_RUN
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
E21
F21
G21
+1.05V_VCCP
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
B26
C39
AF1
+1.5VRUN_DPLLA
+1.5VRUN_DPLLB
+1.5VRUN_HPLL
VCCA_LVDS
VSSA_LVDS
A38
B39
VCCA_MPLL
AF2
+1.5VRUN_MPLL
VCCA_TVBG
VSSA_TVBG
H20
G20
+1.5V_RUN
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
E19
F19
C20
D20
E20
F20
VCCD_HMPLL0
VCCD_HMPLL1
AH1
AH2
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
A28
B28
C28
VCCD_TVDAC
VCCDQ_TVDAC
D21
H19
VCCHV0
VCCHV1
VCCHV2
A23
B23
B25
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
10U_0805_4VAM~D
10U_0805_4VAM~D
C59
220U_V_4VM_R45~D
C53
C49
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2
Route +2.5VRUN from GMCH pinG41 to

decoupling cap (C345)<200mil to the edge.
+1.5VRUN_QTVDAC
+1.5V_RUN
C345
0.1U_0402_16V4Z~D
L35
+1.5V_RUN
L11
BLM18PG181SN1_0603~D
2
1
+1.5VRUN_QTVDAC
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
+3.3V_RUN
+1.5V_RUN
+1.5VRUN_HPLL
C404 should be placed in cavity
2
+1.5V_RUN
+1.5VRUN_3GPLL
R267
L34
0.5_0805_1%~D BLM18PG181SN1_0603~D
1
2 2
1
+1.5VRUN_MPLL
L39
2
1
+1.5V_RUN
BLM18AG121SN1D_0603~D
45mA Max.
1
L38
2
1
45mA Max.
C94
22U_0805_6.3VAM~D
+1.5VRUN_DPLLA
0.1U_0402_16V4Z~D
+1.5VRUN_3GPLL
+2.5V_RUN
C419
22U_0805_6.3VAM~D
+1.5VRUN_DPLLB
R1748
40mA Max.
+1.5V_RUN
40mA Max.
+1.5V_RUN
0_0805_5%~D
0.1U_0402_16V4Z~D
C331
AC33
G41
H41
C418
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
1
+1.5V_RUN
0.1U_0402_16V4Z~D
U40_D2
C435
0.47U_0402_16V4Z~D
U40_AB1
U40_A6
AB41
AJ41
L41
N41
R41
V41
Y41
+2.5V_RUN
C322
0.1U_0402_16V4Z~D
1
C164
0.22U_0402_10V4Z~D
C118
0.22U_0402_10V4Z~D
C316
0.47U_0402_16V4Z~D
C24
0.1U_0402_16V4Z~D
P O W E R
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
W=30 mils
C332
0.1U_0402_16V4Z~D
Should be placed on top

+1.5VRUN_PCIE
2
1
C37
0.022U_0402_16V7K~D
B30
C30
A30
C385
10U_0805_4VAM~D
H22
C311
10U_0805_4VAM~D
VCC_SYNC
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
C336
0.1U_0402_16V4Z~D
C390
2.2U_0603_6.3V6K~D
C391
4.7U_0603_6.3V4Z~D
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76
C437
0.1U_0402_16V4Z~D
C411
220U_V_4VM_R45~D
CRB 270uF
C413
+1.05V_VCCP
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
U40H
C404
0.1U_0402_16V4Z~D
R1749
1
+1.5V_RUN
0_0805_5%~D
Title
Calistoga(4 of 6)
Size
Document Number
Date:
Re v
1.0
LA-2792
Sheet
1
13
of
70
1
+
2
C620
220U_V_4VM_R45~D
CRB 270uF
1
+
2
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
+1.05V_VCCP
+1.8V_SUS
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
AR6
AP6
AN6
AL6
AK6
AJ6
AV1 VCCSM_LF2
AJ1 VCCSM_LF1
C614
0.47U_0402_16V4Z~D
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
C613
0.47U_0402_16V4Z~D
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
1
D
C452
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C444
C441
Place near U40.AT41 & AM41
0.1U_0402_16V4Z~D
P O W E R
VCCSM_LF4
VCCSM_LF5
C612
0.47U_0402_16V4Z~D
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
0.1U_0402_16V4Z~D
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
+1.8V_SUS
VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
Place near U40.BA23
@ C165
330U_D2E_2.5VM_R9~D
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
C158
10U_0805_4VAM~D
C383
0.22U_0402_10V4Z~D
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
P O W E R
C368
1U_0603_10V4Z~D
C358
0.22U_0402_10V4Z~D
C367
10U_0805_4VAM~D
C423
220U_V_4VM_R45~D
C366
10U_0805_4VAM~D
C379
0.22U_0402_10V4Z~D
U40F
U40G
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
C615
0.47U_0402_16V4Z~D
+1.5V_RUN
+1.05V_VCCP
+1.05V_VCCP
C438
C616
0.47U_0402_16V4Z~D
C160
10U_0805_4VAM~D
1
+
2
C617
0.47U_0402_16V4Z~D
Place near U40.BA15
Place near U40.AV1 & AJ1
Title
Calistoga(5 of 6)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
14
of
70
U40I
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
P O W E R
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
U40J
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
P O W E R
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
Title
Calistoga(6 of 6)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
15
of
70
+1.8V_SUS
+1.8V_SUS
ON TOP SIDE
11 DDR_A_DQS#[0..7]
V_DDR_MCH_REF
11 DDR_A_MA[0..13]
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D3
DDR_A_D2
DDR_A_D14
DDR_A_D8
+1.8V_SUS
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D11
DDR_A_D10
C229
C225
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
C222
C214
2.2U_0603_6.3V6K~D
C213
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_A_D20
DDR_A_D17
DDR_A_D22
DDR_A_D23
C227
0.1U_0402_16V4Z~D
C223
C215
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C212
0.1U_0402_16V4Z~D
DDR_A_D24
DDR_A_D29
DDR_A_DM3
DDR_A_D31
DDR_A_D27
10 DDR_CKE0_DIMMA
11
DDR_A_BS2
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
11
11
DDR_A_BS0
DDR_A_WE#
11 DDR_A_CAS#
10 DDR_CS1_DIMMA#
+0.9V_DDR_VTT
10
M_ODT1
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D35
DDR_A_D32
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D33
2
C234
C236
C237
C235
C233
C232
C231
C216
C217
C218
C219
C220
C221
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_A_D43
DDR_A_D45
DDR_A_DM5
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D52
+0.9V_DDR_VTT
RN25
DDR_A_MA1
1
DDR_A_MA3
2
56_0404_4P2R_5%~D
RN19
4
3
RN26
4
3
4
3
4
3
4
3
DDR_A_DM7
1 DDR_A_MA5
2 DDR_A_MA8
56_0404_4P2R_5%~D
DDR_A_D58
DDR_A_D59
1 DDR_A_MA4
2 DDR_A_MA2
56_0404_4P2R_5%~D
6,17 CLK_SDATA
6,17 CLK_SCLK
+3.3V_RUN
4
3
RN15
1 M_ODT0
2 DDR_A_MA13
56_0404_4P2R_5%~D
4
3
RN20
RN21
DDR_CKE0_DIMMA 2
DDR_A_BS2
1
56_0404_4P2R_5%~D
3
4
4
3
1 DDR_CKE1_DIMMA
2 DDR_A_MA11
56_0404_4P2R_5%~D
Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"
C230
2.2U_0603_6.3V6K~D
1 DDR_A_MA0
2 DDR_A_BS1
56_0404_4P2R_5%~D
C228
4
3
CLK_SDATA
CLK_SCLK
0.1U_0402_16V4Z~D
DDR_A_D60
DDR_A_D61
RN17
RN22
M_ODT1
1
DDR_CS1_DIMMA# 2
56_0404_4P2R_5%~D
DDR_A_D55
DDR_A_D51
Layout Note:
closely DIMM0,all
trace length<750 mil
RN18
RN23
DDR_A_CAS#
1
DDR_A_WE#
2
56_0404_4P2R_5%~D
1 DDR_A_MA7
2 DDR_A_MA6
56_0404_4P2R_5%~D
4
3
RN16
DDR_A_RAS#
1
DDR_CS0_DIMMA# 2
56_0404_4P2R_5%~D
1 DDR_A_MA9
2 DDR_A_MA12
56_0404_4P2R_5%~D
4
3
RN24
DDR_A_BS0
1
DDR_A_MA10
2
56_0404_4P2R_5%~D
DDR_A_DQS#6
DDR_A_DQS6
RN27
4
3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_A_D7
DDR_A_D4
DDR_A_DM0
DDR_A_D6
DDR_A_D5
R51
100K_0402_5%~D
DDR_A_D13
DDR_A_D12
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 10
M_CLK_DDR#0 10
DDR_A_D15
DDR_A_D9
DDR_A_DQS#2
DDR_A_DQS2
1
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C224
DDR_A_D0
DDR_A_D1
Layout Note:
Place near JDIM1
11 DDR_A_DQS[0..7]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C226
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
0.1U_0402_16V4Z~D
JDIM2
11 DDR_A_DM[0..7]
V_DDR_MCH_REF 10,17,48
2.2U_0603_6.3V6K~D
11 DDR_A_D[0..63]
201
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
GND
202
DDR_A_D16
DDR_A_D21
PM_EXTTS#0_R 17
PM_EXTTS#0_R
DDR_A_DM2
1
2
R177
0_0402_5%~D
PM_EXTTS#0 10
DDR_A_D18
DDR_A_D19
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D26
DDR_A_D30
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 10
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
DDR_A_MA13
DDR_A_BS1 11
DDR_A_RAS# 11
DDR_CS0_DIMMA# 10
M_ODT0
10
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D39
DDR_A_D38
DDR_A_D44
DDR_A_D40
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D41
DDR_A_D42
DDR_A_D49
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 10
M_CLK_DDR#1 10
DDR_A_DM6
DDR_A_D50
DDR_A_D54
DDR_A_D57
DDR_A_D56
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R175 1
R176 1
2 100K_0402_5%~D
2 100K_0402_5%~D
TYCO_1470815-2~D
DIMMA
RESERVE
Title
DDRII-SODIMM SLOT1
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
16
of
70
+1.8V_SUS
11 DDR_B_DQS#[0..7]
V_DDR_MCH_REF
DDR_B_D6
DDR_B_D7
+1.8V_SUS
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D21
DDR_B_DQS#2
DDR_B_DQS2
C255
C241
C251
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
C239
C242
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C261
C240
0.1U_0402_16V4Z~D
C254
2.2U_0603_6.3V6K~D
C249
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
DDR_B_D19
DDR_B_D18
DDR_B_D26
DDR_B_D28
DDR_B_DM3
DDR_B_D29
DDR_B_D27
DDR_CKE2_DIMMB
10 DDR_CKE2_DIMMB
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
11
DDR_B_BS2
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
11
11
+0.9V_DDR_VTT
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
11 DDR_B_CAS#
10 DDR_CS3_DIMMB#
M_ODT3
M_ODT3
DDR_B_D33
DDR_B_D32
DDR_B_DQS#4
DDR_B_DQS4
C263
C264
C265
C266
C267
C268
C269
C243
C244
C245
C246
C247
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C248
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10
DDR_B_D35
DDR_B_D34
DDR_B_D41
DDR_B_D40
DDR_B_DM5
DDR_B_D43
DDR_B_D46
DDR_B_D49
DDR_B_D48
+0.9V_DDR_VTT
RN13
RN11
DDR_B_MA1
1
DDR_B_MA3
2
56_0404_4P2R_5%~D
4
3
4
3
RN12
4
3
4
3
4
3
4
3
DDR_B_MA5
1
DDR_B_MA8
2
56_0404_4P2R_5%~D
DDR_B_DM7
DDR_B_D58
DDR_B_D59
RN6
DDR_B_MA7
1
DDR_B_MA6
2
56_0404_4P2R_5%~D
+3.3V_RUN
M_ODT2
1
DDR_B_MA13
2
56_0404_4P2R_5%~D
RN14
RN8
DDR_CS3_DIMMB# 2
M_ODT3
1
3
4
56_0404_4P2R_5%~D
4
3
DDR_B_BS2
1
DDR_CKE2_DIMMB
2
56_0404_4P2R_5%~D
Layout Note:
closely DIMM0,all
trace length
Max=1.3"
C548
RN2
4
3
C549
DDR_B_MA4
1
DDR_B_MA2
2
56_0404_4P2R_5%~D
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
RN5
CLK_SDATA
CLK_SCLK
6,16 CLK_SDATA
6,16 CLK_SCLK
201
GND
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
GND
202
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D12
DDR_B_D13
DDR_B_DM1
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 10
M_CLK_DDR#3 10
DDR_B_D10
DDR_B_D11
DDR_B_D17
DDR_B_D20
PM_EXTTS#0_R
DDR_B_DM2
PM_EXTTS#0_R 16
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 10
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_BS1 11
DDR_B_RAS# 11
DDR_CS2_DIMMB# 10
M_ODT2
DDR_B_MA13
M_ODT2
10
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
B
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D42
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 10
M_CLK_DDR#2 10
DDR_B_DM6
DDR_B_D54
DDR_B_D51
DDR_B_D60
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
TYCO_1565917-4~D
DIMMB
STANDARD
+3.3V_RUN
1
R174
10K_0402_5%~D
R173
4
3
DDR_B_D61
DDR_B_D56
Layout Note:
closely DIMM0,all
trace length<750 mil
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_B_D5
DDR_B_D4
100K_0402_5%~D
4
3
RN9
DDR_B_CAS#
1
DDR_B_WE#
2
56_0404_4P2R_5%~D
DDR_CKE3_DIMMB
1
DDR_B_MA11
2
56_0404_4P2R_5%~D
4
3
RN3
DDR_B_RAS#
1
DDR_CS2_DIMMB# 2
56_0404_4P2R_5%~D
DDR_B_D55
DDR_B_D50
RN7
RN4
DDR_B_MA0
1
DDR_B_BS1
2
56_0404_4P2R_5%~D
DDR_B_MA9
1
DDR_B_MA12
2
56_0404_4P2R_5%~D
4
3
RN10
DDR_B_BS0
1
DDR_B_MA10
2
56_0404_4P2R_5%~D
DDR_B_DQS#6
DDR_B_DQS6
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_B_DQS#0
DDR_B_DQS0
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C252
DDR_B_D1
DDR_B_D0
11 DDR_B_MA[0..13]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C253
11 DDR_B_DQS[0..7]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Layout Note:
Place near JDIM2
0.1U_0402_16V4Z~D
JDIM1
11 DDR_B_DM[0..7]
2.2U_0603_6.3V6K~D
ON BOTTOM SIDE
11 DDR_B_D[0..63]
+1.8V_SUS
Title
DDRII-SODIMM SLOT2
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
17
of
70
FAN1 Control and Tachometer

Place near the bottom SODIMM
+3.3V_RUN
R477
+5V_SUS
1
1
R413
10K_0402_5%~D
R476
2.21K_0402_1%~D
R478
10K_0402_5%~D
+5V_SUS
10K_0603_1%_TSM1A103F34D3RZ~D
39
FAN1_TACH
D
VCP1
C1778
100P_0402_50V8J~D
@
2
5V_CAL_SIO# 38
G
Q15
2N7002W-7-F_SOT323~D
C66
2200P_0402_50V7K~D
R477 place near the bottom SODIMM

JFAN1
1
2
3
Place near the bottom SODIMM

+5V_SUS
+5V_SUS
1
R479
1
R481
2.21K_0603_1%~D
D
VCP2
R262
C341
2200P_0402_50V7K~D
7 H_THERMDC
+3V_SUS
VSUS_PWRGD
18
+RTC_PWR3V
13
2
1K_0402_5%~D
38
+3V_PWROK#
C44
0.1U_0402_16V4Z~D
42 ICH_PWRGD#
39,40 POWER_SW#
52 THERMTRIP_VGA#
1
R41
+3.3V_SUS
1
R38
14
THERMTRIP1#
THERMATRIP2#
15
THERMTRIP2#
10 THERMTRIP_MCH#
C43
0.1U_0402_16V4Z~D
R61
1K_0402_5%~D
2
R262
118K_0402_1%~D
1
1
2.2K_0402_5%~D
2
B
3
C317
2200P_0402_50V7K~D
2
1
R39
1
R249
332K_0402_1%~D
THERMATRIP2#
VGA_THERMDN, VGA_THERMDP routing together.

A
Place cap close to the

Guardian pins as possible.
39
29
9
VSET
HW_LOCK#
VSS
10
11
19
20
32
SNIFFER_GREEN#
SNIFFER_YELLOW#
2.5V_RUN_PWRGD 42
Place C47 close to the Guardian

pins as possible
DN1
DP1
36
37
REM_DIODE1_N
REM_DIODE1_P
1
+3.3V_ALW
THERMTRIP_SIO
ACAV_CLR
30
4
SYS_SHDN#
22
DP3
DN3
FAN_OUT
LDO_SET
24
LDO_OUT
LDO_OUT
25
27
LDO_IN
LDO_IN
26
28
VDD_5V
FAN_DAC
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
EMC4000 C_QFN40~D
Place C1773 close to the

Guardian pins as possible
43 SNIFFER_GREEN#
43 SNIFFER_YELLOW#
THERMTRIP3#
33
1
C1773
2200P_0402_50V7K~D
16
1
2
+FAN1_VOUT
53 VGA_THERMDP
53 VGA_THERMDN
VGA_THERMDP
VGA_THERMDN
31
REM_DIODE1_N, REM_DIODE1_P routing together.

LDO_SET
@ C1803
2 2200P_0402_50V7K~D
Place under CPU

@ R1634
10K_0402_5%~D
2
1
THERMTRIP_SIO 38
ACAV_IN
39,50,51
+RTC_CELL
THERM_STP#
SMBUS ADDRESS : 2F
1
C47
2 2200P_0402_50V7K~D
R60
10K_0402_5%~D
+3V_LDOIN
Q34
MMST3904-7-F_SOT323~D
+1.05V_VCCP
C303
0.1U_0402_16V4Z~D
1
R239
8.2K_0402_5%~D
LDO_POK
VCP1
VCP2
POWER_SW#
THERMATRIP1#
THERMATRIP3#
2
8.2K_0402_5%~D
PAD_GND
41
+5V_RUN
C1777
0.1U_0402_16V4Z~D
46
+2.5V_RUN
+2.5V_RUN
3
40
@ R1800
31.6K_0402_1%~D
C150
0.1U_0402_16V4Z~D
@
+RTC_CELL
C42
0.1U_0402_16V4Z~D
VCP
VCP
LDO_SET
R1643
2
1
0.27_1210_5%~D
1
2
1
R1789
1K_0402_5%~D
2
1K_0402_5%~D
39
1
R42
ATF_INT#
Q12
DP2
DN2
12
21
17
23,42 SUSPWROK
+3.3V_SUS
35
34
ATF_INT#
7 H_THERMTRIP#
B
LDO_SHDN#_ADDR
THERMATRIP1#
SMDATA
SMBCLK
23
7.5K_0402_5%~D
C571
1U_0603_10V4Z~D
2
B
C1774
10U_0805_10V4Z~D
1
2
7
8
DAT_SMB
CLK_SMB
C1776
10U_0805_10V4Z~D
1
2
2.2K_0402_5%~D
C41
0.1U_0402_16V4Z~D
+3.3V_SUS
39
39
+3VSUS_THRM
Q39
R40
U15
R136
+1.05V_VCCP
21
R241
8.2K_0402_5%~D
R479 place on bottom side

next to SoDIMM connector
+3.3V_SUS
R50
49.9_0603_1%~D
2
1
+3.3V_SUS
5V_CAL_SIO2# 38
C36
2200P_0402_25V7K~D
Tp-70
VSET =
1
DP2, DN2 routing together. Trace

width / Spacing = 10 / 10 mil
x 3.3V
2
7 H_THERMDA
2
G
S
R249+R262
Place C341 close to the Guardian
pins as possible
Q21
2N7002W-7-F_SOT323~D
3
VSET=
R480
10K_0402_5%~D
10K_0603_1%_TSM1A103F34D3RZ~D
2
MOLEX_53398-0371~D
1
2
3
22U_0805_6.3VAM~D
@ C1779
C210
@ D35
RB751S40T1_SOD523-2~D
22U_0805_6.3VAM~D
+FAN1_VOUT
FAN1_TACH
+3.3V_RUN
C152
0.1U_0402_16V4Z~D
@
Title
FAN & Thermal Sensor

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
18
of
70
+15V_SUS
53
53
LCD_B1LCD_B1+
53
53
LCD_B0LCD_B0+
53
53
LCD_ACLKLCD_ACLK+
53
53
LCD_A2LCD_A2+
53
53
LCD_A1LCD_A1+
53
53
LCD_A0LCD_A0+
LCD_A0LCD_A0+
53
53
ENVDD
3
1
2
@ R79
100K_0402_5%~D
2
C315
0.1U_0603_50V4Z~D
Q10
2N7002W-7-F_SOT323~D
2
1
2
O
52
LCD_DDCCLK 52
LCD_DDCDATA 52
Q8
DDTC124EUA-7-F_SOT323~D
LCD_DDCCLK
LCD_DDCDATA
LCD_A1LCD_A1+
2
G
LCD_A2LCD_A2+
Q37
2
G
2N7002W-7-F_SOT323~D
LCD_ACLKLCD_ACLK+
LCD_B0LCD_B0+
R272
100K_0402_5%~D
R54
100K_0402_5%~D
R35
470_0402_5%~D
+3.3V_RUN
6
5
2
1
4
1
LCD_B2LCD_B2+
LCD_B1LCD_B1+
Q9
SI3456BDV-T1-E3_TSOP6~D
+LCDVDD
+LCDVDD
1
LCD_B2LCD_B2+
+15V_SUS
53
53
LCD_BCLKLCD_BCLK+
LCD_BCLKLCD_BCLK+
+3.3V_RUN
LCD_TST
LCD_TST
+LCDVDD
1
23
0.1U_0402_16V4Z~D
+3.3V_RUN
C26
0.1U_0402_16V4Z~D
C27
R92
10K_0402_5%~D
BACKLITEON
2
1
R520
SBAT_SMBCLK 39,45
SBAT_SMBDAT 39,45
2
0_0402_5%~D
BIA_PWM
39,52
BACKLITEON for D'05;

BIA_PWM for M'07
+5V_ALW
D2
IPEX_20330-044E-11F~D
1
2
RB751S40T1_SOD523-2~D
@
C28
0.1U_0402_16V4Z~D
LAMP_STAT#
LAMP_STAT#
23
Q32
FDS4435_NL_SO8~D
+PWR_SRC
M'07 inverter support - Depop D2.

D'05 inverter support - Populate D2
1
+3.3V_RUN
2
0_0402_5%~D
IN1
IN2
BACKLITEON
74AHC1G08GW_SOT353-5~D
@
R236
1
2
1
100K_0402_5%~D
R1760
100K_0402_5%~D
2
Q29
3 2N7002W-7-F_SOT323~D
2
G
U7
C289
0.1U_0603_50V4Z~D
PANEL_BKEN
52 PANEL_BKEN
FPBACK_EN
R235
100K_0402_5%~D
1
R1767
38 FPBACK_EN
C296
0.1U_0603_50V4Z~D
C290
1000P_0402_50V7K~D
8
7
6
5
1
2
3
+INV_PWR_SRC
+INV_PWR_SRC
40mil
40mil
LAMP_D_STAT#
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TXUCLKUTTXUCLKUT+
GND1
TXUOUT2TXUOUT2+
GND2
TXUOUT1TXUOUT1+
GND3
TXUOUT0TXUOUT0+
GND4
TXLCLKOUTTXLCLKOUT+
GND5
TXLOUT2TXLOUT2+
GND6
TXLOUT1TXLOUT1+
GND7
TXLOUT0TXLOUT0+
GND8
PANEL_I2C_CLK
PANEL_I2C_DAT
GND9
VEDID
GND10
LCDVDD1
LCDVDD2
PNL_SLFTST
LCDPWR_SRC
LCDPWR_SRC
LCDPWR_SRC
GND11
FPBACK
GND12
PBAT_SMBCLK
PBAT_SMBDAT
GND13
+5V_ALWF
LAMP_START
GND14
MGND1
MGND2
MGND3
MGND4
MGND5
MGND6
MGND7
MGND8
MGND9
MGND10
MGND11
NC
NC
C29
0.1U_0402_16V4Z~D
JLVDS
45
46
47
48
49
50
51
52
53
54
55
56
57
X01 support M07 inverter
37,39,41,42,46,47,48,58 RUN_ON
FDS4435: P CHANNAL
M'07 inverter support - Populate R520,R1767 Depop U7.

D'05 inverter support - Populate U7, Depop R520,R1767
Title
Internal LVDS
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
19
of
70
D30
DA204U_SOT323~D
@
D29
DA204U_SOT323~D
@
D31
DA204U_SOT323~D
@
C1408
C1409
10P_0402_50V8J~D
@
C1410
10P_0402_50V8J~D
2
@
C1411
10P_0402_50V8J~D
@
CRT_VCC
CRT_VCC
1
D32
SDM10U45-7_SOD523-2~D
+5V_RUN
C1412
0.01U_0402_16V7K~D
22P_0402_50V8J~D
C1407
22P_0402_50V8J~D
C1406
22P_0402_50V8J~D
VGA_BLU
R1398
75_0402_1%
1
VGA_BLU
36,52
VGA_GRN
R1397
75_0402_1%
1
VGA_GRN
36,52
L78
BLM18BB600SN1D_0603~D
1
2
L79
1
2
L80
1
2
VGA_RED
R1396
75_0402_1%
1
VGA_RED
36,52
+3.3V_RUN
2
JCRT
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RED
36,52
DAT_DDC2
GREEN
PAD~D
R1402
2.2K_0402_5%~D
JVGA_HS
BLUE
CRT_VCC
JVGA_VS
M_ID2#
1
C1413
0.1U_0402_16V4Z~D
2
1
R1401
2.2K_0402_5%~D
R1400
1K_0402_5%~D
@
2
1
Evaluate Package
R1399
1K_0402_5%~D
@
2
1
T46
CLK_DDC2
DAT_DDC2
16
17
SUYIN_070915FR015S201CU~D
36,52 CLK_DDC2
D2005
SDM10U45-7_SOD523-2~D
52 VGA_HSYNC
P
2
U190
Y
R101
0_0402_5%~D
SN74AHCT1G125GW_SC70-5~D
L81
1
2
HSYNC_R
36
VSYNC_R
36
A
3
1
Y
U191
1
R114
0_0402_5%~D
SN74AHCT1G125GW_SC70-5~D
C1415
22P_0402_50V8J~D
39_0402_5%~D
L82
1
2
C1414
22P_0402_50V8J~D
52 VGA_VSYNC
R1405
OE#
39_0402_5%~D
R1404
OE#
+5V_RUN
R1403
1K_0402_5%~D
1
2
DA204U
K1 A2
A1
K2
Title
CRT
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
20
of
70
14
+3.3V_SUS
+3.3V_RUN
1
R317
1
R72
1
R340
1
R77
1
R256
1
R339
PCI_REQ0#
2
8.2K_0402_5%~D
PCI_REQ1#
2
8.2K_0402_5%~D
PCI_REQ2#
2
8.2K_0402_5%~D
PCI_REQ3#
2
8.2K_0402_5%~D
PCI_REQ4#
2
8.2K_0402_5%~D
PCI_REQ5#
2
8.2K_0402_5%~D
R44
1
1
35
PCI_PIRQA#
30
PCI_PIRQC#
PCI _IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
C26
A9
B19
PCI_PLTRST#
CLK_PCI_ICH
ICH_PME#
G8
F7
F8
G7
ICH_GPIO2_PIRQE#
ICH_GPIO3_PIRQF#
ICH_GPIO4_PIRQG#
ICH_GPIO5_PIRQH#
Interrupt
A3
B4
C5
B5
PIRQA#
PIRQB#
PIRQC#
PIRQD#
AE5
AD5
AG4
AH4
AD9
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
I/F
GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#
MISC
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
14
9
IN1
OUT
AE9
AG8
AH8
F21
AH20
PCI_RST#
30,31,35
14
+3.3V_SUS
13
12
U21D
PCI_PLTRST#
IN1
OUT
CLK_PCI_ICH 6
ICH_PME#
38
11
PLTRST#
PLTRST#
10,23,28,34
IN2
74VHC08MTCX_NL_TSSOP14~D
PCI_DEVSEL# 30,35
PCI_PERR# 30,35
PCI_PLOCK# 35
PCI_SERR# 35
PCI_STOP# 30,35
PCI_TRDY# 30,35
PCI_FRAME# 30,35,36
PCI_RST#
PCI_IRDY# 30,35,36
PCI_PAR 30,35
IN2
30,35
30,35
30,35
30,35
PCI_C_BE0#
PCI_C_BE1#
PCI_C_BE2#
PCI_C_BE3#
U21C
10
PCI_PCIRST#
+3.3V_SUS
4
5
U21B
IN1
OUT
PLTRST2#
PLTRST2#
38,39
IN2
MCH_ICH_SYNC# 10
ICH7M A0_BGA652~D
Place closely pin U45.A9

PCI_GNT4#
PCI_GNT5#
CLK_PCI_ICH
2
ICH_GPIO2_PIRQE#
2
8.2K_0402_5%~D
ICH_GPIO3_PIRQF#
2
8.2K_0402_5%~D
ICH_GPIO4_PIRQG#
2
8.2K_0402_5%~D
ICH_GPIO5_PIRQH#
2
8.2K_0402_5%~D
R45
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
PCI_REQ4#
PCI_GNT4#
PCI_REQ5#
PCI_GNT5#
R347
1K_0402_5%~D
@ R332
10_0402_5%~D
R328
1K_0402_5%~D
1
R350
1
R324
1
R309
1
R315
R43
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PCI_REQ3#
1
R286
PCI_PIRQA#
2
8.2K_0402_5%~D
PCI_PIRQB#
2
8.2K_0402_5%~D
PCI_PIRQC#
2
8.2K_0402_5%~D
PCI_PIRQD#
2
8.2K_0402_5%~D
PCI_C_BE0#
PCI_C_BE1#
PCI_C_BE2#
PCI_C_BE3#
36
35,36
30
30
+3.3V_SUS
C/BE0#
C/BE1#
C/BE2#
C/BE3#
B15
C12
D12
C15
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
14
PCI_PLOCK#
2
8.2K_0402_5%~D
PCI _IRDY#
2
8.2K_0402_5%~D
PCI_SERR#
2
8.2K_0402_5%~D
PCI_PERR#
2
8.2K_0402_5%~D
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
1
R327
1
R69
1
R257
1
R255
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
PCI_DEVSEL#
2
8.2K_0402_5%~D
PCI_STOP#
2
8.2K_0402_5%~D
PCI_TRDY#
2
8.2K_0402_5%~D
PCI_FRAME#
2
8.2K_0402_5%~D
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#
PCI
+3.3V_RUN
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
IN2
U45B
30,35 PCI_AD[0..31]
1
R254
1
R46
1
R47
1
R258
OUT
7
U21A
IN1
@ C349
8.2P_0402_50V8J~D
GNT5#
R328
GNT4#
R347
LPC (11)
unstuff unstuff
PCI (10)
unstuff stuff
SPI (01)
stuff unstuff
Title
ICH7(1/4)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
21
of
70
C38
2.2P_0402_50V8C
2
1
R36
10M_0402_5%~D
2
1
ICH_RTCRST#
2
20K_0402_5%~D
2
332K_0402_1%~D
2
1M_0402_5%~D
ICH_INTVRMEN
AA3
RTCRST#
W4
Y5
SM_INTRUDER#
C348
1U_0603_10V4Z~D
1
2
33 ICH_RST_MDC#
1
1
33_0402_5%~D
1
33_0402_5%~D
1
33_0402_5%~D
2
2 R553
R81
2
R83
26 ICH_AC_SDIN0
33 ICH_AC_SDIN1
2
AC3
AA5
LPC_LDRQ0#
LPC_LDRQ1#
LFRAME#
AB3
LPC_LFRAME#
A20GATE
A20M#
AE22
AH28
CPUSLP#
AG27
H_CPUSLP_R#
TP1 / DPRSTP#
TP2 / DPSLP#
AF24
AH25
DPRSLP#
FERR#
AG26
H_FERR#
GPIO49 / CPUPWRGD
AG24
H_PW RGOOD
IGNNE#
INIT3_3V#
INIT#
INTR
AG22
AG21
AF22
AF25
H_IGNNE#
RCIN#
AG23
SIO_RCIN#
SMI#
NMI
AF23
AH24
H_SMI#
H_NMI
H_STPCLK#
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
V4
T5
LAN_RXD0
LAN_RXD1
LAN_RXD2
ICH_AC_BITCLK_R U1
ICH_AC_SYNC_RR6
ACZ_BCLK
ACZ_SYNC
ICH_AC_RST_R# R5
ACZ_RST#
ICH_AC_SDIN0
ICH_AC_SDIN1
T2
T3
T1
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ICH_AC_SDOUT_R
T4
ACZ_SDOUT
R371
1
33 ICH_SDOUT_MDC
LDRQ0#
LDRQ1# / GPIO23
AC-97/AZALIA
2
33 MDC_AC_BITCLK
33 ICH_SYNC_MDC
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_TXD0
LAN_TXD1
LAN_TXD2
SATA_ACT#
SATA_ACT#
C270
25 PSATA_IRX_DTX_N0_C
25 PSATA_IRX_DTX_P0_C
1
3900P_0402_50V7K~D
1
2
C271
3900P_0402_50V7K~D
25 PSATA_ITX_DRX_P0
CLK_PCIE_SATA#
CLK_PCIE_SATA
6 CLK_PCIE_SATA#
6 CLK_PCIE_SATA
R380 24.9_0402_1%~D
1
2
AF3
AE3
AG2
AH2
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AF7
AE7
AG6
AH6
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF1
AE1
SATA_CLKN
SATA_CLKP
AH10
AG10
AF26
THRMTRIP_ICH#
DA0
DA1
DA2
AH17
AE17
AF17
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
AE16
AD16
IDE_DCS1#
IDE_DCS3#
SATARBIASN
SATARBIASP
AG16
AH16
AF16
AH15
AF15
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
Within 500 mils

+3.3V_RUN
B
R414
2
IDE_IRQ
8.2K_0402_5%~D
25
25
25
25
25
IDE_ DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#
IDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#
IDE
R438
1 @ 0_0402_5%~D
R121
SIO_A20GATE
H_A20M#
H_CPUSLP#
0_0402_5%~D
H_DPRSTP#
SIO_A20GATE 39
H_A20M#
7
H_CPUSLP#
7,10
H_DPRSTP#
7,49
H_DPSLP#
H_FERR#
H_DPRSTP# daisy
ICH7-M --> Yonah --> IMVP6
+1.05V_VCCP
H_PWRGOOD 7
H_IGNNE#
H_INIT#
H_INTR
7
7
SIO_RCIN#
39
H_SMI#
H_NMI
7
7
H_FERR#
R118
56_0402_5%~D
2
1
+3.3V_RUN
AH22
SATALED#
LPC_LFRAME# 28,38,39
H_INIT#
H_INTR
STPCLK#
SATA
PSATA_IRX_DTX_N0_C
PSATA_IRX_DTX_P0_C
PSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0_C
Place near ICH7 side.

25 PSATA_ITX_DRX_N0
AF18
LPC_LDRQ0# 38
LPC_LDRQ1# 38
H_DPSLP#
THERMTRIP#
33_0402_5%~D
43
AA6
AB5
AC4
Y6
INTVRMEN
INTRUDER#
U7
V6
V7
@ C499 27P_0402_50V8J~D
LPC_LAD[0..3] 28,38,39
LAD0
LAD1
LAD2
LAD3
LAN
W1
Y1
Y2
W3
CMOS
@SHORT PADS~D
RTCX1
RTCX2
LPC
1
R297
1
R301
1
R276
U45A
AB1
AB2
CPU
4
1
R12
0_0402_5%~D
1
2
ICH_RTCX2
RTC
C40
2.2P_0402_50V8C
2
1
ICH_RTCX1
X1
+RTC_CELL
32.768KHZ_6PF_1TJS060BJ4A376P~D
Package
9.6X4.06 mm
D
1
IDE_DA[0..2]
25
2
IDE_DCS1#
IDE_DCS3#
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DDREQ
AE15
IDE_DDREQ
SIO_A20GATE
R1631
10K_0402_5%~D
2
1
2
+1.05V_VCCP
R115
56_0402_5%~D
@ C69
0.1U_0402_16V4Z~D
25
25
IDE_DD[0..15]
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
H_STPCLK#
SIO_RCIN#
R277
10K_0402_5%~D
2
1
IDE_DD[0..15] 25
IDE_DDREQ
25
ICH7M A0_BGA652~D
Close to U45
26 ICH_SDOUT_AUDIO
R378
33_0402_5%~D
2 ICH_AC_SDOUT_R
26 ICH_SYNC_AUDIO
R82
33_0402_5%~D
2 ICH_AC_SYNC_R
26 ICH_RST_AUDIO#
R84
33_0402_5%~D
2 ICH_AC_RST_R#
R189
33_0402_5%~D
2 ICH_AC_BITCLK_R
26 ICH_AC_BITCLK
A
C503
27P_0402_50V8J~D
@
Title
ICH7(2/4)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
22
of
70
+3.3V_SUS
+3.3V_RUN
26 SPKR
I CH_RI#
1 R303
2
8.2K_0402_5%~D
SPKR
AB18
SMBALERT#
SIO_EXT_SCI#
2
10K_0402_5%~D
1
R1632
SIO_EXT_SMI#
2
10K_0402_5%~D
1
R373
LINKALERT#
2
10K_0402_5%~D
1
R372
SMBALERT#
2
10K_0402_5%~D
1
R269
ICH_BATLOW#
2
8.2K_0402_5%~D
1
R318
ICH_PCIE_WAKE#
2
680_0402_5%~D
H_STP_PCI#
H_STP_CPU#
6 H_STP_PCI#
6 H_STP_CPU#
19 LCD_TST
25 IDE_RST_MOD
40 BT_RADIO_DIS#
38 ICH_PCIE_WAKE#
28,30,38,39 IRQ_SERIRQ
39
SIO_THRM#
GPIO26
IDE_RST_MOD
B21
E23
GPIO27
GPIO28
39 SIO_EXT_WAKE#
19 LAMP_STAT#
39 SIO_EXT_SMI#
GPIO32 / CLKRUN#
BT_RADIO_DIS#
AC19
U2
GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#
ICH_PCIE_WAKE#
IRQ_SERIRQ
SIO_THRM#
F20
AH21
AF20
WAKE#
SERIRQ
THRM#
IMVP_PWRGD
AD22
2
1
C82
0.1U_0402_16V4Z~D
SIO_EXT_WAKE#
AC21
LAMP_STAT#
AC18
SIO_EXT_SMI#
E21
42,49 IMVP_PWRGD
GPIO18 / STPPCI#
GPIO20 / STPCPU#
A21
AG18
CLK14
CLK48
SUSCLK
GPIO
GPIO6
GPIO7
GPIO8
DPRSLPVR
2
R554
100K_0402_5%~D
R379
10_0402_5%~D
@
CLK_ICH_14M
CLK_ICH_48M
AC1
B2
ICH_SUSCLK
C20
SLP_S3#
SLP_S4#
SLP_S5#
B24
D23
F22
PWROK
AA4
ICH_PWRGD
AC22
DPRSLPVR
TP0 / BATLOW#
C21
ICH_BATLOW#
PWRBTN#
C23
SIO_PWRBTN#
LAN_RST#
C19
RSMRST#
Y4
GPIO16 / DPRSLPVR
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
SATACLKREQ#/GPIO35
GPIO38
GPIO39
VRMPWRGD
CLK_ICH_14M
AF19
AH18
AH19
AE19
SIO_SLP_S3#
GPIO11 / SMBALERT#
LCD_TST
CLKRUN#
30,38,39 CLKRUN#
(PCI Express Wake Event)
AC20
AF21
GPIO0 / BM_BUSY#
GPIO
1
R1633
B23
SYS
PM_BMBUSY#
10 PM_BMBUSY#
+3.3V_SUS
SPKR
SUS_STAT#
SYS_RST#
GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP
RI#
A19
A27
A22
ITP_DBRESET#
7,39 ITP_DBRESET#
CLK_ICH_14M 6
CLK_ICH_48M 6
C380
@
4.7P_0402_50V8C~D
SIO_SLP_S3# 39
SIO_SLP_S5#
SIO_SLP_S5# 39
ICH_PWRGD 10,42
DPRSLPVR
49
R280
10K_0402_5%~D
1
2
1
R1799
2
0_0402_5%~D
PM_EXTTS#1 10
SIO_PWRBTN# 39
PLTRST#
PLTRST#
SUSPWROK
1
2
R296 10K_0402_5%~D
10,21,28,34
SUSPWROK
SIO_EXT_SCI#
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
T36
PAD~D
+3.3V_SUS
18,42
R784
100K_0402_5%~D
SIO_EXT_SCI# 39
USB_IDE#
SATA_DET#
USB_IDE# 25
SATA_DET# 25
GPIO24
T39 PAD~D
SATA_CLKREQ# 6
PLTRST_DELAY#
WWAN_RADIO_DIS#
PLTRST_DELAY# 52
WWAN_RADIO_DIS# 34
ICH7M A0_BGA652~D
R74
10K_0402_5%~D
USB_OC2#
25
USB_OC3#
32
A28
LAMP_STAT#
2
10K_0402_5%~D
+3.3V_SUS
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
R75
ICH_SMLINK0
ICH_SMLINK1
C22
B22
A26
B25
A25
WWAN_RADIO_DIS#
2
10K_0402_5%~D
Place closely pin U45.AC1
1
R1756
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
6,28,34 ICH_SMBCLK
6,28,34 ICH_SMBDATA
SATA
GPIO
BT_RADIO_DIS#
2
10K_0402_5%~D
SMB
1
R1755
R425
8.2K_0402_5%~D
U45C
Clocks
CLKRUN#
2
8.2K_0402_5%~D
R352
2.2K_0402_5%~D
POWER MGT
1
R111
+3.3V_RUN
1
IRQ_SERIRQ
2
10K_0402_5%~D
1
R432
R351
2.2K_0402_5%~D
2
1
SIO_THRM#
2
8.2K_0402_5%~D
R363
10K_0402_5%~D
1
2
1
R428
R341
10K_0402_5%~D
1
2
+3.3V_SUS
@
close to ICH7-M
2 0.1U_0402_16V4Z~D
C603 1
2 0.1U_0402_16V4Z~D
C281 1
2 0.1U_0402_16V4Z~D
C282 1
2 0.1U_0402_16V4Z~D
ICHO_ECI_SPI_DATA
ICHI_ECO_SPI_DATA
39 ICHO_ECI_SPI_DATA
39 ICHI_ECO_SPI_DATA
2
1
H26
H25
G28
G27
PERn2
PERp2
PETn2
PETp2
PCIE_IRX_LOMTX_N3
PCIE_IRX_LOMTX_P3
PCIE_ITX_LOMRX_N3
PCIE_ITX_LOMRX_P3
K26
K25
J28
J27
PERn3
PERp3
PETn3
PETp3
+3.3V_SUS
M26
M25
L28
L27
PERn4
PERp4
PETn4
PETp4
P26
P25
N28
N27
PERn5
PERp5
PETn5
PETp5
T25
T24
R28
R27
R1786
47_0402_5%~D
1
2
R2
P6
P1
R1787
47_0402_5%~D
1
2
P5
P2
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
D3
C4
D5
D4
E5
C3
A2
B3
PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
SPI
39 ICH_EC_SPI_CLK
39 SPI_CS#
R388
10K_0402_5%~D
2
1
ICH_EC_SPI_CLK
SPI_CS#
R384
10K_0402_5%~D
+3.3V_SUS +3.3V_SUS
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2
PCIE_ITX_WLANRX_P2
USB
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V26
V25
U28
U27
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y26
Y25
W28
W27
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA28
AA27
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD25
AD24
AC28
AC27
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3
DMI_CLKN
DMI_CLKP
AE28
AE27
CLK_PCIE_ICH#
CLK_PCIE_ICH
C25
D25
DMI_IRCOMP
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS
D2
D1
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0
10
10
10
10
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1
10
10
10
10
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2
10
10
10
10
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3
10
10
10
10
USB_OC3#
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC7#
USB_OC5#
USB_OC6#
USB_OC4#
CLK_PCIE_ICH# 6
CLK_PCIE_ICH 6
R427 24.9_0402_1%~D
1
2
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
1
R1622
1
R1623
1
R1624
1
R1625
1
R1626
1
R1627
1
R1628
1
R1629
+3.3V_SUS
USB_OC4#
USB_OC6#
USB_OC5#
Within 500 mils
32
32
32
+1.5V_RUN
34
34
38
38
25
25
32
32
32
32
32
32
32
32
36
36
<---Mini2 WLAN
Place closely pin U45.B2
<---SIO USB Hub
CLK_ICH_48M
<---BT Moudle
<---SIDE TOP
R126
10_0402_5%~D
@
<---SIDE BOTTOM
<---REAR
<---REAR
1
<---Docking
R113 20_0402_1%~D
1
2
USBRBIAS
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
2 0.1U_0402_16V4Z~D
C602 1
PERn1
PERp1
PETn1
PETp1
2 0.1U_0402_16V4Z~D
F26
F25
E28
E27
DIRECT MEDIA INTERFACE
28 PCIE_ITX_LOMRX_P3_C
C2
34 PCIE_ITX_WLANRX_P2_C
28 PCIE_IRX_LOMTX_N3
28 PCIE_IRX_LOMTX_P3
28 PCIE_ITX_LOMRX_N3_C
C1
PCIE_IRX_WANTX_N1
PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1
PCIE_ITX_WANRX_P1
PCI-EXPRESS
GIGA LAN --->
PCIE_ITX_WANRX_P1_C
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_C
MiniWWAN (Mini Card 1) --->
34
34
34
34
R389
10K_0402_5%~D
MiniWLAN (Mini Card 2)--->
34 PCIE_IRX_WANTX_N1
34 PCIE_IRX_WANTX_P1
34 PCIE_ITX_WANRX_N1_C
U45D
C124
4.7P_0402_50V8C~D
@
Within 500 mils
ICH7M A0_BGA652~D
Title
ICH7(3/4)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
23
of
70
+1.05V_VCCP
U45F
D17
RB751S40T1_SOD523-2~D
ICH_V5REF_SUS
C436
0.1U_0402_16V4Z~D
C449
+1.5V_DMIPLL
L42
1
2
B27
1
C460
10U_0805_4VAM~D
R37
0.5_0603_1%
1
2
C458
0.01U_0402_16V7K~D
+1.5V_RUN
0.1U_0402_16V4Z~D
+3.3V_RUN
+1.5V_DMIPLL AG28
1
+1.5V_RUN
2
1
C353
0.1U_0402_16V4Z~D
+VCCSATAPLL
+VCCSATAPLL
+3.3V_RUN
1
C374
0.1U_0402_16V4Z~D
R59
0.5_0603_1%
C337
0.1U_0402_16V4Z~D
C286
10U_0805_4VAM~D
+1.5V_RUN
L107
10UH_LB2012T100MR_20%_0805~D
2
1
2
+3.3V_SUS
C422
0.1U_0402_16V4Z~D
+1.5V_RUN
C455
1U_0603_10V4Z~D
+1.5V_RUN
2
C382
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
Y7
0.1U_0402_16V4Z~D
+3.3V_SUS
C461
VccDMIPLL
Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]
V5
V1
W2
W7
R7
Vcc3_3[1]
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
U6
VccSus1_05/VccLAN1_05[1]
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
AE23
AE26
AH26
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
VccRTC
W5
VccSus3_3[1]
P7
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
A24
C24
D19
D22
G19
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
C392
+3.3V_RUN
2 C393
0.1U_0402_16V4Z~D
+3.3V_RUN
+3.3V_SUS
2
C407
0.1U_0402_16V4Z~D
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
+1.5V_RUN
Vcc1_5_A[24]
Vcc1_5_A[25]
AB8
AC8
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
1
A1
H6
H7
J6
J7
+RTC_CELL
+1.5V_RUN
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
C339
0.1U_0402_16V4Z~D
C445
0.1U_0402_16V4Z~D
C361
1
2
0.1U_0402_16V4Z~D
C424
4.7U_0603_6.3V4Z~D
T7
F17
G17
C28
G20
+1.05V_VCCP
C442
0.1U_0402_16V4Z~D
1
2
+3.3V_RUN
1
AB17
AC17
VccSus1_05[2]
VccSus1_05[3]
+3.3V_SUS
Vcc1_5_A[19]
Vcc1_5_A[20]
VccSus1_05[1]
CRB is 270uF
K7
C450
330U_D2E_2.5VM_R9~D
0.1U_0402_16V4Z~D
C328
0.1U_0402_16V4Z~D
R537
10_0402_5%~D
Vcc3_3 / VccHDA
VccSus3_3/VccSusHDA
C347
0.1U_0402_16V4Z~D
+3.3V_SUS
2
+5V_SUS
C370
0.1U_0402_16V4Z~D
Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]
C338
0.1U_0402_16V4Z~D
V5REF_Sus
C405
0.1U_0402_16V4Z~D
ICH_V5REF_RUN
1
F6
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C388
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C459
D16
RB751S40T1_SOD523-2~D
0.1U_0402_16V4Z~D
C453
R535
100_0402_5%~D
C454
+
2
220U_V_4VM_R45~D
C151
+3.3V_RUN
2
+5V_RUN
ICH_V5REF_SUS
+1.5VRUN_L
V5REF[2]
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
C406
0.1U_0402_16V4Z~D
L41
1
2
+1.5V_RUN
V5REF[1]
C412
0.1U_0402_16V4Z~D
+1.5VRUN_L
D
G10
AD17
C387
1U_0603_10V4Z~D
U45E
ICH_V5REF_RUN
C474
2
0.1U_0402_16V4Z~D
+1.5V_RUN
1
C1444
0.1U_0402_16V4Z~D
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
ICH7M A0_BGA652~D
ICH7M A0_BGA652~D
0.1U_0402_16V4Z~D
A
Title
ICH7(4/4)
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
24
of
70
IDE_DCS1#
IDE_DCS3#
22
22
22
22
23 IDE_RST_MOD
23
R1329
33_0402_5%~D
1
2
IDE_RST_MOD
20
24
26
26
IDE_DA2
28
30
30
IDE_DA1
32
32
38 BAY_MODPRES#
38
38
40
40
IDE_DD15
42
+3.3V_ALW
48
50
IDE_DD11
52
52
54
54
19
19
USBP2+
21
21
USBP2-
23
23
25
25
27
27
29
29
31
31
33
33
IDE_IRQ
35
35
IDE_DDACK#
37
37
IDE_ DIORDY
39
39
41
41
IDE_DDREQ
43
43
IDE_DD0
45
45
IDE_DD14
47
47
IDE_DD13
49
49
51
51
IDE_DD3
53
53
IDE_DD4
55
55
IDE_DD10
57
57
IDE_DD9
59
59
61
61
63
63
65
65
67
67
48
50
IDE_DD5
56
56
IDE_DD6
58
58
IDE_DD8
60
60
MOD_RST
62
62
64
64
66
66
C1305
0.1U_0402_16V4Z~D
C1304
0.1U_0402_16V4Z~D
C1303
0.1U_0402_16V4Z~D
C1302
4.7U_0603_6.3V4Z~D
72
17
46
IDE_DD12
17
44
5
SATA_DET# 23
USB_OC2#
23
USBP2+
23
USBP2-
23
DASP#
IDE_DCS1#
PDIAG#
TOP VIEW
+5VHDD
IDE_DD7
+3.3V_RUN
1
C1313
2
1U_0603_10V4Z~D
Pleace near HD CONN
1
@ C1318
2
2 @
1U_0603_10V4Z~D
Pleace near HD CONN
22 PSATA_IRX_DTX_P0_C
TYCO_1770530-1~D
C1323
3900P_0402_50V7K~D
22 PSATA_ITX_DRX_P0
22 PSATA_ITX_DRX_N0
1
2
3
4
5
6
7
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
PSATA_IRX_DTX_N0
PSATA_IRX_DTX_P0
+3.3V_RUN
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
R1331
100K_0402_5%~D
+5VHDD
close SATA connector
+3.3V_RUN
1
R512
JSATA
C1319
3900P_0402_50V7K~D
2
1
22 PSATA_IRX_DTX_N0_C
68
69
USB_OC2#
42
IDE_DD2
68
15
36
IDE_DIOW#
BAY_MODPRES#
15
34
IDE_DIOR#
46
13
SATA_DET#
28
IDE_DA0
+3.3V_SUS
20
IDE_DCS3#
USB_IDE#
R1330
100K_0402_5%~D
1
2
18
22
IDE_DD1
USB_IDE#
18
44
IDE_DIOR#
IDE_DIOW#
IDE_ DIORDY
IDE_DDREQ
IDE_IRQ
IDE_DIOR#
IDE_DIOW#
IDE_DIORDY
IDE_DDREQ
22 IDE_IRQ
16
24
IDE_DDACK#
22 IDE_DDACK#
14
16
13
@ C1317
0.1U_0402_16V4Z~D
IDE_DA0
IDE_DA1
IDE_DA2
22 IDE_DCS1#
22 IDE_DCS3#
14
8.3
9
11
C1316
1000P_0402_50V7K~D
22 IDE_DA[0..2]
12
9
11
C1315
10U_0805_10V4Z~D
10
36
C1314
0.1U_0402_16V4Z~D
10
34
C1312
0.1U_0402_16V4Z~D
2
1
C1311
1000P_0402_50V7K~D
22
CSEL2
R1328
470_0402_5%~D
1
2
C1310
10U_0805_10V4Z~D
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
WF1F068N1A
22 IDE_DD[0..15]
3
4
12
1
2
70
JMOD
71
+5VMOD
C1345
0.1U_0402_16V4Z~D
2 IDE_ DIORDY
4.7K_0402_5%~D
GND
RX+
RXGND
TXTX+
GND
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V
GND1
GND2
23
24
TYCO_1775191-1_RV~D
Main SATA +5V Default
Title
5
DVD MODULE
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
25
of
70
5
+VDDA
+5V_RUN
+5V_SUS
TPS793475DBVRG4_SOT23-5~D
+Z2401
1
single gate TTL
C539
0.1U_0402_16V4Z~D
2
2
23
SPKR
38
BEEP
U28
Y
R496
10K_0402_5%~D
1
2
Z2402
C529
0.1U_0402_16V4Z~D
1
2
Z2404
SN74AHCT1G86DCKR_SC70-5~D
PC_BEEP
PC_BEEP
27
TRACE>15 mil
R162
2.2K_0402_5%~D
2
Default POP the LDO U22

When U22 is popped, no pop L47.
+VDDA
TPS793475_BYPASS
EN BYPASS
AUDIO_AVDD_ON 3
OUT
L47
From SIO
GND
C505
0.047U_0402_16V4Z~D
38 AUDIO_AVDD_ON
IN
C169
0.1U_0402_16V4Z~D
@
1
+VDDA=4.75V
5
C523
0.1U_0402_16V4Z~D
C486
1U_0603_10V4Z~D
C492
0.047U_0402_16V4Z~D
C498
0.1U_0402_16V4Z~D
U22
1
C500
2.2U_0603_6.3V6K~D
+3.3V_RUN
+VDDA
Note:U28,R496,R162,C529
place as close as U19
SDATA_OUT
22 ICH_AC_BITCLK
BIT_CLK
SDATA_IN
19
VREF_OUT
18
VREF_IN
CAP2
@ R48
0_0402_5%~D
1
2
20
CAP2
21
GPIO0
SPDIF_SHDN
22
GPIO1
DOCK_HP_MUTE#
30
GPIO2
VREFOUT
AC97VREFI
Close to U10.3
ICH_AC_BITCLK
27,38 HP_NB_SENSE
HP_NB_SENSE
27 EAPD
36 SPDIF_DOCK
EAPD
SPDIF_DOCK
31
C1825
0.1U_0402_16V4Z~D
26
C1826
10U_0805_10V4Z~D
10
CD_R
12
MIC1
13
NB_MICIN_L
27
MIC2
14
NB_MICIN_R
27
HP_L
27
HP_R
28
32
SPDIF _OUT
1
11
NC1
NC2
LOUT_L
23
LOUT_R
24
MONO_OUT
27
HP_OUT_R
27
AVSS1
AVSS2
17
29
DVSS
PAD_GND
33
SENSE_A
C189 0.1U_0402_16V4Z~D
1
2
1
R89
C179
1
2
1
R96
0.1U_0402_16V4Z~D
2
2.2K_0402_5%~D
25
1
C1780
1
C1781
STAC9200X5NAEB1XR_QFN32~D
2
1000P_0402_50V7K~D
2
1000P_0402_50V7K~D
R22
39.2K_0402_1%~D
1
2
1
2
G
Q44
2N7002W-7-F_SOT323~D
Close to U10.20
+VDDA
2
MIC_SWITCH 27
G
Q54
2N7002W-7-F_SOT323~D
CAP2
A
C510
0.1U_0402_16V4Z~D
C181
1U_0603_10V4Z~D
C491
1U_0603_10V4Z~D
20K
R109
20K_0402_1%~D
10K
39.2K
AUD_LINE_OUT 27
SENSE_A
HP_NB_SENSE
AC97VREFI
5.11K
B1
R1768
5.1K_0402 _1%~D
2
1
C495
22P_0402_50V8J~D
@
CA1
2
2.2K_0402_5%~D
HP_OUT_L
Close to U10.18
R109
SPDIF _ IN/EAPD /GPIO3
ICH_SDOUT_AUDIO
27
CD_L
Close to U10.5
R488
47_0402_5%~D
@
INT_MIC
38 DOCK_HP_MUTE#
C362
22P_0402_50V8J~D
@
16
STAC9200
38 SPDIF_SHDN
LINE_IN_R
ICH_AC_SDIN0_R
15
SYNC
22 ICH_SDOUT_AUDIO
1
2
R160 33_0402_5%~D
LINE_IN_L
R22
STAC9200 Rev.
22 ICH_SYNC_AUDIO
RESET#
AVDD
U10
22 ICH_RST_AUDIO#
22 ICH_AC_SDIN0
R361
22_0402_5%~D
@
2
2
6
1
1
DVDD
C487
2.2U_0603_6.3V6K~D
C506
0.1U_0402_16V4Z~D
C176
1U_0603_10V4Z~D
W=30 mil
2

Title
Azalia (HD) Codec

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
26
of
70
C1795
1
2
VREFOUT
+VDDA
R1775
100K_0402_5%~D
IN-
5
26 NB_MICIN_L
1
14
SHDNR#
18
SVDD
HP_NB_SENSE
10
19
U5
PVDD
R132
100K_0402_5%~D
11
HP_SPK_R1
OUTL
HP_SPK_L1
26 NB_MICIN_R
1
C146
2.2U_0603_6.3V6K~D
NC-16
16
NC-20
20
L108
5
7
8
FOX_JA9033L-B1N6-7F~D
26 MIC_SWITCH
R1780
1K_0402_5%~D
+VDDA
MAX4411ETP+_TQFN20~D
32
INT_MIC+
32
INT_MIC-
C1798
0.1U_0402_16V4Z~D
1
2
INT_MIC+
INT_MIC-
R1777
10K_0402_5%~D
3
1
2
IN+
IN-
C1799
0.1U_0402_16V4Z~D
U9A
LM358DR2G_SOIC8~D
12
JMIC
1
2
6
3
NC-12
C1800
2.2U_0603_6.3V6K~D
2
1
C1N
SGND
C1P
PGND
SVss
2 C1N
NC-8
R1778
10K_0402_5%~D
17
PVSS
NC-6
INL
C1P
C501
47P_0402_50V8J~D
C493
47P_0402_50V8J~D
C147
1U_0603_10V4Z~D
NC-4
INR
INT_MIC
26
C1797
0.1U_0402_16V4Z~D
13
R1784
100K_0402_5%~D
MIC_BIAS
1
2
15
AUD_LINE_IN_L
4
+3.3V_RUN
+VDDA
R1781
1K_0402_5%~D
MIC_R2
L17
2
1
1U_0603_10V4Z~D
AUD_LINE_IN_R
2
HP_OUT_L
PVss
C148
1
26
HP_OUT_R
26
C1794
MIC_R1 1
2
R2140
4.99_0402_1%~D 2.2U_0603_6.3V6K~D
C1796
2.2U_0603_6.3V6K~D
SHDNL#
OUTR
R1770
C1775
4.99_0402_1%~D 2.2U_0603_6.3V6K~D
MIC_L2
2
1 MIC_L1 1
2
2
IN+
MIC_BIAS
R1776
100K_0402_5%~D
U9B
LM358DR2G_SOIC8~D
C114
2.2U_0603_6.3V6K~D
+3.3V_RUN
R1773
20K_0402_1%~D
+VDDA
+3.3V_RUN
R1774
20K_0402_1%~D
2
1
R1769
100K_0402_5%~D
L52
2
1
R1772
4.7K_0402_5%~D
1U_0603_10V4Z~D
R1771
4.7K_0402_5%~D
2
1
+3VRUN_4411
C177
100P_0402_50V8J~D
C153
100P_0402_50V8J~D
R1783
1K_0402_5%~D
2
Speaker Connector
JAUDIO
1
2
6
3
HP_SPK_L2
HP_SPK_R2
2
1
L15
C108
100P_0402_50V8J~D
HP_SPK_R1
L16
2
1
C1801
2.2U_0603_6.3V6K~D
2
1
HP_SPK_L1
C109
R1782
1K_0402_5%~D
100P_0402_50V8J~D
1
2
R1779
100K_0402_5%~D
C113
2.2U_0603_6.3V6K~D
4
1
5
7
8
26,38 HP_NB_SENSE
FOX_JA9033L-B1N6-7F~D
JSPK
INT_SPK_R1
INT_SPK_R2
1
2
1
2
MOLEX_53398-0271~D
+5VAMPVCC
+5V_SUS
+5VAMPVCC
C534
1U_0603_10V4Z~D
C485
10U_0805_10V4Z~D
1
C502
0.1U_0402_16V4Z~D
C494
0.1U_0402_16V4Z~D
R165
1K_0402_5%~D
C199
2
1
C293
47P_0402_50V8J~D
2
+3.3V_RUN
C536
0.047U_0402_16V4Z~D
C1793
47P_0402_50V8J~D
RI N-
0.022U_0402_16V7K~D
C1791
2
1
0.047U_0402_16V4Z~D
C1792
2
1
17
RIN+
LIN+
LIN-
0.047U_0402_16V4Z~D
SPK_SHUTDOWN#
GAIN1
AUD_GAIN1
ROUT+
18
INT_SPK_R1
ROUT-
14
INT_SPK_R2
LOUT+
LOUT-
AUD_GAIN1
R171
@ 1K_0402_5%~D
GAIN0
26
@ Q11
2N7002W-7-F_SOT323~D
Q43
2N7002W-7-F_SOT323~D
2
G
EAPD
12
10
GAIN1
AV(inv)
PAD_GND
21
INPUT
IMPEDANCE
6dB
90K ohm
10dB
70K ohm
15.6dB
45K ohm
21.6dB
25K ohm
BYPASS
SHUTDOWN
GND1
GND2
GND3
GND4
2
G
NC
BYPASS
R170
1K_0402_5%~D
@
NOTE: SPEAKER TRACE WIDTH

SHOULD BE MINIMUM 10 MILS
C537
0.47U_0402_16V4Z~D
20
13
11
1
19
S
TPA6017A2PWP_TSSOP20~D
2
AUD_GAIN0
R156
1
1
NB_MUTE
38
RIN-
100K_0402_5%~D
AUD_GAIN0
GAIN0
PC_BEEP
PC_BEEP
26
R164
1K_0402_5%~D
U19
2 @
26 AUD_LINE_OUT
Gain Setting
+5VAMPVCC
VDD
PVDD1
PVDD2
16
15
6
2 @
C565
1000P_0402_50V7K~D
C566
1000P_0402_50V7K~D
L45
1
W=40mils
15 mils trace
Title
AMP and PHONE JACK

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
27
of
70
MMJT9435
C
2
+3VLAN
Layout Notice : 1.2V filter. Place as close

chip as possible.
Q63
MMJT9435T1G_SOT223~D
C80
0.1U_0402_16V4Z~D
@
+1.2VLAN
1
C1369
C1361
Pop C1375 for 5752-A0,

De-pop for 5752-A1
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
C1375
470P_0402_50V7K~D
@
LAN_ACT#
LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
XTALO
XTALI
0
1
SO
SI
+3VLAN
+2.5VLAN
PCIE_TXDN
M3
C1377
0.1U_0402_16V4Z~D
PCIE_IRX_LOMTX_N3_C 1
2
PCIE_IRX_LOMTX_N3 23
PCIE_TXDP
L3
PCIE_IRX_LOMTX_P3_C 1
Digial power
VDDIO_0
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
A5
G3
L11
VDDP_0
VDDP_1
VDDP_2
XTALVDD
H12
XTALVDD
PCIE_SDS_VDD
K4
BIASVDD
A12
BIASVDD
AVDDL
F10
F11
AVDDL_0
AVDDL_1
AVDD
A11
F12
AVDD_0
AVDD_1
L7
PCIE_RXDP
M7
WAKE
REFCLKREFCLK+
REFCLK_SEL
A4
L5
M5
B3
PERST
B1
TCK
TDI
TDO
TMS
TRST
SERIAL_DI
SERIAL_DO
GPHY_TVCOI
B5
F3
B4
E3
D4
J1
M4
C6
RDAC
A8
CS#
SCLK
R78
22_0402_5%~D
PCIE_ITX_LOMRX_P3_C 23
PCIE_WAKE#
PCIE_WAKE# 34,38
CLK_PCIE_LOM#
CLK_PCIE_LOM# 6
CLK_PCIE_LOM
CLK_PCIE_LOM 6
1
2
@ R18
4.7K_0402_5%~D
PLTRST#
PLTRST#
10,21,23,34
1
C78
22P_0402_50V8J~D
+1.2VLAN
L63
2
1
1
C1387
4.7U_0603_6.3V4Z~D
1
@ R13
1
R14
+3VLAN
+3VLAN
2
4.7K_0402_5%~D
2
4.7K_0402_5%~D
2
0_0402_5%~D
1
@ R16
C1385
4.7U_0603_6.3V4Z~D
+3VLAN
U3
8
7
6
5
Q
VSS
VCC
W#
D
C
RESET#
S#
L65
2
1
1
C1383
4.7U_0603_6.3V4Z~D
LOM_SO
LOM_SCLK
1
2
3
4
AVDD
K6
PCIE_PLLVDD
AVDDL
1
G12
GPHY_PLLVDD
BIAS
Analog
power
PCIE_PLLVDD
PLL
GPHY_PLLVDD
C1388
0.1U_0402_16V4Z~D
GPHY_PLLVDD
1
38 LAN_LOW_PWR
PCIE_PLLVDD
1
@ C1390
4.7U_0603_6.3V4Z~D
M45PE20-VMN6TP_SO8~D
2
D
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
B2
B10
E4
E5
E6
E7
E8
E9
F4
F5
F6
F7
F8
F9
G5
G6
G7
G8
L2
L6
M6
NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
A1
A6
A7
B7
C1
C3
D1
D2
D3
E1
E2
F2
G1
G2
G9
H1
H2
H10
J10
K1
K2
K3
K5
K7
K8
K10
K11
L4
L8
M8
BCM5752KFBG A2_FPBGA144~D
C1386
0.1U_0402_16V4Z~D
1
2
@ R68
20K_0402_5%~D
1
2
@ R70
39K_0402_5%~D
C1384
0.1U_0402_16V4Z~D
@
6 LOM_CLKREQ#
LOM_CLKREQ#
R58
0_0402_5%~D
R1368
2
1
0_0603_5%~D
LOM_CS#
PCIE_SDSVDD
L64
2
1
1
@ R1360
4.7K_0402_5%~D
1
2
BIASVDD
PCIE_ITX_LOMRX_N3_C 23
GND
+2.5VLAN
2
L62
2
1
1
C1382
0.1U_0402_16V4Z~D
CLK_PCI_LOM
PCIE_IRX_LOMTX_P3 23
PCIE_RXDN
2
C1379
0.1U_0402_16V4Z~D
Place closely pin J8
M12
C1376
0.1U_0402_16V4Z~D
BCM5752
VDDC_0
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
A3
C2
D10
F1
G10
J2
L1
L12
XTALVDD
2
1
BLM18AG601SN1D_0603~D 1
+1.2VLAN
PCIE_SDS_VDD
1
C1391 @
0.1U_0402_16V4Z~D
A
@ U188
LOM_SI
C1392
NV_STRAP0
L61
REGCTL_PNP25
0.1U_0402_16V4Z~D
REGSEN25
Layout Notice : No high

speed signal should be
routed near RDAC or on
adjacent layer to RDAC
NV_STRAP1
ST M45PE20
M11
BCM5752KFBG A2_FPBGA144~D
Atmel AT45BCM021B
J12
REGCTL25
Bias
C1394
27P_0402_50V8J~D
L9
REGSEN12
C1378
0.1U_0402_16V4Z~D
+3VLAN
REGCTL_PNP12
R1364
XTALI
XTALO
K12
J11
1.18K_0402_1%~D
C1393
27P_0402_50V8J~D
X4
25MHZ_18PF_1BX25000CK1D~D
1
2
M9
Clock
2
1
200_0402_1%~D
R10
+3VLAN
+3.3V_RUN
Power
Control
R1367
R11
B6
1 4.7K_0402_5%~D
1
1K_0402_5%~D
1
1K_0402_5%~D
2
2
LAN_ACT#
A9
B9
A10
B8
L60
2
1
BLM18AG601SN1D_0603~D 1
LAN_LOW_PWR 38
R1439
29
LINK_10#
LINK_100#
VAUXPRSNT
H4
A2
G11
LINK_10#
LINK_100#
SCLK
SI
SO
CS
NV_STRAP0
NV_STRAP1
ATTN_BTTN
VMAINPRSNT
REGSUP12
REGCTL12
LED
29
29
C9
E10
D9
C10
M2
M1
SPI
LOM_SCLK
LOM_SI
R1267
LOM_SO
4.7K_0402_5%~D
LOM_CS#
NV_STRAP0
1
2
NV_STRAP1
1
2
R1268
4.7K_0402_5%~D
SMB_CLK
SMB_DATA
SMBUS
+3VLAN
GPIO
C8
C7
6,23,34 ICH_SMBCLK
6,23,34 ICH_SMBDATA
GPIO0
GPIO1
GPIO2
GPIO3
Regulator
Control
H9
H11
C5
C4
LOM_CABLE_DETECT
38 LOM_CABLE_DETECT
TPM_GPIO0
TPM_GPIO1
TPM_GPIO2
TPM_EN
29
29
29
29
29
29
29
29
U214B
D5
D6
D7
D8
H5
H6
H8
J4
+2.5VLAN
LOW_PWR
G4
J3
H3
J6
PCI-E
2
@ R1586
TPM_GPIO0
TPM_GPIO1
TPM_GPIO2
TEST
1 10K_0402_5%~D
1 10K_0402_5%~D
1 10K_0402_5%~D
1
0_0402_5%~D
1
4.7K_0402_5%~D
2
2
2
2
R17
LAN_TX3+
LAN_TX3LAN_TX2+
LAN_TX2LAN_TX1+
LAN_TX1LAN_TX0+
LAN_TX0-
R1366
4.7K_0402_5%~D
LFRAME
LRESET
SERIRQ
LAN_TX3+
LAN_TX3LAN_TX2+
LAN_TX2LAN_TX1+
LAN_TX1LAN_TX0+
LAN_TX0-
B11
B12
C11
C12
D11
D12
E11
E12
R1365
4.7K_0402_5%~D
2
1
J9
M10
H7
TRD3+
TRD3TRD2+
TRD2TRD1+
TRD1TRD0+
TRD0-
LPC_LFRAME#
PLTRST#
IRQ_SERIRQ
Media
LAD0
LAD1
LAD2
LAD3
C1371
J7
L10
J5
K9
0.1U_0402_16V4Z~D
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
+1.2VLAN
0.1U_0402_16V4Z~D
38 LAN_TPM_EN#
LCLK
1
C1370
22,38,39 LPC_LFRAME#
10,21,23,34 PLTRST#
J8
LPC/TPM
R1585
R1584
R1583
BCM5752
CLK_PCI_LOM
6 CLK_PCI_LOM
+2.5VLAN
U214A
22,38,39 LPC_LAD[0..3]
1
C1743
C1742
2
4
C1358
0.1U_0402_16V4Z~D
+2.5VLAN
1
REGCTL_PNP12
C1357
0.1U_0402_16V4Z~D
0_0603_5%~D
C1356
0.1U_0402_16V4Z~D
MBT35200MT1G_TSOP6~D
C1355
0.1U_0402_16V4Z~D
C1354
0.1U_0402_16V4Z~D
4
2
C1353
0.1U_0402_16V4Z~D
R9
1
2
5
6
1
2
C1367
0.1U_0402_16V4Z~D
C1366
0.1U_0402_16V4Z~D
C1365
0.1U_0402_16V4Z~D
G
3
REGCTL_PNP25
+1.2VLAN
10U_0805_10V4Z~D
C1364
0.1U_0402_16V4Z~D
R7, R9 are 1/2 W rating
0.1U_0402_16V4Z~D
C1363
4.7U_0603_6.3V4Z~D
R7
2_1210_5%~D
2_1210_5%~D
Q68
R120
1
C1741
1
C1740
41 ENAB_3VLAN
1
C1362
+3VLAN
4.7U_0603_6.3V4Z~D
C1368
6
5
2
1
0.1U_0402_16V4Z~D
Q62
E
3
0.1U_0402_16V4Z~D
+3.3V_SRC
C
4
4.7U_0603_6.3V4Z~D
+3VLAN
B
1
C1352
0.1U_0402_16V4Z~D
Layout Notice : Place as close

chip as possible.
C1351
0.1U_0402_16V4Z~D
8
7
6
5
SO
GND
VCC
WP#
SI
SCK
RESET#
CS#
1
2
3
4
+3VLAN
1
2
@ R53
4.7K_0402_5%~D
AT45BCM021B-SU_SO8~D
Title
3
BCM5751M
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
28
of
70
LAN ANALOG
SWITCH
2 0.1U_0402_16V4Z~D
C1398
2 0.1U_0402_16V4Z~D
C1399
2 0.1U_0402_16V4Z~D
C1400
D
2 0.1U_0402_16V4Z~D
R1370
R1371
R1372
R1373
R1374
R1375
R1376
R1377
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
LAN_TX0LAN_TX0+
LAN_TX1LAN_TX1+
LAN_TX2LAN_TX2+
LAN_TX3LAN_TX3+
Layout Notice : Place

termination as close as
ASIC as possible
The resistors need at
least 1/16W
U189
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
C1395
56
50
38
27
18
10
4
+3VLAN
28
LAN_TX0-
28
LAN_TX0+
28
LAN_TX1-
28
LAN_TX1+
28
LAN_TX2-
28
LAN_TX2+
28
LAN_TX3-
28
LAN_TX3+
36,38
DOCKED
LAN_TX0LAN_TX0-R
1
2
L68
36NH_0603CS-360EJTS_5%_0603~D
LAN_TX0+ 1
LAN_TX0+R
2
L69
36NH_0603CS-360EJTS_5%_0603~D
2
3
0B1
1B1
48
47
SW_LAN_TX0SW_LAN_TX0+
A1
2B1
3B1
43
42
4B1
5B1
37
36
A0
LAN_TX1LAN_TX1-R
1
2
L70
36NH_0603CS-360EJTS_5%_0603~D
LAN_TX1+ 1
LAN_TX1+R
2
L71
36NH_0603CS-360EJTS_5%_0603~D
A2
A3
6B1
7B1
32
31
LAN_TX2LAN_TX2-R
1
2
L72
36NH_0603CS-360EJTS_5%_0603~D
LAN_TX2+ 1
LAN_TX2+R
2
L73
36NH_0603CS-360EJTS_5%_0603~D
11
A4
12
A5
0LED1
1LED1
2LED1
22
23
52
LAN_LEDACT#
LINK_LED10#
LINK_LED100#
LAN_TX3LAN_TX3-R
1
2
L74
36NH_0603CS-360EJTS_5%_0603~D
LAN_TX3+ 1
LAN_TX3+R
2
L75
36NH_0603CS-360EJTS_5%_0603~D
14
A6
0B2
1B2
46
45
DOCK_LAN_TX0DOCK_LAN_TX0+
15
A7
2B2
3B2
41
40
DOCKED
17
SEL
4B2
5B2
35
34
19
20
54
LED0
LED1
LED2
6B2
7B2
30
29
0LED2
1LED2
2LED2
25
26
51
DOCK_LAN_ACTLED_YEL#
DOCK_LED_10#
DOCK_LED_100#
Layout Notice : Place bead as

close PI3L500 as possible
28 LAN_ACT#
28 LINK_10#
28 LINK_100#
NC
SW_LAN_TX1- 32
SW_LAN_TX1+ 32
D
SW_LAN_TX2- 32
SW_LAN_TX2+ 32
SW_LAN_TX3- 32
SW_LAN_TX3+ 32
DOCK_LAN_TX0- 36
DOCK_LAN_TX0+ 36
DOCK_LAN_TX1- 36
DOCK_LAN_TX1+ 36
DOCK_LAN_TX2- 36
DOCK_LAN_TX2+ 36
DOCK_LAN_TX3- 36
DOCK_LAN_TX3+ 36
DOCK_LAN_ACTLED_YEL# 36
DOCK_LED_10# 36
DOCK_LED_100# 36
PAD_GND
FROM NIC
DOCKED
1: TO DOCK
1
6
9
13
16
21
24
28
33
39
44
49
53
55
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
57
SW_LAN_TX0- 32
SW_LAN_TX0+ 32
PI3L500E_TQFN56~D
TO
DOCK
0: TO RJ45
10K_0402_5%~D
@
10K_0402_5%~D
R1381
@
2
1
1
R1379
2
10K_0402_5%~D
@
R1380
2
1
+3VLAN
LAN_ACT#
LINK_10#
LINK_100#
R1382
LAN_LEDACT#
LINK_LED10#
150_0402_5%~D
R1384
1
2
LED_10_GRN_R#
LINK_LED100#
150_0402_5%~D
R1385
1
2
LED_100_ORG_R#
LAN_ACTLED_YEL_R#
LAN_ACTLED_YEL_R# 32
LED_10_GRN_R# 32
LED_100_ORG_R# 32
150_0402_5%~D
Title
5
LAN TRANSFOMER
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
29
of
70
NOTE:
THIS PAGE SHOWS THE OZ601B CONFIGURED WITH
EXTERNAL IDSEL AND WITHOUT 12V VPP SUPPORT.
+5V_RUN
IDSEL SELECT POWER-ON-STRAPPING

(SEE NOTE & TABLE FOR OPTIONS)
1
20
33
22K TO 47K PULL-UP & PULL-DOWN RESISTORS ARE

REQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
C
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWS

FOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLY
CONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUST
BE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
VCC5#
(124)
VPP_PGM
(123)
IDSEL SELECT
DOWN
DOWN
AD18
DOWN
UP
AD20
UP
R1307
100_0402_5%~D
PCI_AD17
1
2
21,35 PCI_C_BE3#
21,35 PCI_C_BE2#
21,35 PCI_C_BE1#
21,35 PCI_C_BE0#
AD25
PIN 127
21,35
21,35,36
21,35,36
21,35
21,35
21,35
6 CLK_PCI_PCM
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PAR
21,35 PCI_PERR#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
CBS_IDSEL
PCI_C_BE3#
PCI_C_BE2#
PCI_C_BE1#
PCI_C_BE0#
21,31,35 PCI_RST#
35,38 SYS_PME#
23,38,39 CLKRUN#
21 PCI_PIRQC#
PCI_VCC
PCI_VCC
PCI_VCC
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
VPP_VCC/VPPD1/IDSEL
C/BE3#
C/BE2#
C/BE1#
C/BE0#
CLK_PCI_PCM
PCI_DEVSEL#
PCI_FRAME#
PCI _IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PAR
26
27
23
24
25
47
48
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCI_PERR#
51
PERR#/SPKR_OUT
PCI_REQ1#
PCI_GNT1#
21 PCI_REQ1#
21 PCI_GNT1#
4
5
6
7
8
9
10
13
14
15
16
17
18
19
21
22
28
29
30
31
34
35
36
37
38
39
40
41
42
43
44
46
127
11
12
49
50
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
PCI_RST#
1
@ R71
CLKRUN#
IRQ_SERIRQ
PCI_PIRQC#
2
3
2
0_0402_5%~D
126
120
55
54
53
52
REQ#
GNT#
RST#
PME#/RI_OUT#
MF6
MF4
MF3
MF0
32
45
65
96
128
22K TO 47K PULL-UPS MUST BE PLACED

ON INTA#, PME#, SERIRQ# & CLKRUN#.
CBS_SATA
CBS_SCLK
CBS_SLATCH
VCC5#/VCCD0#/SDATA
VCC3#/VCCD1#/SCLK
VPP_PGM/VPPD0/SLATCH
124
125
123
D10/CAD31
D9/CAD30
D1/CAD29
D8/CAD28
D0/CAD27
A0/CAD26
A1/CAD25
A2/CAD24
A3/CAD23
A4/CAD22
A5/CAD21
A6/CAD20
A25/CAD19
A7/CAD18
A24/CAD17
A17/CAD16
IOW#/CAD15
A9/CAD14
IORD#/CAD13
A11/CAD12
OE#/CAD11
CE2#/CAD10
A10/CAD9
D15/CAD8
D7/CAD7
D13/CAD6
D6/CAD5
D12/CAD4
D5/CAD3
D11/CAD2
D4/CAD1
D3/CAD0
103
102
101
100
99
110
109
108
106
105
104
118
95
94
93
75
73
74
71
72
70
69
68
85
84
82
83
80
81
78
79
76
A16/CCLK
A23/CFRAME#
A15/CIRDY#
A22/CTRDY#
A21/CDEVSEL#
A20/CSTOP#
A13/CPAR
A14/CPERR#
WAIT#/CSERR#
INPACK#/CREQ#
WE#/CGNT#
RDY/IREQ#/CINT#
A19/CBLOCK#
WP/CCLKRUN#
RESET/CRST#
D2/RFU
D14/RFU
A18/RFU
VS1/CVS1
VS2/CVS2
CD1#/CCD1#
CD2#/CCD2#
BVD2/LED/CAUDIO
BVD1/STSCHG#/RI#/CSTSCHG
107
114
117
116
113
61
58
60
91
89
62
88
59
87
119
98
86
63
57
121
56
122
92
90
CBS_CFRAME#
C BS_CIRDY#
CBS_CTRDY#
CBS_CDEVSEL#
CBS_CSTOP#
CBS_CPAR
CBS_CPERR#
CBS_CSERR#
CBS_CREQ#
CBS_CGNT#
CBS_CINT#
CBS_CBLOCK#
CBS_CCLKRUN#
CBS_CRST#
CBS_RSVD/D2
CBS_RSVD/D14
CBS_RSVD/A18
CBS_CVS1
CBS_CVS2
CBS_CCD1#
CBS_CCD2#
CBS_CAUDIO
CBS_CSTSCHNG
REG#CCBE3#
A12/CCBE2#
A8/CCBE1#
CE1/CCBE0#
111
112
66
67
CBS_CC/BE3#
CBS_CC/BE2#
CBS_CC/BE1#
CBS_CC/BE0#
PCI_RST#
CBS_CAD31
CBS_CAD30
CBS_CAD29
CBS_CAD28
CBS_CAD27
CBS_CAD26
CBS_CAD25
CBS_CAD24
CBS_CAD23
CBS_CAD22
CBS_CAD21
CBS_CAD20
CBS_CAD19
CBS_CAD18
CBS_CAD17
CBS_CAD16
CBS_CAD15
CBS_CAD14
CBS_CAD13
CBS_CAD12
CBS_CAD11
CBS_CAD10
CBS_CAD9
CBS_CAD8
CBS_CAD7
CBS_CAD6
CBS_CAD5
CBS_CAD4
CBS_CAD3
CBS_CAD2
CBS_CAD1
CBS_CAD0
R4
+CBS_VCC
U2
19
20
21
AVCC
AVCC
AVCC
3
4
5
+3.3V
+3.3V
+3.3V
AVPP
28
BVCC
13
1
2
6
DATA
CLK
LATCH
CD1#
CD2#
VS1
VS2
14
15
16
17
HOST_DN
HOST_DP
24
27
CARD_DN
CARD_DP
23
26
NC
NC
8
25
32
RESET#
18
22
11
12
9
10
HOST_CLK
SC_CLK
HOST_RST
SC_RST
HOST_I/O
SC_I/O
GND
29
30
31
+5V
+5V
+5V
CBS_CCD1#
CBS_CCD2#
CBS_CVS1
CBS_CVS2
USB_HUBP1- 38
USB_HUBP1+ 38
CBS_CAD15
CBS_CAD13
OZ2522LN-A1_QFN32~D
JCBUS
33_0402_5%~D
CBS_CCLK
CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#
+CBS_VCC
1
CBS_CCLK
C BS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
OZ601TN_TQFP128~D
CBS_CAD29
CBS_RSVD/D2
CBS_CCLKRUN#
Place closely pin 26

CLK_PCI_PCM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GND1
A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_PCI_C/BE0#
GND2
A_CAD9
A_CAD11
A_CAD12
GND3
A_CAD14
A_PCI_C/BE1#
A_CPAR
GND4
A_CPERR#
A_CGNT#
A_CINT#
+AVCC0
+AVPP0
A_CCLK
A_CIRDY
A_PCI_C/BE2#
A_CAD18
A_CAD20
GND5
A_CAD21
A_CAD22
A_CAD23
A_CAD24
GND6
A_CAD25
A_CAD26
A_CAD27
GND7
A_CAD29
CB_A_D2
A_CCLKRUN#
GND8
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
GND9
A_CCD1#
A_CAD2
A_CAD4
A_CAD6
CB_A_D14
A_CAD8
GND10
A_CAD10
A_CVS1
A_CAD13
GND11
A_CAD15
A_CAD16
CB_A_A18
GND12
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#
+AVCC1
+AVPP1
A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2
GND13
A_CRST#
A_CSERR#
A_CREQ#
A_PCI_C/BE3#
GND14
A_CAUDIO
A_CSTSCHG
A_CAD28
GND15
A_CAD30
A_CAD31
A_CCD2#
GND16
CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_RSVD/D14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_RSVD/A18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#
+CBS_VCC
CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
C1447
0.1U_0402_16V4Z~D
THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.

IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREE
PCI AD LINES OR EXTERNAL IDSEL SIGNAL.
UP
C1426
0.1U_0402_16V4Z~D
64
77
97
115
GND
GND
GND
GND
GND
C1448
0.1U_0402_16V4Z~D
NOTE: IDSEL SELECTION!
DOWN
U193
1
21,35 PCI_AD[0..31]
UP
R1407
33K_0402_5%~D
+3.3V_RUN
R1406
33K_0402_5%~D
2
1
C1421
0.1U_0402_16V4Z~D
C1420
0.1U_0402_16V4Z~D
C1419
0.1U_0402_16V4Z~D
C1418
4.7U_0603_6.3V4Z~D
C1425
0.1U_0402_16V4Z~D
+3.3V_RUN
C1424
4.7U_0603_6.3V4Z~D
+3.3V_RUN
+3.3V_RUN
C1417
0.1U_0402_16V4Z~D
C1423
0.1U_0402_16V4Z~D
C1422
C1416
4.7U_0603_6.3V4Z~D 4.7U_0603_6.3V4Z~D
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#
TYCO_1734648-1~D
R88
22_0402_5%~D
A
C81
22P_0402_50V8J~D
Title
8
Card Bus OZ601

Size
Document Number
Date:
Rev
1.0
LA-2792
2
Sheet
30
1
of
70
R122
D
33_0402_5%~D
2
33_0402_5%~D
2
R123
@ L5
4 4
USB SMARTCARD READER.

TYPE A (5V), B (3V), AB (5V/3V)
& USB SMARTCARDS ARE SUPPORTED.
LOW
32
1
2
MODE0/SC_LED#
MODE1
MODE2
GND
GND
GND
6
12
15K_0402_5%~D
USB_BIO_LUSB_BIO_L+
EGATEDEGATED+
21
20
SCCDSCCD+
SC_VCC
27
+SC_PWR
SC_RST#
SC_CLK
SC_C4
SC_IO
SC_DET#
24
23
22
25
15
SC_RST#
SC_CLK
SC_C4
R1420
R1421
R1423
2
2
2
1 220_0402_5%~D
1 33_0402_5%~D
1 220_0402_5%~D
SC_IO
R1424
1 330_0402_5%~D
RF_OUT
RF_IN/RX
RF_CLK
RF_AUX
8
7
9
10
SC_DET#
OZ77C6LN-A1_QFN32~D
10.1
VRCPR
SC_DET#
48MHz
SC_DET# 38
R1419
DPDDPD+
29
19
18
47K_0402_5%~D
+SC_PWR
C1443
2
15K_0402_5%~D
R1417
2
1
R1416
2
C83
47P_0402_50V8J~D
15K_0402_5%~D
R1595
2
JSC
SCCD+
SCCDC76
0.1U_0402_16V4Z~D
CLOCK INPUT
XI/48M_IN
XO
11
13
26
4.7K_0402_5%~D
MODE1
R1425
MD0
USB_BIO+ 40
+3.3V_OUT
NC
NC
3
4
C1440
1U_0603_10V4Z~D
RST#
CLK_SMC_48M
USB_BIO- 40
UPDUPD+
14
6 CLK_SMC_48M
R1336
10K_0402_5%~D
17
16
PCI_RST#
30
31
C1436
4.7U_0603_6.3V4Z~D
USB_HUBP3USB_HUBP3+
15K_0402_5%~D
R1596
2
1
1
VCC5V_IN
VCC5V_IN
C1749
0.1U_0402_16V4Z~D
5
28
C1748
4.7U_0603_6.3V4Z~D
2
U1
C1437
0.1U_0402_16V4Z~D
USB_HUBP3USB_HUBP3+
VR_CPR
VR_CPR
2
38
38
21,30,35 PCI_RST#
C1433
0.1U_0402_16V4Z~D
R1597
1.5K_0402_1%~D
C457
4.7U_0603_6.3V4Z~D
+3V_PWR
DLW21SN900SQ2_0805~D
+5V_RUN
+3.3V_RUN
C1439
0.1U_0402_16V4Z~D
C84
47P_0402_50V8J~D
12
11
GND
GND
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
MOLEX_52207-1085~D
1U_0603_10V4Z~D
HIGH
6MHz Crystal
Place closely pin 3
CLK_SMC_48M
@
R133
10_0402_5%~D
@
C135
4.7P_0402_50V8C~D
Title
Smart Card OZ77C6

Size
Document Number
Date:
Rev
1.0
LA-2792
2
Sheet
31
1
of
70
@
23
23
L8
USBP5+
USBP5-
4
1
3
2
R29
0_0402_5%~D
1
2
R28
0_0402_5%~D
1
2
L7
23
USBP6+
23
USBP6-
C1745
0.1U_0402_16V4Z~D
USBP5_D+
USBP5_D-
3
2
R27
0_0402_5%~D
1
2
R26
0_0402_5%~D
1
2
USBP6_D+
USBP6_D-
1
JIO
2
USBP3USBP3+
23 USBP323 USBP3+
23 USBP423 USBP4+
43 BREATH_GREEN_LED
43 BATT_GREEN_LED
43 BATT_AMBER_LED
43 R_BT_ACT
43 R_MPCI_ACT
27 INT_MIC+
27 INT_MIC-
+USB_SIDE_PWR
USBP4USBP4+
BREATH_GREEN_LED
BATT_GREEN_LED
BATT_AMBER_LED
R_BT_ACT
R_MPCI_ACT
INT_MIC+
INT_MIC-
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
32
33
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GND
GND
GND
34
35
36
LAN_ACTLED_YEL_R#
SW_LAN_TX0+
SW_LAN_TX3-
LAN_ACTLED_YEL_R# 29
+3VLAN
SW_LAN_TX0+
SW_LAN_TX1-
29
29
29
29
SW_LAN_TX2+
SW_LAN_TX3-
29
29
29
29
+2.5VLAN
LED_10_GRN_R#
LED_100_ORG_R#
R_SATA_ACT
LED_10_GRN_R# 29
LED_100_ORG_R# 29
R_SATA_ACT 43
TYCO_3-1775014-0~D
USB Port
+USB_SIDE_PWR
+USB_BACK_PWR
@
@
USBP3+
USBP4-
USBP5+
U186
D1+
GND
D2-
D2+
USBP4+
VCC
D1-
USBP6USBP3-
U187
D1+
D2+
GND
VCC
D1-
D2-
USBP6+
USBP5-
IP4220CZ6_SO6~D
IP4220CZ6_SO6~D
+USB_BACK_PWR
Place ESD diodes as close as USB connector.

+5V_SUS
U14
38 USB_BACK_EN#
C9
0.1U_0402_16V4Z~D
USB_BACK_EN#
1
2
3
4
GND
IN
EN1#
EN2#
8
7
6
5
OC1#
OUT1
OUT2
OC2#
USB_OC5#
USB_OC6#
USB_OC5#
23
USB_OC6#
23
TPS2062DR_SO8~D
C13
10U_0805_10V4Z~D
+5V_SUS
U17
38 USB_SIDE_EN#
C343
0.1U_0402_16V4Z~D
USB_SIDE_EN#
1
2
3
4
GND
IN
EN1#
EN2#
OC1#
OUT1
OUT2
OC2#
8
7
6
5
USB_OC3#
USB_OC4#
USB_OC3#
23
USB_OC4#
23
1
+
2
C19
0.1U_0402_16V4Z~D
+USB_SIDE_PWR
C292
0.1U_0402_16V4Z~D
C18
150U_D2_6.3VM~D
+USB_BACK_PWR
TPS2062DR_SO8~D
C342
10U_0805_10V4Z~D
1
JUSB1
2
USBP6_DUSBP6_D+
1
2
3
4
A_VCC
A_DA_D+
A_GND
USBP5_DUSBP5_D+
5
6
7
8
B_VCC
B_DB_D+
B_GND
9
10
11
12
G1
G2
G3
G4
FOX_UB9112C-SB201-4F~D
Rear USB Ports

A
Title
USB 2.0 Port

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
32
of
70
R1442
0_0402_5%~D
1
2
RES 2
3 IAC_SDATA0
RES 4
5 GND
3.3V 6
7 IAC_SYNC
GND 8
9 IAC_SDATAIN
GND 10
ICH_RST_MDC_R#
3
Q64
BSS138W-7-F_SOT323~D
22 ICH_RST_MDC#
New MDC connector.

1 GND
2
G
+5V_SUS
1
R1443
100K_0402_5%~D
R1441
10K_0402_5%~D
38 MDC_RST_DIS#
11 IAC_RESET#
IAC_BITCLK 12
+3.3V_SUS
JMDC
Connector for MDC Rev1.5
C396
10P_0402_50V8J~D
A
2
1
2
1
ICH_AC_SDOUT_MDCTERM
TYCO_1-1775149-2~D
C86
10P_0402_50V8J~D
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND
MDC_AC_BITCLK
R98
@ 10_0402_5%~D
ICH_SYNC_MDC
MDC_SDIN
ICH_RST_MDC_R#
ICH_SDOUT_MDC
MDC_AC_BITCLK
22 MDC_AC_BITCLK
W=20 mil
MDC_AC_BITCLK_TERM
22 ICH_SYNC_MDC
2
4
6
8
10
12
R406
@ 10_0402_5%~D
R91
33_0402_5%~D
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
C89
0.1U_0402_16V4Z~D
1
3
5
7
9
11
C403
4.7U_0603_6.3V4Z~D
22 ICH_SDOUT_MDC
22 ICH_AC_SDIN1
ICH_SDOUT_MDC
Title
BT PORT and MDC

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
33
of
70
JCLIP1
1
2
3
4
Mini Card
Wire less WAN
GND1
GND2
GND3
GND4
TYCO_1775837-1~D
Mini-Card Latch
L101
38 USB_HUBP2-
38 USB_HUBP2+
@
2 2
USB_HUBP2_D-
USB_HUBP2_D+
R1577
0_0402_5%~D
1
2
R1578
0_0402_5%~D
1
2
+3.3V_RUN
JMINI1
PCIE_WAKE#
28,38 PCIE_WAKE#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
MINI1CLK_REQ#
6 MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
6 CLK_PCIE_MINI1#
6 CLK_PCIE_MINI1
39 8051_TX
PCIE_IRX_WANTX_N1
PCIE_IRX_WANTX_P1
23 PCIE_IRX_WANTX_N1
23 PCIE_IRX_WANTX_P1
R24
1
@
2
PCIE_ITX_WANRX_N1_C
PCIE_ITX_WANRX_P1_C
23 PCIE_ITX_WANRX_N1_C
23 PCIE_ITX_WANRX_P1_C
0_0402_5%~D
JCLIP2
1
2
3
4
GND1
GND2
GND3
GND4
+3.3V_RUN
38 WLAN_RADIO_DIS#
WLAN_RADIO_DIS#_R
D2003
RB751S40T1_SOD523-2~D
TYCO_1775837-1~D
C
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
Mini-Card Latch
+1.5V_RUN
+SIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
WWAN_RADIO_DIS#
PLTRST#
WWAN_RADIO_DIS# 23
PLTRST#
10,21,23,28
+3VLAN
ICH_SMBCLK
ICH_SMBDATA
ICH_SMBCLK 6,23,28
ICH_SMBDATA 6,23,28
USB_HUBP2_DUSB_HUBP2_D+
8051_RX
39
TYCO_1775838-1~D
GND1
USBP0USBP0+
LED_WLAN_OUT#
1
2
@ R1603
0_0402_5%~D
2 @
D5
NNCD5.6LG~D
B
+3VLAN
+1.5V_RUN
+3.3V_RUN
23
23
LED_WLAN_OUT# 43
BT_ACTIVE
40,43
C166
0.047U_0402_16V4Z~D
C440
0.047U_0402_16V4Z~D
C136
33P_0402_50V8J~D
C131
22U_0805_6.3VAM~D
TYCO_1775838-1~D
PWR
Rail
+3VLAN
C60
33P_0402_50V8J~D
GND2
54
ICH_SMBCLK 6,23,28
ICH_SMBDATA 6,23,28
USBP0USBP0+
SUYIN_254020MA006G502ZL~D
+1.5V_RUN
Voltage
Tolerance
Primary Power
Peak
Normal
+3.3V
+-9%
1000
750
+3.3Vaux
+-9%
330
250
+1.5V
+-5%
500
375
C1787
0.047U_0402_16V4Z~D
53
10,21,23,28
NC
UIM_VPP
UIM_DATA
C1786
0.047U_0402_16V4Z~D
PCIE_ITX_WLANRX_N2_C
PCIE_ITX_WLANRX_P2_C
23 PCIE_ITX_WLANRX_N2_C
23 PCIE_ITX_WLANRX_P2_C
PLTRST#
+3VLAN
NC
4
5
6
C1785
0.1U_0402_16V4Z~D
WLAN_RADIO_DIS#_R
PLTRST#
GND
VPP
I/O
C143
330U_V_6.3VM_R25~D
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
23 PCIE_IRX_WLANTX_N2
23 PCIE_IRX_WLANTX_P2
+1.5V_RUN
6 CLK_PCIE_MINI2#
6 CLK_PCIE_MINI2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
VCC
RST
CLK
1
1
2 0_0402_5%~D
2 0_0402_5%~D
1
2
3
C55
33P_0402_50V8J~D
R1609
R1610
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
C56
33P_0402_50V8J~D
28,38 PCIE_WAKE#
40 COEX2_WLAN_ACTIVE
40 COEX1_BT_ACTIVE
6 MINI2CLK_REQ#
JSIM
UIM_RESET
UIM_CLK
JMINI2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+3.3V_RUN
+3.3V_RUN
Wire less LAN
+SIM_PWR
C57
33P_0402_50V8J~D
C1747
1U_0603_10V4Z~D
Mini Card
2 @
Aux Power
Normal
250 (Wake enable)

5 (Not wake enable)
C463
0.047U_0402_16V4Z~D
C117
0.047U_0402_16V4Z~D
C159
0.1U_0402_16V4Z~D
+3.3V_RUN
A
1
2
2
C168
0.047U_0402_16V4Z~D
C464
0.047U_0402_16V4Z~D
C170
0.1U_0402_16V4Z~D
C77
0.1U_0402_16V4Z~D
C1790
4.7U_0603_6.3V4Z~D
NA
Title
Mini Card
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
34
of
70
+5V_RUN
+VCC_QBUF
RB751S40T1_SOD523-2~D
2
D
QUIETE#
U194
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD8
PCI_AD9
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
NC1
A1
A2
A3
A4
A5
A6
A7
A8
GND1
NC2
A9
A10
A11
A12
A13
A14
A15
A16
GND2
NC3
A17
A18
A19
A20
A21
A22
A23
A24
GND3
NC4
A25
A26
A27
A28
A29
A30
A31
A32
GND4
VCC4
OE1#
B1
B2
B3
B4
B5
B6
B7
B8
VCC3
OE2#
B9
B10
B11
B12
B13
B14
B15
B16
VCC2
OE3#
B17
B18
B19
B20
B21
B22
B23
B24
VCC1
OE4#
B25
B26
B27
B28
B29
B30
B31
B32
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
R1332
10K_0402_5%~D
2
+VCC_QBUFD
RB751S40T1_SOD523-2~D
C1823
0.47U_0402_16V4Z~D
D27
C1822
0.1U_0402_16V4Z~D
D26
C1325
0.1U_0402_16V4Z~D
1
2
DOCK_AD31
DOCK_AD30
DOCK_AD29
DOCK_AD28
DOCK_AD27
DOCK_AD26
DOCK_AD25
DOCK_AD24
DOCK_AD23
DOCK_AD22
DOCK_AD21
DOCK_AD20
DOCK_AD19
DOCK_AD18
DOCK_AD17
DOCK_AD16
DOCK_AD15
DOCK_AD14
DOCK_AD13
DOCK_AD12
DOCK_AD11
DOCK_AD10
DOCK_AD8
DOCK_AD9
DOCK_AD7
DOCK_AD6
DOCK_AD5
DOCK_AD4
DOCK_AD3
DOCK_AD2
DOCK_AD1
DOCK_AD0
PI5C34X2245BE_BQSOP80~D
DOCK_AD[0..31] 36
21,30 PCI_AD[0..31]
+3.3V_RUN
C1824
0.47U_0402_16V4Z~D
1
2
2
3
4
5
6
7
8
9
10
11
21,30
21,30
21
21,30
21,30
21
21,30
PCI_TRDY#
PCI_STOP#
PCI_PLOCK#
PCI_DEVSEL#
PCI_PERR#
PCI_SERR#
PCI_PAR
PCI_TRDY#
PCI_STOP#
PCI_PLOCK#
PCI_DEVSEL#
PCI_PERR#
PCI_SERR#
PCI_PAR
PCI_AD24
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
46
45
44
43
42
41
40
39
38
37
DOCK_PIRQA#
DOCK_GNT0#
DOCK_PCIRST#
DOCK_SPME#
DOCK_C_BE3#
DOCK_C_BE2#
DOCK_C_BE1#
DOCK_C_BE0#
DOCK_IRDY#
DOCK_FRAME#
14
15
16
17
18
19
20
21
22
23
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
34
33
32
31
30
29
28
27
26
25
DOCK_TRDY#
DOCK_STOP#
DOCK_LOCK#
DOCK_DEVSEL#
DOCK_PERR#
DOCK_SERR#
DOCK_PAR
DOCK_PCI_IDSEL
1
13
NC1
NC2
GND1
GND2
12
24
2
DOCK_PIRQA# 36
DOCK_GNT0# 36
DOCK_PCIRST# 36
DOCK_SPME# 36
DOCK_C_BE3# 36
DOCK_C_BE2# 36
DOCK_C_BE1# 36
DOCK_C_BE0# 36
DOCK_IRDY# 36
DOCK_FRAME# 36
21 PCI_PIRQA#
21,36 PCI_GNT0#
21,30,31 PCI_RST#
30,38 SYS_PME#
21,30 PCI_C_BE3#
21,30 PCI_C_BE2#
21,30 PCI_C_BE1#
21,30 PCI_C_BE0#
21,30,36 PCI_IRDY#
21,30,36 PCI_FRAME#
C1329
0.1U_0402_16V4Z~D
36 DOCK_PCI_EN#
38 QBUFEN#
DOCK_PCI_EN#
INA
QBUFEN#
INB
U185
PCI_PIRQA#
PCI_GNT0#
PCI_RST#
SYS_PME#
PCI_C_BE3#
PCI_C_BE2#
PCI_C_BE1#
PCI_C_BE0#
PCI _IRDY#
PCI_FRAME#
VCC1
VCC2
1
R1335
100K_0402_5%~D
QUIETE#
OE1
OE2
C1328
0.1U_0402_16V4Z~D
1
2
36
48
SN74AHC1G32DCKR_SC70-5~D
47
35
U184
QUIETE#
DOCK_TRDY# 36
DOCK_STOP# 36
DOCK_LOCK# 36
DOCK_DEVSEL# 36
DOCK_PERR# 36
DOCK_SERR# 36
DOCK_PAR 36
DOCK_PCI_IDSEL 36
PI5C162861BE_BQSOP48~D
Title
5
DOCKING BUFFER
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
35
of
70
+DOCK_PWR_SRC
DVI_TX4DVI_TX4+
D
DVI_TX3+
DVI_TX3-
44
PS_ID_IN
DVI_TX5+
DVI_TX5-
53
53
53
53
53
53
DVI_TX2+
DVI_TX2DVI_TX1+
DVI_TX1DVI_TX0+
DVI_TX0DOCK_AD31
6 CLK_DOCKPCI_33M
35 DOCK_PIRQA#
39 DOCK_SMB_CLK
39 DOCK_SMB_DAT
39 CLK_DOCK
39
DAT_DOCK
CLK_DOCKPCI_33M
S15
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
45
S45
47
48
49
50
51
52
53
54
55
S47
S48
S49
S50
S51
S52
S53
S54
S55
R1334
33_0402_5%~D
15
@
C1327
22P_0402_50V8J~D
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
S125
S126
S127
S128
125
126
127
128
M136
136
DOCK_RING
VGA_RED
VGA_BLU
D_SERIRQ 38
DOCK_PCI_IDSEL 35
38
38
38
D_LAD1
D_LAD2
D_LAD3
D_LAD1
D_LAD2
D_LAD3
D_DLRQ1# 38
D_LFRAME# 38
DOCK_AD1
DOCK_AD0
DOCK_AD3
DOCK_AD4
DOCK_AD7
DVI_SCLK 52
DVI_SDATA 52
DVI_DETECT 52
DOCK_AD8
DOCK_C_BE0#
DOCK_AD9
DOCK_AD10
DOCK_AD11
DOCK_C_BE0# 35
DOCK_AD14
DOCK_AD15
35 DOCK_PAR
35 DOCK_SERR#
35 DOCK_LOCK#
DOCK_DEVSEL# 35
DOCK_IRDY# 35
35 DOCK_FRAME#
35 DOCK_C_BE2#
DOCK_C_BE2#
DOCK_AD16
DOCK_AD19
DOCK_AD20
DOCK_AD22
DOCK_AD23
DOCK_AD24
DOCK_AD27
DOCK_AD28
DOCK_AD30
DOCK_AD29
35 DOCK_SPME#
DOCK_GNT0# 35
USBP7USBP7+
USBP7USBP7+
TV_C
23
23
35 DOCK_PCI_EN#
26 SPDIF_DOCK
DOCK_SMB_INT# 39
CLK_KBD 39
DAT_KBD 39
SPDIF_DOCK
DOCK_LED_10#
DOCK_LED_100#
29 DOCK_LED_10#
29 DOCK_LED_100#
DOCK_OWNS_PCI
+2.5VLAN
C1297
0.01U_0402_16V7K~D
1
2
C1298
0.01U_0402_16V7K~D
2
1
C1299
0.01U_0402_16V7K~D
1
2
C1300
0.01U_0402_16V7K~D
2
1
29
29
29
29
29
29
29
29
DOCK_TIP
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172
S173
S174
S175
S176
S177
S178
S179
S180
S181
S182
S183
S184
S185
S186
S187
S188
S189
S190
193
194
195
196
S193
S194
S195
S196
204
TYCO_2-1612415-1~D
JDOCKC
S205
S206
S207
S208
S209
S210
S211
S212
S213
S214
S215
S216
S217
S218
205
206
207
208
209
210
211
212
213
214
215
216
217
218
S220
220
S222
S223
S224
S225
S226
S227
S228
S229
S230
S231
S232
S233
S234
S235
S236
S237
S238
S239
S240
S241
S242
S243
S244
S245
S246
S247
S248
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
S250
250
S252
S253
S254
S255
S256
S257
S258
S259
252
253
254
255
256
257
258
259
DOCK_DET#
DAT_DDC2 20,52
CLK_DDC2
20,52
HSYNC_R
VSYNC_R
HSYNC_R
VSYNC_R
20
20
D_CLKRUN# 38
D_LAD0 38
DOCK_SIO_ALERT# 38
D_LAD0
DOCK_SIO_ALERT#
DOCK_AD2
DOCK_AD5
DOCK_AD6
DOCK_AD12
DOCK_AD13
DOCK_C_BE1#
DOCK_PERR#
DOCK_STOP#
DOCK_TRDY#
DOCK_PERR# 35
DOCK_STOP# 35
DOCK_TRDY# 35
DOCK_C_BE3#
DOCK_AD25
DOCK_AD26
PCI_REQ0#
DOCK_PCIRST#
TV_CVBS
TV_Y
DOCK_LAN_ACTLED_YEL#
R_PIDEACT
DOCK_LAN_ACTLED_YEL# 29
R_PIDEACT
43
Z3306
TV_CVBS
20,52
VGA_RED
20,52
VGA_GRN
VGA_RED
DOCK_RING
VGA_GRN
DOCK_TIP
MH8
MH9
SHLD5
SHLD7
MH11
MH10
SHLD6
SHLD8
MH12
MH13
MH15
MH13
MH15
MH14
MH16
MH14
MH16
TV_C
1
R1790
1
R1791
1
R1792
TV_CVBS
TV_Y
2
75_0402_1%
2
75_0402_1%
2
75_0402_1%
DOCK_AD[0..31] 35
+DOCK_PWR_SRC
1
C1821
1000P_0402_50V7K~D
1
IN1
C1817
JW IRE
1 1
2 2
3 3
4 4
Z3308
+3.3V_SUS
0.1U_0402_16V4Z~D
1
VGA_BLU
VGA_BLU
MH7
SHLD4
no power dock
2
1
U180
IN2
TV_CVBS
MOLEX_53398-0471~D
20,52
DOCK_PWR_EN
52
SHLD3
SHLD2
Q60
3
38 DOCK_PWR_EN
SHLD1
3
2
TV_Y
TV_Y
2
1
2
1
DOCK_DET#
PWR_SRC
D
self power dock
Q61
2N7002W-7-F_SOT323~D
2
G
52
MH6
NB
TV_C
TV_C
MH2
@ D25
SM05TCT_SOT23-3~D
3
52
MH5
MH2
Z3307
O
3
R1324
100K_0402_5%~D
U179 0.1U_0402_16V4Z~D
MH1
R1323
100K_0402_5%~D
IN2
IN2
P8
DOCK_DC_IN 44
29,38
R1325
100K_0402_5%~D
1
2
IN1
DOCK_OWNS_PCI
PCI_FRAME# 2
P7
P8
DOCK_DC_IN
G_DOC_PWRSRC
DOCKED
PCI _IRDY#
21,30,35 PCI_IRDY#
21,30,35 PCI_FRAME#
R1322
100K_0402_5%~D
+5V_ALW
IN1
P7
P4
MH1
+3.3V_RUN
C1819
1
2
1
2
3
8
7
6
5
Z3305
C1818
0.1U_0402_16V4Z~D
U178
R1321
100K_0402_5%~D
+3.3V_ALW
C1301
0.1U_0603_50V4Z~D
P3
P4
Q59
FDS4435_NL_SO8~D
C1820
0.1U_0402_16V4Z~D
U177
NC7SZ04P5X_NL_SC70-5~D
P3
DOCK_AD0
DOCK_AD1
DOCK_AD2
DOCK_AD3
DOCK_AD4
DOCK_AD5
DOCK_AD6
DOCK_AD7
DOCK_AD8
DOCK_AD9
DOCK_AD10
DOCK_AD11
DOCK_AD12
DOCK_AD13
DOCK_AD14
DOCK_AD15
DOCK_AD16
DOCK_AD17
DOCK_AD18
DOCK_AD19
DOCK_AD20
DOCK_AD21
DOCK_AD22
DOCK_AD23
DOCK_AD24
DOCK_AD25
DOCK_AD26
DOCK_AD27
DOCK_AD28
DOCK_AD29
DOCK_AD30
DOCK_AD31
PCI_REQ0# 21
DOCK_PCIRST# 35
M204
+3.3V_RUN
5
P
3
NC
A
G
PCI_GNT0# 2
P6
DOCK_C_BE3# 35
+PWR_SRC
21,35 PCI_GNT0#
P5
P6
TYCO_2-1612415-1~D
TYCO_2-1612415-1~D
P5
P2
DOCK_AD17
DOCK_AD18
DOCK_AD21
+3.3V_RUN
P1
P2
DOCK_C_BE1# 35
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
P1
C1827
1000P_0402_50V7K~D
DVI_CLKDVI_CLK+
JDOCKB
DOCK_DET#
VGA_GRN
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122
C291
0.1U_0603_50V4Z~D
53
53
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
C1296
0.1U_0603_50V4Z~D
JDOCKA
1
2
3
4
5
6
7
8
9
10
11
12
13
R1326
0_0402_5%~D
DOCKING CONN.
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
36
of
70
+3.3V_SUS
C1255
0.47U_0402_16V4Z~D
1
2
+3.3V_SUS
19,39,41,42,46,47,48,58 RUN_ON
23
FORCEON
22
FORCEOFF#
T1OUT
T2OUT
T3OUT
R1IN
R2IN
R3IN
R4IN
R5IN
9
10
11
4
5
6
7
8
TXD0#
RTS0
DTR0
DCD0
R I0
RXD0#
CTS0
DSR0
INVALID#
21
GND
25
10
11
C272
270P_0402_50V7K~D
C2T1IN
T2IN
T3IN
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
R2OUTB
C262
270P_0402_50V7K~D
2
14
13
12
19
18
17
16
15
20
3243V-
1
6
2
7
3
8
4
9
5
C260
270P_0402_50V7K~D
3243C2TXD0
RTS0#
DTR0#
DCD0#
RI0#
RXD0
CTS0#
DSR0#
V-
DCD0
DSR0
RXD0#
RTS0
TXD0#
CTS0
DTR0
R I0
C1257
0.47U_0402_16V4Z~D
1
2
C259
270P_0402_50V7K~D
C1C2+
3243V+
C258
270P_0402_50V7K~D
24
1
27
C257
270P_0402_50V7K~D
3243C13243C2+
JSIO
V+
C256
270P_0402_50V7K~D
TXD0
RTS0#
DTR0#
DCD0#
RI0#
RXD0
CTS0#
DSR0#
C1+
C238
270P_0402_50V7K~D
38
38
38
38
38
38
38
38
U173
28
VCC
C1258
0.47U_0402_16V4Z~D
1
2
26
2
C1256
0.1U_0402_16V4Z~D
3243C1+
1
2
C1254
0.1U_0402_16V4Z~D
DCD0
DSR0
RXD0#
RTS0F
TXD0F#
CTS0
DTR0F
RI0
GND0
GND1
GND2
SUYIN_070921MR009S203BR~D
MAX3243ECUI+T_TSSOP28~D
C
FIR
+3.3V_RUN
R1287
47_0805_5%~D
2
1 IRVCC
+3.3V_RUN
U175
VCC
SD_MODE
IRED_CATHODE
IRTX
IRED_ANODE
RXD
MODE
GND
TXD
IRRX
TFDU6102-TR3_8P~D
C1259
4.7U_0603_6.3V4Z~D
R1291
10K_0402_5%~D
2
1
38
C1261
4.7U_0603_6.3V4Z~D
SD_MODE
C1260
0.1U_0402_16V4Z~D
D_IRMODE
R1290
10K_0402_5%~D
2
1
38
R1289
0_0402_5%~D
1
2
38
Title
Serial & FIR

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
37
of
70
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
1
R1620
1
R1361
DOCK_SIO_ALERT#
2
10K_0402_5%~D
PCIE_WAKE#
2
10K_0402_5%~D
1
R1363
1
R1369
SBAT_ALARM#
2
10K_0402_5%~D
PBAT_ALARM#
2
10K_0402_5%~D
1
R1362
SYS_PME#
2
10K_0402_5%~D
1
C1750
0.1U_0402_16V4Z~D
1
C1751
0.1U_0402_16V4Z~D
1
C1752
0.1U_0402_16V4Z~D
C1753
0.1U_0402_16V4Z~D
45 SBAT_ALARM#
45 PBAT_ALARM#
28 LAN_TPM_EN#
28 LAN_LOW_PWR
26 AUDIO_AVDD_ON
26 BEEP
25 BAY_MODPRES#
31 SC_DET#
23 ICH_PCIE_WAKE#
21 ICH_PME#
18 THERMTRIP_SIO
GPIOD[1]
GPIOD[2]
63
28
29
30
31
GPIOD[3]/VBUS_DET
GPIOD[4]/OCS1_N
GPIOD[5]/OCS2_N
GPIOD[6]/OCS3_N
GPIOD[7]/OCS4_N
BAY_MODPRES#
SC_DET#
32
33
GPIOH[6]
GPIOH[7]
ICH_PCIE_WAKE#
ICH_PME#
THERMTRIP_SIO
88
89
90
91
92
93
94
95
GPIOG[0]
GPIOG[1]
GPIOG[2]
GPIOG[3]
GPIOG[4]
GPIOG[5]
GPIOG[6]
GPIOG[7]
CPU_PROCHOT#
HDDC_EN#
MODC_EN#
SYSOPT1/GPIOH[2]
SYSOPT0/GPIOH[3]
109
110
111
112
GPIOF[7]
GPIOF[6]
GPIOF[5]
GPIOF[4]
IRTX
IRRX
113
114
IRTX
IRRX
D_IRMODE
USB_SIDE_EN#
USB_BACK_EN#
115
116
117
118
GPIOF[3]/IRMODE/IRRX3B
GPIOF[2]/IRTX2
GPIOF[1]/IRRX2
GPIOF[0]/IRMODE/IRRX3A
BID3
BID2
BID1
BID0
37
37
IRTX
IRRX
37
D_IRMODE
32 USB_SIDE_EN#
32 USB_BACK_EN#
R405
10K_0402_5%~D
1
2
R94
10K_0402_5%~D
1
2
R95
10K_0402_5%~D
1
2
R404
10K_0402_5%~D
1
2
@
CLKI (14.318 MHz)
64
CLK_SIO_14M
VSS
96
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLK_RUN#
DLDRQ1#
DSER_IRQ
55
53
50
48
43
38
45
40
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLRQ1#
D_SERIRQ
C67
4.7U_0603_6.3V4Z~D
C1757
0.1U_0402_16V4Z~D
C1756
0.1U_0402_16V4Z~D
C1451
15P_0402_50V8J~D
1
2
2
LPC_LAD[0..3] 22,28,39
LPC_LFRAME# 22,28,39
PLTRST2# 21,39
CLK_PCI_5018 6
CLKRUN# 23,30,39
LPC_LDRQ0# 22
LPC_LDRQ1# 22
IRQ_SERIRQ 23,28,30,39
Y1
24MHZ_12PF_1BX24000CE1B~D
C1452
1
2
15P_0402_50V8J~D

CLK_PCI_5018
CLK_SIO_14M 6
R134
22_0402_5%~D
D_LAD0 36
D_LAD1 36
D_LAD2 36
D_LAD3 36
D_LFRAME# 36
D_CLKRUN# 36
D_DLRQ1# 36
D_SERIRQ 36
RUNPWROK
OUT65
105
WLAN_RADIO_DIS#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
11
17
23
36
51
72
87
121
128
PWRGD
1
@ 100K_0402_5%~D
RUNPWROK
1
C144
22P_0402_50V8J~D
39,42,49,54
WLAN_RADIO_DIS# 34
BID3 BID2 BID1 BID0 REV
BID0
R419
2 @ 10K_0402_5%~D
BID1
R107
10K_0402_5%~D
BID2
R108
@10K_0402_5%~D
BID3
R418
10K_0402_5%~D
R1440
R66
0_0402_5%~D
1
ECE5018_XTAL1
ECE5018_XTAL2
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLTRST2#
CLK_PCI_5018
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ
ECE5018 A0_VTQFP128~D
+3.3V_ALW
LAN_TPM_EN#
R1599
10K_0402_5%~D
Route RBIAS and its

return to pin 128 very
short.
REG_EN
54
52
49
47
42
41
56
37
46
44
39
DLPC
106
107
41 HDDC_EN#
41 MODC_EN#
+3.3V_ALW
RBIAS
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
LPC
C1755
0.1U_0402_16V4Z~D
34
57
85
108
61
62
LAN_TPM_EN#
LAN_LOW_PWR
AUDIO_AVDD_ON
BEEP
FPBACK_EN
19 FPBACK_EN
7 CPU_PROCHOT#
VCC1
VCC1
VCC1
VCC1
SBAT_ALARM#
PBAT_ALARM#
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
DOCK_HP_MUTE#
HP_NB_SENSE
126
123
122
2
R1645
2
R1646
2
R1437
18 5V_CAL_SIO2#
26 DOCK_HP_MUTE#
26,27 HP_NB_SENSE
CLK
ATEST
D_SERIRQ
+3.3V_ALW
35
XTAL1/CLKIN
XTAL2
D_CLKRUN#
<---Blue Tooth
26 SPDIF_SHDN
49 IMVP6_PROCHOT#
18 5V_CAL_SIO#
1 0_0402_5%~D
SPDIF_SHDN
IMVP6_PROCHOT#
5V_CAL_SIO#
<---Smart Card
TEST
+3.3V_RUN
<---Mini1 WWAN
@ R55
GPIO
C1758
4.7U_0603_6.3V4Z~D
D_DLRQ1#
125
124
120
86
127
TEST_PIN is a No Connect
TEST_PIN
28 LOM_CABLE_DETECT
1
C145
22P_0402_50V8J~D
@
NB_MUTE
27 NB_MUTE
R135
22_0402_5%~D
@
GPIOB[0]/INIT#
GPIOB[1]/SLCTIN#
GPIOC[2]/SCLT
GPIOC[3]/PE
GPIOC[4]/BUSY
GPIOC[5]/ACK#
GPIOC[6]/ERROR#
GPIOC[7]/ALF#
GPIOD[0]/STROBE#
GPIOC[1]/PD7
GPIOC[0]/PD6
GPIOB[7]/PD5
GPIOB[6]/PD4
GPIOB[5]/PD3
GPIOB[4]/PD2
GPIOB[3]/PD1
GPIOB[2]/PD0
<---PC Card Bay
CLK_SIO_14M
65
66
67
68
69
70
71
73
74
75
76
77
78
79
80
81
82
VDDA33PLL
VDDA18PLL
VDD18
CAP_LDO
RBIAS
30
30
34
34
31
31
40
40
R1600
MDC_RST_DIS#
ADAPT_OC
33 MDC_RST_DIS#
50 ADAPT_OC
GPIOE[0]/RXD
GPIOE[1]/TXD
GPIOE[2]/RTS#
GPIOE[3]/DSR#
GPIOE[4]/CTS#
GPIOE[5]/DTR#
GPIOE[6]/RI#
GPIOE[7]/DCD#
USBP1+ 23
USBP1- 23
USB_HUBP1+
USB_HUBP1USB_HUBP2+
USB_HUBP2USB_HUBP3+
USB_HUBP3USB_HUBP4+
USB_HUBP4-
L104
1
2
1
1
2
3
4
5
84
83
6
USBP1+
USBP1USB_HUBP1+
USB_HUBP1USB_HUBP2+
USB_HUBP2USB_HUBP3+
USB_HUBP3USB_HUBP4+
USB_HUBP4-
1M_0402_5%~D
USB
9
10
13
12
15
16
19
18
21
22
RI0#
USBDP0
USBDN0
USBDP1
USBDN1
USBDP2
USBDN2
USBDP3
USBDN3
USBDP4
USBDN4
119
C1762
4.7U_0603_6.3V4Z~D
DCD0#
RXD0
TXD0
RTS0#
DSR0#
CTS0#
DTR0#
RI0#
DCD0#
VCC1
C1761
4.7U_0603_6.3V4Z~D
37
GPIOH[0]
GPIOH[1]
GPIOH[4]
GPIOH[5]
BC_INT#
BC_DAT
BC_CLK
ECE5018
+3.3V_ALW
C1754
0.1U_0402_16V4Z~D
SIO_VDDA
8
14
20
37
RXD0
TXD0
RTS0#
DSR0#
CTS0#
DTR0#
DOCKED
24
QBUFEN#
25
DOCK_PWR_EN
26
SNIFFER_WIRELESS_ON/OFF# 27
BC_INT
58
BC_DAT
59
BC_CLK
60
VDDA33
VDDA33
VDDA33
R1598
12K_0402_1%~D
R1171
10K_0402_5%~D
37
37
37
37
37
37
GPIOA[0]
GPIOA[1]
GPIOA[2]
GPIOA[3]
GPIOA[4]
GPIOA[5]
GPIOA[6]
GPIOA[7]
29,36 DOCKED
35 QBUFEN#
36 DOCK_PWR_EN
43 SNIFFER_WIRELESS_ON/OFF#
39 BC_INT
+3.3V_SUS
39
BC_DAT
39 BC_CLK
97
98
99
100
101
102
103
104
C1760
0.1U_0402_16V4Z~D
2 DOCK_HP_MUTE#
100K_0402_5%~D
1
@ R87
PCIE_WAKE#
SYS_PME#
DOCK_SIO_ALERT#
PBAT_PRES#
SBAT_PRES#
CHG_PBATT
CHG_SBATT
SBAT_LOW
C1759
4.7U_0603_6.3V4Z~D
2 IMVP6_PROCHOT#
100K_0402_5%~D
1
R34
U215
28,34 PCIE_WAKE#
30,35 SYS_PME#
36 DOCK_SIO_ALERT#
45 PBAT_PRES#
45,51 SBAT_PRES#
51 CHG_PBATT
51 CHG_SBATT
51 SBAT_LOW
+3.3V_RUN
0
0
0
0
0
0
0
0
0
0
1
1
4
0
0
1
1
0
0
0
1
0
1
0
1
M00
M01
X00
X01
X02
X03
Title
ECE5018
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
38
of
70
+RTC_CELL
1
+3.3V_ALW
+RTC_CELL
R119
100K_0402_5%~D
2
2
1
87
86
85
BC_CLK
BC_DAT
BC_INT
122
124
XTAL1
XTAL2
123
XOSEL
AGND
MEC5004_XTAL1
2
1
R1785
0_0402_5%~D
MEC5004_XOSEL
1 125
R1606
10K_0402_5%~D
32 KHz Clock
Sam e as Laguna
48
47
46
45
nEC_SCI/SPDIN2
SGPIO45/MSDATA/SPDOUT2
SGPIO44/MSCLK/SPCLK2
SGPIO46/SPDIN1
SGPIO47/SPDOUT1
SGPIO31/TIN1/SPCLK1
66
55
54
69
68
67
PS_ID
VGA_IDENTIFY
LID_CL_SIO#
DEBUG_ENABLE#
SYSOPT0/SGPIO32/LPC_TX
SYSOPT1/SGPIO33/LPC_RX
70
71
HOST_DEBUG_TX
HOST_DEBUG_RX
SGPIO40
SGPIO41
SGPIO42
SGPIO43
91
90
89
4
CAP_LED#
SCRL_LED#
NUM_LED#
SPI_CS_L#
1
0_0402_5%~D
DOCK_SMB_INT#
SFPI_EN
PS_ID_DISABLE#
BREATH_LED
nFWP
84
FW P#
GPIOA3/WINDMON
73
SIO_BIAPWM
GPIO83/32KHZ_OUT
117
PWRGD
49
nRESET_OUT/OUT6
53
TEST_PIN
72
C1768
2
1
2
1
2
PBAT_SMBDAT
LID_CL#
40
PBAT_SMBCLK
C482
0.047U_0402_16V4Z~D
+3.3V_SUS
R1635
10K_0402_5%~D
2
1
ATF_INT#
44
SPI_CS_R#
DOCK_SMB_INT# 36
+3.3V_ALW
+3.3V_ALW
1
43
43
43
T6
T7
CAP_LED#
SCRL_LED#
NUM_LED#
2
R112
PAD~D
PAD~D
R470
100K_0402_5%~D
R475
10K_0402_5%~D
@
PS_ID_DISABLE# 44
VGA_IDENTIFY
18
SFPI_EN
1 = Discrete Gfx
Bat2 = Amber LED

Bat1 = Green LED
R474
10K_0402_5%~D
0 = UMA
2
@ R63
RESET_OUT#
1
0_0402_5%~D
BIA_PWM
RUNPWROK
38,42,49,54
RESET_OUT#
42
20mA drive pins

19,52
1=Flash Recovery Enabled

0=Flash Recovery Disabled
2
+3.3V_SUS
MEC5004_VTQFP128~D
R1579
10K_0402_5%~D
L105
1
2
+3.3V_ALW
+3.3V_ALW
23
R127
1
SPI_CS#
47_0402_5%~D
SPI_CS_R#
2
ICHI_FDATAOUT
1
2
U213
R1788
47_0402_5%~D
1
2
3
4
S#
Q
W#
VSS
VCC
HOLD#
C
D
8
7
6
5
R1753
10K_0402_5%~D
FC LK
ICHO_FDATAIN
M25P80-VMW6TP_SO8~D
Flash ROM
2
1
Work Around
low=write protected
150 MIL SO8
R139
100K_0402_5%~D
2
+3.3V_ALW
@ U217
4.7U_0603_6.3V6M~D
1
2
C22
@
R23
1
1
2
3
4
S#
Q
W#
VSS
VCC
HOLD#
C
D
8
7
6
5
M25P80-VMW6TP_SO8~D
A
200 MIL SO8
@
2
E
B
D2002
@
@
Q19
RB751S40T1_SOD523-2~D
PMST3906_SOT323-3~D
@
1
R25
A LWON 1
R104 @
10K_0402_5%~D
2
1
2
Flash write protect bottom 4K

of internal bootblock flash
R97 @
10K_0402_5%~D
LID_CL#
2
10K_0402_5%~D
2
10K_0402_5%~D
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
2
4.7K_0402_5%~D
2
4.7K_0402_5%~D
+3.3V_SUS
SBAT_SMBCLK
LID_CL_SIO#
R1605
10K_0402_5%~D
PS_ID
ATF_INT#
FW P#
SBAT_SMBDAT
R473
10_0402_5%~D
2
1
R138
100K_0402_5%~D
@
R102
100K_0402_5%~D
C1449
22P_0402_50V8J~D
1
R106
1
R105
1
R444
1
R131
1
R449
1
R447
CLK_SMB
R482
1M_0402_5%~D
0_0402_5%~D
Y2
32.768K_12.5PF_Q13MC30610003~D
4
1
+3.3V_ALW
DAT_SMB
SIO_EXT_SMI# 23
BAT2_LED#
43
BAT1_LED#
43
RUNPW ROK
R110 1
2
R100
2
R1618
SIO_EXT_SCI# 23
0.1U_0402_16V4Z~D
C1450
22P_0402_50V8J~D
MEC5004_XTAL2
+5V_ALW
SIO_EXT_SMI#
BAT2_LED#
BAT1_LED#
1
8.2K_0402_5%~D
1
8.2K_0402_5%~D
1
10K_0402_5%~D
2
R99
ATF_INT#
DOCK_SMB_DAT
43
C46
1U_0603_10V4Z~D
+3.3V_ALW
BREATH_LED 43
SIO_EXT_SCI#
1
100K_0402_5%~D
DOCK_SMB_INT#
FAN1_TACH 18
52
OUT7/nSMI
nPWR_LED
nBAT_LED
MEC5004_XTAL1
FAN1_TACH
SNIFFER_LED_OFF# 43
POWER_SW_IN1#
2
R1637
DOCK_SMB_CLK
PBAT_SMBCLK 45,50
PBAT_SMBDAT 45,50
DOCK_SMB_CLK 36
DOCK_SMB_DAT 36
VAUX_EN 41,46
SUS_ON 41,42,46
RUN_ON 19,37,41,42,46,47,48,58
ITP_DBRESET# 7,23
SBAT_SMBDAT 19,45
SBAT_SMBCLK 19,45
DAT_SMB 18
CLK_SMB 18
SIO_SLP_S5# 23
SIO_SLP_S3# 23
SIO_RCIN# 22
SIO_EXT_WAKE# 23
SNIFFER_LED_OFF#
11
115
114
GPIO96/TOUT1
L106
PBAT_SMBCLK
PBAT_SMBDAT
DOCK_SMB_CLK
DOCK_SMB_DAT
VAUX_EN
SUS_ON
RUN_ON
ITP_DBRESET#
SBAT_SMBDAT
SBAT_SMBCLK
DAT_SMB
CLK_SMB
SIO_SLP_S5#
SIO_SLP_S3#
S IO_RCIN#
SIO_EXT_WAKE#
SNIFFER#
1
2
3
SGPIO35
SGPIO36 (SFPI_EN)
SGPIO37
18,50,51
+RTC_CELL
R31
10K_0402_5%~D
1
2 SN IFFER#
FLCS0
FLCS1
BC_CLK
BC_DAT
BC_INT
38 BC_CLK
BC_DAT
38 BC_INT
MEC5004_XTAL2
109
110
FLCLK
FLDATAIN
FLDATAOUT
POWER_SW# 18,40
1
@
2
38
103
106
108
OUT2/PWM3
OUT9/PWM2
OUT11/PWM1
OUT10/PWM0
ACAV_IN
S NIFFER_PWR_SW#
LRESET#
PCICLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
SER_IRQ
HSTCLK
HSTDATAIN
HSTDATAOUT
43
42
41
46
R1604
10K_0402_5%~D
2
1
57
58
59
60
61
62
63
64
56
102
105
107
GPIO82/FAN_TACH3
GPIO16/FAN_TACH2
GPIO15/FAN_TACH1
PWR SW
GPIO94/IMCLK
GPIO95/IMDAT
KCLK
KDAT
EMCLK
EMDAT
GPIO20/PS2CLK/8051RX
GPIO21/PS2DAT/8051TX
SIO_PWRBTN#
BAT_SEL#
23 SIO_PWRBTN#
50
BAT_SEL#
75
76
77
78
79
80
81
82
FC LK
ICHI_FDATAOUT
ICHO_FDATAIN
R130
22_0402_5%~D
C134
22P_0402_50V8J~D
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_DOCK
DAT_DOCK
ICH_EC_SPI_CLK
ICHI_ECO_SPI_DATA
ICHO_ECI_SPI_DATA
23 ICH_EC_SPI_CLK
23 ICHI_ECO_SPI_DATA
23 ICHO_ECI_SPI_DATA
CLK_PCI_5004
SGPIO34/A20M
OUT5/KBRST
ALWON
23,30,38 CLKRUN#
92
50
VCC_PLL
LPC_LAD[0..3]
22,28,38 LPC_LAD[0..3]
SIO_A20GATE
SIO_THRM#
PLTRST2#
CLK_PCI_5004
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK RUN#
IRQ_SERIRQ
21,38 PLTRST2#
6 CLK_PCI_5004
22,28,38 LPC_LFRAME#
R1752 no stuff when doing

flash recovery
KSI7/GPIO19
KSI6/GPIO17
KSI5/GPIO10
KSI4/GPIO9
KSI3/GPIO8
KSI2/GPIO7
KSI1/GPIO6
KSI0/SGPIO30
8
7
6
5
93
94
95
96
111
112
9
10
97
98
99
100
104
DEBUG_ENABLE#
2
0_0402_5%~D
33
34
35
36
37
38
39
40
AB1B_CLK
AB1B_DATA
AB1A_CLK
AB1A_DATA
GPIO11/AB2A_DATA
GPIO12/AB2A_CLK
GPIO13/AB2B_DATA
GPIO14/AB2B_CLK
GPIO87/AB1C_DATA
GPIO86/AB1C_CLK
GPIO85/AB1D_DATA
GPIO84/AB1D_CLK
GPIO93/AB1F_DATA
GPIO92/AB1F_CLK
GPIO91/AB1E_DATA
GPIO90/AB1E_CLK
VSS_PLL
8051_RX
8051_TX
1
R1752
40
CLK_TP_SIO
40
DAT_TP_SIO
36 CLK_KBD
36
DAT_KBD
36 CLK_DOCK
36
DAT_DOCK
34 8051_RX
34 8051_TX
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
120
119
126
127
128
118
101
22 SIO_A20GATE
23 SIO_THRM#
R1636
10K_0402_5%~D
1
+3.3V_ALW
KSI[0..7]
+3.3V_ALW
R103
10K_0402_5%~D
2
1
+3.3V_ALW
40
VR_CAP
DAT_DOCK
2
4.7K_0402_5%~D
LPC Interface
1
R1608
A LWON
S NIFFER_PWR_SW#
POWER_SW_IN1#
POWER_SW_IN#
ACAV_IN
ALWON
POWER_ SW_IN2#
POWER_ SW_IN1#
POWER_ SW_IN0#
ACAV_IN
BGPO0
Host/8051
CLK_DOCK
2
4.7K_0402_5%~D
R125
10K_0402_5%~D
2 POWER_SW#
R30
100K_0402_5%~D
BC Bus
DAT_KBD
2
4.7K_0402_5%~D
1
R1607
KSO17/GPIOA1
KSO16/GPIOA0
GPIO5/KSO15
GPIO4/KSO14
KSO13/GPIO18
KSO12/OUT8
KSO11/GPIOC7
KSO10/GPIOC6
KSO9/GPIOC5
KSO8/GPIOC4
KSO7/GPIO3
KSO6/GPIO2
KSO5/GPIO1
KSO4/GPIO0
KSO3/GPIOC3
KSO2/GPIOC2
KSO1/GPIOC1
KSO0/GPIOC0
VSS
VSS
VSS
VSS
VSS
1
R469
12
13
14
15
16
17
18
19
20
23
24
25
27
28
29
30
31
32
22
CLK_KBD
2
4.7K_0402_5%~D
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
1
1
VCC0
+5V_RUN
Molex_53261
@ JDEBUG
+RTC_CELL
Keyboard and Mouse Interface
KSO[0..17]
26
51
74
88
113
40
5
4
3
2
1
POWER_SW_IN#
C1767
0.1U_0402_16V4Z~D
21
44
65
83
116
U216
D
5
4
3
2
1
1
C1766
0.1U_0402_16V4Z~D
VCC1
VCC1
VCC1
VCC1
VCC1
10K_0402_5%~D
1
R468
1
C1765
10U_0805_10V4Z~D
BAT_SEL#
121
1
C1764
0.1U_0402_16V4Z~D
1
C1763
0.1U_0402_16V4Z~D
R93
1
C105
0.1U_0402_16V4Z~D
C1739
0.1U_0402_16V4Z~D
R62
0_0402_5%~D
+3.3V_ALW
C130
1U_0603_10V4Z~D
0_0402_5%~D
1
2
G
C1769
4.7U_0603_6.3V4Z~D
2
Q20 @
2N7002W-7-F_SOT323~D

2
100K_0402_5%~D
Title
EMC5004
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
39
of
70
Touch PAD
+3.3V_RUN
JTPAD
KSO[0..17]
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
T31
BT_ACTIVE
SP_GND
SP_X
SP_Y
SP_V+
TP_CLK
TP_DATA
BT_RADIO_DIS# 23
PAD~D
34,43
1
C596
100P_0402_50V8J~D
BT_RADIO_DIS#
COEX3
+5V_RUN
FAN
Part Number
JST_BM30B-SRDS-G-TFC~D
C561
0.1U_0402_16V4Z~D
Description
DC28A000800
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
Speak
Part Number
Description
PK230003Q0L
SPK PACK ZJX 2.0W 4 OHM FG
SM CARD BODY
Part Number
Description
SP070007V0L S SOCKET TYCO 1770551-1

10P H5.9 SMART
PCMCIA BODY
Part Number
Description
PCMCIA TYCO
1759096-1
DC000001Q0L
KSI[0..7]
+5V_RUN
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
Bluetooth wire set cable
JKYBRD
POWER_SW#
R_NUM_LED#
R_CAP_LED#
R_SCRL_LED#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
KSO10
KSO11
KSO9
KSO14
KSO13
KSO15
KSO16
KSO12
KSO0
KSO2
KSO1
KSO3
KSO8
KSO6
KSO7
KSO4
KSO5
KSI0
KSI3
KSI1
KSI5
KSI2
KSI4
KSI6
KSI7
POWER_SW#
R_NUM_LED#
R_CAP_LED#
R_SCRL_LED#
KSO17
+3.3V_RUN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
1
2
Part Number
Description
H-CONN SET ZJX
MB-MDC
DC020003Z0L
DAT_TP_SIO 39
CLK_TP_SIO
MDC wire set cable
DAT_TP_SIO
1
2
L2
1
10P_0402_50V8J~D
C560
10P_0402_50V8J~D
C562
TP_CLK
4.7K_0402_5%~D
R517
L1
1
2
TP_DATA
Description
H-CONN SET ZJX
MB-B/T MODU
DC020004A0L
CLK_TP_SIO 39
T/P wire set cable

Part Number
C35
10P_0402_50V8J~D
Part Number
4.7K_0402_5%~D
R515
18,39
43
43
43
C564
0.1U_0402_16V4Z~D
C23
10P_0402_50V8J~D
39
+3.3V_ALW
1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
LID_CL#
C62
0.1U_0402_16V4Z~D
39
C63
0.047U_0402_16V4Z~D
USB_BIOUSB_BIO+
+3.3V_RUN
LID_CL#
C54
0.1U_0402_16V4Z~D
39
C570
31
31
33P_0402_50V8J~D
R518
10K_0402_5%~D
2
1
34 COEX2_WLAN_ACTIVE
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
G2
USB_HUBP4USB_HUBP4+
38 USB_HUBP438 USB_HUBP4+
COEX2_WLAN_ACTIVE
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
G1
R6
10K_0402_5%~D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
34 COEX1_BT_ACTIVE
DC020004T0L
Description
H-CONN SET ZJX
MB-TP
LVDS cable
Part Number
DC020003Y0L
Description
H-CONN SET ZJX
MB-LCD 14 WXGA+
RTC BATT
Part Number
GC20323MX00
35
36
37
38
39
40
35
36
37
38
39
40
Description
BATT CR2032 3V
220MAH MAXELL
SP_GND
SP_X
SP_V+
SP_Y
Power Switch
GND
GND
41
42
POWER_SW#
1
@ C1802
100P_0402_50V8J~D
PWR_SW
@SHORT PADS~D
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
C1789
100P_0402_50V8J~D
C39
100P_0402_50V8J~D
C3
100P_0402_50V8J~D
C4
100P_0402_50V8J~D
C5
100P_0402_50V8J~D
C6
100P_0402_50V8J~D
C7
100P_0402_50V8J~D
100P_0402_50V8J~D
C8
100P_0402_50V8J~D
C10
C11
C12
100P_0402_50V8J~D
C14
100P_0402_50V8J~D
C15
100P_0402_50V8J~D
C16
100P_0402_50V8J~D
C17
100P_0402_50V8J~D
C20
100P_0402_50V8J~D
C21
100P_0402_50V8J~D
C74
100P_0402_50V8J~D
C75
100P_0402_50V8J~D
C45
100P_0402_50V8J~D
100P_0402_50V8J~D
C25
100P_0402_50V8J~D
100P_0402_50V8J~D
C30
C31
C34
C32
1
A
C33
100P_0402_50V8J~D
FOX_GS12403-0001K-8F~D
Title
INT KB
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
40
of
70
DC/DC Interface
+15V_SUS
+3.3V_SRC
Q23
10K_0402_5%~D
1
2
5
6
R1293
100K_0402_5%~D
D Q57
S
MOD_EN 3
+3.3V_RUN
C1263
10U_0805_10V4Z~D
4
1
2
C546
10U_0805_10V4Z~D
PAD-OPEN 4x4m
@
1
1
2
G
R1798
1K_0402_5%~D
Q92
2N7002W-7-F_SOT323~D
1
2
2
G
R1797
1K_0402_5%~D
Q91
2N7002W-7-F_SOT323~D
@
D
+2.5V_RUN
2
G
+0.9V_DDR_VTT
R1796
1K_0402_5%~D
Q90
2N7002W-7-F_SOT323~D
2
G
@
D
@
D
+1.5V_RUN
+3.3V_RUN
R1794
Q88
1K_0402_5%~D
2N7002W-7-F_SOT323~D
2
G
+5V_RUN
1
1
1
2
G
R1803
30_0603_5%
@
D
Q28
2N7002W-7-F_SOT323~D
Q89
2N7002W-7-F_SOT323~D
2
G
RUN_ON_5V#
+VDD_CORE
R1766
30_0603_5%
Q26
2N7002W-7-F_SOT323~D
+1.8V_RUN
1
2
1
3
SUS_ON_5V#
Discharg Circuit
C1788
0.047U_0402_16V4Z~D
R1795
30_0603_5%
1
R1617
470K_0402_5%~D
2
1
3
Q83
2N7002W-7-F_SOT323~D
R1616
200K_0402_5%~D
2
1
2
G
2
G
+5V_RUN
PJP24
1
+5V_HDD Source
R148
20K_0402_5%~D
1
1
2
VAUX_EN
39,46
Q82
2N7002W-7-F_SOT323~D
N21917830
D
+5VHDD
+1.8V_SUS
ENAB_3VLAN 28
Q50
+1.8V_RUN
GFX_RUN_ON 58
@ C547
0.1U_0603_50V4Z~D
+1.8VRUN Source
Q51
R1615
100K_0402_5%~D
R1614
100K_0402_5%~D
HDDC_EN#
+PWR_SRC
2
38
+PWR_SRC
D
G
HDD_EN_5V
R507
100K_0402_5%~D
10K_0402_5%~D
R504
100K_0402_5%~D
R2149
1
2
5
6
R1757
20K_0402_5%~D
C172
10U_0805_10V4Z~D
4
1
R1764
100K_0402_5%~D
+15V_SUS
+1.8V_SUS
+5V_SUS
+3.3V_ALW
C1804
470P_0402_50V7K~D
@
Q14
SI4800BDY-T1-E3_SO8~D
8
1
7
2
6
3
5
HDD PWR
@PAD-OPEN 4x4m
R1295
100K_0402_5%~D
+3VRUN Source
R1765
0_0402_5%~D
+5VMOD Source
R215
20K_0402_5%~D
R1793
Q87
1K_0402_5%~D
2N7002W-7-F_SOT323~D
Q17
2N7002W-7-F_SOT323~D
+5V_RUN
Q6
1
2
3
8
7
6
5
+5V_RUN
PJP22
1
4
+3.3V_SRC
C1782
10U_0805_10V4Z~D
2
G
19,37,39,42,46,47,48,58 RUN_ON
C284
4700P_0402_25V7K~D
2
G
Q22
S
2N7002W-7-F_SOT323~D
C283
10U_0805_10V4Z~D
2
1
RUN_ON_5V#
+5VMOD
RUN_ENABLE
C
Q58
Q24
8
1
7
2
6
3
5
R223
100K_0402_5%~D
R202
100K_0402_5%~D
MODC_EN#
+5VRUN Source
+5V_SUS
46 RUN_ENABLE
C1262
0.1U_0603_50V4Z~D
38
Run Planes Enable
+15V_SUS
1
R2148
+15V_SUS
1
+3.3V_ALW
Q85
2N7002W-7-F_SOT323~D
+5V_ALW
+5V_SUS
1A Rating
R222
20K_0402_5%~D
Q86
2N7002W-7-F_SOT323~D
2
1
SUS_ON_5V# 2
G
SUS_ON 2
G
39,42,46 SUS_ON
SUS_ENABLE
C285
10U_0805_10V4Z~D
1
R1758
100K_0402_5%~D
6
5
2
1
R1759
100K_0402_5%~D
+3VSUS Source
+3.3V_SUS
+5V_ALW
2
G
Title
POWER CONTROL
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
41
of
70
For EMI
+3.3V_RUN
+1.8V_SUS
@ C1806
1
2
0.047U_0402_16V4Z~D
+3.3V_RUN
D
+3.3V_SUS
D
@ C1807
1
2
0.047U_0402_16V4Z~D
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
1
@ C1808
1
2
0.047U_0402_16V4Z~D
+3.3V_SUS C483
0.1U_0402_16V4Z~D
1
2
+3.3V_SUS
1
0_0402_5%~D
47 1.05V_RUN_PWRGD
2
R319
1
0_0402_5%~D
48 0.9V_DDR_PWRGD
2
R334
1
0_0402_5%~D
58 GFX_CORE_PWRGD
2
R2170
1
0_0402_5%~D
58 GFX_PCIE_PWRGD
@ 2
R2171
1
0_0402_5%~D
C520
0.01U_0402_16V7K~D
U24B
P
6
74LVC3G14DC_VSSOP8~D
+3.3V_SUS
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
IN1
OUT
C480
0.1U_0402_16V4Z~D
2
U26A
3
IN2
+3.3V_SUS
14
@ C1812
1
2
+3.3V_RUN
13
+3.3V_RUN
C
14
@ C1814
1
2
Y
G
12
19,37,39,41,46,47,48,58 RUN_ON
IN1
OUT
11
RUNPWROK
RUNPWROK 38,39,49,54
IN2
@ C1813
1
2
U26D
2
R313
47 1.5V_RUN_PWRGD
3VRUNRC
+SDC_IN
+3.3V_RUN
U24A
0_0402_5%~D
1
18 2.5V_RUN_PWRGD
2
R49
2
0.047U_0402_16V4Z~D
+1.05V_VCCP
@ C1809
1
2
+1.5V_RUN
R494
20K_0402_5%~D
0.047U_0402_16V4Z~D
+3.3V_ALW
1
C1816
0.1U_0402_16V4Z~D
14
A
Q7
2N7002W-7-F_SOT323~D
2
G
IN1
OUT
SUSPWROK 18,23
IN2
U26C
10
0.047U_0402_25V4Z~D
U24C
C1811
2
+3.3V_SUS
R1386
10K_0402_5%~D
+3.3V_SUS
1
0.047U_0402_25V4Z~D
+PWR_SRC
+3.3V_SUS
R1383
100K_0402_5%~D
C1810
2
39,41,46 SUS_ON
48 SUSPWROK_1P8V
+SDC_IN
+3.3V_RUN
14
+3.3V_SUS
39 RESET_OUT#
RESET_OUT#
IN1
OUT
R463
0_0402_5%~D
2
ICH_PWRGD 10,23
IN2
U26B
IMVP_PWRGD
23,49 IMVP_PWRGD
+COINCELL
R471
1K_0402_5%~D
R453
100K_0402_5%~D
2
Z4012
Q41
2N7002W-7-F_SOT323~D
2
G
+COINCELL
JCOIN
COINCELL 1
1
2 2
MOLEX_53398-0271~D
ICH_PWRGD# 18
+3.3VX
ICH_PWRGD#
ICH_PWRGD
COIN RTC Battery
+3.3V_SUS
+RTC_CELL
D15
BAT54CW_SOT323~D
1
C528
1U_0603_10V4Z~D
Title
Power Good
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
42
of
70
H1
H_T146B217D91
H2
H_T146B217D91
H5
H6
H3
H4
@H_C315D110 H_T256B63D47 @H_C315D110 @H_C236B256D110
H7
H8
@H_C315D110 @H_T217B315D98
Fiducial Mark
H9
H10
@H_C315D110 @H_C315D110
FD1
EMI CLIP
FD2
1
CLIP1
@
EMI_CLIP
H20
@H_T217B315D98
GND
FD13
GND
FD14
FD10
FD16
FD12
FIDUCIAL MARK~D FIDUCIAL MARK~D
FD15
1
FIDUCIAL MARK~D
FD11
FIDUCIAL MARK~D
FD6
FD9
1
FIDUCIAL MARK~D
FD5
FIDUCIAL MARK~D
FD8
1
FIDUCIAL MARK~D
FD4
FIDUCIAL MARK~D
FD7
GND
CLIP3
@
EMI_CLIP
GND
D
CLIP4
@
EMI_CLIP
H19
@H_C217D91
H11
H12
H15
H16
H17
H13
H14
H18
@H_T315B237D118 @H_C315D118 @H_C315D118 @H_T315B237D118 @H_C315D118 @H_T217B315D98 @H_T217B315D98 @H_C217D91
FD3
FIDUCIAL MARK~D
CLIP2
@
EMI_CLIP
FIDUCIAL MARK~D
FD17
FD18
@H_O115X31D115X31N
H31
@H_C24D24N
H32
@H_C24D24N
H26
H27
H28
@H_C472D376 @H_C472D431X376 @H_O115X31D115X31N
H29
CLIP5
@
EMI_CLIP
H30
@H_O115X31D115X31N
FIDUCIAL MARK~D
FD19
GND
CAP_LED#
R231
330_0402_5%~D
2
1
39
NUM_LED#
SCRL_LED#
R21
330_0402_5%~D
2
1
FD23
FD24
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD25
1
R_CAP_LED#
R237
330_0402_5%~D
1
R_CAP_LED# 40
FIDUCIAL MARK~D
R_NUM_LED#
R_NUM_LED# 40
R_SCRL_LED#
R_SCRL_LED# 40
+3.3V_RUN
R1448
@ 0_0402_5%~D
1
2
R76
10K_0402_5%~D
2
2
Q18
DDTA114EUA-7-F_SOT323~D
2
Q1
R2
R1449
10K_0402_5%~D
@
34,40 BT_ACTIVE
R_SATA_ACT 32
BT_ACTIVE
Q66
1
+3.3V_ALW
SATA_ACT#_R
R1434
10K_0402_5%~D
1
2
330_0402_5%~D
1
Q4
R8
1K_0402_5%~D
R_BT_ACT
2
R_BT_ACT
32
2
G
3
SATA_ACT#
39 SNIFFER_LED_OFF#
Q65
PMST3906_SOT323-3~D
39 SNIFFER_LED_OFF#
R_PIDEACT 36
SATA_ACT#
FIDUCIAL MARK~D
+5V_RUN
+3.3V_RUN
22
FIDUCIAL MARK~D
FD22
FIDUCIAL MARK~D
39
Disable HDD LED
FD21
FIDUCIAL MARK~D
39
FD20
GND
1
FIDUCIAL MARK~D
CLIP6
@
EMI_CLIP
R3
10K_0402_5%~D
1
2 BREATH_LED_B
39 BREATH_LED
+3.3V_SUS
C
Q3
2
B
3
E
+3.3V_RUN
R1
3
BREATH_GREEN_LED
BREATH_GREEN_LED 32
56_0402_5%~D
+3.3V_ALW
34 LED_WLAN_OUT#
Q5
R15
1
R_MPCI_ACT
R_MPCI_ACT 32
39
BAT1_LED#
BAT1_LED#
2
Q2
100_0402_5%~D
+3.3V_ALW
1
+3.3V_SUS
1
3
39
BAT2_LED#
BAT2_LED#
Q16
JSNIFF
4 4
SNIFFER_WIRELESS_ON/OFF#
38 SNIFFER_WIRELESS_ON/OFF#
SN IFFER#
39 SNIFFER#
BATT_GREEN_LED 32
BATT_GREEN_LED
2
220_0402_5%~D
+3.3V_ALW
Q35
1
SNIFFER_YELLOW#
18 SNIFFER_YELLOW#
R5
1
R56
10K_0402_5%~D
1BS008-13130-7F_4P~D
R265
1
BATT_AMBER_LED
2
330_0402_5%~D
BATT_AMBER_LED 32
+3.3V_SUS
Q13
18 SNIFFER_GREEN#
SNIFFER_GREEN#
SNIFFE R_Y
2
220_0402_5%~D
SNIFFER_G
2
220_0402_5%~D
1
R20
1
R19
D4
3 Y
1
2
G
12-22AUYSYGC/530-A2/TR8_G/Y~D
Title
PAD and Standoff

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
43
of
70
+5V_ALW
PR2
2.2K_0402_5%~D
1
2
IN
@ PR299
1
2
PS_ID_DISABLE# 39
EN
3
1
PD41
DA204U_SOT323~D
1
2
@
PD53
SM24_SOT23
Source
+3.3VX
PU1
+5V_ALW
FDV301N_SOT23~D
PR7
10K_0402_1%~D
2
G
PR6
100K_0402_1%~D
1
2
+3.3VX
39
+5V_ALW
PQ1
+PWR_SRC
PS_ID
OUT
NC
GND
3
1
PR184
33_0402_5%~D
1
2
MIC5235-3.3BM5_SOT23-5~D
PC7
2.2U_0603_6.3V6K~D
PC1
1U_0805_25V4Z~D
PS_ID_IN
PS_ID_IN
36
PR346
1
2
0_0402_5%~D
PD2
DA204U_SOT323~D
+3.3V_ALW
100_0402_5%~D
C
PQ2
2
B
PR10
15K_0402_1%~D
1
2
36 DOCK_DC_IN
DC_IN+ Source
PL1
FBM-L11-160808-601LMT 0603~D
PS_ID_IN
2
1
GND_2
DC-_1
GND_1
DC-_2
PL34
FBMA-L18-453215-900LMA90T_1812~D
1
2
PC6
10U_1206_25V6M~D
+ADP_DCIN
PR12
4.7K_0603_5%~D
2
1
PC5
0.1U_0603_25V7K~D
2
1
DC+_2
PC4
0.1U_0603_25V7K~D
2
1
PC3
1000P_0402_50V7K~D
2
1
DC+_1
Low_PWR
+DC_IN
8
7
6
5
PR13
100K_0402_1%~D
2
1
GND_3
PR11
GND_4
PL2
FBMA-L18-453215-900LMA90T_1812~D
DOC K_DC_IN
1
2
MH1
MH2
1
2
3
150K_0402_1%~D
PWR_ID
PJPDC1
TYCO_1566065-2~D
PQ3
FDS6679Z_SO8~D
PC2
0.47U_0805_25V7k
1
2
Z-series AC Adaptor
Connctor
THESE CAPS MUST BE

NEXT TO JCHG
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
+DCIN
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
44
of
70
+3.3V_ALW
ESD Diodes
+3.3V_ALW
D
PC231
2200P_0402_50V7K~D
2
1
PJP1
10
11
1
2
3
4
5
6
7
8
9
BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
GND
BATT1GND
BATT2-
Z4301
Z4302
Z4303
PR301
100_0402_5%~D
1
2
PR302
100_0402_5%~D
1
2
PR303
100_0402_5%~D
PR304
1
2
100_0402_5%~D
1
2
SBAT_SMBCLK 19,39
SBAT_SMBDAT 19,39
SBAT_ALARM# 38
PL32
FBMA-L18-453215-900LMA90T_1812~D
1
2
PC230
0.1U_0603_25V7K~D
2
1
PD43
PD44
PD45
@ DA204U_SOT323~D @ DA204U_SOT323~D @ DA204U_SOT323~D
1
PD42
@ DA204U_SOT323~D
1
Secondary Battery Connector
PR300
10K_0402_5%~D
2
1
SBATT+
9
8
7
6
5
SBAT_PRES#
38,51
4
3
2
TYCO_1734077-1~D
1
+3.3V_ALW
SUYIN_20175A-09G1
TOP view
2
ESD Diodes
PC10
2200P_0402_50V7K~D
2
1
PBATT1
10
11
BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
GND
BATT1GND
BATT2-
1
2
3
4
5
6
7
8
9
Z4304
Z4305
Z4306
PR20
100_0402_5%~D
1
2
PR21
100_0402_5%~D
1
2
PR22
100_0402_5%~D
1
2
PR23
100_0402_5%~D
1
2
PBAT_SMBCLK 39,50
PBAT_SMBDAT 39,50
PBAT_ALARM# 38
PL6
FBMA-L18-453215-900LMA90T_1812~D
1
2
PC9
0.1U_0603_25V7K~D
2
1
PD11
PD12
@ DA204U_SOT323~D @ DA204U_SOT323~D
1
Primary Battery Connector
PD10
@ DA204U_SOT323~D
PR19
10K_0402_1%~D
2
1
+3.3V_ALW
PD9
@ DA204U_SOT323~D
PBATT+
PBAT_PRES#
38
SUYIN_200277MR009G506ZR~D
Title
Battery Conn.
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
45
of
70
PJP25
2
DC/DC +3V/ +5V/ +15V
22
OUT3
ILIM5
ILIM3
REF
TON
GND
PGOOD
11
5
8
13
23
2
FB3
3
4
ON3
ON5
25
LDO3
+3.3V_SRC
PQ82
FDC655BN_NL_SSOT-6~D
4
B
PR49
1K_0402_1%~D
1
2
RUN_ENABLE 41
39 ALWON
PC156
2.2U_1206_25V7M~D
PD35
MMBZ5245B_SOT23~D
1
3
PC15
2.2U_1206_25V7M~D
PD13
EC11FS2_SOD106~D
+15VS
2
1
PC19
2200P_0402_50V7K~D
2
1
PC18
0.1U_0603_25V7K~D
2
1
4
1
PR354
0_0402_5%~D
+VCC_MAX1999
@
PR356
0_0603_5%~D
NC_TEST2
PR46
0_0402_5%~D
PR48
@ 0_0402_5%~D
2
1
PR50
@ 0_0402_5%~D
2
1
PR349
0_0402_5%~D
2
1
PR42
100K_0402_1%~D
1
2
SUSPWROK_5V 48
PR51
0_0402_5%~D
2
1
6
5
2
1
+
2
@
PR353
0_0402_5%~D
MAX8734_REF
D
18 THERM_STP#
+3.3V_SRCP
MAX1999_SKIP#
@ PR343
0_0402_5%~D
2
1
PC34
4.7U_1206_10V7K~D
2
1
PR41
2K_0402_1%~D
1
2
39,41,42 SUS_ON
PR47
240K_0402_5%~D
1
2
I1
PC36
1000P_0402_50V7K~D
2
1
O
3
39,41 VAUX_EN
PU17
TC7SH32FU_SSOP5~D
5
1
I0
5
6
7
8
1
2
MAX8734_REF
MAX8734AEEI_QSOP28~D
+3.3VX
PC251
0.1U_0603_25V7K~D
2
1
PC33
1U_0603_10V6K~D
12
PC245
330U_D3L_6.3V_R25~D
DL3
21
1
9
10
PC29
330U_D3L_6.3V_R25~D
24
OUT5
N.C.
FB5
PRO
LX3
PQ6
SI4810BDY_SO8~D
27
PC30
0.1U_0402_10V7K~D
2
1
19
DL5
DH3
15
26
LX5
DH5
BST3
+5V_SUSP
PR347
100K_0402_1%~D
1
2
SHDN
PR38
12.7K_0402_1%~D
1
2
16
6
28
3
2
1
14
5
6
7
8
BST5
+3.3V_ALW
39,41,42 SUS_ON
PC23
1U_0603_10V6K~D
PC22
4.7U_1206_25V6K~D
2
1
VCC
PR44
243K_0402_1%~D
1
2
1
2
3
PR345
PR355
0_0402_5%~D
0_0603_5%~D
2
NC_TEST1
@
C
17
PC27
0.1U_0603_25V7K~D
1
2
3
2
1
LDO5
PR29
0_0603_5%~D
1
2
PR37
45.3K_0402_1%~D
1
2
PR32
2.2_0603_5%~D
1
2
PL8
4.7U_STQB125A-4722_8A_30%~D
V+
18
1
2
3
PC28
0.1U_0603_25V7K~D
2
1
8
7
6
5
1
1
PQ5
SI4810BDY_SO8~D
@
PR344
0_0402_5%~D
PC32
0.1U_0402_10V7K~D
2
1
PC31
330U_D3L_6.3V_R25~D
PC244
330U_D3L_6.3V_R25~D
20
+3.3V_SRCP
Typical:5A
Peak current:7A
OCP point is from 8A to 11.2A
PQ78
SI4800BDY-T1_SO8~D
PU3
PL9
4.7U_SPC-1205P-4R7B_+40-20%~D
1
2
+5V_ALW
PR28
47_0603_5%~D
2
1
PD14
RB717F_SOT323~D
2
1
3
8
7
6
5
PQ77
SI4800BDY-T1_SO8~D
+VCC_MAX1999
SKIP
PC24
1U_0603_10V6K~D
2
1
Place these CAPs

close to FETs
Typical:4A
Peak current:8A
OCP point is from 8.2A to 10.5A
PR27
0_1206_5%~D
1
2
2 @
PC21
0.1U_0603_25V7K~D
2
1
PC26
0.1U_0603_25V7K~D
2
1
PC20
4.7U_1206_25V6K~D
2
1
PC25
2200P_0402_50V7K~D
2
1
PR203
100_0805_5%~D
1
2
+15VS_L
PC268
10U_1206_25V6M~D
PC17
10U_1206_25V6M~D
PC16
10U_1206_25V6M~D
PC252
100U_25V_M
+PWR_SRC
+15V_SUSP
Place these CAPs

close to FETs
+DC1_PWR_SRC
PL22
FBM-L11-453215-900LMAT_1812~D
1
2
PAD-OPEN 4x4m
PR188
453K_0402_1%~D
1
2
2
G
PQ80
RHU002N06_SOT323
THERM_STP# 18
+VCC_MAX1999
RUN_ON
19,37,39,41,42,47,48,58
+3.3V_ALW
PJP4
+15V_SUSP
+15V_SUS
PAD-OPEN 4x4m
PJP5
1
+5V_SUSP
+5V_SUS
PAD-OPEN 4x4m
PJP6
+3.3V_SRCP
+3.3V_SRC
PAD-OPEN 4x4m
A
Title
5
+3.3V/+5V/+15V
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
46
of
70
+1.5VRUNP / +VCCP_1P05VP
+PWR_SRC
+DC2_PWR_SRC
PC172
0.01U_0402_25V7K~D
16
OCSET2
SOFT2
PG2/REF
OCSET1
11
SOFT1
12
PG1
15
GND
1 PR224 2
124K_0402_1%
1
2
PC173
0.01U_0402_25V7K~D
ISL6227CA-T_SSOP28~D
4
0_0402_5%~D
1
2
PC164
0.1U_0603_25V7K~D
PC163
10U_1206_25V6M~D
PC162
10U_1206_25V6M~D
PC263
2200P_0402_50V7K~D
2
1
3
2
1
PR280
0_0402_5%~D
3
19,37,39,41,42,46,48,58 RUN_ON
@ PR282
0_0402_5%~D
1
19,37,39,41,42,46,48,58
RUN_ON
PR272
1K_0402_1%~D
2
@
PC210
1000P_0402_50V7K~D
+
2
1
2
PR227
1K_0402_1%~D
2
PR281
0_0402_5%~D
PC211
1000P_0402_50V7K~D
PR279
FDS8880_SO8~D
PQ38
3
2
1
PC207
10U_0805_6.3V5K~D
2
1
EN1
PC206
330U_D2E_2.5VM_R9~D
PGND1
VSEN1
VOUT1
3
10
9
PR220
2.1K_0402_1%~D
1
2
18
1 PR223 2
124K_0402_1%
17
1
2
EN2
ISEN1
21
LGATE1
PL27
1.5uH_SIL104-1R5_10A_30%~D
1
2
PR222
5.11K_0402_1%~D
PGND2
VSEN2
VOUT2
+VCCP_1P05VP_L
26
19
20
0_0603_5%~D
+VCCP_1P05VP
ISEN2
PHASE1
Typical:8A
Peak current:10A
OCP=14.23~18.39A
PR226
30.1K_0603_1%~D
LGATE2
22
UGATE1
PC170
0.01U_0402_25V7K~D
2
1
27
PC265
100P_0402_50V8K
2
1
PHASE2
FDS6670AS_SO8~D
PQ40
UGATE2
25
PR277
0.1U_0603_25V7K~D
24
BOOT1
5
6
7
8
BOOT2
13
14
PC167
1
2
23
DDR
VIN
5
6
7
8
2
1
PC261
0.01U_0402_25V7K~D
2
1
PD37
RB751V_SOD323~D
1U_0603_10V6K~D
1
2
PC205
1
1
2
VCC
PR225
28.7K_0603_1%~D
28
ISL6227CA-T
1
2
3
8
7
6
5
PR219
1.43K_0402_1%~D
1
2
1
2
3
PC264
100P_0402_50V8K
2
1
PU9
PR278
0_0603_5%~D
2
1
+1.5VRUNP_L
PQ83
FDS6670AS_SO8~D
PL26
3.8uH_SIL104-3R8_6A_30%~D
1
2
PR221
19.6K_0402_1%~D
2
1
PC169
0.01U_0402_25V7K~D
2
1
PC168
330U_D2E_2.5VM_R9~D
1
2
PC208
10U_0805_6.3V5K~D
+1.5V_RUNP
PR216
10_0805_5%~D
PC165
2.2U_0805_10V6K~D
PD36
1
2
1
PC166
0.1U_0603_25V7K~D
8
7
6
5
PQ8
FDS8880_SO8~D
Max current:5A
OCP=7.08~11.96A
1
+5V_SUS
RB751V_SOD323~D
PC161
0.1U_0603_25V7K~D
PC262
2200P_0402_50V7K~D
2
1
PC160
10U_1206_25V6M~D
2
1
PC159
10U_1206_25V6M~D
PL25
FBM-L11-453215-900LMAT_1812~D
1
2
PJP19
1
2
PAD-OPEN 4x4m
1.05V_RUN_PWRGD 42
42 1.5V_RUN_PWRGD
PJP23
+1.5V_RUNP
+1.5V_RUN
2
PAD-OPEN 4x4m
PJP21
+VCCP_1P05VP
+1.05V_VCCP
PAD-OPEN 4x4m
PJP20
1
PAD-OPEN 4x4m
Title
+1.5VSUSP /+VCCP_1P05VP
Size
Document Number
Date:
Rev
1.0
LA-2792
D
Sheet
47
of
70
+1.8VSUSP/ +0.9V_DDR_VTT
DDR2 Termination
+DDR_PWR_SRC
PR195
100K_0402_1%~D
1
2
PR194
100K_0402_1%~D
1
2
88550_AVDD
1U_0603_10V6K~D
PC63
+3.3V_SUS +3.3V_RUN
PC62
4.7U_1206_10V7K~D
2
1
@ PR193
2
1
10_1206_5%~D
+5V_SUS
PD20
RB751V-40_SOD323~D
PR193, PD20 are only used with the second-source MAX8632.
PC58
2200P_0402_50V7K~D
2
1
PC57
0.1U_0603_25V7K~D
2
1
PC55
10U_1206_25V6M~D
PJP32
PAD-OPEN 4x4m
1
2
PC56
10U_1206_25V6M~D
PL24
FBM-L11-453215-900LMAT_1812~D
1
2
+PWR_SRC
2
26
28
AVDD
TP0
22
VDD
LX
OVP/ UVP
8
7
6
5
19
SHDN
27
STBY
VTTI
13
REFIN
14
PGND2
11
VTT
12
SUSPWROK_1P8V 42
0.9V_DDR_PWRGD 42
SUSPWROK_5V 46
VOUT
ISL88550A_TQFN28~D
+1.8V_SUSP
PC77
0.1U_0402_10V7K~D
PC146
10U_0805_6.3V6M~D
PC157
10U_0805_6.3V6M~D
VTTR
+0.9V_DDR_VTTP
PC154
10U_0805_6.3V6M~D
9
10
GND
VTTS
PC74
0.1U_0402_10V7K~D
2
1
SS
GND
2
PR202
48.7K_0402_1%~D
Design current 1.05A for +0.9V_DDR_VTTP

Peak current 1.5A for +0.9V_DDR_VTTP
PC66
1000P_0402_50V7K~D
19,37,39,41,42,46,47,58
ILIM
REF
PC155
0.22U_0402_6.3V 5K~D
PR200
100K_0402_1%~D
1
2
88550_AVDD
TON
FB
24
RUN_ON
+1.8V_SUSP
PR204
20_0603_1%~D
2
1
1
PGND1
16
SKIP
PR84
@ 0_0402_5%~D
2
1
PR212
0_0402_5%~D
2
1
DL
23
4
15
PR348
0_0402_5%~D
1
2
POK2
8
7
6
5
PQ11
IRF7832_SO8~D
21
1
2
3
DH
17
5
+1.8VSUSP_L
PC72
0.1U_0402_10V7K~D
PC71
330U_D2E_2.5VM~D
PC70
330U_D2E_2.5VM~D
18
VIN
POK1
29
PL14
1.4UH_HMU1350-1R4PF_15A_20%~D
BST
PC153
10U_0805_6.3V6M~D
3
1
20
1
2
3
4
+1.8V_SUSP
PU6
PC68
PR73
0.22U_0603_10V7K~D
1
2
2
1
1_0603_5%~D
25
D
D
D
D
Design current 8A for +1.8V_SUSP

Peak current 10.1A for +1.8VSUSP
OCP point is 12.7A for +1.8VSUSP
S
S
S
G
PQ34
IRF7821_SO8~D
PR213
0_0402_5%~D
PC64
1U_0603_10V6K~D
PJP9
PAD-OPEN 4x4m
1
2
+1.8V_SUSP
PJP10
PAD-OPEN 4x4m
1
2
+1.8V_SUS
PJP11
+0.9V_DDR_VTTP
+0.9V_DDR_VTT
PAD-OPEN 4x4m

Title
+1.8VSUSP/ +0.9V_DDR_VT
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
48
of
70
PWM PHASE
GND
VR_ON
12
VSEN
13
RTN
11
VDIFF
PC270
10U_1206_25V6M~D
PC176
10U_1206_25V6M~D
PC175
4.7U_1206_25V6K~D
2
1
PC224
2200P_0402_50V7K~D
2
1
S
S
S
G
PC181
0.22U_0603_10V7K~D
2
1
PR232
10_0402_1%~D
PR231
7.68K_0805_1%~D
1
VO
VSUM
PC271
10U_1206_25V6M~D
PC177
10U_1206_25V6M~D
PC194
4.7U_1206_25V6K~D
2
1
PC240
2200P_0402_50V7K~D
2
1
3
D
21
2
PC243
0.22U_0603_10V7K~D
2
1
PR330
10K_0402_1%~D
1
2
PR329
10_0402_1%~D
VSUM
+CPU_PWR_SRC
PC227
0.1U_0603_25V7K~D
2
1
PC193
10U_1206_25V6M~D
PC272
10U_1206_25V6M~D
PC192
4.7U_1206_25V6K~D
2
1
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
G
PR271
10_0402_1%~D
+VCC_CORE
ISL6208CRZ-T_QFN8~D
PC228
2200P_0402_50V7K~D
2
1
LGATE
GND
PL31
0.45UH_MPC1040LR45_27A_20%~D
1
4
PHASE3
PR269
10K_0402_1%~D
1
2
PC200
0.22U_0603_10V7K~D
2
1
PR270
7.68K_0805_1%~D
1
PC201
1
PWM PHASE
PR268
1K_0402_1%~D
2
1
FCCM UGATE
PC248
1500P_0805_50V7K
2
1
PR267
10.5K_0402_1%
2
1
BOOT
PR262
PC198
0_0603_5%~D 0.22U_0603_10V7K~D
1 2
1
1
2
VCC
GNDA_VCORE
PU13
5
PQ61
1
1
2
2
PR261
2.43K_0402_1%~D
VW
VSUM
17
VSUM
FDS7088SN3_SO8~D
COMP
PC196
1U_0603_10V6K~D
PR260
11.5K_0402_1%~D
2
1
PQ50
IRF7821_SO8~D
+5V_RUN
1000P_0402_50V7K~D
VO
VSUM
PC260
0.1U_0603_25V7K~D
1
2
330P_0402_50V7K~D
+VCC_CORE
PC239
0.1U_0603_25V7K~D
2
1
8
7
6
5
D
D
D
D
S
S
S
G
1
ISEN3
OCSET
PL33
0.45UH_MPC1040LR45_27A_20%~D
4
1
PC247
1500P_0805_50V7K
2
1
PQ60
25
FB
GND
PHASE2
LGATE
1
2
3
4
PQ57
IRF7821_SO8~D
PC241
1U_0603_10V6K~D
PGOOD
40
GND
VO
PWM3
VO
PR264
6.34K_0402_1%~D
PR266
15K_0402_1%~D
41
1
2
2 PR259 1
PC250
82.5K_0402_1%~D
1500P_0402_50V7K~D
+VCC_CORE
PR331
7.68K_0805_1%~D
PC197
2
1
1
2
3
4
1
35
14
PC195
220P_0402_50V8J~D
1
2
PWM PHASE
24
PC190
680P_0402_50V7K~D
FCCM UGATE
ISL6208CRZ-T_QFN8~D
PC215
0.068U_0402_10V7K~D
2 PR287 1
0_0603_5%~D
2
1
2.21K_0402_1%~D
ISEN2
22
FCCM
CLK_EN#
PR258
PGD_IN
8
1
BOOT
PR328
PC242
0_0603_5%~D 0.22U_0603_10V7K~D
2
1
1
2
FDS7088SN3_SO8~D
PSI#
2
38
PR257
2
1
332_0402_1%~D
39
2
DPRSLPVR
PWM2
26
GNDA_VCORE
VCC
10
VSSSENSE
18
DPRSTP#
36
1000P_0402_50V7K~D
8
VIN
37
PC214
1000P_0402_50V7K~D 2
1
VDD
VID0
VID1
VID2
VID3
VID4
VID5
VID6
6.8KB_0603_5%_ERTJ1VR682J~D
PC213
1
PU16
5
ISL6260CRZ-T_QFN40~D
28
29
30
31
32
33
34
PC229
0.01U_0402_16V7K~D
23
ISEN1
PH2
GNDA_VCORE
PU11
SOFT
PC191
0.33U_0603_10V7K
VCCSENSE
PR263
4.53K_0402_1%~D
2
1
PR230
10K_0402_1%~D
1
2
2 PR252 1
0_0402_5%~D
2 PR253 1
0_0402_5%~D
2 PR254 1
0_0402_5%~D
38,39,42,54 RUNPWROK
2 @ PR2491
0_0402_5%~D
2 PR372 1
0_0402_5%~D
6 CLK_ENABLE#
27
PWM1
VO
H_PSI#
NTC
16
RBIAS
DFB
PR248
2
1
499_0402_1%~D
23 DPRSLPVR
15
7,22 H_DPRSTP#
VR_TT#
DROOP
470KB_0402_5%_NCP15WM474J03RB~D
1
PC187
0.01U_0402_16V7K~D
2 PR239 1
0_0402_5%~D
2 PR240 1
0_0402_5%~D 2 PR241 1
0_0402_5%~D
2 PR242 1
0_0402_5%~D 2 PR243 1
0_0402_5%~D
2 PR244 1
0_0402_5%~D 2 PR245 1
0_0402_5%~D
VID0
VID1
VID2
VID3
VID4
VID5
VID6
3V3
19
VSS
20
PR290
0_0603_5%~D
2
8
8
8
8
8
8
8
+CPU_PWR_SRC
PH1
2
GNDA_VCORE
PQ56
PC182
PR233
1U_0603_10V6K~D 10_0603_5%~D
2
1
1
2
@
2
+5V_RUN
@
2 PR284 1
0_0402_5%~D
PAD-OPEN 4x4m
IMVP_PWRGD 23,42
38 IMVP6_PROCHOT#
PR234
1.91K_0603_1%~D
GNDA_VCORE
2 PR238 1
147K_0402_1%~D
PJP31
2
PHASE1
+3.3V_RUN
GNDA_VCORE
PAD-OPEN 4x4m
PL29
0.45UH_MPC1040LR45_27A_20%~D
ISL6208CRZ-T_QFN8~D
+5V_RUN
LGATE
PJP30
1
1
FCCM UGATE
PC246
1500P_0805_50V7K
2
1
BOOT
VCC
PL28
FBMA-L18-453215-900LMA90T_1812~D
1
2
+PWR_SRC
PR229
PC179
0_0603_5%~D 0.22U_0603_10V7K~D
2
1
1
2
PU10
5
0.01U_0402_25V7K~D
PC180
2
1
PR228
10_0603_5%~D
FDS7088SN3_SO8~D
PC178
1U_0603_10V6K~D
2
1
+5V_RUN
D
D
D
D
PQ42
IRF7821_SO8~D
+CPU_PWR_SRC
8
7
6
5
PC223
0.1U_0603_25V7K~D
2
1
PC249
0.1U_0603_25V7K~D
2
1
+CPU_PWR_SRC
A

Title
GNDA_VCORE
+VCORE
8
Size
Document Number
Date:
Rev
1.0
LA-2792
2
49
Sheet
1
of
70
+DC_IN discharge path

+SDC_IN
PR138
0.01_2512_1%~D
2
@
PR337
0_0402_5%~D
PR142
150K_0402_1%~D
CHAGER_SRC
PL19
FBMA-L18-453215-900LMA90T_1812~D
1
2
PC128
0.1U_0603_25V7K~D
2
1
PC127
2200P_0402_50V7K~D
2
1
PC99
10U_1206_25V6M~D
+DC_IN
PR336
0_0402_5%~D
REF
PGND
CSIP
19
18
DAC
CSIN
17
FBSA
15
12
GND
FBSB
16
29
GND
MAX8731_TQFN28~D
PD54
1SS355_SOD323~D
1
2
5
6
7
8
5
6
7
8
PL20
5.6U_HMU1356-5R6_8.8A_20%~D
+VCHGR
PR145
0.01_2512_1%~D
PR373
+VCHGR_B
+VCHGR
PR368
100_0402_5%~D
PC273
10U_1206_25V6M~D
PC253
220P_0402_50V7K~D
+5V_ALW
1+VCHGR_L1
PQ76
SI4810BDY_SO8~D
PC114
10U_1206_6.3V7K~D
PC113
10U_1206_6.3V7K~D
20
PC106
10U_1206_25V6M~D
DLO
PC105
10U_1206_25V6M~D
CCS
PC104
0.1U_0603_25V7K~D
2
1
CCI
PC103
2200P_0402_50V7K~D
2
1
PQ79
IRF7821_SO8~D
23
D
D
D
D
LX
G
S
S
S
CCV
PR360
1_0603_1%~D
2
1
4
3
2
1
IINP
PQ75
SI4800BDY-T1_SO8~D
LDO
28
27
DHI
24
PC112
0.1U_0603_25V7K~D
2
1
MAX8731_REF
21
PC204
1U_0603_10V6K~D
1
2
5
6
7
8
MAX8731_IINP
LDO
BATSEL
PR274
33_0603_1%~D
PD40
RB751V_SOD323~D
2
1
SDA
PR275
0_0603_5%~D
1
2
3
2
1
PC212
0.01U_0402_25V7K~D
2
1
PR148
4.7K_0402_5%~D
2
1
PC118
0.01U_0402_25V7K~D
2
1
PC121
0.1U_0402_10V7K~D
2
1
PR150
10K_0402_1%~D
2
1
39,45 PBAT_SMBDAT
PC119
0.01U_0402_25V7K~D
2
1
39,45 PBAT_SMBCLK
9
14
0_0402_5%~D
PC221
0.1U_0402_10V7K~D
SCL
25
3
2
1
1 PR335
BAT_SEL#
VDD
10
BST
PC267
3300PF_0402_50V7K~D
2
1
39
ACOK
11
26
PC266
0.01U_0603_50V7K~D
+5V_ALW
Vin Detector
High 17.9 V
Low 17.24 V
PC120
0.1U_0402_10V7K~D
2
1
0.01U_0402_25V7K~D
13
VCC
PC203
0.1U_0603_25V7K~D
2
1
ACIN
CSSN
DCIN
GND
22
CSSP
PU8
1
2
0_0402_5%~D
PC122
1U_0603_10V6K~D
2
1
18,39,51 ACAV_IN
PC202
1U_0603_10V6K~D
1
2
PC102
1U_0805_25V4Z~D
2
1
PR146
PR341
15.8K_0402_1%~D
2
1
PC110
2
PR342
806K_0402_1%~D
2
PR143
20K_0402_1%~D
1
PR149
10K_0402_1%~D
2
1
LDO
1K_0603_1%~D
1
2
B
MAX8731_REF
PC258
0.01U_0402_25V7K~D
2
1
PC257
100P_0402_50V8K
2
1
+5V_ALW
8
PQ81
RHU002N06_SOT323
IN+
IN-
O
G
2
G
PC259
10P_0402_50V8J~D
2
1
IN+
+5V_ALW
ADAPT_OC 38
IN-
PU19A
LM393DR_SO8~D
1
PC256
100P_0402_50V8K
2
1
PC255
100P_0402_50V8K
2
1
PR364
27.4K_0402_1%~D
2
1
PR363
59K_0402_1%~D
2
1
1
2
0_0402_5%~D
PC254
0.01U_0402_25V7K~D
2
1
MAX8731_IINP
PR366
100K_0402_1%~D
2
1
PR362
301K_0402_1%~D
2
1
PR361
+3.3V_ALW
PR367
100K_0402_5%~D
2
1
+5V_ALW
PR365
4.32M_0402_1%~D
1
2
7
PU19B
LM393DR_SO8~D
Title
5
Charger
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
50
of
70
+DC_IN discharge path
D2
D2
D1
D1
S2
G2
S1
G1
PQ64
RHU002N06_SOT323
PD47
B540C~D
2
1
FDS4935_SO8~D
8
7
6
5
SBATT+
PC234
0.1U_0603_25V7K~D
1
2
PQ67
RHU002N06_SOT323
2
G
CHG_SBATT
PR310
100K_0402_5%~D
2
1
PQ66
SI4835BDY_SO8~D
1
2
3
PD48
+PWR_SRC
1
38
CHG_SBAT_N
D
PR309
10K_0402_5%~D
2
1
PR307
100K_0402_5%~D
2
1
PC232
2200P_0402_50V7K~D
2
1
1
+VCHGR
1CHG_SBAT
2CHG_SBATT_N
3
4
PQ65
8
7
6
5
PR306
10K_0402_5%~D
2
1
PQ63
2
RHU002N06_SOT323 G
2
@ PR308
G
100K_0402_5%~D
2
1
18,39,50 ACAV_IN
PR305
10K_0402_5%~D
1
2
+SDC_IN
D
1
2
3
PC233
0.1U_0603_25V7K~D
2
1
+PWR_SRC
PQ62
SI4835BDY_SO8~D
8
7
6
5
SBAT_G
1
3
CHG_SBATT_N
PR311
33K_0402_5%~D
1
2
RB715F_SOT323
PBATT+
3 CHG_PBAT
2
1
8
7
6
5
8
7
6
5
PQ70
SI4835BDY_SO8~D
1
2
3
PR323
42.2K_0402_1%~D
1
2
2
G
PQ74
RHU002N06_SOT323
PC237
0.1U_0603_25V7K~D
1
2
8
6
PR325
100K_0402_5%~D
PR318
33K_0402_5%~D
1
2
PR317
10K_0402_5%~D
2
1
D
IN-
RB715F_SOT323
PBAT_G
PQ73
RHU002N06_SOT323
2
G
PD51
2
IN+
O
IN-
1
3
+3.3V_ALW
PR326
32.4K_0402_1%~D
1
2
I1
I0
5
2
PR324
10K_0402_5%~D
1
2
SBAT_LOW
38
38,45 SBAT_PRES#
PU15
TC7SH32FU_SSOP5~D
PC236
0.1U_0603_25V7K~D
1
2
@
+3.3V_ALW
PR322
100K_0402_5%~D
1
2
PU14A
LM393DR_SO8~D
IN+
PR320
470K_0402_5%~D
2
1
PR321
147K_0402_1%~D
1
2
PBATT+
SBATT+
PBATT+
PR319
47K_0402_1%~D
1
2
PD50
2
PR315
470K_0402_5%~D
1
2
PR316
47K_0402_1%~D
1
2
PR314
470K_0402_5%~D
2
1
3
2
1
PQ69
SI4835BDY_SO8~D
1
2
3
PQ72
SI4835BDY_SO8~D
5
6
7
8
PQ71
SI4835BDY_SO8~D
5
6
7
8
+VCHGR
PD49
B540C~D
2
1
PR313
100K_0402_5%~D
2
1
4
CHG_PBATT
RHU002N06_SOT323
PQ68
PR312
10K_0402_5%~D
CHG_PBAT_N
2
1
38
PC235
0.1U_0603_25V7K~D
1
2
CHG_PBATT_N
3
LM393DR_SO8~D
PU14B RB715F_SOT323
+3.3V_ALW
Title
Selector
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
51
of
70
U2001A
1 C2016 PEG_MRX_GTX_C_P7
PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_N8
PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_N11
PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_N15
6 CLK_PCIE_VGA
6 CLK_PCIE_VGA#
PLTRST_DELAY#
6 CLK_NV_27M
GND
OUT
IN
GND
C2204
18P_0402_50V8J~D
27MHz_16PF_6P27000126~D
57 XTALOUTBUFF
57 XTALSSIN
2 @
6 CLK_NVSS_27M
@ R2133
1
2
0_0402_5%~D
1
R2132
R2
K2
K3
MIOB_VREF
J4
DVO / GPIO
AE3
AE4
PEX_REFCLK
PEX_REFCLK_N
AC6
PEX_RST_N
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_BLUE
DACA_GREEN
DACA_IDUMP
DACA_RSET
AD4
AC4
AE1
AD2
AD1
U9
AD3
DACA_VREF
AB4
T2026 PAD
RAM_CFG2
RAM_CFG3
RAM_CFG2 57
RAM_CFG3 57
PCI_DEVID3
PCI_DEVID3 57
DVI_SCLK
VGA_HSYNC
VGA_VSYNC
VGA_RED
VGA_BLU
VGA_GRN
R2009 1
DACAVREF
1
C2001
TV_C
TV_CVBS
TV_Y
DACB_VREF
E7
DACBVREF
I2CH_SCL
I2CH_SDA
124_0402_1%~D
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
1
R2128
1
R2129
2
10K_0402_5%~D
2
10K_0402_5%~D
2
0.01U_0402_16V7K~D
TV_C
TV_CVBS
TV_Y
DACB_RSET
R2010
C2174
36
36
36
2
124_0402_1%~D
2 0.01U_0402_16V7K~D
VGADDCCLK
VGADDCDAT
DVI_SCLK
DVI_SDATA
LCD_DDCCLK
LCD_DDCDATA
I2CH_SCL
I2CH_SDA
D10
E10
F9
F10
E9
D8
C7
B7
DVI_SDATA
20
20
20,36
20,36
20,36
1
R2002
1
R2003
1
R2005
1
R2006
<---CRT
<---DVI
DVI_SCLK 36
DVI_SDATA 36
LCD_DDCCLK 19
LCD_DDCDATA 19
<---SVIDEO
T2020 PAD
T2021 PAD
N6
M5
XTALIN
XTALOUT
C2
XTALOUT
XTALOUTBUFF
C3
XTALOUTBUFF
XTALSSIN_R
C1
XTALSSIN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
AE27
AD27
AE26
AD26
AD25
D7
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
AF13
AF14
G72M-V-N-A2_BGA533~D
2
0_0402_5%~D
VGA_HSYNC
VGA_VSYNC
VGA_RED
VGA_BLU
VGA_GRN
2
DACB_HSYNC
DACB_VSYNC
DACB_RED
DACB_BLUE
DACB_GREEN
DACB_IDUMP
DACB_RSET
IFPAB_VPROBE
IFPCD_VPROBE
B1
LCD_DDCCLK
LCD_DDCDATA
E6
F5
F4
D5
E4
L9
D6
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CH_SCL
I2CH_SDA
+3.3V_RUN
R2127
1
2
10K_0402_5%~D
R2131
0_0402_5%~D
XTALIN
CLK_PCIE_VGA
CLK_PCIE_VGA#
MIOB_CLKIN
MIOB_CLKOUT
MIOB_CLKOUT_N
PCI_DEVID2 57
PCI_DEVID0 57
PCI_DEVID1 57
R2125
10K_0402_5%~D
+3.3V_RUN
+3.3V_RUN
Y2001
B
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
RAM_CFG0 57
RAM_CFG1 57
PCI_DEVID2
PCI_DEVID0
PCI_DEVID1
23 PLTRST_DELAY#
C2205 @
2
1 18P_0402_50V8J~D
AD5
AD6
AE6
AE7
AD7
AC7
AE9
AE10
AD10
AC10
AE12
AE13
AD13
AC13
AC15
AD15
AE15
AE16
AC18
AD18
AE18
AE19
AC21
AD21
AE21
AE22
AD22
AD23
AF25
AE25
AE24
AD24
THERMTRIP_VGA# 18
@
Q25
2N7002W-7-F_SOT323~D
PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P0
PEG_MRX_GTX_C_N0
PEG_MRX_GTX_C_P1
PEG_MRX_GTX_C_N1
PEG_MRX_GTX_C_P2
PEG_MRX_GTX_C_N2
PEG_MRX_GTX_C_P3
PEG_MRX_GTX_C_N3
PEG_MRX_GTX_C_P4
PEG_MRX_GTX_C_N4
PEG_MRX_GTX_C_P5
PEG_MRX_GTX_C_N5
PEG_MRX_GTX_C_P6
PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P7
PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_P8
PEG_MRX_GTX_C_N8
PEG_MRX_GTX_C_P9
PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_P10
PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_P11
PEG_MRX_GTX_C_N11
PEG_MRX_GTX_C_P12
PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_P13
PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_P14
PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_P15
PEG_MRX_GTX_C_N15
PEG_MRX_GTX_C_N5
G4
F1
G1
F2
+3.3V_RUN
PEG_MRX_GTX_C_N4
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CTL3
BIA_PWM
19,39
ENVDD
19
PANEL_BKEN 19
GFX_CORE_CNTRL 58
PEG_MRX_GTX_C_N3
RAM_CFG0
RAM_CFG1
DVI_DETECT 36
BIA_PWM
ENVDD
PANEL_BKEN
GFX_CORE_CNTRL
R116
10K_0402_5%~D
PEG_MRX_GTX_C_N2
G2
G3
J2
J1
K4
K1
M2
M1
N1
N2
N3
R3
DACs
PEG_MRX_GTX_C_N1
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
I2C
PEG_MRX_GTX_C_N0
DVI_DETECT
TEST
PEG_MRX_GTX_P0
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N0
2
1
0.1U_0402_10V7K~D
C2003
PEG_MRX_GTX_P1
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N1
2
1
0.1U_0402_10V7K~D
C2005
PEG_MRX_GTX_P2
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N2
2
1
0.1U_0402_10V7K~D
C2007
PEG_MRX_GTX_P3
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N3
2
1
0.1U_0402_10V7K~D
C2009
PEG_MRX_GTX_P4
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N4
2
1
0.1U_0402_10V7K~D
C2011
PEG_MRX_GTX_P5
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N5
2
1
0.1U_0402_10V7K~D
C2013
PEG_MRX_GTX_P6
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N6
2
1
0.1U_0402_10V7K~D
C2015
PEG_MRX_GTX_P7
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N7
2
1
0.1U_0402_10V7K~D
C2017
PEG_MRX_GTX_P8
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N8
2
1
0.1U_0402_10V7K~D
C2019
PEG_MRX_GTX_P9
0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N9
2
1
0.1U_0402_10V7K~D
C2021
PEG_MRX_GTX_P10 0.1U_0402_10V7K~D
2
PEG_MRX_GTX_N10
2
1
0.1U_0402_10V7K~D
C2023
2
PEG_MRX_GTX_N11
2
1
0.1U_0402_10V7K~D
C2025
2
PEG_MRX_GTX_N12
2
1
0.1U_0402_10V7K~D
C2027
2
PEG_MRX_GTX_N13
2
1
0.1U_0402_10V7K~D
C2029
2
PEG_MRX_GTX_N14
2
1
0.1U_0402_10V7K~D
C2031
2
PEG_MRX_GTX_N15
2
1
0.1U_0402_10V7K~D
C2033
PCI EXPRESS
PEG_MRX_GTX_N[0:15]
12 PEG_MRX_GTX_N[0:15]
A9
D9
A10
B10
C10
C12
B12
A12
A13
B13
B15
A15
B16
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
PEG_MRX_GTX_P[0:15]
12 PEG_MRX_GTX_P[0:15]
Part 1 of 5
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
CLK
PEG_MTX_GRX_N[0:15]
12 PEG_MTX_GRX_N[0:15]
AF1
AG2
AG3
AG4
AF4
AF5
AG6
AG7
AF7
AF8
AG9
AG10
AF10
AF11
AG12
AG13
AG15
AG16
AF16
AF17
AG18
AG19
AF19
AF20
AG21
AG22
AF22
AF23
AG24
AG25
AG26
AF27
PEG_MTX_GRX_P[0:15]
12 PEG_MTX_GRX_P[0:15]
PEG_MTX_GRX_P0
PEG_MTX_GRX_N0
PEG_MTX_GRX_P1
PEG_MTX_GRX_N1
PEG_MTX_GRX_P2
PEG_MTX_GRX_N2
PEG_MTX_GRX_P3
PEG_MTX_GRX_N3
PEG_MTX_GRX_P4
PEG_MTX_GRX_N4
PEG_MTX_GRX_P5
PEG_MTX_GRX_N5
PEG_MTX_GRX_P6
PEG_MTX_GRX_N6
PEG_MTX_GRX_P7
PEG_MTX_GRX_N7
PEG_MTX_GRX_P8
PEG_MTX_GRX_N8
PEG_MTX_GRX_P9
PEG_MTX_GRX_N9
PEG_MTX_GRX_P10
PEG_MTX_GRX_N10
PEG_MTX_GRX_P11
PEG_MTX_GRX_N11
PEG_MTX_GRX_P12
PEG_MTX_GRX_N12
PEG_MTX_GRX_P13
PEG_MTX_GRX_N13
PEG_MTX_GRX_P14
PEG_MTX_GRX_N14
PEG_MTX_GRX_P15
PEG_MTX_GRX_N15
20,36
DAT_DDC2
DAT_DDC2
VGADDCCLK
Q2008
2N7002W-7-F_SOT323~D
3
S
2
1
CLK_DDC2
4.7K_0402_5%~D
20,36 CLK_DDC2
R2101
4.7K_0402_5%~D
2
G
2
G
R2100
VGADDCDAT
Q2009
2N7002W-7-F_SOT323~D
Title
NVG72M PCIE,GPIO,CLK
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
52
of
70
FBAD[0:63]
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
D21
F22
F20
A21
V27
W22
V22
V24
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
A22
E22
F21
B21
V26
W23
V23
W27
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
B22
D22
E21
C21
V25
W24
U24
W26
FBA_CKE
36
36
36
36
36
36
36
36
56
FBBA2
FBARAS#
56
FBA_BA1
56
R2001
10K_0402_5%~D
FBACAS#
DVI_CLK+
DVI_CLKDVI_TX0+
DVI_TX0DVI_TX1+
DVI_TX1DVI_TX2+
DVI_TX2-
R2019
1K_0402_5%~D
2
1
FBARAS#
FBAA11
FBAA10
FBA_BA1
FBAA8
FBAA9
FBAA6
FBAA5
FBAA7
FBAA4
FBACAS#
DVI_CLK+
DVI_CLKDVI_TX0+
DVI_TX0DVI_TX1+
DVI_TX1DVI_TX2+
DVI_TX2-
56
U6
IFPAB_RSET
V1
W1
T1
R1
T3
T2
V2
V3
IFPC_TXC
IFPC_TXC_N
IFPC_TXD0
IFPC_TXD0_N
IFPC_TXD1
IFPC_TXD1_N
IFPC_TXD2
IFPC_TXD2_N
J3
IFPCD_RSET
PEX_PLL_EN_TERM100
SUB_VENDOR
PEX_PLL_EN_TERM100 57
SUB_VENDOR 57
3GIO_ADR_0
3GIO_ADR_0 57
3GIO_ADR_1
3GIO_ADR_2
3GIO_ADR_1 57
3GIO_ADR_2 57
MIO_A_HSYNC
C4
MIOA_HSYNC
D12
E12
F12
C13
+3.3V_RUN
NC_0
NC_1
NC_2
NC_3
BUFRST_N
A6
STEREO
F7
SWAPRDY
THERMDN
THERMDP
A7
C9
B9
ROM_SCLK
ROM_SI
ROM_SO
ROMCS_N
D2
F3
D3
D1
SERIAL
VGA_THERMDN 18
VGA_THERMDP 18
IFPC_IOVDD
DVI_CLKDVI_TX0+
DVI_TX0DVI_TX1+
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
DVI_TX1-
+1.8V_RUN
1
DVI_TX2+
DVI_TX2-
FBA_VREF1 10mil
CLKA0
CLKA0#
CLKA1
CLKA1#
10mil
56
56
56
56
2
R2092
2
R2093
2
R2094
2
R2095
2
R2096
2
R2097
2
R2098
2
R2099
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
49.9_0402_1%~D
1
C2176
2
0.01U_0402_16V7K~D
1
C2177
2
0.01U_0402_16V7K~D
1
C2178
2
0.01U_0402_16V7K~D
1
C2179
2
0.01U_0402_16V7K~D
R2021
10K_0402_1%~D
Strap for G72
DVI_CLK+
CLKA0
CLKA0#
CLKA1
CLKA1#
VGA_THERMDN
VGA_THERMDP
A16
L24
K23
M22
N22
M23
M24
K22
56
56
56
56
A2
B3
A3
D4
A4
B4
B6
P4
C6
G5
V4
R2022
10K_0402_1%~D
B
2
2
FB_VREF
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_REFCLK
FBA_REFCLK_N
FBA_DEBUG
FBACS1#
FBACS0#
FBAWE#
FBA_BA0
R2018
1K_0402_5%~D
2
1
MIO_A_D0
MIO_A_D1
MIO_A_D2
MIO_A_D3
MIO_A_D4
MIO_A_D5
MIO_A_D6
MIO_A_D7
MIO_A_D8
MIO_A_D9
MIO_A_D10
Part 3 of 5
R2034
10K_0402_5%~D
2
1
FBAA3
FBAA0
FBAA2
FBAA1
FBBA3
FBBA4
FBBA5
FBACS1#
FBACS0#
FBAWE#
FBA_BA0
FBA_CKE
LCD_BCLK+
LCD_BCLKLCD_B0+
LCD_B0LCD_B1+
LCD_B1LCD_B2+
LCD_B2-
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
NC
LCD_BCLK+
LCD_BCLKLCD_B0+
LCD_B0LCD_B1+
LCD_B1LCD_B2+
LCD_B2-
T4
U4
N4
N5
R5
R4
T5
T6
R6
P6
W5
W6
W3
W2
AA2
AA3
AB1
AA1
AB3
AB2
R2017
10K_0402_5%~D
2
1
G27
D25
F26
F25
G25
J25
J27
M26
C27
C25
D24
N27
G24
J26
M27
C26
M25
D26
D27
K26
K25
K24
F27
K27
G26
B27
N24
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
C2036
0.022U_0402_16V7K~D
MEMORY INTERFACE
Part 2 of 5
19
19
19
19
19
19
19
19
LCD_ACLK+
LCD_ACLKLCD_A0+
LCD_A0LCD_A1+
LCD_A1LCD_A2+
LCD_A2-
DQMA#[0:7] 56
U2001B
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
LCD_ACLK+
LCD_ACLKLCD_A0+
LCD_A0LCD_A1+
LCD_A1LCD_A2+
LCD_A2-
GENERAL
DQSA[0:7] 56
DQMA#[0:7]
19
19
19
19
19
19
19
19
LVDS/TMDS
FBBA[2:5] 56
DQSA[0:7]
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
AB23
Y24
AB24
AB22
AC24
AC22
AA23
AA22
T24
T23
R24
R23
R22
T22
N23
P24
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
U2001C
FBAA[0:11] 56
FBBA[2:5]
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBAD[0:63] 56
FBAA[0:11]
T2001
PAD
Title
NVG72M Memory Interface

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
53
of
70
+1.2VRUN
IFPA_IOVDD
IFPB_IOVDD
IFPC_IOVDD
W4
Y4
L4
IFPAB_PLLVDD
V5
40mA
IFPAB_PLLVDD
M4
40mA
IFPCD_PLLVDD
C2098
0.1U_0402_10V7K~D
IFPAB_IOVDD
IFPC_IOVDD
L2004
1
2
+1.8V_RUN
F17
F19
J19
J22
L22
M19
P22
T19
U22
Y22
PLLVDD
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
AE2
F8
DACA_VDD 70mA
DACB_VDD 140mA
H4
PLLVDD
FBA_PLLAVDD
D13
FBA_PLLVDD
D14
FBCAL_PD_VDDQ
D15
CLAMP
D11
FBA_PLLAVDD
2
1
+1.8V_RUN
R2032
40.2_0402_1%~D
L2128
B
C2215
4.7U_0603_6.3V4Z~D
Q2013
2N7002W-7-F_SOT323~D
IFPC_IOVDD
C2214
470P_0402_50V7K~D
2
G
L2009
2
1
DACA_VDD
L2010
2
1
L2012
2
1
C2175
0.1U_0402_16V4Z~D
RUNPWROK
2
R2143
10K_0402_5%~D
C2064
C2124
4700P_0402_25V7K~D
1
3
Q2012
SI1303DL-T1-E3_SOT323-3~D
1
D
C2207
4.7U_0603_6.3V4Z~D
0.1U_0402_10V7K~D
C2206
+1.2VRUN
L2129
G72_PLLVDD
2
1
+2.5V_RUN
1
+3.3V_RUN
+3.3V_RUN
2
G
+2.5V_RUN
L2127
1
2
C2087
4700P_0402_25V7K~D
DACA_VDD
DACB_VDD
2
2
C2122
470P_0402_50V7K~D
F6
G6
J6
DACB_VDD
1
C2126
470P_0402_50V7K~D
MIO_A_VDDQ_0
MIO_A_VDDQ_1
MIO_A_VDDQ_2
IFPCD_PLLVDD
C2056
10U_0805_10V4Z~D
C2055
4.7U_0603_6.3V4Z~D
C2127
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C2065
4.7U_0603_6.3V4Z~D
C2057
10U_0805_10V4Z~D
C2042
4.7U_0603_6.3V4Z~D
C2041
0.1U_0402_10V7K~D
C2053
0.1U_0402_10V7K~D
C2054
0.1U_0402_10V7K~D
C2052
0.1U_0402_10V7K~D
C2040
0.1U_0402_10V7K~D
T2003
PAD
C2076
1U_0603_10V4Z~D
MIOBCAL_PD_VDDQ
J5
C2121
2.2U_0603_6.3V6K~D
4700P_0402_25V7K~D
C2102
4700P_0402_25V7K~D
C2103
0.022U_0402_16V7K~D
C2111
0.022U_0402_16V7K~D
C2112
0.1U_0402_10V7K~D
C2115
0.1U_0402_10V7K~D
C2116
0.1U_0402_10V7K~D
C2117
0.1U_0402_10V7K~D
C2118
0.1U_0402_10V7K~D
C2119
4.7U_0603_6.3V4Z~D
C2108
+1.8V_RUN
+3.3V_RUN
1
+1.2VRUN
L2002
2
1
C2125
2.2U_0603_6.3V6K~D
FBVTT_0
FBVTT_1
FBVTT_2
FBVTT_3
FBVTT_4
FBVTT_5
FBVTT_6
FBVTT_7
FBVTT_8
FBVTT_9
C2120
4700P_0402_25V7K~D
K5
K6
L6
VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
180mA
20mA
+3.3V_RUN
VDD_LP_0
VDD_LP_1
VDD_LP_2
VDD_LP_3
PEX_PLLAVDD
PEX_PLLAVDD
PEX_PLLDVDD
Y6
AA5
C2086
4.7U_0603_6.3V4Z~D
E15
F15
F16
J17
J18
L19
N19
R19
U19
W19
4700P_0402_25V7K~D
C2100
4700P_0402_25V7K~D
C2101
0.022U_0402_16V7K~D
C2106
0.022U_0402_16V7K~D
C2107
0.022U_0402_16V7K~D
C2104
0.022U_0402_16V7K~D
C2105
0.1U_0402_10V7K~D
C2113
0.1U_0402_10V7K~D
C2114
4.7U_0603_6.3V4Z~D
C2109
2
B
+1.8V_RUN
C2063
0.01U_0402_16V7K~D 0.01U_0402_16V7K~D
C2201
4700P_0402_25V7K~D
F13
F14
J12
J13
J15
J16
C2202
4.7U_0603_6.3V4Z~D
C2090
4700P_0402_25V7K~D
C2089
4700P_0402_25V7K~D
C2088
4700P_0402_25V7K~D
C2093
0.1U_0402_10V7K~D
C2092
0.1U_0402_10V7K~D
C2091
0.1U_0402_10V7K~D
C2097
1U_0603_10V4Z~D
+3.3V_RUN
C2075
W9
W10
W11
W12
C2071
4700P_0402_25V7K~D
C2039
0.1U_0402_10V7K~D
C2062
0.022U_0402_16V7K~D
C2085
470P_0402_50V7K~D
C2070
4.7U_0603_6.3V4Z~D
C2037
0.022U_0402_16V7K~D
C2046
2200P_0402_50V7K~D
2
G72_PLLVDD
2
C2203
470P_0402_50V7K~D
W17
W18
AB10
AB11
AB14
AB15
AB20
AB21
AA4
AB5
AB6
AB7
AB8
AB9
AB12
AB13
AB16
AB17
AB18
AB19
AC9
AC11
AC12
AC16
AC17
AC19
AC20
C2069
470P_0402_50V7K~D
VDD_0
PEX_IOVDD_0
Part 4 of 5
VDD_1
PEX_IOVDD_1
VDD_2
PEX_IOVDD_2
VDD_3
PEX_IOVDD_3
VDD_4
PEX_IOVDD_4
VDD_5
PEX_IOVDD_5
VDD_6
PEX_IOVDD_6
VDD_7
PEX_IOVDD_7
VDD_8
PEX_IOVDDQ_0
VDD_9
PEX_IOVDDQ_1
VDD_10
PEX_IOVDDQ_2
VDD_11
PEX_IOVDDQ_3
VDD_12
PEX_IOVDDQ_4
VDD_13
PEX_IOVDDQ_5
VDD_14
PEX_IOVDDQ_6
NV_PLLAVDD
PEX_IOVDDQ_7
VDD_16
PEX_IOVDDQ_8
VDD_17
PEX_IOVDDQ_9
VDD_18
PEX_IOVDDQ_10
VDD_19
PEX_IOVDDQ_11
VDD_20
PEX_IOVDDQ_12
VDD_21
PEX_IOVDDQ_13
VDD_22
PEX_IOVDDQ_14
VDD_23
PEX_IOVDDQ_15
VDD_24
PEX_IOVDDQ_16
VDD_25
PEX_IOVDDQ_17
VDD_26
PEX_IOVDDQ_18
VDD_27
VDD_28
PEX_PLLAVDD
VDD_29
PEX_PLLDVDD
VDD_30
VDD_31
VDD_32
MIOB_VDDQ_0
VDD_33
MIOB_VDDQ_1
VDD_34
MIOB_VDDQ_2
VDD_35
MIOBCAL_PD_VDDQ
POWER
C2061
0.1U_0402_10V7K~D
C2045
0.022U_0402_16V7K~D
1
C2180
0.022U_0402_16V7K~D
C2047
0.1U_0402_10V7K~D
C2081
220P_0402_50V7K~D
C2060
0.1U_0402_10V7K~D
C2059
0.1U_0402_10V7K~D
C2080
C2058
0.022U_0402_16V7K~D 2200P_0402_50V7K~D
C2048
0.1U_0402_10V7K~D
FBA_PLLAVDD
C2079
0.1U_0402_16V4Z~D
2
C2073
10U_0805_4VAM~D
40mA
1
C2072
10U_0805_4VAM~D
C2066
4700P_0402_25V7K~D
C2067
2.2U_0603_6.3V6K~D
L2125
2
C2083
0.1U_0402_10V7K~D
C2082
4.7U_0603_6.3V4Z~D
+1.2VRUN
C2068
470P_0402_50V7K~D
PLLVDD
1
2
L2126
BLM18AG121SN1D_0603~D 1
C2044
0.1U_0402_10V7K~D
+2.5V_RUN
C2084
1000P_0402_50V7K~D
C2043
10U_0805_4VAM~D
U2001D
J9
J10
J11
L12
L13
L15
L16
M9
M11
M12
M13
M14
M15
M16
M17
N9
N11
N17
R9
R11
R17
T9
T11
T12
T13
T14
T15
T16
T17
U12
U13
U15
U16
W13
W15
W16
C2038
0.022U_0402_16V7K~D
C2050
0.1U_0402_10V7K~D
+VDD_CORE
C2051
0.1U_0402_10V7K~D
1808mA
Title
NVG72M Power
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
54
of
70
U2001E
Part 5 of 5
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
U17
U23
U26
V9
V19
W14
Y2
Y5
Y23
Y26
AC2
AC8
AC14
AC23
AC26
AD8
AD9
AD11
AD12
AD14
AD16
AD17
AD19
AD20
AC5
AF2
AF3
AF6
AF9
AF12
AF15
AF18
AF21
AF24
AF26
IFPAB_PLLGND
IFPCD_PLLGND
MIOBCAL_PU_GND
PEX_PLLGND
PLLGND
V6
M6
M3
AA6
H5
FBA_PLLGND
C15
FBCAL_PU_GND
FBCAL_TERM_GND
E13
H22
1
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND
B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E14
E17
E20
E23
E26
F11
H2
H6
H23
H26
J14
K9
K19
L2
L5
L11
L14
L17
L23
L26
N12
N13
N14
N15
N16
P2
P5
P9
P11
P12
P13
P14
P15
P16
P17
P19
P23
P26
R12
R13
R14
R15
R16
U2
U5
U11
U14
R2104
30_0402_1%~D
2
Title
NVG72M Ground
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
55
of
70
1
C
C2128
0.1U_0402_10V7K~D
R2036
1K_0402_1%~D
B3
H12
H3
B12
DM0
DM1
DM2
DM3
DQSA0
DQSA3
DQSA1
DQSA2
B2
H13
H2
B13
DQS0
DQS1
DQS2
DQS3
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
M2
L2
L3
N2
RAS#
CAS#
WE#
CS0#
FBA_CKE
N12
CKE
CLKA0
CLKA0#
M11
M12
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
10mil FBA_VREF
53
53
53
53
FBARAS#
FBACAS#
FBAWE#
FBACS0#
53
FBA_CKE
53
53
53
DQMA#0
DQMA#3
DQMA#1
DQMA#2
CLKA0
CLKA0#
FBARAS#
FBACAS#
FBAWE#
FBACS0#
Reserve for Hynix 8Mx32

R2037
2
1 R_FBACS1#
FBACS1#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
+1.8V_RUN
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
D8
E4
E11
L4
L7
L8
L11
+1.8V_RUN
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
0_0402_5%~D
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
53
53
FBAA0
FBAA1
FBBA2
FBBA3
FBBA4
FBBA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBA_BA0
FBA_BA1
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
DQMA#7
DQMA#4
DQMA#5
DQMA#6
B3
H12
H3
B12
DM0
DM1
DM2
DM3
DQSA7
DQSA4
DQSA5
DQSA6
B2
H13
H2
B13
DQS0
DQS1
DQS2
DQS3
FBA_VREF
N13
M13
L9
M10
VREF
MCL
RFU1
RFU2
M2
L2
L3
N2
RAS#
CAS#
WE#
CS0#
FBA_CKE
N12
CKE
CLKA1
CLKA1#
M11
M12
CK
CK#
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
E7
E8
E10
K6
K7
K8
K9
L5
L10
E5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FBARAS#
FBACAS#
FBAWE#
FBACS0#
CLKA1
CLKA1#
R_FBACS1#
K4D553235F-VC33_FBGA144~D
FBAD63
FBAD57
FBAD58
FBAD61
FBAD56
FBAD62
FBAD59
FBAD60
FBAD33
FBAD32
FBAD35
FBAD34
FBAD36
FBAD37
FBAD39
FBAD38
FBAD47
FBAD42
FBAD41
FBAD46
FBAD44
FBAD40
FBAD43
FBAD45
FBAD54
FBAD55
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD53
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
+1.8V_RUN
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
D8
E4
E11
L4
L7
L8
L11
+1.8V_RUN
53
FBAA[0:11]
53
FBBA[2:5]
53
DQMA#[0:7]
53
DQSA[0:7]
53
FBAD[0:63]
FBAA[0:11]
FBBA[2:5]
DQMA#[0:7]
DQSA[0:7]
FBAD[0:63]
D
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
FBA_BA0
FBA_BA1
FBAD4
FBAD3
FBAD5
FBAD0
FBAD7
FBAD6
FBAD1
FBAD2
FBAD31
FBAD30
FBAD29
FBAD28
FBAD24
FBAD25
FBAD26
FBAD27
FBAD13
FBAD11
FBAD10
FBAD14
FBAD15
FBAD8
FBAD12
FBAD9
FBAD17
FBAD16
FBAD18
FBAD19
FBAD21
FBAD20
FBAD23
FBAD22
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
53
53
R2035
1K_0402_1%~D
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
C2129
0.1U_0402_10V7K~D
+1.8V_RUN
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBA_BA0
FBA_BA1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
U2004
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
U2003
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
K4D553235F-VC33_FBGA144~D
+1.8V_RUN
C2134
22U_0805_6.3VAM~D
C2132
1000P_0402_50V7K~D
C2133
0.01U_0402_16V7K~D
C2145
22U_0805_6.3VAM~D
C2144
0.01U_0402_16V7K~D
C2150
22U_0805_6.3VAM~D
C2149
0.01U_0402_16V7K~D
Place close to U2004

2
R2042
120_0402_5%~D
C2148
1000P_0402_50V7K~D
Close to U2004
CLKA1
C2147
0.1U_0402_10V7K~D
CLKA1
C2146
0.1U_0402_10V7K~D
53
CLKA0#
CLKA0#
+1.8V_RUN
C2142
0.1U_0402_10V7K~D
+1.8V_RUN
53
C2141
0.1U_0402_10V7K~D
C2139
22U_0805_6.3VAM~D
C2138
0.01U_0402_16V7K~D
R2039
120_0402_5%~D
C2137
1000P_0402_50V7K~D
C2135
0.1U_0402_10V7K~D
Close to U2003
C2136
0.1U_0402_10V7K~D
CLKA0
CLKA0
C2143
1000P_0402_50V7K~D
+1.8V_RUN
53
C2131
0.1U_0402_10V7K~D
C2130
0.1U_0402_10V7K~D
Place close to U2003

53
CLKA1#
CLKA1#
Title
NVG72M External DDR

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
56
of
70
NV44M
STRAPS
PIN
DESCRIPTION
Value
MIOBD10
Parallel=00, SERIAL AT25F=01 DEFAULT,
MIOB_VSYNC Serial SST45VF=10, LPC=11
01
+3.3V_RUN
R2137
2K_0402_5%~D
2
1
R2136
2K_0402_5%~D
2
1
R2135
2K_0402_5%~D
2
1
R2056
2K_0402_5%~D
2
1
R2055
2K_0402_5%~D
2
1
R2051
2K_0402_5%~D
2
1
R2050
2K_0402_5%~D
2
1
R2049
2K_0402_5%~D
2
1
R2047
2K_0402_5%~D
2
1
RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3
SUB_VENDOR
3GIO_ADR_0
3GIO_ADR_1
3GIO_ADR_2
52 RAM_CFG0
52 RAM_CFG1
52 RAM_CFG2
52 RAM_CFG3
53 SUB_VENDOR
53 3GIO_ADR_0
53 3GIO_ADR_1
53 3GIO_ADR_2
R2046
2K_0402_5%~D
2
1
R2045
2K_0402_5%~D
2
1
R2044
2K_0402_5%~D
2
1
ROM_TYPE[1:0]
SUB_VENDOR
MIOAD1
PEX_PLL_TERM
MIOAD0
RAM_CFG[3:0]
VBIOS on card (pull high)

VBIOS with system BIOS (pull down)
MIOBD0
8Mx32 DDR monolithic (64bit NV44 )
0001
8Mx32 DDR monolithic (32bit NV44 )
1001
8Mx32 DDR (Samsung K4D55323QF-GC)
0010
4Mx32 DDR generic (64bit NV44)
0100
4Mx32 DDR generic (32bit NV44)
1100
MIOBD1
MIOBD8
MIOBD9
R2069
10K_0402_5%~D
2
1
R2130
2K_0402_5%~D
2
1
R2061
10K_0402_5%~D
2
1
R2060
10K_0402_5%~D
2
1
R2059
10K_0402_5%~D
2
1
PEX_PLL_EN_TERM100
PCI_DEVID3
PCI_DEVID2
PCI_DEVID1
PCI_DEVID0
PEX_PLL_EN_TERM100
PCI_DEVID3
PCI_DEVID2
PCI_DEVID1
PCI_DEVID0
@ R2058
10K_0402_5%~D
2
1
53
52
52
52
52
STRAPS
CONFIG
8Mx32 DDR
RAM_CFG[3:0]
4Mx32 DDR
4Mx32 DDR
Value
DESCRIPTION
Reserved
0000
300MHz, 1.8V
0001
Reserved
0010
350MHz, 1.8V
0011
1.8V I/O
0100
Reserved
0101
2.5V I/O
0110
Reserved
0111
52 XTALSSIN
C2197
+3.3V_RUN
0.1U_0402_10V7K~D
C2196
10U_0805_10V4Z~D
R2124
10K_0402_5%~D
8
7
6
5
XIN/CLKIN XOUT
VSS
VDD
D_C
PD#
ModOUT REFCLK
@
L2123
1
2
+3VL
P1819GF-08SR_SO8~D
R117
10K_0402_5%~D
2
R2120
0_0402_5%~D
2
1
U2010
1
2
3
4
52 XTALOUTBUFF
R2123
10K_0402_5%~D
2
1
+3.3V_RUN
S0
-1.75% (DOWN)
0.875% (CENTER)
S0 Internal pull up
Title
NVG72M Spread Spectrum & Strapping

Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
57
of
70
L2013
FBMA-L11-453215-900LMA60T_1812~D
1
2
+PWR_SRC
GFX_REF
R2156
2
511K_0402_1%~D
R2150
511K_0402_1%~D
C2225
330U_D2E_2.5VM_R9~D
@ C2234
100P_0402_50V8J~D
1
1
C2235
0.01U_0402_16V7K~D
@ R2167
10K_0402_5%~D
GFX_CORE_CNTRL
R2166
100K_0402_5%~D
52 GFX_CORE_CNTRL
R2168
10K_0402_5%~D
@
1
1
2
+3.3V_RUN
R2163
C2221
2200P_0402_50V7K~D
5
6
7
8
D
D
D
D
0_0402_5%~D
4.99K_0402_1%~D
C2230
0.01U_0402_16V7K~D
R2157
24.9K_0402_1%~D
R2164
118K_0402_1%~D
@
R2162
100K_0402_5%~D
R2161
1.21K_0402_1%~D
1
2
R2160
57.6K_0402_1%~D
@ R2154
2
REF
+
2
@ R2153
2
1
0_0402_5%~D
+
2
2
B
S
S
S
5
6
7
8
TON
C2228
1000P_0402_50V7K~D
15
+VCC_GFX_CORE
3
2
1
FB
Design specs:
TDC: 7A
Peak: 9A
OCP: 12A
VTTR
16
L2001
1UH_MPLC0730L1R0_11A_20%~D
1
2
R2165
301_0402_1%~D
10
VOUT
Q2010
HAT2198R-EL-E_SO8~D
C2223
0.22U_0603_10V7K~D
1
2
VTT
VTTS
23
ILIM
PGND2
12
9
PGND1
1
2
3
22
VDD
2
OVP/UVP
28
TP0
AVDD
11
21
Q2011
FDS6676AS_NL_SO8~D
DL
2
1_0603_5%~D
MAX8632ETI+_TQFN28~D
REFIN
GND
19
VTTI
29
C2233
22U_0805_6.3VAM~D
C2232
22U_0805_6.3VAM~D
LX
+1.2VRUNP
DH
18
STBY#
14
1
C2216
10U_0805_10V4Z~D
20
7
13
+1.8V_SUS
R2155
BST
SHDN#
SKIP#
2
1
R1802
0_0402_5%~D
@
41 GFX_RUN_ON
C
U2008
POK2
27
SS
0_0402_5%~D
1
R1801
2
C2231
1U_0603_10V4Z~D
19,37,39,41,42,46,47,48 RUN_ON
POK1
25
42 GFX_PCIE_PWRGD
GND
VIN
C2229
0.047U_0402_16V4Z~D
24
42 GFX_CORE_PWRGD
GFX_REF
EC
17
De-pop R2152 for ISL88550
26
R2152
61.9K_0402_1%~D
D2001
RB751V_SOD323~D
De-pop D2 for ISL88550

1
2
C2227
0.22U_0402_10V4Z~D
C2222
2.2U_0603_6.3V6K~D
1U_0603_10V4Z~D
GFX_+5V_RUN
C2217
R2151
10_0805_5%~D
1
2
C2220
0.1U_0603_50V4Z~D
+5V_SUS
C2219
10U_1206_25V6M~D
1
D
C2218
10U_1206_25V6M~D
+GPU_PWR_SRC
C2224
330U_D2E_2.5VM_R9~D
C2226
0.1U_0402_10V7K~D
2
G
@
Q2014
output voltage adjustable network
Place near GND pin 24

PJP2001
+VCC_GFX_CORE
+VDD_CORE
PAD-OPEN 43X118
A
PJP2002
+1.2VRUNP
+1.2VRUN
PAD-OPEN 43X79

Title
NVG72M VDD_CORE
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
58
of
70
Version Change List ( P. I. R. List )

Item Page#
D
Title
Date
Request
Owner
31
H/W
05/27
Roger
52
H/W
05/27
Roger
Issue Description
Solution Description
Rev.
Smart card pin definition not match the

cage pin define
Change JSC pin connection, pin1 connect to GND, pin2 connect to

SC_DET# ~ pin10 connect to +SC_PWR
0.2
TV out no out put
Add R1790, R1791, R1792 for 75 ohms
0.2
Remove SW1. Reseve R1793 pad for power switch
0.2
DOCK_HSYNC connect from U190 pin4 to docking connector pin 209,

DOCK_VSYNC connect from U191 pin4 to docking connector pin 210
0.2
40
H/W
05/27
Roger
20
H/W
05/27
Roger
Remove power switch to save placement

spacing
Docking CRT HSYNC, VSYNC connect to the
out put side of buffer
32
H/W
05/27
Roger
Improve RJ45 center tap driving
Connect +2.5VLAN to JIO pin 14 for RJ45 center tap
0.2
39
H/W
05/27
Roger
SPI ROM pass trough mode connect error
Change FDATAIN to ICHO_FDATAIN and connect from U216 pin 106 to U213
pin5. Chagne FDATAOUT to ICHI_FDATAOUT and connect from U216 pin 108 to
R1788 pin1
0.2
39
H/W
05/27
Roger
Flash Recovery strapping issue
Change R474, R475 from 100K to 10K
0.2
ALL
H/W
05/30
Brike
To fix MEC5004 VCC1 power lading
Change net from +3VALW to +3VSRC
0.2
43
H/W
05/30
Brike
None
Delete H21 and change H4 footprint from H_C176D122to H_C176D102
0.2
10
58
H/W
05/30
Brike
To meet VGA core power rating
Change footprint to JUMP_43X118
0.2
11
39
H/W
06/01
Will
For delay MEC5004 internal 1.8V reg.
Modified C1769 from 4.7UF to 22UF.
0.2
Modified R389 from 10K to 1K..
0.2
12
23
H/W
06/01
Will
To improve rise time of serial DO

from SPI ROM.
13
41
H/W
06/01
Will
None
Add pullup R2149 to HDDC_EN# and R2148 MODC_EN#.
0.2
14
39
H/W
06/01
Will
None
Change power on SPI ROM (pins 3 and 8) from +3VALW to +3VSUS
0.2
15
58
H/W
06/01
Brike
None
U2008 pin 16 change pull-up panle to +3VRUN
0.2
16
13
H/W
06/01
Lester
Intel Checklist recommends a 1 nH ferrite

which calculates to 200 ohm.
L34 value change to BLM18PG181SN1_0603~D
0.2
Add resistor for cystal drive current

limiting
Add R32 0 ohm resistor
0.2
17
06
H/W
06/01
Lester
18
39
H/W
06/01
Will
Correct SPI connection for SMSC recommand
ICH7M.P5 connect to MEC 5004.107, MEC5004.108 connect to SPI ROM.5.

ICH7M.P2 connect to MEC 5004.105, MEC5004.106 connect to SPI ROM.2
0.2
Add R1440 100K for LAN_TPM_EN# (VBUS_DET)
0.2
19
38
H/W
06/02
Roger
SMSC recommond add VBUS_DET pull up

resistor
20
33
H/W
06/02
Roger
Add MDC disable circuit
Add R1441, R1442, R1443, Q64. ECE5018 pin 67 program MDC_RST_DIS#
0.2
21
34
H/W
06/06
Roger
None
Change U8 NNCD6.8RL-A to D5 NNCD5.6LG
0.2
23
H/W
06/06
Roger
None
Fixed USB table
0.2
24
27
H/W
06/14
Roger
U10 (STAC9200) pin21 (GPIO0) is anlog

power plane
Change R156 pull up from +3VSUS to +VDDA
0.3
Title
5
Changed-List History 1
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
59
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
25
H/W
06/14
Roger
Change ITP debug to XDP debug definition

for Yonah CPU
Change R387, R417, R391, R436, R416, R415 to 56 ohms. Add R33 56 ohms.
Change R424 to 1K ohms.
0.3
26
39
H/W
06/14
Roger
For easier flash EC code
Add short pad and change R475 to 1K ohms
0.3
27
40
H/W
06/14
Roger
For easier power switch
Change R1793 to a pad like CMOS pad
0.3
28
34
H/W
06/14
Roger
ME change mini card stand off to Latch
Remove H22,H23,H24,H25. Add JCLIP1,JCLIP2
0.3
29
42
H/W
06/14
Roger
30
41
H/W
06/16
Roger
31
58
H/W
06/20
Roger
EMI reqest add caps for the splite power

Add C1806,C1807,C1808,C1809,C1810,C1811
plane that PCI bus routed
Reserve discharg circuit for +5VRUN,+3VRUN,
Add R1793,R1794,R1795,R1796,R1797,R1798,Q87,Q88,Q89,Q90,Q91,Q92
+1.8VRUN,+1.5VRUN,+0.9V_DDR_VTT,+2.5VRUN
power rails
Replace ISL6269 and MAX1510 circuits with
Remove ISL6269 and MAX1510 circuit. Add MAX8632 circuit
MAX8632 solution
32
28
H/W
06/21
Gautam
Reserve ST M45PE20 for LOM EEPROM
Add U3 (ST M45PE20) co-layout with U188 (AT45BCM021B)
0.3
33
42
H/W
06/23
Gary
EMI reqest add caps for the splite power

plane that PCI bus routed
Add C1812~C184 0.047uF_0402. Change C1810, C1811 from 0603 to 0402

package
0.3
34
38
H/W
06/23
Roger
+3VRUN leakage at AC mode in S5
Change R1362 pull up from +3VSRC to +3VRUN
0.3
35
All
H/W
06/24
Roger
Follow Dell USB assignment recommendation
Update USB table, block diagram and connection
0.3
36
39
H/W
06/24
Will
4.7uF cap for VR_Cap pin of REV B 5504
Change C1769 for 22uF 0805 size to 4.7uF 0603 size
0.3
37
All
H/W
06/24
Will
38
28
H/W
06/24
39
H/W
40
39
H/W
0.3
0.3
0.3
Change +3VSRC to +3VALW except for LOM
0.3
Gautam
Change +3V/+5V design to follow Dell

recommendation
IEEE testing the voltage level are closer
to the higher end of IEEE range
Change R1364 from 1.15K to 1.18K_0402_1%
0.3
06/24
Lester
Required by Intel for B0 Yonah.
Add R1378 (51_0603_1%) for TEST2 pulldown
0.3
06/24
Lester
Required by Intel for B0 Yonah.
Populate R1752 and add note "No stuff when doing flash recovery"
0.3
Joey
Change Gfx VDD_CORE controller power

source
Change +5VSUS to +5VRUN.
0.3
Rossana
MDC signal by pass caps not require
Delete C93, C82, C73
0.3
Change JTPAD from 10 pins to 20 pins. Add USB_BIO+/- on U1 pin18,19

connect to JPAD pin9,11
0.3
41
58
H/W
06/27
42
33
H/W
06/28
43
31,40
H/W
06/28
Rossana
Reseved USB port of OZ77C6 for Biometrics

reader
Change +3VSUS to +3VRUN. Depop C2225
44
30
H/W
06/28
Rossana
Gerber Gate List issue
Remove C1783, C1784
0.3
45
34
H/W
06/28
Rossana
Remove L18, R149, and R144 - direct connect USB to Wireless LAN card
0.3
46
34
H/W
06/28
Rossana
Add R1603 connect to JMINI2 pin46, outgoing signal BT_ACTIVE
0.3
47
34
H/W
06/28
Rossana
Add series 0-ohms R1609, R1610 for pins 3 and 5 of JMINI2
0.3
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
60
of
70

Item Page#
D
Date
Request
Owner
Issue Description
Rev.
48
34
H/W
06/28
Rossana
Change C159 and C1785 from 10uF to 0.1uF
0.3
49
34
H/W
06/28
Rossana
Add T1 test point for JMINI1 pin 42
0.3
50
36
H/W
06/28
Rossana
Add C1817~1820 for U180,U178,U179,U177
0.3
51
39
H/W
06/28
Rossana
Change R30 pull up from +3VSRC to +3VALW
0.3
WIRELESS_ON/OFF# connection from pin1 to pin 4 of JSNIFF, pin3 connect

to GND, pin2 NC, pin 1 connect to SNIFFER#
0.3
52
43
H/W
06/28
Rossana
Change sniffer switch type, the active

direction swap
53
36
H/W
06/28
Rossana
Add C1821 1000pF for +DOCK_PWR_SRC, add C1827 1000pF for DOCK_DC_IN
0.3
54
35
H/W
06/28
Rossana
Add C1822 0.1uF_0402 and C1823,C1824 .47uF_0402 for QBUF power
0.3
H/W
06/29
Rossana
Follow Dell "Travis_Audio_0628" reference circut design
0.3
55
C
Title
26,27
56
39
H/W
06/29
Will
Change L4 form MURATA BLM11A121S to BLM18PG181SN1
0.3
57
24
H/W
06/30
Will
Remove C375, C37 for ICH_V5REF_RUN, remove C420 for ICH_V5REF_SUS
0.3
58
24
H/W
06/30
Will
Add R37 0.5 ohm 0603 resistor connect to L42 pin1
0.3
59
24
H/W
06/30
Scott
Populate C347 and C442
0.3
60
24
H/W
06/30
Scott
Change C450 for 220uF to 330uF poly cap
0.3
61
40
H/W
06/30
Roger
62
26,27
H/W
06/30
Rossana
63
26
H/W
06/30
Rossana
Match Dell JTPAD pinout definition, add C62, C63 for BIO power rail
bypass
R162 change from 8.2K to 2.2K, remove D33, D34, Change C1800, C1801
from 1uF to 2.2uF, change C534 from 0.1uF to 1uF, del C533.
HP_NB_SENSE move from GPIO2 to GPIO0 of U10, add series resistor 0 ohm
for this signal
64
H/W
07/07
Roger
Support A1 Yanah CPU
De-pop R513, R514 for A1 yanah CPU
0.3
65
56
H/W
07/25
Roger
Set VRAM VREF to 50% of VDDQ
Change R2035, R2036 to 1K_0402_1%
0.4
66
54
H/W
07/25
Roger
Nvidia G72 design change
De-pop L2008, C2094, C2095, C2096 for FBA_PLLVDD
0.4
67
54
H/W
07/25
Roger
Nvidia G72 design change
Remove C2110 and NC for CLAMP (D11)
0.4
68
54
H/W
07/25
Roger
Nvidia G72 power design change
Remove L2003, L2006, L2007, L2124, L2008, C2094, C2095, C2096
0.4
69
54
H/W
07/25
Roger
Nvidia G72 power design change
Pop L2129, C2206, C2207 for G72_PLLVDD
0.4
0.4
Match Dell JTPAD pinout definition
0.3
0.3
70
H/W
08/01
Roger
Gerber Gate List issue item 6
71
38
H/W
08/01
Roger
Change R110 from 68 ohm to 75 ohm for H_PROCHOT# pull up
0.4
Change the voltage rail on sniffer LED pull-ups (at Q13 and Q16) from
+3VALW to +3VSUS
0.4
43
H/W
08/01
Roger
0.3
Change Change R417 to 150 ohm, R415 to 51 ohm, R387 to 39.2 ohm, R436
to 27.4 ohm, R391 to 680 ohm, R424 to 22.6 ohm
72
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
61
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
73
H/W
08/01
Roger
None
Remove unnecessary capacitor C1805
0.4
74
18
H/W
08/01
Roger
Remove Q84, C1804. Connect U15 pin1 to VGA_THERMDP, U15 pin2

to VGA_THERMDN
0.4
75
40
H/W
08/01
Roger
Hall switch design on touch pad moudle
Depop U46 and C54
0.4
76
18
H/W
08/01
Roger
Add a thermistor circuit to VCP input (pin 3) for the SODIMM temp
sensor. Add Q15, R476, R477, R478, C66
0.4
77
57
H/W
08/01
Roger
Remove Gxf thermal sensor U2007 (ADM1032), C2181, C2182
0.4
78
38
H/W
08/01
Roger
Move NB_MUTE from U215 pin 107 to pin73
0.4
79
16,17
H/W
08/01
Roger
Gerber Gate List issue item 20,21
Remove R178, pop R177
0.4
80
10,23
H/W
08/01
Roger
Depop R253, populate R1799
0.4
81
38
H/W
08/01
Roger
Change board ID for X01
Depop R419 and populate R405
0.4
82
42
H/W
08/02
Roger
Gerber Gate List issue item3
Connect 2.5V_RUN_PWRGD net to LDO_POK pin. Add depop R49
0.4
83
18
H/W
08/02
Roger
Add R1800 31.6K ohm resistor for Vmargin circuit.
0.4
84
23
H/W
08/02
Roger
Change R389 from 1K to 10K
0.4
85
33, 40
H/W
08/04
Steven
Conbine the BT and TP in 30 PIN connector.
Delete JBT and move components to JTAP.
0.4
86
42
H/W
08/04
Steven
Add Depop resister R2169, R2170, R2171.
0.4
87
22, 23
H/W
08/04
Steven
For intel NAPA platform check list 1.5

request.
Chnage R425 from 33Ohm pull-down to 8.2KOhm pull-up. And add pull-up
resister R227 in SIO_RCIN#.
0.4
88
16
H/W
08/09
Roger
V_DDR_MCH_REF discharge issue
Add R51 (100K_0402) connect to V_DDR_MCH_REF
0.4
89
23
H/W
08/09
Roger
Leakage issue when system into S3
Change SIO_EXT_SMI#, SIO_EXT_SCI# pull up to +3VSUS
0.4
90
36
H/W
08/09
Roger
Refer Dell docking reference circuit
Remove R1320, R1319
0.4
91
12
H/W
08/09
Roger
Depop R357
0.4
92
38
H/W
08/09
Roger
Follow Dell EC GPIO assignment
Move SPDIF_SHDN from pin31 to pin76, remove R1601, R1602, net SYSOPT0
0.4
93
28
H/W
08/10
Roger
Add R53 4.7K resistor for LOM_SO pull down
0.4
94
28
H/W
08/10
Roger
95
24
H/W
08/10
Roger
Connect BCM5752
Series no stuff
Connect BCM5752
Series no stuff
pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.

resistor R55
pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.
resistor R55
96
38
H/W
08/10
Roger
R1171 change pull up from +3VRUN to +3VSUS
0.4
97
38
H/W
08/10
Roger
Add a 4.7uF cap for ECE5018 VDDA33 coupling
0.4
0.4
0.4
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
62
of
70

Item Page#
D
Date
Request
Owner
Issue Description
Rev.
98
39
H/W
08/10
Roger
Add a 0 Ohm 0402 resistor R62 in series with the RTC_CELL and EMC5004
pin 121
0.4
99
H/W
08/10
Roger
Follow Intel CRB circuit
R513, R514 pull up to +VCCP
0.4
0.4
100
39
H/W
08/10
Roger
Add resistor R63 (0_0402_5%) between the BIA_PWM signal and MEC5004
pin 73
101
39
H/W
08/10
Roger
Change ITP_DBRESET# connection from EMC5004 pin 55 to pin96
0.4
102
22
H/W
08/10
Roger
Add no stuff C69 (0.1U_0402_16V4Z) between THRMTRIP_ICH# and GND
0.4
103
41
H/W
08/10
Roger
None
Change R1795 pin 1 connect from +1.8VRUN to +1.8VSUS for discharge
0.4
104
23
H/W
08/10
Roger
Move pull-up R388 to pin 1 side of R1787
0.4
0.4
105
H/W
08/10
Roger
Add C70 (0.1U_0402_16V4Z) for

R343, R329 to save spacing
106
H/W
08/11
Roger
Remove R513 and R514 platform no longer use Yonah A00
0.4
107
42
H/W
08/11
Roger
Populate 0ohm for R49, R313, R319, R334
0.4
108
41
H/W
08/11
Roger
Change R494 to 20K
0.4
109
H/W
08/11
Roger
Add no stuff C71 and C72 for +VCCP of JITP
0.4
110
H/W
08/11
Roger
Change R416 and R33 from 56 ohm to 54.9 ohm
0.4
111
12
H/W
08/11
Roger
Delete R333 to follow reference schematics
0.4
112
28
H/W
08/11
Roger
H/W
08/12
Roger
Add R68 (20K_0402_5%) and R70 (39K_0402_1%) for LAN_LOW_PWR voltage

divider connect to pin K5
DOCK_HP_MUTE# for GPIO2 of codec connect to ECE5018 pin 81. EAPD for
GPIO3 of codec connect to additional Q11 gate
113
B
Title
26,27,38
+CK_VDD_MAIN decoupling. Remove R291,
0.4
0.4
114
38
H/W
08/15
Roger
Chnge SYS_PME# pull up from +3VRUN to +3VALW. Add no stuff R71 in series
0.4
115
38
H/W
08/15
Roger
Remove HP_NB_SENSE from ECE5018 pin 106 to pin 82
0.4
106
23
H/W
08/15
Roger
Depop R428,Change value of R75 to 10k ohms
0.4
107
H/W
08/15
Roger
NVidia 27MHz clock has to be 1.2V max
Add R73 150 ohms for CLK_NV_27M voltage divider
0.4
108
52
H/W
08/15
Roger
Add R74 0 ohms in series to PLTRST_DELAY#
0.4
109
40
H/W
08/16
Roger
Change R1750 and R1751 to L1 and L2
0.4
110
40
H/W
08/16
Roger
Change R1750 and R1751 to L1 and L2
0.4
111
39
H/W
08/16
Roger
Remove R166. Move R1635 for AFT_INT# move to page 39
0.4
112
39
H/W
08/16
Roger
Add pull up for open drain out put
Add R93 pull up to +3VALW for BAT_SEL#
0.4
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
63
of
70

Item Page#
D
Title
Date
Request
Owner
Rev.
113
38
H/W
08/16
Roger
Mute internal speaker when docking aduio

jack plug in
Add pull down resistor for DOCK_HP_MUTE#
0.4
114
58
H/W
09/07
Roger
G72MV VDDCORE fixed to 1.0 V
Depop R2164,R2165,R2166,R2167,R2168,Q2014,C2235. Change R2160 from 69.8K

ohms to 57.6K ohms
0.4
115
06
H/W
09/07
Roger
Follow Dell CoE schematics
Change C329, C333 from 33pF to 27pF
0.5
116
43
H/W
09/14
Roger
Blue tooth LED too bright
Change R8 from 3.3K to 1K ohms
0.5
117
41
H/W
09/14
Roger
+1.8VSUS discharge low issue
Populate Q89, R1795
0.5
118
39
H/W
09/14
Roger
LID_CL# can't assert low
Change R482 from 100K to 1M ohms
0.5
119
39
H/W
09/14
Roger
120
34, 39
H/W
10/13
Steven
121
22
H/W
10/15
Steven
R470 from 10K to 100K is

for save the pull up current.
Connect 8051TX to WWAN Pin 19 and Connect
8051RX to WWAN Pin 42.
Gerber Gate List issue item 60. Per M07
ICH reference schematics rev A05.
122
41
H/W
10/17
Steven
123
52
H/W
10/17
Steven
124
19
H/W
10/17
Steven
125
39
H/W
10/18
126
38
H/W
127
23
128
R470 from 10K to 100K
0.5
Modified.
0.5
Add R12 0-ohm tuning resistor between R36 pin2 and X1 pin1
0.5
Change R1795 to a 30 ohm 0603 resistor
0.5
Pop R2131, R2132, and depop Y2001, C2204, C2205, and R2133
0.5
Add R92 pullup to +3VRUN on BIA_PWM
0.5
Steven
Gerber Gate List issue item 67. Use 27MHz

clock from CK410.
Gerber Gate List issue item 65. Make sure
BIA_PWM logic high level is at +3.3V.
MEC5004 per SMSC recommendations to add
circuit for improving POR issue.
Add de-pop components R23, R25, R97, R102, R104, Q20, Q19, C22, D2002.
And change C1769 to 22U.
0.5
10/18
Steven
change board ID to X02
Pop R95, R419 and De-pop R108, R405.
0.5
H/W
10/18
Steven
Change R75 pull-up to +3.3V_RUN.
0.5
40
H/W
10/18
Steven
Add capacitor C23, C35.
0.5
129
H/W
10/19
Steven
Change L32, L40 from 0603 to 0805.
0.5
130
23
H/W
10/19
Steven
Issue Description
10/20
Steven
10/20
Steven
H/W
10/20
Steven
H/W
10/21
Steven
131
H/W
132
34
H/W
128
23
129
28
130
40,43
H/W
10/21
Steven
Gerber Gate List issue item 78. Pull up

LAMP_STAT# to +3VRUN
Gerber Gate List issue item 77. add 10pF
cap between GND and pin2 of L1/L2.
Gerber Gate List issue item 72. Inductor
design follow M07 design on L40,L32
(Size:0805).
Gerber Gate List issue item 79.
SATA_DET# is pull up to +3.3V_SUS.
Change R784 pull up to +3.3V_SUS.
0.5
Change the 32 high frequency decoupling caps, 0805 X5R, from 22uF
to 10uF.
Depop C354 and C618.Change C352, C496, C497, and C365 from 330uF/7mOhm
to 330uF/6mOhm SP caps.
0.5
Connect PLTRST# instead of PLTRST_DELAY# to WLAN and WWAN connectors.
0.5
IMVP_PWRGD glitch issue
Add C82 0.1uF cap on IMVP_PWRGD to filter the glitch
0.5
Q68 surge current
Add R120 (0603) and C80 0.1uF cap Q68 pin1 for reduce surge current
0.5
Added a circuit (FET and Resistors) to keep the BT LED & HDD LED off
when the SNIFFER is turned on
0.5
BT & HDD LED is on when the SNIFFER is

turned on.
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
64
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
131
38
H/W
10/21
Steven
Depop R1440
0.5
132
34
H/W
10/22
Steven
Add Intel WoWLAN Support Circuit
Add pop components Q21 and R101, and un-pop componet R24.
0.5
Change R249 to 332K and R262 to 118K.
0.5
Pop R23, R25, R97, R102, R104, Q20, Q19, C22, D2002.
0.5
133
18
H/W
10/24
Steven
134
39
H/W
10/24
Steven
135
39
H/W
10/24
Steven
136
52
H/W
10/24
Steven
Gerber Gate List issue item 89. Change

OTP trip temperature to 88 deg C.
Gerber Gate List issue item 90. Pop SMSC
workround circuit for 11/7 build.
Gerber Gate List issue item 91. Add a 0
ohm pulldown resistor on TEST_PIN.
Gerber Gate List issue item 94. Connect
GPIO9 of G72 to THERMTRIP3# of EMC4000.
137
58
H/W
10/24
Steven
Change R2155 from 0 to 1 Ohm.
0.5
138
58
H/W
10/24
Steven
Change +5V_RUN to +5V_SUS at VDD.
0.5
139
58
H/W
10/24
Steven
Change +3.3V_RUN to +3.3V_SUS at R2158.
0.5
140
58
H/W
10/24
Steven
Change +1.8V_RUN to +1.8V_SUS at pin 13.
0.5
141
52
H/W
10/24
Steven
Add 10K Ohm resister R116.
0.5
142
43
H/W
10/24
Steven
Gerber Gate List issue item 113. Add a

10K pull-down to TESTMODE pin on G72.
Gerber Gate List issue item 111. Remove
one of the pull-ups on SNIFFER_LED_OFF#.
Remove Pull up resister R1447.
0.5
143
43
H/W
10/24
Steven
More R76 to pin 1 of Q66 and populate
0.5
144
34
H/W
10/24
Steven
Add Intel WoWLAN Support Circuit
Replace Q21 and R101 to D2003.
0.5
145
20
H/W
10/24
Steven
Add resister R101 and R114.
0.5
146
18
H/W
10/24
Steven
Add thermistor circuit R479, R480, R481, C36, Q21.
0.5
147
54
H/W
10/24
Steven
148
54
H/W
10/24
Steven
149
43
H/W
10/24
Steven
150
58
H/W
10/25
Steven
151
40
H/W
10/25
Steven
152
43
H/W
10/25
Steven
153
34
H/W
10/25
Steven
154
58
H/W
10/25
Steven
Gerber Gate List issue item 109. Add 39

ohm resistors at output of U190 and U191.
Gerber Gate List issue item 93. Add
thermistor circuit to VCP2 (pin 40) of
EMC4000. Please route to 5V_CAL_SIO2#
(pin 80, GPIO B4 on ECE5018).
FBCAL_PD_VDDQ terminating resistor.
FBCAL_PU_GND terminating resistor.
Modified SATA_ACT# LED sniffer disable
circuit.
Gerber Gate List issue item 120. Pull up
R2159 to +3.3V_SUS.
Gerber Gate List issue item 119. For fix
the IMVP_PWRGOOD glitch issue.
Gerber Gate List issue item 104. Modified
the SATA_ACT# circuit.
LTRST_DELAY# to PLTRST# on WLAN.
Gerber Gate List issue item 117. Modified
Vcore voltage switching circuit.
Add R110 0Ohm resister.
0.5
Add 0 Ohm resister R112 and connect to EMC4000.
0.5
Change R2032 from 37.4 to 40.2 ohms.
0.5
Change R2104 from 37.4 to 30 ohms.
0.5
Modified the circuit and Add and D2004. Chnage Q1 to 3904,

R1149/1448 change to 10K and 1K.
0.5
Change R2159 to pull up +3V_SUS.
0.5
Change delay circuit R1764 from 200KOhm, C1788 to 470PF to +1.8V_run

and +3V_run.
Modified the circuit Pull up R1449 to +5V_SUS and R1445 to +5V_run.
R2 move to Q1 pin 3, SNIFFER_LED change to GPIO82.
0.5
Chnage PLTRST_DELAY# to PLTRST# on the WLAN connector.
0.5
Change R2168 to +3.3V_SUS.
0.5
0.5
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
65
of
70

Item Page#
D
Rev.
Depop R2120, U2010, R2123, R2124, C2196, C2197 and L2123.Add R117 10K
pull down resister.
0.5
Add D2005 (RB751) in U190, U191 Pin 5.
0.5
Steven
Change 0Ohm resister to Q25.
0.5
10/25
Steven
Cancelled Gerber Gate List issue item 97.
Change +3.3V_SUS to +3.3V_RUN at R2159.
0.5
10/26
Steven
Modified HDD/BT disable circuit.
Move 40 BT Disable circuit to 43.
0.5
Remove R2158 and R2159.
0.5
10/25
Steven
156
20
H/W
10/25
Steven
157
18
H/W
10/25
158
58
H/W
H/W
40, 43
Issue Description
Gerber Gate List issue item 118. Depop
the discrete spread spectrum circuit.
Gerber Gate List issue item 116. Add
diode HSYNC and VSYNC buffers.
For improving Gerber Gate List issue item
94 leakage issue.
H/W
161
41
H/W
10/29
Steven
162
58
H/W
10/29
Steven
Gerber Gate List issue item 121. Delete

resistors R2158 and R2159 on sheet 58.
For improving power sequence add RC
delay and Discharge circuit.
For pop option 8632 shutdown pin source
Add two resister.
163
41
H/W
11/03
Steven
Populate the HDD power switch circuit
Pop Q51, R507, Q50 and Depop PJP24.
0.5
164
31
H/W
11/03
Steven
For passing EMVCo test.
Change R1424 from 220 to 330Ohm.
0.5
165
43
H/W
11/03
Steven
SNIFFER_LED_OFF# is a push/pull signal.
De-pop R1449.
0.5
166
27
H/W
11/03
Steven
To improve audio quality
Change C199 to 0.022uF and pop R164, depop R170.
0.5
167
39
H/W
11/11
Steven
Change SMSC MEC5004 from version C to D.
Change U216 P/N to D version. Depop R102, R97, R25, R23, R104, D2002,
Q19, Q20, C22. And chnage C1769 value from 22UF to 4.7UF.
0.5
Change VRAM P/N to K4D553235F-VC33 (SA55323000L).
0.5
58
H/W
10/26
Steven
168
56
H/W
11/11
Steven
169
39
H/W
11/11
Steven
170
42
H/W
11/11
Steven
Change VRAM parts to K4D553235F-VC33 as

DELL request.
Change DOCK_SMB_CLK and DOCK_SMB_DAT for
consistent with other M07 platforms.
Provide pull-up resister to
GFX_CORE_PWRGD for 1.2Vrun power used.
171
43
H/W
11/11
Steven
For improve LED brightness issue.
172
28
H/W
11/12
Steven
173
20
H/W
11/12
174
27
H/W
175
27
176
42
177
178
A
Request
Owner
57
160
Date
155
159
Title
179
23, 38
7
39
Add R1765, C1804 for delay +3V_run circuit. Add non-populate

component. Q26, Q28, R1803, R1766.
Add Non-populate R1802 and Populate component R1801. For Pop option
8632 Enable source.
0.5
0.5
Change R99 and R100 resister from 100K to 8.2K Ohm. And R1618 change
to 10K.
0.5
Pop R2170 for provide pull-up resister.
0.5
Change R2 value from 56Ohm to 330Ohm. And modified R15 from 150Ohm to
100Ohm.
0.5
Change R120 from 0Ohm to 2KOhm.
0.5
Steven
For Q68 broken issue. Modified R120 value

for protect base pin.
For DELL request change D32 and D2005 to
RB500.
Change D32 and D2005 from RB751 to RB500.
0.5
11/12
Steven
For improve Audio THD+n performance.
Change C113, C114 and C146 from 1UF to 2.2U.
0.5
H/W
11/22
Steven
For adjust Audio gain to 15.6DB.
Pop R170, De-pop R164.
0.5
H/W
12/06
Steven
For improving SUSPWROK turn on issue.
Modified Q7 to 2N7002.
0.6
Change HDDC_EN#, MODC_EN# from ICH7 to ECE5018 Pin 106, 107 (GPIOH2/3),
and Depop R2148, R2149.
0.6
H/W
12/06
Steven
For solving HD warn boot parking sound

issue.
H/W
12/06
Steven
Add a De-pop resister for CPU test 1 PIN.
Add De-pop resister R1387.
0.6
Steven
Add an damping resister for improving

SPI_CS# overshoot issue.
Add 47Ohm resister R127.
0.6
H/W
12/07
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
66
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Steven
For solving SBAT_SMBDAT rising time over

spec issue.
For Gerber Gating list item 14 Depop
pullup resistor on ICH_CLKREQ#.
For Gerber Gating list item 17 Update
board ID to A00
For Gerber Gating list item 11 add 47pF
capacitors to the USB_BIO+/- pins to
fix bio sensor ESD issue.
For GPIOH[3:2] need, chnage pullup
resister power plane to always.
For Gerber Gating list item 18. Change
pullup resister to 10K.
For Gerber Gating list item 21. Add 0 ohm
series resistor to SPI_CS# at MEC5004.
12/19
Steven
For improving USB BIO sensor EMI issue.
H/W
12/20
Steven
28
H/W
12/30
Steven
189
H/W
12/30
Steven
190
39
H/W
01/04
Steven
For DELL EMI request for add a 0.1uF

capacitor in JTPAD.
For Q68 damage issue change form BCP69 to
MBT35200 as ZRS solution.
Intel Design Guide 1.0 to change H_RESET
pull-up resister to 51Ohm.
For enable MEC5004 BIOS write protect
function.
191
27
H/W
01/07
Benson
For adjust Audio gain to 21.6
179
39
H/W
12/09
Steven
180
H/W
12/12
Steven
181
38
H/W
12/12
Steven
182
31
H/W
12/12
Steven
183
41
H/W
12/14
Steven
184
41
H/W
12/15
Steven
185
39
H/W
12/19
186
31
H/W
187
40
188
Rev.
Change R444 to 4.7KOhm resister.
0.6
Depop resister R1761.
0.6
Pop R405, depop R419.
0.6
Add 2 capaciotr C83, C84 in USB_BIO+/-.
0.6
Change pullup resister R2148, R2149 for +3.3V_SUS to +3.3V_ALW.
0.6
Change pullup resister R2148, R2149 for 100K to 10KOhm.
0.6
Add series resister R112 at MEC5004 side.
0.6
Add Pop L5, and depop resister R122, R123.
0.6
Add 0.1uF capacitor C54.
0.6
Use MBT35200 to replace Q68. Modified.
0.6
Change resister R416 to 51Ohm.
0.6
Pop R139 and de-pop R138.
0.6
DePop R170, pop R164.
0.6
Change R120 to 0Ohm, and depop C80.
0.6
DB.
192
28
H/W
01/09
Steven
For Q68 issue to reserve soft start

circuit.
193
58
H/W
01/09
Steven
For avoiding GPU leakage issue.
Change R2168 pull-up from +3.3V_run to +3.3V_sus.
0.6
194
20
H/W
01/20
Steven
Change R101,R114 from 39 ohm to 0 ohm
0.6
195
19
H/W
01/20
Steven
For fixing issue with projector using

long cable.
For stronger the VGS driving in
Battery Mode
Change R235 from 200K ohm to 100K ohm
0.6
196
H/W
01/20
Steven
The Drive Level too high
Change R32 from 0 ohm to 470 ohm
0.6
197
22
H/W
01/20
Steven
The Negative Resistance too low
Change X1 spec from CL=20pF to 6 pF and C38,C40 from 12pF to 2.2pF
0.6
198
38
H/W
01/20
Steven
The Frequency too high & Drive Level too

high
Change Y1 spec from CL=20pF to 12pF and C1451,C1452 from 22P to 15P
0.6
199
31
H/W
01/20
Steven
None
Depop L5 ,pop R122,R123 33 ohm
0.6
200
23
H/W
01/20
Steven
To fix PLTRST_DELAY# glitch
Change R74 from 0 ohm to 10K ohm and pull-down it
1.0
201
23
H/W
02/06
Steven
For solving USB strength issue.
Change R113 from 22.6Ohm to 22Ohm.
0.6
202
39
H/W
02/07
Steven
For solving primary battery hand issue.
Change R447, R449 to 4.7KOHm; R444, R131 to 2.2KOhm.
0.6
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
67
of
70

Item Page#
D
46
Title
Date
Request
Owner
PWR
06/01
Saha
Issue Description
M4 input current more than MAX8734 LDO3

output 100mA
Rev.
Delete PU17 SN74AHC1G32DCKR OR GATE(SA00732018L),

PR49 1K_0402_1%(SD03410018L)
Add PR350 0_0402_5%(SD02800008L) connact LDO3 to ON3
PU18 74AHCT1G08GW AND GATE(SA00000L30L)
PR352 1K_0402_1%(SD03410018L)
PR351 0_0402_5%(SD02800008L)
0.2
MAX8734 LDO soft start issue.
Delete PR27 4.7_1210_5%(SD000007E8L)

Un-pop PC20 4.7U_1206_25V6K(SE093106M8L)
0.2
Un-pop PC252 100U_25V_M(SF10004M008)
0.2
46
PWR
06/01
Saha
46
PWR
06/01
Saha
PWR_SRC noise issue
44/45
PWR
06/01
Saha
+3VALW change to +3VSRC
47
PWR
06/01
Saha
VCCP high/low side MOSFET

IR to Infineon
No-stuff PC207 and PC208
47
PWR
06/01
Saha
VCCP_1P05VP OCP issue(5A)
PR224 change from 124K_0402_1%(SD03412438L) to 60.4K_0402_1%(SD03460428L) 0.2
PWR
06/01
Saha
Choke height issue.(5.6mm change to 5.0mm)
PL14 and PL27 change from 1.4U_HMU1356-1R4_15.5A H5.6mm(SH04814AM8L)

to 1.4U_HMU1350-1R4_15A H5.0mm(SH000004H8L)
0.2
0.2
Rename net +3VALW to +3VSRC
change from
0.2
0.2
0.2
PQ38 change from IR7821(SB57821008L) to BSO072N03S(SB00000418L)

PQ40 change from IR7832(SB57832008L) to BSO072N03S(SB00000418L)
Un-pop PC207 and PC208 10U_0805_6.3V5K(SE093106M8L)
47/48
44
PWR
06/01
Saha
PSID materiel change by Dell
PQ1 change from BSS138_SOT23(SB50138008L) to FDV301_SOT23(SB50301008L)
50
PWR
06/01
Saha
New version MAX8731 PIN1 define GND
Un-pop PR337 0_0402_5%(SD02800008L),Pop PR336 0_0402_5%(SD02800008L)
10
50
PWR
06/02
Saha
Add RC filter at pin 23 of MAX8731
Add PR360 1_0603_1%(SD014100B8L)

PC253 220P_0402_50V7K(SE074221K8L)
0.2
11
46/48
PWR
06/02
Saha
Add support for Reliability voltage

margining tests
Add PR356, PR355 and PR359 0_0603_5%(SD01300008L)

PR353 and PR354 0_0402_5%(SD02800008L)
0.2
12
48
PWR
06/16
Saha
Change output capactior rating voltage

from 6.3V to 2.5V
PC70 and PC71 change from 330U_D3L_6.3V_R25(SGA00000N8L)

to 330U_D2E_2.5VM_R15(SGA19331D0L)
0.3
13
49
PWR
06/22
Saha
Change VCORE DPRSLPVR input resistor value
PR248 change from 0_0402_5%(SD02800008L) to 499_0402_1%(SD03449900L)
0.3
14
50
PWR
06/22
Saha
Add power limit schematic
Depop
PR364
PR367
PC256
PC259
0.3
15
46
PWR
06/29
Saha
Discreate 3VALW and 3VSRC.
0.2
PR361 80.6K_0402_1%, PR362 200K_0402_1%, PR363 121K_0402_1%,

3.01K_0402_1%, PR365 499K_0402_1%, PR366 100K_0402_1%,
100K_0402_1%, PC254 0.01U_0402_25V8K, PC255 100P_0402_50V8K,
100P_0402_50V8K, PC257 100P_0402_50V8K, PC258 0.01U_0402_25V8K,
10P_0402_50J8K, PQ81 RHU002N06_SOT323, PU19 LM393DR_SO8
Add PU17 SN74AHC1G32DCKR OR GATE(SA00732018L),

PR49 1K_0402_1%(SD03410018L)
PQ82 FDC655BN_NL(SB000004P8L )
Delete PR352 1K_0402_1%(SD03410018L)
PR351 0_0402_5%(SD02800008L)
PR350 0_0402_5%(SD02800008L)
PU18 74AHCT1G08GW AND GATE(SA00000L30L)
0.3
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
68
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
16
46
PWR
06/29
Saha
Add V+ input Resistor
Add PR27 0_1206_5%(SD00100000L)
17
45/51
PWR
06/29
Saha
Battery conn. and battery selector +3VSRC

change to +3VALW
Rename +3VSRC to +3VALW
18
47
PWR
06/29
Saha
ISL6227 Issue
change 1.05V/1.5VHigh/Low side MOSFET
change 1.05V choke
adjust OCP and ISEN value
VCC Change from +5VRUN to +5VSUS.

0.3
EN1 and EN2 change from RUNPWROK to RUN_ON.
PR221 change from 20K_04-2_1%(SD03420028L ) to 19.6K_0402_1%(SD00000358L)
PQ8 change from FDS6994S(SB56994008L) to FDS8880(SB000004U8L)
Add PQ83 FDS6670AS(SB000004T8L)
PQ38 change from BSO072N03S(SB00000418L) to FDS8880(SB000004U8L)
PQ40 change from BSO072N03S(SB00000418L) to FDS6670AS(SB000004T8L)
PL27 change from 1.4U_HMU1350(SH000004H8L) to 1.5U_SIL104(SH04215A08L)
Add PC261 0.01U_0402(SE068103K8)
Add PC262 and PC263 2200P_0402(SE074222K8L)
PR219 change from 825_0402_1%(SD03482508L) to 1.43K_0402_1%(SD03414318L)
PR220 change from 825_0402_1%(SD03482508L) to 2.1K_0402_1%(SD03421018L)
PR223 change from 69.8K_0402_1%(SD03469828L) to 124K_0402_1%(SD03412438L)
PR224 change from 60.4K_0402_1%(SD03460428L) to 124K_0402_1%(SD03412438L)
0.3
19
49
PWR
06/29
Saha
ISL6260 Issue
Delete PR338, PR339 and PR340 2.7_0603_5%

Change PC246, PC247, PC248 to 1500P_0805-----Unpop
Change PH1 from ERTJ1VR103J(SL20000020L) to NCP15WM474J03RB(SL20000098L)
PR284 change from 15.8K_0402_1%(SD03415828L) to 0_0402_5%(SD02800008L)
Add PC260 0.1U_0603(SE042104K8L)
20
50
PWR
06/29
Saha
Change +VCHGR output CAP from 1206 to 1210
PC113 and PC114 change from 10U_1206(SE142106M8L) to 10U_1210(SE056106K8L)0.3
21
47
PWR
08/12
Saha
Add VSEN capacitor
Add PC265 and PC264 100P_0402_50V8K(SE071101K8L)
0.4
22
47
PWR
08/12
Saha
Delete PGOOD pull high resistor
Delete PR283 100K_0402_1%(SD03410038L)

De-pop PR195 100K_0402_1%(SD03410038L)
0.4
23
48
PWR
08/12
Saha
Delete reliability test resistor
Delete PR283 110K_0603_1%, PR359 0_0603_1%, and PR82 59.6K_0603_1%
0.4
24
49
PWR
08/12
Saha
Adjust VCORE load line
PR267 change from 7.87K_0402_1%(SD03478718L) to 9.09K_0402_1%(SD034909100)0.4

PR231, PR331, and PR270 change from 7.68K_0402_1%(SD00000238L) to
7.68K_0805_1%(SD00000B08L)
25
49
PWR
08/12
Saha
Delete H_PROCHOT# resistor
Delete PR235 0_0402_5%(SD02800008L )
0.4
26
50
PWR
10/17
Saha
Add RC filter in FBSA/B PIN
Add PR368 and PR369 100_0402_5%(SD02810008L)

Add PC266 and PC267 0.01U_0603_50V7K(SE025103K8L)
Un-pop PR371 and PR370 0_0402_5%
0.5
27
46
PWR
10/17
Saha
EMI request: change BST3 resestor
Change PR32 from 0_0603_5%(SD01300008L) to 2.2_0603_5%(SD013220B8L)
0.5
28
46
PWR
10/17
Saha
change 3V out put CAP height
change PC31 from 330U_6.3V_R25 H1.9(SGA00001C8L ) to

330U_6.3V_R25 H2.8(SGA0000089L)
0.5
0.3
0.3
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
69
of
70

Item Page#
D
Title
Date
Request
Owner
Issue Description
Rev.
29
50
PWR
10/17
Saha
Populate UL circuit
Populate PR361-PR367, PC254-259, PU19, PQ81.

Change PR361 from 80.6k to 0. Change PR362 from 200k to 301k.
Change PR363 from 121k to 59k. Change PR364 from 3.01k to 27.4k.
Change PR365k from 499k to 4.32Meg.
0.5
30
49
PWR
10/20
Saha
Change VCC_CORE OCP, SOFT,

and DPRSTP# value
PR260 change from 20K_0402_1%(SD03420028L) to 11.5K_0402_1%(SD03411520L)

PC187 change from 0.022U_0402_16V7K(SE076223K8L) to
0.01U_0402_16V7K(SE076103K8L)
Add PR372 0_0402_5%(SD02800008L)
Delete PR246 0_0402_5%(SD02800008L)
Un-pop PR249 0_0402_5%(SD02800008L)
0.5
31
48
PWR
10/20
Saha
Change PU6 BST resistor
PR73 change from 0_0603_5%(SD01300008L) to 1_0603_5%(SD013100B8L)
0.5
32
44
PWR
10/20
Saha
Change PQ2 from RUH002N06 to 3904
PQ2 change from RHU002N06(SB50206008L) to MMST3904(SB000002R0L)
0.5
33
49
PWR
11/12
Saha
Adjust CPU Load Line
PR267 change from 9.09K_0402_1%(SD03490918L) to 10.5K_0402 _1%(SD03410528L)

PR261 change from 3.57K_0402_1%(SD03435718L) to 2.47K_0402 _1%(SD03424318L)
0.5
Add PC252 100U_25V_(6.3X7.7)(SF10004M08L)
Add PC215 0.068U_10VX7R_0402 (SE102683K8L)
34
50
PWR
12/6
Saha
Deeply dischargered battery problem.
Add PD54 1SS355_sod323(SC1SS35500L)

Add PR373 1K_0603_1%(SD01410018L)
0.5
35
50
PWR
12/6
Saha
Follow Coe A09 schematic
Add PC267 3300PF_0402_50V7K(SE074332K8L)

Depop PC266 0.01U_0603_50V7K(SE025103K8L)
0.5
36
47
PWR
12/15
Saha
Follow GGL 1214 item19.
Depop PR12
0.6
37
49 50 46
PWR
1/7
Saha
For acoustical issue
Add PC270~PC273 and PC268
10U_1206_25V6M(SE142106M8L)
0.6
Title
5
Size
Document Number
Date:
Rev
1.0
LA-2792
Sheet
1
70
of
70

Dell Latitude D620 Laptop Schematics

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Dell Latitude D620 Laptop Schematics

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A

MODEL NAME : HAL00

Travis (DIS) Schematics Document

uFCPGA Mobile Yonah

Compal Electronics, Inc.

BOM NO. 45135731L01

Tuesday, February 07, 2006

PCI Express BUS

AMP & INT.

USB3 on the top of connector,

Compal Electronics, Inc.

Tuesday, February 07, 2006

USB5 on right side of

+3.3V_RUN/ +1.5V_RUN 100MHz

FSB 533/667 MHz

CPU ITP Port

Tantalum or Polymer Capacitors :

Low ESR Mark : 45 m ohm

S5 S4/AC don't exist

Capacitor Spec Guide:

+-0.05PF +-0.1PF +-0.25PF +-0.5PF

USB Hub (5018)

Smart Card --> BIO

+100,-0% +30,-10% +20,-10% +40,-20% +80,-20%

Index and Config.

Tuesday, February 07, 2006

+VCC_CORE +1.5V_RUN +1.05V_VCCP

Compal Electronics, Inc.

Tuesday, February 07, 2006

SMBUS Address [TBD]

SMBUS Address [D2]

SMBUS Address [C8]

SMBUS Address [TBD]

SMBUS Address [A0]

SMBUS Address [2F]

SMBUS Address [A2]

SMBUS Address [C4, 72, 70, 48]

SMBUS Address [16]

SMBUS Address [16]

SMBUS Address [12]

Tuesday, February 07, 2006

Place crystal within

1 (DIS) 27M_out 27M SSout

Solder Thermal Pad to GND. Add min. 4 vias.

Place near CK410+

NOTE: Place Decoupling as close as

Place near each pin

Compal Electronics, Inc.

Tuesday, February 07, 2006

Pop R1378 required by

H_THERMDA, H_THERMDC routing together.

Tuesday, February 07, 2006

Length match within 25 mils

Layout close CPU PIN AD26

Layout close CPU

Resistor placed within

POWER, GROUNG, RESERVED SIGNALS AND NC

Tuesday, February 07, 2006

Place these inside 1

Place these inside 1

Place these inside 1

Place these inside 1

22uF 0805 X5R -> 85 degree C

High Frequence Decoupling