__________________________________________________CMOS VLSI Practicals Using MICROWIND V3.

Experiment 3: Logic Gates

Aim: To design and implement logic gates on silicon using ASIC design tool.
Theory:
NAND and NOR are acting as a universal gate,any gate can be designed using this gates.but Nand
gate is more fast compare to nor gate, why ?so it is mostly used gate in design.
If both inputs of gate is at 1 than its output is 0,otherwise output is 1 give function of NAND gate.
In CMOS design ,the NAND gate consists of two nMOS in series connected to two pMOS in parallel.
The schematic diagram of CMOS NAND gate is reported below;
If both inputs of gate is at 0 than its output is 1,otherwise output is 0 give function of NOR gate.
In CMOS design ,the NOR gate consists of two pMOS in series connected to two nMOS in parallel.
The schematic diagram of CMOS NOR gate is reported below;
If odd no. of inputs of gate is at 1 than its output is 1,otherwise output is 0 give function of EX-OR gate.
.
Schematic diagram and CMOS layout of XOR gate is shown below;
Analog simulation of NAND,NOR and XOR gate is shown below;
Logic symbol:

Truth Table:
A
0
0
1
1

B NAND XOR NOR

0
1
0
1
1
0
1
0
0
0
1
0
1
0
0
0

Physical Layout:
Nand
Width: 2.3m (38 lambda)
Height: 4.3m (72 lambda)
NMOS 2
PMOS 2
Analog Simulation of NAND Gate:
ni logic Pvt. Ltd., Pune
www.ni2designs.com

__________________________________________________CMOS VLSI Practicals Using MICROWIND V3.0

XOR
Width: 11.5m (191 lambda)
Height: 6.2m (104 lambda)
NMOS 8
PMOS 8

Analog Simulation of XOR Gate:

ni logic Pvt. Ltd., Pune

www.ni2designs.com

__________________________________________________CMOS VLSI Practicals Using MICROWIND V3.0

NOR
Width: 2.7m (45 lambda)
Height: 3.7m (62 lambda)
NMOS 2
PMOS 2

Analog Simulation of NOR Gate:

Remark:

ni logic Pvt. Ltd., Pune

www.ni2designs.com