Static CMOS Circuits

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 Static CMOS Circuits

 In Static CMOS circuits with n inputs, 2n transistors

are needed.
 nMOS block is a dual of the pMOS block.
 What ever is in series in nMOS, appears in parallel

in pMOS and vice versa.

 CMOS gates consume power only during the
transition of inputs.

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Static complementary gate structure

Pull-up and pull-down networks

VDD

pull-up
network
inputs out
Pull-down
network
VSS

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 Pull-up/pull-down network design

 Pull-up and pull-down networks are duals.

 To design one gate, first design one network, then

compute dual to get other network.

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 Static CMOS Circuits

 Static CMOS Logic Structure

 Logic Gates – Inverter, NAND and NOR
 Complex Structures
 AOI/OAI Structures
 Stick Diagrams
 Layouts

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Inverter

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NAND Gate

Va Vb Vout
0 0
0 1
1 0
1 1

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NOR2 Gate

Va Vb Vout
0 0
0 1
1 0
1 1

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 Static CMOS Circuits

 Static CMOS Logic Structure

 Logic Gates – Inverter, NAND and NOR
 Complex Structures
 AOI/OAI Structures
 Stick Diagrams
 Layouts

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Complex CMOS Structures

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Xor gate

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 Static CMOS Circuits

 Static CMOS Logic Structure

 Logic Gates – Inverter, NAND and NOR
 Complex Structures
 AOI/OAI Structures
 Stick Diagrams
 Layouts

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 AOI/OAI gates

 AOI = and/or/invert; OAI = or/and/invert.

 Implement larger functions.
 Pull-up and pull-down networks are compact: smaller
area, higher speed than NAND/NOR network
equivalents.

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AOI example

invert

or

and

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 Problems

A C

B D
Y
A B

C D

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 Problems

 Design a CMOS circuit to implement the logic

Y = A'B' + B'C + C'A
 Make a 2 input CMOS XOR gate to implement
Y = A  B.
 CMOS XOR and XNOR gates are similar. Just one of the
input pairs (A and A' are reversed).

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 Static CMOS Circuits

 Static CMOS Logic Structure

 Logic Gates – Inverter, NAND and NOR
 Complex Structures
 AOI/OAI Structures
 Stick Diagrams
 Layouts

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 Stick diagrams

 A stick diagram is a cartoon of a layout.

 Does show all components/vias (except possibly tub
ties), relative placement.
 Does not show exact placement, transistor sizes, wire
lengths, wire widths, tub boundaries.

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Stick Diagram of NOR gate

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 Dynamic latch

Stores charge on inverter gate

capacitance:

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 Dynamic latch stick diagram

VDD

in
out

VSS
phi’ phi
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 Static CMOS Circuits

 Static CMOS Logic Structure

 Logic Gates – Inverter, NAND and NOR
 Complex Structures
 AOI/OAI Structures
 Stick Diagrams
 Layouts

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 Layout

VDD

D Q’

VSS
 ’
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Layout of NOR Gate

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Stick Diagram of NAND gate

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