2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)

Mexico City, Mexico. September 30-October 4, 2013

Generalized Admittance Matrix Model of

Fully-Differential VCVS
C. Snchez-Lpez
Department of Electronics, Autonomous University of Tlaxcala
Apizaco, Tlaxcala 90300, Mexico
Email: carlsanmx@yahoo.com.mx
On the other hand, the behavior of each active device is
traditionally modeled with controlled sources and the behavior
of each of them is included in the system equations by using
the element stamp method [2]-[4]. Stamping means to include
in appropriate positions of the system of equations, the
contribution of each passive and active element of a circuit.
However, the use of controlled sources has a negative impact
on the filling of the admittance matrix using MNA, since
additional columns and rows along with nonzero elements
must be added. It is a serious shortcoming since the system of
equations of analog circuits designed with fully-differential
active devices becomes large and dense. As consequence, the
computational complexity increases when recursive
determinant-expansion techniques are applied in order to
compute fully-symbolic small-signal characteristics of analog
circuits [1]-[7]. Therefore, techniques to reduce the size of the
admittance matrix are widely demanded.

Abstract This paper proposes a new admittance matrix

model to approach the behavior of a fully-differential voltage
controlled voltage source at low-frequency. The new model is
simpler than that reported in the literature, because it not only
can directly be used to fill the admittance matrix without extra
variables, including gain and input-output impedances, but also
the new stamp has few nonzero elements. Our results indicate
that the proposed model can directly be used into a standard
nodal analysis, obtaining a reduced and sparse system of
equations. Two analysis examples are provided, showing that
fully-symbolic transfer functions of a single-ended and balanced
differential amplifier can be computed by using nodal analysis.
But even, the symbolic expression of the common-mode rejection
ratio of the differential amplifier is also computed. As a
consequence, the computational complexity during the solution of
the system of equations is reduced when recursive determinantexpansion techniques are applied.

This disadvantage has partially been overcome by the

deduction of the element stamp for a voltage-controlled
current source (VCCS), current-controlled voltage source
(CCVS) and current-controlled current source (CCCS), all in
their fully-differential versions [2], [5]. However, the element
stamp for a fully-differential voltage-controlled voltage source
(FD-VCVS) has not been deduced until today, in order to be
used directly in a nodal analysis (NA) [12]-[14]. Therefore, as
an extension of [5], [13], [14], a generalized model for a FDVCVS is herein introduced and it can be used in a standard
NA for generating fully-symbolic small-signal characteristics
of single-ended or fully-differential voltage-mode analog
circuits at low-frequency. We would like to note that the
proposed admittance matrix model can also be used to
formulate the system of equations of linear and nonlinear
circuits at high-frequency by applying NA, including a singlepole or two-poles [8], [11], [15]. The paper is structured as
follows. In Section II, the NA and MNA methods together
with the traditional element stamp of a VCVS are briefly
revised. In Section III, the derivation of the admittance matrix
model for the FD-VCVS is introduced. Symbolic analysis
examples of single-ended and balanced differential amplifiers
are introduced in Section IV. Finally, in Section V conclusions
are summarized.

Keywords Nodal analysis, operational amplifier, controlled

sources, symbolic analysis, commoun-mode rejection ratio, nullor.

I.
INTRODUCTION
Circuit analysis techniques are the cornerstone of any
circuit simulator. In the past, several circuit analysis
techniques were developed and some of them have been
implemented into computer-aided design (CAD) tools [1]-[4].
From all the circuit analysis techniques reported in the
literature, the modified nodal analysis (MNA) method has
widely been used in circuit simulators like Hspice, where the
element stamp method is used to fill the admittance matrix. In
this way, numerical simulations can be done in order to
forecast the circuit behavior [1]-[4]. On the one hand,
numerical results don't give any information on that
component plays a most important role in the circuit
performance parameters, since numerical simulations are only
used to verify the circuit behavior on an isolated point of the
design space. In this scenario, symbolic analysis techniques
are very useful, since a symbolic formula provides direct
insight on the influence of each circuit component over the
circuit behavior and on all the design space [5]-[14].
Therefore, symbolic analysis is an essential complement to
numerical simulations.
This work has been supported in part by the projects UAT-121AD-R and
CACyPI-UATx-2013 both funded by Autonomous University of Tlaxcala,
Mexico.

IEEE Catalog Number CFP13827-ART

ISBN 978-1-4799-1461-6
978-1-4799-1461-6/13/$31.00 2013 IEEE

449

II. TRADITIONAL ELEMENT STAMP OF A VCVS

In computer-aided circuit analysis, the formulation method of
the system of equations should offer an efficient set-up time,

2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Mexico City, Mexico. September 30-October 4, 2013
Va

Vc

+ Av(Va-Vb)
Vb

Vd

Figure 1. Ideal voltage-controlled voltage source

low programming effort, low storage requirements and high

execution speed of the CAD tool. In this sense, the NA is a
classical method which meets these requirements [1]-[4],
which is represented by

YnV = J

Figure 2. Equivalent circuit for FD-VCVS

(1)

elements is increased into the admittance matrix for each

VCVS used, but also the size of the system of equations
increases [1]-[4]. In front of those situations, the
computational complexity increases when recursive
determinant-expansion techniques are applied to compute the
determinant of the admittance matrix. Therefore, techniques to
obtain sparse and small matrices are widely demanded.

where Yn represents the node admittance matrix, V is the node

voltage vector and J is the current source vector. However,
although (1) is built using the element stamp, it is incapable to
include controlled sources and independent voltage sources
[1]-[4]. These disadvantages have been overcome in the MNA
method, where those elements whose currents are controlling
variables are included in the system of equations and the
corresponding branch constitutive relations as additional
equations [1]-[4]. The MNA matrix can, in general, be
expressed as

Yn

B V J
=
D I E

In this context, our goal is to deduce the element stamp for

the FD-VCVS shown in Fig. 2, in order to be used directly in
(1). As one see, Fig. 2 includes input resistances (Z1=1/Y1 and
Z2=1/Y2 which are ideally infinite), output resistances
(Z3=1/Y3 and Z4=1/Y4, which are ideally zero) and gain (Av,
ideally infinite). But even, capacitors can also be included in
the c- and d-terminals from Fig. 2, in order to model a single
pole. Simple analysis of Fig. 2 allows obtaining a set of
equations given by

(2)

where I is a branch current vector, E is a independent voltage

vector, B, C and D correspond to branch equations for the
branches whose currents are in I. The MNA matrix can also be
generated using the element stamp in a straightforward
manner. As first version, the stamps for controlled sources
were proposed to build (2) [2]. Later on, improved versions
were developed in order to directly be used in (1). Thus, the
stamp for a single-ended or fully-differential VCCS is given in
[1]-[3]. The stamps for CCVS and CCCS, when the input
current is flowing in one direction can be found in [3].
Furthermore, admittance matrix models for FD-CCVS and
FD-CCCS are given in [5]. All these stamps can directly be
used into a NA instead of MNA. However, the VCVS shown
in Fig. 1, cannot be directly included in (1), since its stamp is
given by
a
b
c
d
I

b
c

d
m + 1 Av

Av

1 1

I a = Y1V a
I b = Y 2V b

From (4), the generalized admittance matrix is obtained as

a
b
c
d

a Y1

b 0
c AvY3

d AvY4

0
Y2
AvY3
AvY4

0 0 Va I a

0 0 Vb I b
=
Y3 0 Vc I c

0 Y4 Vd I d

(5)

In the particular case of a single output (i.e., a and d are

grounded in Fig. 1 and Fig. 2) and by analyzing (3) along with
(5), the element stamps are reduced to
b
0

0
m + 1 A v

(3)

b
c

III. ELEMENT STAMP OF A FD-VCVS

Operational amplifiers (Opamp) have been one of the most
significant building blocks in the analog signal processing [1][15]. Basically, its behavior can be modeled by using a VCVS,
for the single-ended case and two VCVS are necessary in the
differential case [5], [7]. From point of view of computeraided circuit analysis, not only the number of nonzero

IEEE Catalog Number CFP13827-ART

ISBN 978-1-4799-1461-6
978-1-4799-1461-6/13/$31.00 2013 IEEE

(4)

I c = Av Y3V a + Av Y3V b + Y3V c

I d = A v Y 4 V a A v Y 4V b + Y 4 V d

c
0
0
1

I
0

1 ,
0

0
b Y2

c AvY3 Y3

(6)

From (6), one can see that the left-side stamp has three
nonzero elements and the order is 33, while that the rightside stamp has also three nonzero elements but the order is
22. Furthermore, the former stamp (left-side from (6)) is
modeling the behavior of the VCVS without input-output
resistors; while in the last one (right-side from (6)), they are
already included. Therefore, (6) can be used to formulate the

450

2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Mexico City, Mexico. September 30-October 4, 2013

(a)
(b)
Figure 3. (a) Inverting amplifier (b) Equivalent model with a VCVS
(a)
(b)
Figure 4. (a) Balanced differential amplifier (b) Equivalent circuit

system of equations of single-ended analog circuits by using

MNA and NA, respectively; whereas (5) can be used to build
the admittance matrix of fully-differential analog circuits by
applying NA and the order of the matrix is lower than whether
the MNA method is applied.

V2
g1
R

2
g1 + g 2
Vin
R1
+ g2
Av

IV. ILUSTRATIVE EXAMPLES

As first example and to show the potentiality of the
proposed stamp, let us consider the inverting amplifier shown
in Fig. 3(a). The equivalent circuit by including input-output
resistors is shown in Fig. 3(b), where a Norton equivalent has
been applied in the independent voltage source in order to be
transformed to current source. According to Fig. 3(b), the
stamps given by (6) are applied to fill the admittance matrices
and given by
g 1Vin g1 + g 2 + Y2

g2
0 =
0
0

A
0
v

g1Vin g 1 + g 2 + Y2

=
0 Av Y3 g 2

g 2

g 2 + Y3

Y3

Y3

Y3

0 V1

0 V 2
1 V3

0 iVCVS

As second example, let us consider the balanced

differential amplifier shown in Fig. 4(a). In this case, one
VCVS must be used for each output terminal [1]-[4].
Admittances are included for each input-output terminal.
Thus, Fig. 4(b) shows the equivalent circuit. According to Fig.
4(b) and (3), the system of equations by using the MNA
method is given by (11). On the other hand, Fig. 4(b) along
with (5) are used to directly fill the admittance matrix, which
is given by
0
0 V1
g 2a
g1aVn g1a + g 2a + Y2

g
g
Y
g
0
0
+
+

g
V
1b
2b
1
2b V2 (12)
1b p =
0 g 2a + Av3Y3
g 2a + Y3
0 V3
Av3Y3

g 2b + Y4 V4
0
g 2b + Av4Y4
0 Av4Y4

(7)

g 2 V1

g 2 + Y3 V 2

Assuming
ideal
input-output
resistors
(i.e.,
Y1=Y2=Z3=Z4=0), the output differential voltage defined as
Vodm=V3-V4 can be computed from (11) or (12), and the
differential-mode voltage gain, defined as Adm=Vodm/(Vp-Vn), is
given by

(8)

Note that the size of (7) is 44 with 10 nonzero elements,

whereas (8) has 4 nonzero elements and the order is 22. As a
consequence, the computational complexity will be
diminished when recursive determinant-expansion techniques
are applied to solve (8) instead of (7). From (7) and (8), the
output voltage is taken at V2 and given by
g1 ( g 2 Y3 Av )
V2
=
Vin ( g 2 + Y3 )(g1 + Y2 ) + g 2Y3 (1 + Av )

Adm =

g 1a + g 2 a + Y2

g 2a

A
v3

Av 4

IEEE Catalog Number CFP13827-ART

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g1a ( g1a + g2a )( Av3 + Av 4 )

(13)
g 2b Av 4 ( g1a + g 2a ) + g 2a Av3 ( g1b + g 2b ) + ( g1a + g 2a )( g1b + g 2b )

On the other hand, the common-mode output voltage

defined as Vocm=(V3+V4)/2 can be computed by shortcircuiting the input terminals in Fig. 4(a) and by applying a
common-mode
input
voltage
source
defined
as
Vicm=(Vp+Vn)/2. Figure 4(b) can be again used to formulate
the systems of equations by using the element stamps, which

(9)

By considering ideal input-output resistors (i.e., Y2=Z3=0),

(9) is reduced to

g 1aVn

g1bV p
0

0 =
0

0
0

(10)

g 2a

g 1b + g 2 b + Y1
0

0
g 2 a + Y3

g 2b
0

0
Y3

0
0

g 2b
0
0

0
Y3
0

g 2 b + Y4
0
Y4

0
Y3
0

Y4
0
Y4

Av 3
Av 4

0
0

0
0

1
0

0
1

451

0 0 V1

0 0 V2
0 0 V3

0 0 V4
1 0 V5

0 1 V6
0 0 iVCVS 3
0 0 iVCVS 4

(11)

2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Mexico City, Mexico. September 30-October 4, 2013
are given by (11) and (12), respectively; but with the
following constraints: Vn=Vp=Vicm. As a consequence, the
common-mode voltage gain, defined as Acm=Vocm/Vicm, is
given by

REFERENCES
[1]

P. M. Lin, Symbolic Network Analysis, Amsterdam: Elsevier Science

Publishers, 1991.

[2]

( g1a g 2b g1b g 2a )( Av3 Av 4 )

(14)
=
g 2b Av 4 ( g1a + g 2a ) + g 2a Av3 ( g1b + g 2b ) + ( g1a + g 2a )(g1b + g 2b )

J. Vlach, and K. Singhal, Computer Methods for Circuit Analysis and

Design, Van Nostrand Reinhold Company, New York, 2nd Ed., 1993.

[3]

Therefore, the common-mode rejection ratio (CMRR) is

computed as

F. V. Fernndez, A. Rodrguez-Vzquez, J. L. Huertas, and G. Gielen,

Symbolic Analysis Techniques: Applications to Analog Design
Automation, Piscataway, NJ: IEEE Press, 1998.

[4]

M. Fakhfakh, E. Tlelo-Cuautle, and F.V. Fernndez, Design of Analog

Circuits Through Symbolic Analysis, Bentham Sciences Publishers Ltd.,
2012.

[5]

C. Snchez-Lpez, F.V. Fernndez, and E. Tlelo-Cuautle, Generalized

Admittance Matrix Models of OTRAs and COAs, Microelectron. J.,
vol. 41, no. 8, pp. 502-505, Aug. 2010.

[6]

C. Snchez-Lpez, F.V. Fernndez, E. Tlelo-Cuautle, and S. X.-D. Tan,

Pathological Element-Based Active Device Models and Their
Application to Symbolic Analysis, IEEE Trans. Circuits Syst. I: Reg.
papers, vol. 58, no. 6, pp. 1382-1395, Jun. 2011.

[7]

C. Snchez-Lpez, Pathological Equivalents of Fully-Differential

Active Devices for Symbolic Nodal Analysis, IEEE Trans. Circuits
Syst. I: Reg. papers, vol. 60, no. 3, pp. 603-615, Mar. 2013.

[8]

C. Snchez-Lpez, E. Martnez-Romero, and E. Tlelo-Cuautle,

Symbolic Analysis of OTRAs-based circuits, J. Appl. Research and
Tech, vol. 9, pp. 69-80, Apr. 2011.

[9]

C. Snchez-Lpez, B. Cante-Michcol, F.E. Morales-Lpez and M.A.

Carrasco-Aguilar, Pathological equivalents of CMs and VMs with
multi-outputs, Anal. Integr. Circuits and Signal Process, vol. 75, no. 1,
pp. 75-83, Apr. 2013.

Acm

CMRR =

A dm
g 1a ( g 1a + g 2 a )( Av 3 + Av 4 )
=
Acm
( g 1a g 2 b g 1b g 2 a )( Av 3 Av 4 )

(15)

Note that whether R1a=R1b=R1 and R2a=R2b=R2, the

CMRR=, Acm=0 and (13) is reduced to
Adm

( Av3 + Av 4 ) R2

R1 ( Av3 + Av 4 ) + R1 + R2

R2
R
2
R1 + R2
R1
R1 +
Av3 + Av 4

(16)

Analyzing (11), the admittance matrix has 22 nonzero

coefficients and the order is 88, because the equivalent
circuit shown in Fig. 4(b) has 6 nodes and the other two
equations are due to the two VCVS, whereas (12) has 10
nonzero coefficients and the order is 44. Therefore, not only
the order of the admittance matrix is much lower when using
the proposed stamp of the FD-VCVS compared with the
traditional stamp of a VCVS, but the number of nonzero
coefficients and the generation of canceling terms are also
reduced [6], [7]. Therefore, fully-symbolic small-signal
characteristics of analog circuits containing fully-differential
Opamps can easily be computed by applying a standard NA,
which means that the computational complexity and memory
consumption during the solution of the system of equations by
using recursive determinant expansion techniques are
improved. We would like to note that whether capacitors are
included in the c- and d-terminals from Fig. 2, in order to
model a single pole, the order of the admittance matrices
along with the number of nonzero coefficients given by (8)
and (12) are maintained. Furthermore, the proposed
admittance matrix model can also be used to analyze nonlinear
circuits at low and middle frequencies [15].

[10] C. Snchez-Lpez, R. Ochoa-Montiel, A. Ruiz-Pastor, and B.M.

Gonzlez Contreras, Symbolic nodal analysis of fully-differential
analog circuits, In Proc. IEEE Int. Latin Amer. Symp. Circuits Syst.
vol. 1, no. 1, pp. 1-4, Feb. 2013.
[11] C. Snchez-Lpez, A. Ruiz-Pastor, R. Ochoa-Montiel, and M.A.
Carrasco-Aguilar, Symbolic nodal analysis of analog circuits with
modern multiport functional blocks, Radioengineering. vol. 22, no. 2,
pp. 518-525, Jun. 2013.
[12] D.G. Haigh, F.Q. Tan, and P.M. Radmore, Systematic Synthesis of
Active-RC Circuit Building-blocks, Anal. Integr. Circuits and Signal
Process, vol. 43, no. 3, pp. 297-315, Jun. 2005.
[13] D.G. Haigh, T.J.W. Clarke, and P.M. Radmore, Symbolic Framework
for Linear Active Circuits based on Port Equivalence using Limit
Variables, IEEE Trans. Circuits Syst. I: Reg. papers, vol. 53, no. 9, pp.
2011-2024, Sep. 2006.
[14] D.G. Haigh, and P.M. Radmore, Admittance Matrix Models for the
Nullor using Limit Variables and Their Application to Circuit Design,
IEEE Trans. Circuits Syst. I: Reg. papers, vol. 53, no. 10, pp. 22142223, Oct. 2006.

V. CONCLUSIONS
In this paper, a new admittance matrix model for FD-VCVS
has been proposed. Based on this stamp, fully-symbolic
transfer functions of a single-ended and balanced differential
amplifier were computed by applying NA. Moreover,
symbolic expressions of the common-mode gain along with
the CMRR for the latter example were also computed. The
significant advantage of the proposed stamp is that it can be
used to formulate smaller matrices compared to traditional
MNA formulation. Besides, the new stamp can be used within
a CAD tool, achieving a considerable reduction not only in the
order of the system of equations, but also in the generation of
nonzero elements in the NA matrix. Therefore, as a
consequence, the CPU-time and memory consumption during
the solution process will be improved, as has already been
demonstrated in [6].

IEEE Catalog Number CFP13827-ART

ISBN 978-1-4799-1461-6
978-1-4799-1461-6/13/$31.00 2013 IEEE

[15] E. Ortega-Torres, C. Snchez-Lpez and J. Mendoza-Lpez, Frequency

behavior of saturated nonlinear function series based on Opamps, Rev.
Mexicana de Fsica. In press.

452